【発明の詳細な説明】［産業上の利用分野］本発明は低印加電圧でウエノ＼を平坦度良く保持するこ
とのできる真空・静電チャ・νりに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a vacuum/electrostatic cha/v-cure that can hold utensils with good flatness with low applied voltage.
［関連技術］真空・静電チャックでにワエハに接する面（以下接面と
いう）内に真空チャック用の溝を形成し、さらにこの接
面のごく近傍に静電チャック用の電極を配置しなければ
ならない。そして、ウェハを平坦度良く保持するために
は、真空チャック用の溝ならびに静電チャック用の電極
を接面内に一様に配置しなければならない。[Related technology] A groove for the vacuum chuck must be formed in the surface of the vacuum/electrostatic chuck that contacts the wafer (hereinafter referred to as the contact surface), and an electrode for the electrostatic chuck must be placed very close to this contact surface. Must be. In order to hold the wafer with good flatness, the grooves for the vacuum chuck and the electrodes for the electrostatic chuck must be uniformly arranged within the contact surface.
そのため、第５図及び第６図に示すように、真空チャッ
ク用の溝１の溝パターンの下層に静電チャック用の電極
２を一様に配置したり、また第７図及び第８図に示すよ
うに真空チャックパターン用の溝と溝との間に静電チャ
ック用の多数に分割された電極２を配置している。Therefore, as shown in FIGS. 5 and 6, the electrodes 2 for the electrostatic chuck are uniformly arranged under the groove pattern of the groove 1 for the vacuum chuck, and as shown in FIGS. 7 and 8. As shown, a plurality of divided electrodes 2 for electrostatic chucks are arranged between grooves for vacuum chuck patterns.
［発明が解決しようとする課題］第５図及び第６図に示すような階層構成では真空チャッ
ク用の溝パターンと静電チャック用の電極パターンがほ
ぼ独立して設計できるため、ウェハの平坦度が良（なる
ように各パターンを最適にすることはできるが、電極と
ウェハとの距離が、（溝１の深さ）と（溝１と電極２と
の間の絶縁薄膜３の厚み）との和になる。[Problems to be Solved by the Invention] In the hierarchical configuration shown in FIGS. 5 and 6, the groove pattern for the vacuum chuck and the electrode pattern for the electrostatic chuck can be designed almost independently, so that the flatness of the wafer can be improved. Although each pattern can be optimized so that the distance between the electrode and the wafer is becomes the sum of
ここで、溝１の深さは一般的な真空チャックで５００ミ
クロン（μｍ）位、溝１と電極２との間の絶縁薄膜の最
も薄い膜厚は、静電チャックの使用電圧に対する耐圧お
よび加工技術から決定され、１００〜３００ミクロン位
である。したがって、第５図及び第６図に示すような階
層構造では電極とウニへの距離は、最短で６００〜８０
０ミクロン程度となる。一方、静電チャック単体の場合
、絶縁薄膜の最も薄い厚みも、静電チャックの使用電圧
に対する耐圧および加工技術から決定される絶縁膜厚で
あり１００〜３００ミクロンであるが、それが電極とウ
ェハとの距離となる。静電力は電極とウェハの距離の二
乗に反比例するので、同一の印加電圧での静電力は、第
５図及び第６図に示すものの場合は、静電チャック単体
の場合の約１／７〜１７３６程度にしかすぎない。Here, the depth of groove 1 is about 500 microns (μm) in a general vacuum chuck, and the thinnest thickness of the insulating thin film between groove 1 and electrode 2 is determined by the withstand voltage and processing voltage for the electrostatic chuck's working voltage. It is determined from technology and is around 100 to 300 microns. Therefore, in the hierarchical structure shown in Figures 5 and 6, the distance between the electrode and the sea urchin is at least 600 to 800 mm.
It will be about 0 microns. On the other hand, in the case of a single electrostatic chuck, the thinnest thickness of the insulating thin film is 100 to 300 microns, which is determined by the withstand voltage and processing technology for the working voltage of the electrostatic chuck, but it is the thickness between the electrode and the wafer. The distance between Since the electrostatic force is inversely proportional to the square of the distance between the electrode and the wafer, the electrostatic force at the same applied voltage is approximately 1/7 to 1/7th of the electrostatic chuck alone in the cases shown in Figures 5 and 6. It is only about 1736.
第７図及び第８図に示すような真空チャック用の溝１の
底と静電チャック用の電極２とを同一平面内に形成する
場合、ウェハーと電極との間の距離は静電チャック単体
の場合と同じであり静電力については問題はないが、溝
パターンと電極パターンが相互に影響を及ぼすのでパタ
ーンの最適化が難しくなる。また、電極２が複数個に分
割されるため、各電極への給電用配線も複雑になる。When the bottom of the groove 1 for a vacuum chuck and the electrode 2 for an electrostatic chuck are formed in the same plane as shown in FIGS. 7 and 8, the distance between the wafer and the electrode is This is the same as in the case of , and there is no problem with electrostatic force, but the groove pattern and the electrode pattern influence each other, making it difficult to optimize the pattern. Furthermore, since the electrode 2 is divided into a plurality of parts, the power supply wiring to each electrode becomes complicated.
本発明は、上記の問題を解決するためになされたもので
あり、低印加電圧でウェハを平坦度良く保持することが
でき、かつ、電極への給電用配線も簡素な真空・静電チ
ャックを提供することを目的としている。The present invention was made to solve the above problems, and provides a vacuum/electrostatic chuck that can hold a wafer with good flatness with a low applied voltage and has simple wiring for power supply to the electrodes. is intended to provide.
上記課題を解決するための本発明の要旨は、大気と真空
の差圧により生じる力と静電力を併用してウェハな保持
する真空・静電チャックにおいて、静電チャック用の電
極上に絶縁薄膜が形成され、該絶縁薄膜の表面に、該絶
縁薄膜の厚みよりも小さな深さの真空チャック用の溝が
形成されていることを特徴とする真空・静電チャックに
存在する。The gist of the present invention for solving the above problems is to provide a vacuum/electrostatic chuck that uses a combination of force generated by the pressure difference between the atmosphere and vacuum and electrostatic force to hold a wafer, and an insulating thin film is provided on the electrode for the electrostatic chuck. exists in a vacuum/electrostatic chuck characterized in that a vacuum chuck groove is formed on the surface of the insulating thin film and has a depth smaller than the thickness of the insulating thin film.
ここで、絶縁薄膜の厚みは、おもに静電チャックの使用
電圧に対する耐圧および加工技術から決定され、１００
〜３００ミクロンとすることが好ましい。また、真空チ
ャック用の溝の深さは絶縁薄膜の厚さより十分浅くする
ことが好ましく、具体的には１０〜１００ミクロンが好
ましい。Here, the thickness of the insulating thin film is determined mainly from the withstand voltage and processing technology for the working voltage of the electrostatic chuck.
It is preferable to set it as 300 microns. Further, the depth of the groove for the vacuum chuck is preferably sufficiently shallower than the thickness of the insulating thin film, specifically preferably 10 to 100 microns.
［作用］第１図は、本発明の概念的な構成を示す図でありこれに
基づいて作用を説明する。[Operation] FIG. 1 is a diagram showing a conceptual configuration of the present invention, and the operation will be explained based on this.
本発明では、静電チャック用の電極２上に絶縁薄膜３が
形成され、絶縁薄膜３の表面に、絶縁薄膜３の厚みに比
べ十分浅い深さの真空チャック用の溝１が形成されてい
るため、ウェハ４と静電チャック用の電極２との間の距
離は静電チャック単体の場合と同じとなり、低印加電圧
で十分な静電力を得ることができる。In the present invention, an insulating thin film 3 is formed on an electrode 2 for an electrostatic chuck, and a groove 1 for a vacuum chuck having a depth sufficiently shallow compared to the thickness of the insulating thin film 3 is formed on the surface of the insulating thin film 3. Therefore, the distance between the wafer 4 and the electrostatic chuck electrode 2 is the same as in the case of a single electrostatic chuck, and sufficient electrostatic force can be obtained with a low applied voltage.
また、本発明では、溝パターンと電極パターンは階層構
造になっているため各パターンをほぼ独立して設計する
ことができ、配置の最適化および給電が容易に行うこと
ができる。Further, in the present invention, since the groove pattern and the electrode pattern have a hierarchical structure, each pattern can be designed almost independently, and the arrangement and power supply can be easily optimized.
［実施例］以下に本発明の実施例を図面に基づき詳述する。[Example]Embodiments of the present invention will be described in detail below based on the drawings.
第２図及び第３図は同心円型の真空チャック用溝パター
ンと双極型の静電チャック用電極パターンを用いた場合
の実施例の構成図である。な右、前述した関連技術の構
成部分と同様なものについては同一の符号を付している
。FIGS. 2 and 3 are configuration diagrams of an embodiment in which a concentric vacuum chuck groove pattern and a bipolar electrostatic chuck electrode pattern are used. Furthermore, the same reference numerals are given to the same components as those of the related technology described above.
同図中１は真空チャック用の溝、２は静電チャック用の
電極、３は絶縁薄膜、５は真空・静電チャック本体、６
は真空チャック用の真空の引き口である。In the figure, 1 is a groove for a vacuum chuck, 2 is an electrode for an electrostatic chuck, 3 is an insulating thin film, 5 is a vacuum/electrostatic chuck body, and 6
is the vacuum outlet for the vacuum chuck.
以上のように構成された実施例について構造を説明する
。The structure of the embodiment configured as above will be explained.
本実施例において、絶縁薄膜３および真空・静電チャッ
ク本体５はエンジニアリングセラミックスから成り、絶
縁薄膜３の厚みは本例では３００ミクロンである。本例
では、この絶縁薄膜３の表面には真空チャック用の溝１
が深さ５０ミクロンで形成されている。真空チャック用
の溝１内の大気は真空・静電チャック本体５の裏面まで
貫通した穴である真空チャック用の真空の引き口６を通
して排気される。静電チャック用の電極２は絶縁薄膜３
と静電チャック本体５の境界（表面から３００ミクロン
の深さ）に配置されており、これは通常の静電チャック
単体の場合と同じである。In this embodiment, the insulating thin film 3 and the vacuum/electrostatic chuck main body 5 are made of engineering ceramics, and the thickness of the insulating thin film 3 is 300 microns in this embodiment. In this example, the surface of this insulating thin film 3 has a groove 1 for a vacuum chuck.
is formed with a depth of 50 microns. The atmosphere in the groove 1 for the vacuum chuck is exhausted through the vacuum outlet 6 for the vacuum chuck, which is a hole penetrating to the back surface of the vacuum/electrostatic chuck main body 5. The electrode 2 for electrostatic chuck is an insulating thin film 3
and the electrostatic chuck main body 5 (at a depth of 300 microns from the surface), which is the same as in the case of a normal electrostatic chuck alone.
真空チャック用の溝ｌの深さ（本例では５０ミクロン）
は一般的な真空チャックの溝の深さの１０分の１位であ
るが、これにつき真空チャックの吸着力を調べたところ
゛第４図に示すように真空チャックとして十分に機能し
ていた。Depth of groove l for vacuum chuck (50 microns in this example)
The depth of the groove is about 1/10th of the groove depth of a typical vacuum chuck, but when we investigated the suction force of the vacuum chuck, it was found to function satisfactorily as a vacuum chuck, as shown in Figure 4.
このように、真空チャック用の十分に浅い溝を静電チャ
ック電極とウニへ間に在する絶縁薄膜の表面に形成する
ことにより低印加電圧でウェハを平坦度良く保持するこ
とができる真空・静電チャックを実現することができる
。In this way, by forming a sufficiently shallow groove for the vacuum chuck on the surface of the insulating thin film between the electrostatic chuck electrode and the urchin, we have created a vacuum/static system that can hold the wafer with good flatness with low applied voltage. An electric chuck can be realized.
なお、本例では、絶縁薄膜の厚みとして３００ミクロン
の場合を、真空チャック用の溝の深さとして５０ミクロ
ンの場合を例として示したが、絶縁薄膜の厚さを１００
〜３００ミクロンの範囲とし、真空チャック用の溝の深
さを１０〜１００ミクロンの範囲とした場合であっても
本例と同様の良好な結果が得られた。In this example, the case where the thickness of the insulating thin film is 300 microns and the depth of the groove for the vacuum chuck is 50 microns is shown as an example, but the thickness of the insulating thin film is 100 microns.
Good results similar to those of this example were obtained even when the depth of the groove for the vacuum chuck was set in the range of 10 to 100 microns.
また、本実施例では同心円型の真空チャック用溝パター
ンと双極型の静電チャック用電極パターンを用いた場合
について述べたが、他の溝パターンおよび電極パターン
を用いても同様な効果を得ることができる。In addition, although this example describes the case where a concentric vacuum chuck groove pattern and a bipolar electrostatic chuck electrode pattern are used, similar effects can be obtained by using other groove patterns and electrode patterns. I can do it.
本発明によれば、低印加電圧でウェハを平坦度良く保持
することができる真空・静電チャックを実現することが
できる。したがって、本発明は、例えば、電子ビーム描
画装置等の半導体製造装置に適用することが可能で、装
置の構造の簡素化を行うことができ、これは装置の信頼
性の向上ならびに低価格化に寄与する。According to the present invention, it is possible to realize a vacuum/electrostatic chuck that can hold a wafer with good flatness with a low applied voltage. Therefore, the present invention can be applied to, for example, semiconductor manufacturing equipment such as an electron beam lithography equipment, and the structure of the equipment can be simplified, which improves the reliability of the equipment and reduces the cost. Contribute.
第１図は本発明の概念的な構成を示す断面図、第２図は
同心円型の真空チャック用溝パターンと双極型の静電チ
ャック用電極パターンを用いた場合の実施例を示す平面
図、第３図は第２図のＡ−Ａ°線に沿う断面図、第４図
は第２図及び第３図の実施例における真空チャックの吸
着力の分布図、第５図は従来の真空・静電チャックの構
成を示す平面図、第６図は第５図のＡ−Ａ’線に沿う断
面図、第７図はもう一つの従来の真空・静電チャックの
構成を示す平面図、第８図は第７図のＡ−Ａ’線に沿う
断面図である。（符号の説明）１・−・真空チャック用の溝、２・・・静電チャック用
の電極、３・・・絶縁薄膜、４・・・ウェハ、５・・・
真空・静電チャック本体、６・・・真空チャック用の真
空の引き口。第 １ 図第２図第４図ウェハ ウエノ＼中心
最外周ウェハ半径方向の位置第５図第７図FIG. 1 is a sectional view showing the conceptual structure of the present invention, and FIG. 2 is a plan view showing an embodiment using a concentric vacuum chuck groove pattern and a bipolar electrostatic chuck electrode pattern. 3 is a sectional view taken along the line A-A° in FIG. 6 is a plan view showing the structure of an electrostatic chuck; FIG. 6 is a sectional view taken along the line AA' in FIG. 5; FIG. 7 is a plan view showing the structure of another conventional vacuum/electrostatic chuck; FIG. 8 is a sectional view taken along line AA' in FIG. 7. (Explanation of symbols) 1...Groove for vacuum chuck, 2...Electrode for electrostatic chuck, 3...Insulating thin film, 4...Wafer, 5...
Vacuum/electrostatic chuck body, 6... Vacuum outlet for vacuum chuck. Figure 1 Figure 2 Figure 4 Wafer wafer center
Radial position of outermost wafer Fig. 5 Fig. 7
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2271706AJPH04147642A (en) | 1990-10-09 | 1990-10-09 | Vacuum/electrostatic chuck |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2271706AJPH04147642A (en) | 1990-10-09 | 1990-10-09 | Vacuum/electrostatic chuck |
| Publication Number | Publication Date |
|---|---|
| JPH04147642Atrue JPH04147642A (en) | 1992-05-21 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2271706APendingJPH04147642A (en) | 1990-10-09 | 1990-10-09 | Vacuum/electrostatic chuck |
| Country | Link |
|---|---|
| JP (1) | JPH04147642A (en) |
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| JP2006060241A (en)* | 2004-08-23 | 2006-03-02 | Asml Holding Nv | Patterned mask holding device and method of using two holding systems |
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| JP2011181940A (en)* | 2011-04-13 | 2011-09-15 | Ulvac Japan Ltd | Method of manufacturing chucking device |
| JP2012044200A (en)* | 2011-10-05 | 2012-03-01 | Ulvac Japan Ltd | Suction device |
| JP2013219070A (en)* | 2012-04-04 | 2013-10-24 | Tokyo Electron Ltd | Device and method for holding substrate |
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| JPH06314735A (en)* | 1993-04-28 | 1994-11-08 | Kyocera Corp | Electrostatic chuck |
| EP0635870A1 (en)* | 1993-07-20 | 1995-01-25 | Applied Materials, Inc. | An electrostatic chuck having a grooved surface |
| US5522131A (en)* | 1993-07-20 | 1996-06-04 | Applied Materials, Inc. | Electrostatic chuck having a grooved surface |
| DE10312626A1 (en)* | 2003-03-21 | 2004-10-07 | Infineon Technologies Ag | Electrostatic carrier for application of a removable compound to an electrically conductive workpiece useful in semiconductor technology, e.g. in production of ultrathin wafers of thickness less than 50 microns |
| DE10312626B4 (en)* | 2003-03-21 | 2014-12-24 | Infineon Technologies Ag | Electrostatic carrier |
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| JP2009147371A (en)* | 2004-08-23 | 2009-07-02 | Asml Holding Nv | Patterned mask holding device and method using two holding systems |
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| JP2013219070A (en)* | 2012-04-04 | 2013-10-24 | Tokyo Electron Ltd | Device and method for holding substrate |
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