【発明の詳細な説明】〔概 要〕テレビ電話装置の静止画送受信回路に関し、メモリを小
規模に出来安価となるテレビ電話装置の静止画送受信回
路の提供を目的とし、カメラよりの映像信号を輝度と色
差信号に分離する映像入力回路と、該映像入力回路の出力の輝度と色差信号に分離されたア
ナログ信号をディジタル信号に変換するアナログ・ディ
ジタル変換回路（以下ＡＤ変換回路と称す）と、該ＡＤ変換回路の出力のディジタル化された輝度と色差
信号を記憶したり、あるいわ相手より圧縮して送信され
伸張された静止画信号を記憶する圧縮・伸張用フレーム
メモリと、該圧縮・伸張用フレームメモリに記憶された輝度と色差
信号を読み出し圧縮したり、あるいわ相手より圧縮して
送信された静止画信号を伸張する圧縮・伸張制御回路と
、該圧縮・伸張制御回路にて圧縮された信号を一時記憶す
る圧縮データ一時記憶バッファと、該圧縮データ一時記
憶バッファに記憶されたデータを制御部の指示にて読み
出し送信する送信回路と、相手より圧縮して送信された静止画信号を受信し、該圧
縮・伸張制御回路に送る受信回路と、該圧縮・伸張用フ
レームメモリに記憶されている伸張された静止画信号を
読み出し記憶する画面表示用メモリと、該画面表示用メモリに記憶された静止画信号をアナログ
信号に変換するディジタル・アナログ変換回路（以下Ｄ
Ａ変換回路と称す）と、該ＤＡ変換回路の出力のアナログに変換された静止画信
号を表示部へ出力する映像出力回路と、該圧縮・伸張制
御回路にて圧縮が完了した時該送信回路を介して相手側
に圧縮完了通知を送出し、又相手よりの圧縮完了通知を
該受信回路を介して受信した時、該送信回路にて該圧縮
データ一時記憶バッファより圧縮したデータを読み出し
送信させる制御部より構成する。[Detailed Description of the Invention] [Summary] The purpose of this invention is to provide a still image transmitting/receiving circuit for a video telephone device that allows the memory to be reduced in size and is inexpensive. a video input circuit that separates the luminance and color difference signals; an analog-to-digital conversion circuit (hereinafter referred to as AD conversion circuit) that converts the analog signal output from the video input circuit separated into the brightness and color difference signals into a digital signal; a compression/expansion frame memory for storing digitized luminance and color difference signals output from the AD conversion circuit, or for storing still image signals compressed and transmitted from the other party and expanded; A compression/expansion control circuit reads out and compresses the luminance and color difference signals stored in the frame memory of the receiver, or expands the still image signal compressed and transmitted from the other party. a compressed data temporary storage buffer that temporarily stores compressed data signals; a transmission circuit that reads and transmits the data stored in the compressed data temporary storage buffer according to instructions from a control unit; and a transmission circuit that reads and transmits the data stored in the compressed data temporary storage buffer; a receiving circuit that receives the signal and sends it to the compression/expansion control circuit; a screen display memory that reads out and stores the expanded still image signal stored in the compression/expansion frame memory; A digital-to-analog conversion circuit (hereinafter referred to as D) converts the still image signal into an analog signal.
A video output circuit that outputs a still image signal converted into an analog output from the DA conversion circuit to the display unit, and a transmission circuit when compression is completed in the compression/expansion control circuit. Sends a compression completion notification to the other party via the other party, and when receiving a compression completion notification from the other party via the reception circuit, causes the transmission circuit to read the compressed data from the compressed data temporary storage buffer and transmit it. Consists of a control section.
本発明は、カラー静止画像を圧縮伸張技術を用いて送受
信するテレビ電話装置の静止画送受信回路の改良に関す
る。The present invention relates to an improvement in a still image transmitting/receiving circuit for a video telephone device that transmits and receives color still images using compression/expansion technology.
テレビ電話装置の静止画送受信回路は、メモリの回路規
模を小さくし、安価となることが望まれている。It is desired that the still image transmitting/receiving circuit of a video telephone device has a smaller memory circuit size and is less expensive.
第４図は従来例の静止画送受信回路のブロック図である
。FIG. 4 is a block diagram of a conventional still image transmitting and receiving circuit.
第４図では、カメラよりのカラー映像信号は、映像入力
回路１にて輝度と色差信号に分離され、ＡＤ変換回路２
にてディジタル信号に変換され、圧縮用フレームメモリ
１６に記憶される。In FIG. 4, a color video signal from a camera is separated into luminance and color difference signals by a video input circuit 1, and an AD conversion circuit 2.
The signal is converted into a digital signal and stored in the compression frame memory 16.
圧縮制御回路１７は圧縮用フレームメモリ１６に記憶さ
れたｌフレームの信号を１／１０程度に圧縮して送信回
路６′を介して相手側に送信する。The compression control circuit 17 compresses the signal of 1 frame stored in the compression frame memory 16 to about 1/10, and transmits it to the other party via the transmission circuit 6'.
相手側よりの圧縮された静止画信号は受信回路７′を介
して受信し、伸張制御回路１８にて伸張し、伸張用フレ
ームメモリ１９に書き込む。A compressed still image signal from the other party is received via the receiving circuit 7', decompressed by the decompression control circuit 18, and written into the decompression frame memory 19.
すると、画面表示用メモリ８はこのｌフレームの信号を
読み出°し記憶し、ＤＡ変換回路９にてアナログ信号に
変換し、映像出力回路ｌＯを介して表示部に送り表示す
る。Then, the screen display memory 8 reads out and stores the signal of this 1 frame, converts it into an analog signal in the DA conversion circuit 9, and sends it to the display section via the video output circuit 1O for display.
尚制御部１１’はＣＰＵ１２．ＲＯＭ１３．ＲＡＭ１４
等にて構成され、圧縮制御回路１７が圧縮し終わったら
、次の圧縮を行う状態になる迄の間を制御したり、伸張
制御回路１日が伸張し終わったら、次の伸張を行う状態
になる迄の間を制御したりする。Note that the control unit 11' is a CPU 12. ROM13. RAM14
After the compression control circuit 17 finishes compression, it controls the time until the next compression is performed, and when the decompression control circuit 17 finishes decompression for one day, it goes into the next decompression state. Control the process until it becomes true.
このように静止画信号を圧縮して送信し、受信すると伸
張して静止画像の送受信を行う。In this way, the still image signal is compressed and transmitted, and when received, it is expanded and the still image is transmitted and received.
しかしながら、カラー静止画の情報量は、６４０Ｘ４０
０ドツトの画面で、Ｒ，Ｇ、Ｂ各８ビットで量子化する
と、７６８にバイトのメモリが必要であり、上記の静止
画送受信回路では、圧縮用フレームメモリ１６及び伸張
用フレームメモリ１９と２つの７６８にバイトのフレー
ムメモリを必要とし、メモリが大規模となり高価となる
問題点がある。However, the amount of information of a color still image is 640×40
If a 0-dot screen is quantized using 8 bits each for R, G, and B, 768 bytes of memory are required. This method requires a 768-byte frame memory, which has the problem of making the memory large and expensive.
本発明はメモリを小規模に出来安価となるテレビ電話装
置の静止画送受信回路の提供を目的としている。An object of the present invention is to provide a still image transmitting/receiving circuit for a video telephone device, which has a small memory and is inexpensive.
第１図は本発明の原理ブロック図である。FIG. 1 is a block diagram of the principle of the present invention.
第１図に示す如く、カメラよりの映像信号を輝度と色差
信号に分離する映像入力回路ｌと、該映像入力回路１の
出力の輝度と色差信号に分離されたアナログ信号をディ
ジタル信号に変換するＡＤ変換回路２と、該ＡＤ変換回路２の出力のディジタル化された輝度と色
差信号を記憶したり、あるいわ相手より圧縮して送信さ
れ伸張された静止画信号を記憶する圧縮・伸張用フレー
ムメモリ３と、該圧縮・伸張用フレームメモリ３に記憶された輝度と色
差信号を読み出し圧縮したり、あるいわ相手より圧縮し
て送信された静止画信号を伸張する圧縮・伸張制御回路
４と、該圧縮・伸張制御回路４にて圧縮された信号を一時記憶
する圧縮データ一時記憶バッファ５と、該圧縮データ一
時記憶バッファ５に記憶されたデータを制御部１１の指
示にて読み出し送信する送信回路６と、相手より圧縮して送信された静止画信号を受信し、該圧
縮・伸張制御回路４に送る受信回路７と、該圧縮・伸張
用フレームメモリ３に記憶されている伸張された静止画
信号を読み出し記憶する画面表示用メモリ８と、該画面表示用メモリ８に記憶された静止画信号をアナロ
グ信号に変換するＤＡ変換回路９と、該ＤＡ変換回路９
の出力のアナログに変換された静止画信号を表示部へ出
力する映像出力回路１０と、該圧縮・伸張制御回路４にて圧縮が完了した時該送信回
路６を介して相手側に圧縮完了通知を送出し、又相手よ
りの圧縮完了通知を該受信回路７を介して受信した時、
該送信回路６にて該圧縮データ一時記憶バッファ５より
圧縮したデータを読み出し送信させる制御部１１より構
成する。As shown in FIG. 1, there is a video input circuit 1 that separates a video signal from a camera into luminance and color difference signals, and an analog signal output from the video input circuit 1 that is separated into brightness and color difference signals and converts it into a digital signal. An AD conversion circuit 2, and a compression/expansion frame that stores the digitized luminance and color difference signals output from the AD conversion circuit 2, or stores still image signals compressed and transmitted from the other party and expanded. a memory 3; a compression/expansion control circuit 4 that reads out and compresses the luminance and color difference signals stored in the compression/expansion frame memory 3, or expands still image signals compressed and transmitted from the other party; A compressed data temporary storage buffer 5 that temporarily stores the signal compressed by the compression/expansion control circuit 4, and a transmission circuit that reads and transmits the data stored in the compressed data temporary storage buffer 5 according to instructions from the control unit 11. 6, a receiving circuit 7 that receives a still image signal compressed and transmitted from the other party, and sends it to the compression/expansion control circuit 4; A screen display memory 8 that reads and stores signals, a DA conversion circuit 9 that converts the still image signal stored in the screen display memory 8 into an analog signal, and the DA conversion circuit 9
a video output circuit 10 that outputs a still image signal converted into an analog output from the output to a display section; and when compression is completed in the compression/expansion control circuit 4, a compression completion notification is sent to the other party via the transmission circuit 6. , and when a compression completion notification is received from the other party via the receiving circuit 7,
The control section 11 causes the transmission circuit 6 to read compressed data from the compressed data temporary storage buffer 5 and transmit it.
本発明にれば、ＡＤ変換回路２にてディジタル信号に変
換された輝度１色差信号は、圧縮・伸張用フレームメモ
リ３に記憶され、圧縮・伸張制御回路４にて読み出し１
／１０程度に圧縮され、圧縮データ一時記憶バッファ５
に一時記憶される。According to the present invention, the luminance one color difference signal converted into a digital signal by the AD conversion circuit 2 is stored in the compression/expansion frame memory 3, and read out by the compression/expansion control circuit 4.
/10, compressed data temporary storage buffer 5
is temporarily stored.
圧縮・伸張制御回路４にて圧縮が完了すると、伸張が可
能になるので、制御部１１は、送信回路６を介して圧縮
完了の通知を相手側に送信する。When compression is completed in the compression/decompression control circuit 4, decompression becomes possible, so the control unit 11 transmits a notification of completion of compression to the other party via the transmission circuit 6.
相手側も圧縮・伸張制御回路４にて同様に圧縮を行って
おり、圧縮が完了すると圧縮完了の通知を送信するので
、受信回路７が受信すると、これを制御部１１に知らせ
る。The compression/expansion control circuit 4 on the other side also performs compression in the same way, and when the compression is completed, a notification of completion of compression is sent. When the receiving circuit 7 receives this, it notifies the control unit 11 of this.
制御部１１はこれを受信すると相手側の圧縮・伸張制御
回路４は伸張が可能になったと認識し１、送信回路６に
て圧縮データ一時記憶バッファ５より圧縮したデータを
読み出し相手側に送信させる。When the control unit 11 receives this, the compression/decompression control circuit 4 of the other party recognizes that decompression is now possible, and causes the transmission circuit 6 to read out the compressed data from the compressed data temporary storage buffer 5 and transmit it to the other party. .
相手側では、この圧縮完了の通知を受信すると、伸張可
能となったことを知り、圧縮したデータを送信し、この
送信されてきた圧縮データは、受信回路７を介して、伸
張が可能となった圧縮・伸張制御回路４に入力して伸張
され、圧縮・伸張用フレームメモリ３に書き込まれる。When the other party receives this notice of completion of compression, it knows that decompression is now possible, and transmits the compressed data. The data is input to the compression/expansion control circuit 4, expanded, and written to the compression/expansion frame memory 3.
すると、画面表示用メモリ８は、これを読み出し記憶し
、ＤＡ変換回路９にてアナログの映像信号に変換し、映
像出力回路１０を介して表示部に送り表示させる。Then, the screen display memory 8 reads and stores this, converts it into an analog video signal in the DA conversion circuit 9, and sends it to the display section via the video output circuit 10 for display.
この場合は、７６８にバイトのメモリは圧縮・伸張用フ
レームメモリ３０１個となり、圧縮データ一時記憶バッ
ファ５は１／１０の圧縮ならフレームメモリの１／１０
の規模でよ＜７６８にバイトのメモリを２個有する従来
の静止画送受信回路の場合よりもメモリ規模は大幅に小
さくなり、安価となる。In this case, the memory of 768 bytes is 301 frame memories for compression/expansion, and the compressed data temporary storage buffer 5 is 1/10 of the frame memory if compression is 1/10.
The memory size is significantly smaller and the cost is lower than that of a conventional still image transmitting/receiving circuit which has two memories of <768 bytes.
第２図は本発明の実施例の静止画送受信回路のブロック
図、第３図は第２図の場合のタイムチャートである。FIG. 2 is a block diagram of a still image transmitting/receiving circuit according to an embodiment of the present invention, and FIG. 3 is a time chart in the case of FIG.
第２図では、カメラよりの映像信号は、従来例と同じく
映像入力回路ｌにて輝度と色差信号に分離されＡＤ変換
回路２にてディジタル信号に変換され、第３図の（自端
末）（送信側）のフレームメモリ取り込みのタイミング
で、圧縮・伸張用フレームメモリ３に記憶される。In Fig. 2, the video signal from the camera is separated into luminance and color difference signals by the video input circuit 1, as in the conventional example, and converted into a digital signal by the AD conversion circuit 2. The data is stored in the compression/expansion frame memory 3 at the timing of frame memory capture on the sending side).
そして圧縮・伸張制御回路４にて読み出し、第３図の（
自端末）（送信側）の圧縮のタイミングで圧縮し、圧縮
データ一時記憶バッファ５に記憶する。Then, it is read out by the compression/expansion control circuit 4, and (
The compressed data is compressed at the compression timing of the own terminal (transmitting side) and stored in the compressed data temporary storage buffer 5.
この圧縮が終わると伸張可能となるので、制御部１１で
は、ＣＰＵ１２の制御により通信インタフェース１５を
介して圧縮完了通知信号を送信回路６を介して第３図に
示す如（相手側に送信する。When this compression is completed, decompression becomes possible, so the control unit 11 transmits a compression completion notification signal to the other party via the communication interface 15 via the transmission circuit 6 as shown in FIG. 3 under the control of the CPU 12.
相手側でも、第３図の（相手端末）（送信側）に示す如
く同様の圧縮を行っており圧縮が完了すると圧縮完了通
知信号を送信する。The other party also performs similar compression as shown in FIG. 3 (other terminal) (transmission side), and when the compression is completed, it sends a compression completion notification signal.
この信号を、受信回路７を介し、制御部１１の通信イン
タフェース１５が受信しＣＰＵ１２に知らせると、第３
図の（自端末）（送信側）の送信のタイミングで、送信
回路６にて圧縮データ一時記憶バッファ５に記憶した信
号（データＡＩ）を読み出し送信させる。When this signal is received by the communication interface 15 of the control unit 11 via the receiving circuit 7 and notified to the CPU 12, the third
At the timing of transmission of the own terminal (transmission side) in the figure, the transmission circuit 6 reads out the signal (data AI) stored in the compressed data temporary storage buffer 5 and causes it to be transmitted.
又第３図の（相手端末）（送信側）の送信のタイミング
で、相手側にて、上記と同様にして圧縮され送信された
信号（データＢｌ）を、第３図の（自端末）（受信側）
の受信のタイミングで、受信回路７にて受信すると、こ
の信号は圧縮・伸張制御回路４に入力し、第３図の（自
端末）（受信側）の伸張のタイミングで、圧縮が終わっ
ているので伸張し、圧縮・伸張用フレームメモリ３に記
憶し、第３図の（自端末）（受信側）の転送のタイミン
グで画面表示用メモリ８に転送し、ＤＡ変換回路９にて
アナログ信号の映像信号に変換し、映像出力回路ｌＯを
介して表示部に送り、第３図の（自端末）（受信側）の
表示のタイミングで相手側より送られてきた映像信号（
データＢｌ’）を表示する。Also, at the timing of transmission by the (other party terminal) (sending side) in Figure 3, the other party transmits the compressed and transmitted signal (data Bl) in the same manner as above to the (own terminal) (in Figure 3). Receiver)
When the signal is received by the receiving circuit 7 at the reception timing of , this signal is input to the compression/expansion control circuit 4, and the compression is completed at the timing of expansion of (own terminal) (receiving side) as shown in Fig. 3. Therefore, it is decompressed, stored in the compression/decompression frame memory 3, transferred to the screen display memory 8 at the transfer timing of (own terminal) (receiving side) in FIG. It is converted into a video signal and sent to the display section via the video output circuit 1O, and the video signal sent from the other party (
data Bl') is displayed.
この転送が終わると、第３図の（自端末）（送信側）の
フレームメモリ取り込みのタイミングで次の映像信号の
データを圧縮・伸張用フレームメモリ３に記憶し、前記
と同様の動作を繰り返す。When this transfer is completed, the data of the next video signal is stored in the compression/expansion frame memory 3 at the frame memory capture timing of (own terminal) (sending side) in Figure 3, and the same operation as above is repeated. .
又相手側でも、同様の動作を行い、表示部にて映像信号
（データＡ１″）を表示し、第３図の（相手端末）（送
信側）のフレームメモリ取り込みのタイミングで、次の
映像信号のデータを圧縮・伸張用フレームメモリ３に記
憶し、前記と同様の動作を繰り返す。Also, the other party performs the same operation, displays the video signal (data A1'') on the display, and displays the next video signal at the timing of frame memory capture of the (other party terminal) (sending side) in Figure 3. The data is stored in the compression/expansion frame memory 3, and the same operations as described above are repeated.
このようにすると、７６８にバイトのメモリは圧縮・伸
張用フレームメモリ３の１個となり、圧縮データ一時記
憶バッファ５はｌ／１０の圧縮ならフレームメモリのｌ
／１０の規模でよく７６８にバイトのメモリを２個有す
る従来の静止画送受信回路の場合よりもメモリ規模は大
幅に小さくなり、安価となる。In this way, the memory of 768 bytes becomes one frame memory 3 for compression/expansion, and the compressed data temporary storage buffer 5 becomes one part of the frame memory for 1/10 compression.
The memory scale is much smaller than that of a conventional still image transmitting/receiving circuit having two memories of 768 to 10 bytes each, making it cheaper.
以上詳細に説明せる如く本発明によれば、メモリ規模を
大幅に小さ（出来、安価となる効果がある。As described in detail above, according to the present invention, the memory scale can be significantly reduced (and the cost can be reduced).
第１図は本発明の原理ブロック図、第２図は本発明の実施例の静止画送受信回路のブロック
図、第３図は第２図の場合のタイムチャート、第４図は従来
例の静止画送受信回路のブロック図である。図において、ｌは映像入力回路、２はアナログ・ディジタル変換回路、３は圧縮・伸張用フレームメモリ、４は圧縮・伸張制御回路、５は圧縮データ一時記憶バッファ、６．６″は送信回路、７．７°は受信回路、８は画面表示用メモリ、９はディジタル・アナログ変換回路、１０は映像出力回路、１１．１１’ は制御部、１２はＣＰＵ。１３はＲＯＭ。１４はＲＡＭ。１５は通信インタフェース、１６は圧縮用フレームメモリ、１７は圧縮制御回路、１８は伸張制御回路、１９は伸張用フレームメモリを示す。Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of a still image transmitting/receiving circuit according to an embodiment of the present invention, Fig. 3 is a time chart for the case of Fig. 2, and Fig. 4 is a still image diagram of the conventional example. FIG. 2 is a block diagram of an image transmission/reception circuit. In the figure, l is a video input circuit, 2 is an analog/digital conversion circuit, 3 is a frame memory for compression/expansion, 4 is a compression/expansion control circuit, 5 is a compressed data temporary storage buffer, 6.6'' is a transmission circuit, 7.7° is a receiving circuit, 8 is a screen display memory, 9 is a digital-to-analog conversion circuit, 10 is a video output circuit, 11.11' is a control unit, 12 is a CPU. 13 is a ROM. 14 is a RAM. 15 16 is a compression frame memory, 17 is a compression control circuit, 18 is an expansion control circuit, and 19 is an expansion frame memory.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1263356AJPH03124186A (en) | 1989-10-09 | 1989-10-09 | Still image transmission/reception circuit for videophone equipment |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1263356AJPH03124186A (en) | 1989-10-09 | 1989-10-09 | Still image transmission/reception circuit for videophone equipment |
| Publication Number | Publication Date |
|---|---|
| JPH03124186Atrue JPH03124186A (en) | 1991-05-27 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1263356APendingJPH03124186A (en) | 1989-10-09 | 1989-10-09 | Still image transmission/reception circuit for videophone equipment |
| Country | Link |
|---|---|
| JP (1) | JPH03124186A (en) |
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