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JPH02253628A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH02253628A
JPH02253628AJP1075541AJP7554189AJPH02253628AJP H02253628 AJPH02253628 AJP H02253628AJP 1075541 AJP1075541 AJP 1075541AJP 7554189 AJP7554189 AJP 7554189AJP H02253628 AJPH02253628 AJP H02253628A
Authority
JP
Japan
Prior art keywords
metal
metal film
film
bump
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1075541A
Other languages
Japanese (ja)
Inventor
Akira Kikkai
吉開 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC CorpfiledCriticalNEC Corp
Priority to JP1075541ApriorityCriticalpatent/JPH02253628A/en
Publication of JPH02253628ApublicationCriticalpatent/JPH02253628A/en
Pendinglegal-statusCriticalCurrent

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Abstract

PURPOSE:To improve reliability and to suppress an increase in cost by employing a material which is scarcely plated as a first metal film, forming a metal bump, then exposing the first metal film, and then plating a third metal film. CONSTITUTION:First, second metal films 4, 5 such as Ti, Cu, etc., are formed on a whole semiconductor substrate 1 including pad electrodes 2 by a sputtering method. In this case, the film 4 uses metal which is scarcely plated, and the film 5 uses metal which can be plated. A metal bump 7 such as Cu bump is formed on the exposed film 5 by electrolytically plating, and a third metal film 8 such as Au, Pb-Sn, etc., is formed on the substrate 1 including the bump 7 by electrolytically plating or electrolessly plating method. In this case, since the film 8 by plating is scarcely adhered onto the film 4, it is resultantly formed only on the bump 7. Thus, the bump having high reliability and low cost can be obtained.

Description

Translated fromJapanese

【発明の詳細な説明】〔産業上の利用分野〕本発明は半導体装置の製造方法に関し、特に金属バンプ
を有する半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device having metal bumps.

〔従来の技術〕[Conventional technology]

第3図(a)乃至(d)は従来におけるこの種の半導体
装置の第1の製造方法を示す工程順縦断面図である。
FIGS. 3(a) to 3(d) are vertical cross-sectional views in the order of steps showing a first conventional manufacturing method of this type of semiconductor device.

即ち、この製造方法は、第3図(a)のように、半導体
素子を形成した半導体基板l上にアルミニウム層を蒸着
法又はスパッタ法により1μm程度形成し、このアルミ
ニウム層を感光性樹脂を利用して選択エツチングしてパ
ッド電極2を形成する。
That is, in this manufacturing method, as shown in FIG. 3(a), an aluminum layer of about 1 μm is formed by vapor deposition or sputtering on a semiconductor substrate l on which a semiconductor element is formed, and this aluminum layer is formed using a photosensitive resin. Then, selective etching is performed to form the pad electrode 2.

その後、感光性樹脂を除去し、パッド電極2を含む全面
に絶縁膜3としてCVD酸化膜又はプラズマCVD窒化
膜を形成し、かつこの絶縁膜3を選択的にエツチングし
てパッド電極2Q上方に第1の開口を形成する。
Thereafter, the photosensitive resin is removed, a CVD oxide film or a plasma CVD nitride film is formed as an insulating film 3 on the entire surface including the pad electrode 2, and this insulating film 3 is selectively etched to form a layer above the pad electrode 2Q. 1 opening is formed.

その後、第3図(b)のように、パッド電極2を含む半
導体基板の全面に第1及び第2の金属膜4A、5A、例
えばTi、Cu等を〜1000人程度スパフタ法により
形成し、接着、バリアメタル層及びメッキ電極とする。
Thereafter, as shown in FIG. 3(b), first and second metal films 4A and 5A, such as Ti, Cu, etc., are formed on the entire surface of the semiconductor substrate including the pad electrode 2 by about 1,000 people using a sputtering method. Adhesion, barrier metal layer and plated electrode.

そして、第2の金属膜4A上に厚く(〜20μm程度)
感光性樹脂6を形成し、この感光性樹脂6のパッド電極
2上方に第1の開口より大きい第2の開口を形成し、第
2の金属膜5Aを露出させる。
Then, a thick layer (about 20 μm) is formed on the second metal film 4A.
A photosensitive resin 6 is formed, and a second opening larger than the first opening is formed above the pad electrode 2 in the photosensitive resin 6 to expose the second metal film 5A.

次いで、第3図(C)のように、露出した第2の金属膜
5A上に電解メッキにより金属バンプ7、例えばCuバ
ンプを形成する。膜厚は15μm程度あれば十分である
。更に、ボンディング時の密着性を良くする目的で第3
の金属層8、例えばAu。
Next, as shown in FIG. 3(C), metal bumps 7, for example, Cu bumps, are formed on the exposed second metal film 5A by electrolytic plating. A film thickness of about 15 μm is sufficient. Furthermore, a third layer is added for the purpose of improving adhesion during bonding.
metal layer 8, for example Au.

Pb−3n等をメッキ形成(5μm程度)する。Plate with Pb-3n or the like (approximately 5 μm).

その後、第3図(d)のように、感光性樹脂6を除去し
、第2.第1の金属膜5A、4Aを金属バンプ7をマス
クとして順次エツチングすることにより金属バンプが完
成される。
Thereafter, as shown in FIG. 3(d), the photosensitive resin 6 is removed and the second. A metal bump is completed by sequentially etching the first metal films 5A and 4A using the metal bump 7 as a mask.

また、従来の第2の製造方法として、第4図(a)乃至
(c)に示す方法がある。
Further, as a second conventional manufacturing method, there is a method shown in FIGS. 4(a) to 4(c).

即ち、第3図(a)、(b)の工程を行った後、第4図
(a)のように、感光性樹脂6の第2の開口を利用して
金属バンプ7をメッキ形成する。
That is, after performing the steps shown in FIGS. 3(a) and 3(b), metal bumps 7 are formed by plating using the second openings of the photosensitive resin 6, as shown in FIG. 4(a).

次いで、第4図(b)のように、感光性樹脂6を除去し
た後、金属バンプ7を含む半導体基板上に感光性樹脂6
Aを薄く(2〜3μm程度)形成し、金属バンプ7より
僅かに大きい第3の開口を形成する。その後、金属バン
プ7の表面に第3の金属膜8をメッキする。
Next, as shown in FIG. 4(b), after removing the photosensitive resin 6, the photosensitive resin 6 is deposited on the semiconductor substrate including the metal bumps 7.
A is formed thin (about 2 to 3 μm), and a third opening slightly larger than the metal bump 7 is formed. Thereafter, a third metal film 8 is plated on the surface of the metal bump 7.

更に、第4図(C)のように、感光性樹脂6Aを除去し
た後、第3の金属膜8を形成した金属バンプ7をマスク
として第2.第1の金属膜5A。
Furthermore, as shown in FIG. 4(C), after removing the photosensitive resin 6A, the second bump 7 with the third metal film 8 formed thereon is used as a mask. First metal film 5A.

4Aを順次エツチングすることにより、金属バンプが完
成される。
The metal bump is completed by sequentially etching 4A.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の半導体装置の製造方法において、第1の
製造方法では金属バンプ7上に第3の金属膜8を形成し
た後に感光性樹脂6を除去すると、金属バンプ7側面が
露出され、酸化等により金属バンプ7が腐食され易くな
って、金属バンプ7自身の強度が低下し、折れ等による
金属バンプの電気的なオープンが生じる等信頼性が著し
く低下するという問題がある。
In the conventional semiconductor device manufacturing method described above, in the first manufacturing method, when the photosensitive resin 6 is removed after forming the third metal film 8 on the metal bump 7, the side surface of the metal bump 7 is exposed and is exposed to oxidation, etc. This causes problems in that the metal bumps 7 are easily corroded, the strength of the metal bumps 7 themselves is reduced, and the reliability is significantly reduced, such as electrical open circuits of the metal bumps due to bending or the like.

又、第2の製造方法では、金属バンプ7の全面を第3の
金属膜8で覆うために、感光性樹脂6を除去した後に、
再度感光性樹脂6Aを形成、開口する工程が必要となり
、製造コストが増大するという問題がある。
In addition, in the second manufacturing method, in order to cover the entire surface of the metal bump 7 with the third metal film 8, after removing the photosensitive resin 6,
The process of forming and opening the photosensitive resin 6A again is required, which poses a problem of increasing manufacturing costs.

本発明は感光性樹脂を用いることなく金属バンプの表面
に第3の金属膜を形成し、信頼性が高く、かつ低コスト
の金属バンプを製造することを可能にした製造方法を提
供することを目的としている。
The present invention aims to provide a manufacturing method that forms a third metal film on the surface of a metal bump without using a photosensitive resin and makes it possible to manufacture a highly reliable and low-cost metal bump. The purpose is

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置の製造方法は、半導体素子を形成し
た半導体基板上にパッド電極を形成する工程と、このパ
ッド電極を含む半導体基板全面に絶縁膜を形成し、かつ
前記パッド電極の上方に第1の開口を形成する工程と、
前記パッド電極を含む半導体基板の全面にメッキされ難
い第1の金属膜及びメッキ可能な第2の金属膜を順次形
成する工程と、前記第2の金属膜上に感光性樹脂を付着
形成し、かつこの感光性樹脂の前記パッド電極の上方に
選択的に前記第1の開口より大きい第2の開口を形成し
て前記第2の金属膜を露出させる工程と、この露出され
た第2の金属膜上にメッキ法により金属バンプを形成す
る工程と、この金属バンプをマスクとして第2の金属膜
をエツチング除去し、第1の金属膜を露出させる工程と
、メッキ法により前記金属バンプ表面に選択的に第3の
金属膜を形成する工程と、前記金属バンプをマスクとし
て第1の金属膜を除去する工程を含んでいる。
A method for manufacturing a semiconductor device according to the present invention includes the steps of forming a pad electrode on a semiconductor substrate on which a semiconductor element is formed, forming an insulating film on the entire surface of the semiconductor substrate including the pad electrode, and forming an insulating film on the entire surface of the semiconductor substrate including the pad electrode. a step of forming a first opening;
A step of sequentially forming a first metal film that is difficult to plate and a second metal film that can be plated on the entire surface of the semiconductor substrate including the pad electrode, and depositing and forming a photosensitive resin on the second metal film, and a step of selectively forming a second opening larger than the first opening above the pad electrode of the photosensitive resin to expose the second metal film; a step of forming a metal bump on the film by a plating method; a step of etching away the second metal film using the metal bump as a mask to expose the first metal film; The method includes a step of essentially forming a third metal film, and a step of removing the first metal film using the metal bump as a mask.

〔作用〕上述した製造方法では、第1の金属膜にメッキし難い材
料を用いているため、金属バンプの表面に第3の金属膜
をメッキ形成する際に、第1の金属膜に第3の金属膜は
殆ど被着されることはな(、感光性樹脂を用いることな
く第3の金属膜を金属バンプの表面に選択的に形成する
ことができる。
[Function] In the manufacturing method described above, since the first metal film is made of a material that is difficult to plate, when forming the third metal film on the surface of the metal bump by plating, the third metal film is coated with the third metal film on the first metal film. The third metal film can be selectively formed on the surface of the metal bump without using a photosensitive resin.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。Next, the present invention will be explained with reference to the drawings.

第1図(a)乃至(g)は本発明の第1実施例を製造工
程順に示す縦断面図である。
FIGS. 1(a) to 1(g) are longitudinal sectional views showing a first embodiment of the present invention in the order of manufacturing steps.

先ず、第1図(a)のように、半導体素子を形成した半
導体基板1上に蒸着法又はスパッタ法によりアルミニウ
ム層をlum程度形成し、このアルミニウム層を感光性
樹脂を利用して選択的にエツチングすることでパッド電
極2を形成する。その後、感光性樹脂を除去し、パッド
電極2を含む全面に絶縁膜3としてCVD酸化膜又はプ
ラズマCVD窒化膜を形成する。更に、この絶縁膜3を
感光性樹脂を用いて選択的にエツチングし、パッド電極
2の上方に第1の開口を形成する。
First, as shown in FIG. 1(a), an aluminum layer of approximately lum is formed by vapor deposition or sputtering on a semiconductor substrate 1 on which a semiconductor element is formed, and this aluminum layer is selectively coated using a photosensitive resin. Pad electrode 2 is formed by etching. Thereafter, the photosensitive resin is removed, and a CVD oxide film or a plasma CVD nitride film is formed as an insulating film 3 over the entire surface including the pad electrode 2. Furthermore, this insulating film 3 is selectively etched using a photosensitive resin to form a first opening above the pad electrode 2.

次いで、第1図(b)のように、パッド電極2を含む半
導体基板1の全面に第1.第2の金属膜4.5、例えば
Ti、Cu等を〜1000人程度スパンタ法により形成
する。このとき、第1の金属膜4はメッキし難い金属を
使用し、第2の金属膜5はメッキ可能な金属を使用する
Next, as shown in FIG. 1(b), a first layer is formed on the entire surface of the semiconductor substrate 1 including the pad electrode 2. A second metal film 4.5, for example Ti, Cu, etc., is formed by the spunter method using about 1,000 people. At this time, the first metal film 4 uses a metal that is difficult to plate, and the second metal film 5 uses a metal that can be plated.

次に、第1図(C)のように、第2の金属膜5上に感光
性樹脂6を形成し、この感光性樹脂6のパッド電極2上
方に第1の開口より大きい第2の開口を形成し、ここに
第2の金属膜5を露出させる。そして、この露出した第
2の金属膜5上に電解メッキにより金属バンプ7、例え
ばCuバンプを形成する。膜厚は15μm程度あれば十
分である。
Next, as shown in FIG. 1C, a photosensitive resin 6 is formed on the second metal film 5, and a second opening larger than the first opening is formed in the photosensitive resin 6 above the pad electrode 2. is formed, and the second metal film 5 is exposed here. Then, a metal bump 7, for example a Cu bump, is formed on the exposed second metal film 5 by electrolytic plating. A film thickness of about 15 μm is sufficient.

次に、第1図(d)のように、感光性樹脂6を除去する
。その後、第1図(e)のように、第2の金属膜5を金
属バンプ7をマスクとしてエツチングし、第1の金属膜
4を露出させる。
Next, as shown in FIG. 1(d), the photosensitive resin 6 is removed. Thereafter, as shown in FIG. 1(e), the second metal film 5 is etched using the metal bumps 7 as a mask to expose the first metal film 4.

次いで、第1図(f)のように、金属バンプ7を含む半
導体基板1表面に対して第3の金属膜8、例えばAu、
Pb−3n等を電解メッキ又は無電解メッキ法にて形成
する。この時、メッキによる第3の金属膜8は第1の金
属膜4上には非常に付着し難いため、結果的に金属バン
プ7の表面のみに形成される。
Next, as shown in FIG. 1(f), a third metal film 8, for example, Au, is applied to the surface of the semiconductor substrate 1 including the metal bumps 7.
Pb-3n or the like is formed by electroplating or electroless plating. At this time, the third metal film 8 formed by plating is very difficult to adhere to the first metal film 4, so that it is formed only on the surface of the metal bump 7 as a result.

しかる後、第1図(g)のように、第1の金属膜4をエ
ツチングし、金属バンプが完成される。
Thereafter, as shown in FIG. 1(g), the first metal film 4 is etched to complete the metal bump.

この時、第1の金属膜4上に第3の金属膜8が多少付着
していても、第1の金属膜4のエツチングにより同時に
除去でき、結果として第1図(g)のように、金属バン
プ7の表面全てが第3の金属膜8で覆われた信頼性が高
く、しかも低コストの金属バンプを形成することができ
る。
At this time, even if some third metal film 8 is attached to the first metal film 4, it can be removed at the same time by etching the first metal film 4, and as a result, as shown in FIG. 1(g), A highly reliable and low-cost metal bump in which the entire surface of the metal bump 7 is covered with the third metal film 8 can be formed.

第2図(a)乃至(f)は本発明の第2実施例を製造工
程順に示す縦断面図である。本実施例は、第1実施例で
の感光性樹脂6の膜厚が薄い場合であり、第1実施例と
均等な部分には同一符号を付しである。
FIGS. 2(a) to 2(f) are longitudinal cross-sectional views showing a second embodiment of the present invention in the order of manufacturing steps. This example is a case where the film thickness of the photosensitive resin 6 in the first example is thinner, and parts equivalent to those in the first example are given the same reference numerals.

即ち、第2図(a)のように、半導体基板1上にパッド
電極2を形成し、絶縁膜3を開口した後、第1.第2の
金属膜4.5を形成する。この場合にも、第1の金属膜
4はメッキし難い金属を使用する。
That is, as shown in FIG. 2(a), after forming the pad electrode 2 on the semiconductor substrate 1 and opening the insulating film 3, the first. A second metal film 4.5 is formed. Also in this case, the first metal film 4 uses a metal that is difficult to plate.

次に、第2図(b)のように、半導体基板1の全面に感
光性樹脂6を形成し、かつここにパッド電極2より大き
い開口を形成する。
Next, as shown in FIG. 2(b), a photosensitive resin 6 is formed on the entire surface of the semiconductor substrate 1, and an opening larger than the pad electrode 2 is formed therein.

次いで、第2図(C)のように、電解メッキによりパッ
ド電極2上に金属バンプ7を形成する。
Next, as shown in FIG. 2(C), metal bumps 7 are formed on the pad electrodes 2 by electrolytic plating.

その後、第2図(d)のように、感光性樹脂6及び第2
の金属膜5をエツチング除去し、第1の金属膜4を露出
させる。
Thereafter, as shown in FIG. 2(d), the photosensitive resin 6 and the second
The first metal film 4 is etched away to expose the first metal film 4.

次いで、第2図(e)のように、第1の金属膜4上にメ
ッキが付着しないことを利用し、金属バンプ7全面に第
3の金属膜8を選択的に形成する。
Next, as shown in FIG. 2(e), the third metal film 8 is selectively formed on the entire surface of the metal bump 7, taking advantage of the fact that no plating adheres to the first metal film 4.

その後、第2図(f)のように、第1の金属膜4をエツ
チングすることにより、金属バンプ7の表面全面が第3
の金属膜8に覆われた信頼性の高いバンプを形成するこ
とができる。
Thereafter, as shown in FIG. 2(f), by etching the first metal film 4, the entire surface of the metal bump 7 is etched into the third layer.
A highly reliable bump covered with the metal film 8 can be formed.

〔発明の効果]以上説明したように本発明によれば、第1の金属膜にメ
ッキし薙い材質を用いているので、金属バンプ形成後に
第1の金属膜を露出させた上で第3の金属膜をメッキす
ることにより、感光性樹脂を再度設けることなく金属バ
ンプ表面全面に選択的に第3の金属膜を形成することが
可能となり、金属バンプの露出が原因される金属バンプ
の腐食を防止し、半導体装置の信頼性の向上を図り、か
つコストの増大を抑制することができる効果がある。
[Effects of the Invention] As explained above, according to the present invention, since the first metal film is plated and a material is used, the first metal film is exposed after the metal bump is formed, and then the third metal film is plated. By plating the metal film, it is possible to selectively form a third metal film on the entire surface of the metal bump without re-applying the photosensitive resin, which prevents corrosion of the metal bump caused by exposure of the metal bump. This has the effect of preventing this, improving the reliability of the semiconductor device, and suppressing cost increases.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)乃至(g)は本発明の第1実施例を製造工
程順に示す縦断面図、第2図(a)乃至(f>は本発明
の第2実施例を製造工程順に示す縦断面図、第3図(a
)乃至(d)は従来の第1の製造方法を工程順に示す縦
断面図、第4図(a)乃至(C)は従来の第2の製造方
法の一部を工程順に示す縦断面図である。1・・・半導体基板、2・・・パッド電極、3・・・絶
縁膜、4.4A・・・第1の金属膜、5.5A・・・第
2の金属膜、6.6A・・・感光性樹脂、7・・・金属
バンプ、8・・・第3の金属膜。図第2第2図第3図
FIGS. 1(a) to (g) are longitudinal sectional views showing a first embodiment of the present invention in the order of manufacturing steps, and FIGS. 2(a) to (f) show a second embodiment of the present invention in the order of manufacturing steps. Longitudinal sectional view, Figure 3 (a
) to (d) are longitudinal cross-sectional views showing a conventional first manufacturing method in order of steps, and FIGS. 4(a) to (C) are longitudinal cross-sectional views showing a part of a conventional second manufacturing method in order of steps. be. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Pad electrode, 3... Insulating film, 4.4A... First metal film, 5.5A... Second metal film, 6.6A... - Photosensitive resin, 7... Metal bump, 8... Third metal film. Figure 2 Figure 2 Figure 3

Claims (1)

Translated fromJapanese
【特許請求の範囲】[Claims]1、半導体素子を形成した半導体基板上にパッド電極を
形成する工程と、このパッド電極を含む半導体基板全面
に絶縁膜を形成し、かつ前記パッド電極の上方に第1の
開口を形成する工程と、前記パッド電極を含む半導体基
板の全面にメッキされ難い第1の金属膜及びメッキ可能
な第2の金属膜を順次形成する工程と、前記第2の金属
膜上に感光性樹脂を付着形成し、かつこの感光性樹脂の
前記パッド電極の上方に選択的に前記第1の開口より大
きい第2の開口を形成して前記第2の金属膜を露出させ
る工程と、この露出された第2の金属膜上にメッキ法に
より金属バンプを形成する工程と、この金属バンプをマ
スクとして第2の金属膜をエッチング除去し、第1の金
属膜を露出させる工程と、メッキ法により前記金属バン
プ表面に選択的に第3の金属膜を形成する工程と、前記
金属バンプをマスクとして第1の金属膜を除去する工程
を含むことを特徴とする半導体装置の製造方法。
1. A step of forming a pad electrode on a semiconductor substrate on which a semiconductor element is formed; a step of forming an insulating film over the entire surface of the semiconductor substrate including the pad electrode; and a step of forming a first opening above the pad electrode. , a step of sequentially forming a first metal film that is difficult to plate and a second metal film that can be plated on the entire surface of the semiconductor substrate including the pad electrode, and depositing and forming a photosensitive resin on the second metal film. , and a step of selectively forming a second opening larger than the first opening above the pad electrode of the photosensitive resin to expose the second metal film; forming a metal bump on the metal film by plating; etching away the second metal film using the metal bump as a mask to expose the first metal film; and forming a metal bump on the surface of the metal bump by plating. A method of manufacturing a semiconductor device, comprising the steps of selectively forming a third metal film and removing the first metal film using the metal bump as a mask.
JP1075541A1989-03-281989-03-28Manufacture of semiconductor devicePendingJPH02253628A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP1075541AJPH02253628A (en)1989-03-281989-03-28Manufacture of semiconductor device

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP1075541AJPH02253628A (en)1989-03-281989-03-28Manufacture of semiconductor device

Publications (1)

Publication NumberPublication Date
JPH02253628Atrue JPH02253628A (en)1990-10-12

Family

ID=13579167

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP1075541APendingJPH02253628A (en)1989-03-281989-03-28Manufacture of semiconductor device

Country Status (1)

CountryLink
JP (1)JPH02253628A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5773359A (en)*1995-12-261998-06-30Motorola, Inc.Interconnect system and method of fabrication
JP2004193457A (en)*2002-12-132004-07-08Nec Kansai LtdMethod for forming two-layer bump
JP2008270816A (en)*2007-04-202008-11-06Samsung Electronics Co Ltd Semiconductor device manufacturing method capable of obtaining uniform electroless plating thickness
US7675174B2 (en)2003-05-132010-03-09Stmicroelectronics, Inc.Method and structure of a thick metal layer using multiple deposition chambers
JP2010171365A (en)*2008-12-262010-08-05Toshiba CorpSemiconductor device and method of manufacturing the same
CN102201375A (en)*2010-03-242011-09-28台湾积体电路制造股份有限公司Integrated circuit device and packaging assembly
CN102800599A (en)*2011-05-252012-11-28颀邦科技股份有限公司Bump process and structure thereof
US8823166B2 (en)2010-08-302014-09-02Taiwan Semiconductor Manufacturing Company, Ltd.Pillar bumps and process for making same

Cited By (11)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5773359A (en)*1995-12-261998-06-30Motorola, Inc.Interconnect system and method of fabrication
JP2004193457A (en)*2002-12-132004-07-08Nec Kansai LtdMethod for forming two-layer bump
US7675174B2 (en)2003-05-132010-03-09Stmicroelectronics, Inc.Method and structure of a thick metal layer using multiple deposition chambers
US8222138B2 (en)2003-05-132012-07-17St Microelectronics, Inc.Method and structure of a thick metal layer using multiple deposition chambers
JP2008270816A (en)*2007-04-202008-11-06Samsung Electronics Co Ltd Semiconductor device manufacturing method capable of obtaining uniform electroless plating thickness
JP2010171365A (en)*2008-12-262010-08-05Toshiba CorpSemiconductor device and method of manufacturing the same
US8810032B2 (en)2008-12-262014-08-19Kabushiki Kaisha ToshibaSemiconductor device and method for manufacturing of same
CN102201375A (en)*2010-03-242011-09-28台湾积体电路制造股份有限公司Integrated circuit device and packaging assembly
US8823166B2 (en)2010-08-302014-09-02Taiwan Semiconductor Manufacturing Company, Ltd.Pillar bumps and process for making same
US9449931B2 (en)2010-08-302016-09-20Taiwan Semiconductor Manufacturing Company, Ltd.Pillar bumps and process for making same
CN102800599A (en)*2011-05-252012-11-28颀邦科技股份有限公司Bump process and structure thereof

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