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JPH02188989A - Electrically plating method for printed circuit board - Google Patents

Electrically plating method for printed circuit board

Info

Publication number
JPH02188989A
JPH02188989AJP794989AJP794989AJPH02188989AJP H02188989 AJPH02188989 AJP H02188989AJP 794989 AJP794989 AJP 794989AJP 794989 AJP794989 AJP 794989AJP H02188989 AJPH02188989 AJP H02188989A
Authority
JP
Japan
Prior art keywords
holes
become
mask plate
electroplating
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP794989A
Other languages
Japanese (ja)
Inventor
Kuniji Suzuki
邦司 鈴木
Koji Kamiyama
上山 宏治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co LtdfiledCriticalHitachi Chemical Co Ltd
Priority to JP794989ApriorityCriticalpatent/JPH02188989A/en
Publication of JPH02188989ApublicationCriticalpatent/JPH02188989A/en
Pendinglegal-statusCriticalCurrent

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Abstract

PURPOSE:To make a primary current distribution uniform and to suppress the irregularity in plating thickness by setting a mask plate having holes of a diameter and number determined by the relation to optimum electrically plating amount obtained in advance at holes to become through hole and at positions to become circuit conductors later between metal to become an anode and a material to be placed. CONSTITUTION:As a mask plate, an insulating material opened with holes of a diameter and number determined by the relation to optimum electrically plating amount obtained in advance at positions to become circuit conductors later is used at a contact plate superposed on the surface of a copper-plated laminated board and used to prevent the copper-plated laminated board from burring due to the opening of the holes of a copper foil superposed on the copper-plated laminated board. The number of holes to be opened at the mask plate is desirably determined according to the number of adjacent conductors within approx. 0.75mm around the conductors to become a circuits later in relation to the optimum electrically plating amount obtained in advance. Thus, a primary current distribution in the electric plating is made uniform to reduce an irregularity in thickness.

Description

Translated fromJapanese

【発明の詳細な説明】(産業上の利用分野)本発明は、プリント配線板製造工程に用いる厚さの均一
性に優れた電気めっき方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an electroplating method with excellent thickness uniformity used in a printed wiring board manufacturing process.

(従来の技術)プリント配線板の電気めっき析出性を均一にする方法と
して、特開昭昭58−137079号公報に示されてい
るように、被めっき材の透孔に対応する位置に通液孔を
形成したマスク部材で被めっき材を覆い、透孔内にめっ
き液を流通させ透孔の内周面に効率良くめっきを施す方
法があり、また、持分@62−37840号公IQニ$
2、フリント配線板に多孔質板を密着させて、その多孔
質板を介して電気めっき液を強性的に流しながら、めっ
きする方法、特公昭63−1759号公報には、電気め
っきにおいて、基板上の導体パターンの粗な領域に該導
体箔の厚さよりも、小さいパターン幅を有するダミー導
体パターンを設け、−次電流分布を小さくして均一にめ
っきし、エツチング時にこのダミーパターンを除去して
しまう方法が開示されている。
(Prior art) As a method of making the electroplating deposition properties of printed wiring boards uniform, as shown in Japanese Patent Laid-Open No. 137079/1982, liquid passage holes are provided at positions corresponding to the through holes of the material to be plated. There is a method in which the material to be plated is covered with a mask member formed with a mask member, and the plating solution is circulated inside the hole to efficiently plate the inner circumferential surface of the hole.
2. A method of plating by bringing a porous board into close contact with a flint wiring board and flowing an electroplating solution strongly through the porous board. A dummy conductor pattern having a pattern width smaller than the thickness of the conductor foil is provided in the rough area of the conductor pattern on the substrate, and the negative current distribution is reduced to achieve uniform plating, and this dummy pattern is removed during etching. A method is disclosed.

(発明が解決しようとする課題)特公昭58−137079号公報に示された方法は、穴
内のめっき析出性は均一となるものの、回路部分のめっ
き厚分布が均一とならず、また特公昭62−37840
号公報に示された方法は、回路部での所定の厚みが得に
(いという問題点があった。特公昭63−1759号公
報に示された方法は、電気めっきの析出厚が小さい場合
には、エツチングで除去され得る幅のダミーパターンを
形成するのが困難であるという問題点があった。
(Problems to be Solved by the Invention) Although the method disclosed in Japanese Patent Publication No. 58-137079 makes the plating precipitation inside the hole uniform, the plating thickness distribution in the circuit part is not uniform, and -37840
The method shown in Japanese Patent Publication No. 63-1759 has the problem that it is difficult to achieve a predetermined thickness in the circuit area. However, there was a problem in that it was difficult to form a dummy pattern with a width that could be removed by etching.

(課題を解決するための手段)本発明は、銅張積層板にスルーホールとなる穴をあけ、
穴内壁と該積層板の全表面に薄く無電解めっきを行った
後電気めっきを行うときに、スルーホールとなる穴と後
に回路導体となる箇所に、予め求めた最適な電気めっき
量との関係によって定められた穴径、穴数を持ったマス
ク板を、陽極となる金属と被めっき物との間にセントし
て電気めっきする方法である。
(Means for Solving the Problems) The present invention provides a method for making holes to serve as through holes in a copper-clad laminate,
Relationship between the optimal amount of electroplating determined in advance for the hole that will become a through hole and the location that will later become a circuit conductor when performing electroplating after applying a thin electroless plating to the inner wall of the hole and the entire surface of the laminate. In this method, a mask plate with a hole diameter and number of holes determined by the method is placed between the metal that will serve as the anode and the object to be plated.

このマスク板は、銅張積層板の穴あけで銅張積層板の表
面に重ねられw4v3の穴あけによるバリを防ぐために
用いたあて板に、後に回路導体となる箇所に予め求めた
最適な電気めっき量との関係によって定められた穴径、
穴数の穴をあけた絶縁材料を用いることができ、また、
マスク板にあける穴数は、予め求めた最適な電気めっき
量との関係として、後に回路となる導体の周囲約0.7
5mm以内に隣接する導体の数によって定めることが好
ましい。
This mask board is used to layer the surface of the copper clad laminate when drilling holes in the copper clad laminate, and is used to prevent burrs from forming holes in the W4V3. The hole diameter determined by the relationship with
An insulating material with a number of holes can be used, and
The number of holes to be drilled in the mask plate is approximately 0.7 mm around the conductor that will later become a circuit, in relation to the optimal electroplating amount determined in advance.
It is preferable to determine the number of adjacent conductors within 5 mm.

すなわち、電気めっきでの一次電流分布を均一にしてめ
っき厚のばらつきを小さくするために、陽極と被めっき
物となる陰極の間に、被めっき物の穴および後に回路と
なるパターンと同じ位置に穴をあけたマスク板を用いて
電気めっきする方法である。このマスク板の穴径、穴数
は、被めっき物の穴径、穴の周囲に形成されるランドの
大きさ、回路導体の幅、陽極と被めっき物の位置間係お
よび陽極と被めっき物とマスク板の位置関係により変化
させることが必要であって、特にマスク板にあける穴数
は、予め求めた最適な電気めっき量との関係として、後
に回路となる導体の周囲約0.75mm以内に隣接する
導体の数に比例させることが、めっき厚さの均一性を得
るために好ましい。
In other words, in order to make the primary current distribution uniform during electroplating and reduce variations in plating thickness, a hole is placed between the anode and the cathode, which is the object to be plated, at the same position as the hole in the object to be plated and the pattern that will later become the circuit. This is a method of electroplating using a mask plate with holes. The hole diameter and number of holes in this mask plate are determined by the hole diameter of the object to be plated, the size of the land formed around the hole, the width of the circuit conductor, the positional relationship between the anode and the object to be plated, and the distance between the anode and the object to be plated. It is necessary to change the number of holes in the mask plate depending on the positional relationship between the mask plate and the mask plate.In particular, the number of holes to be drilled in the mask plate must be within about 0.75 mm around the conductor that will later become a circuit, in relation to the optimal electroplating amount determined in advance. It is preferable to make the plating thickness proportional to the number of adjacent conductors in order to obtain uniformity of the plating thickness.

この理由としては、目的部分の周囲に隣接する導体が0
.25mm、0.50mmまたは、0.75mmの範囲
にある場合の隣接する導体が存在する範囲とその範囲内
でのパターン本数/めっき厚との関係を調べたところ、
第1図に示すように、周囲0゜75mmの範囲にある導
体の影響を最も強く受けていることがわかった。第1図
は、横軸として隣接する導体が存在する範囲とし、縦軸
としてその範囲内でのパターン本数/めっき厚(相間係
数と呼ぶ、)を示した。
The reason for this is that the conductor adjacent to the target part is 0.
.. When we investigated the relationship between the range where adjacent conductors exist and the number of patterns/plating thickness within that range in the range of 25 mm, 0.50 mm, or 0.75 mm, we found that
As shown in FIG. 1, it was found that the influence was most strongly exerted by the conductor in the range of 0°75 mm. In FIG. 1, the horizontal axis represents the range where adjacent conductors exist, and the vertical axis represents the number of patterns/plating thickness (referred to as interphase coefficient) within that range.

また、このときに、回路パターンが均一に分布している
ものや回路パターンがランドのみのからなるものの場合
には、銅張積層板の穴あけで銅張積層板の表面に重ねら
れ銅箔の穴あけによるバリを防ぐために用いたあて仮を
、そのまま用いることもでき、経済的である。
At this time, if the circuit pattern is uniformly distributed or consists of only lands, the holes in the copper clad laminate are superimposed on the surface of the copper clad laminate and the holes in the copper foil are drilled. The patch used to prevent burrs can also be used as is, which is economical.

(作用)本発明の方法により、−次電流分布が均一になり、めっ
き厚のばらつきが抑えられる。
(Function) According to the method of the present invention, the negative current distribution becomes uniform and variations in plating thickness are suppressed.

実施例実際のパターンを用いて、めっき厚の違いを測定した。ExampleDifferences in plating thickness were measured using actual patterns.

このパターンは、表面回路がパッドのみのものであるた
め、マスク板として、被めっき特大位置と同位置に、被
めっき特大径よりも大きな穴径を持ったマスク板を用い
た。被めっき物の穴径を1゜05簡に対して、マスク板
の穴径は2.0鶴であり、マスク板の位置は、アノード
と被めっき物のちょうど真中とした。
Since this pattern has a surface circuit consisting only of pads, a mask plate having a hole diameter larger than the extra-large diameter to be plated was used as the mask plate at the same position as the extra-large position to be plated. For the hole diameter of the object to be plated of 1.05 mm, the hole diameter of the mask plate was 2.0 mm, and the position of the mask plate was set exactly between the anode and the object to be plated.

この結果、マスク板なしでめっきした場合に、平均めっ
き厚に対するめっき厚の分布が、±16%であワた部分
が、マスク板を用いることにより、±lO%に低減でき
た。
As a result, when plating was performed without a mask plate, the distribution of the plating thickness with respect to the average plating thickness was able to be reduced to ±16% by using the mask plate.

(発明の効果)本発明によって、電気めっきを均一に行うことができる
プリント配線板の製造法を提供することができた。
(Effects of the Invention) According to the present invention, it was possible to provide a method for manufacturing a printed wiring board in which electroplating can be uniformly performed.

また、[絶縁板の厚さ/スルーホールの穴径」の値が大
きい高アスペクト比の配線板を製造する場合においても
、つきまわり性のよい電気めっき方法を提供することが
できた。
Further, even when manufacturing a wiring board with a high aspect ratio in which the value of [thickness of insulating board/diameter of through hole] is large, it was possible to provide an electroplating method with good throwing power.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の効果を説明するための線図
である。0.25   0.50   0.75   1.00
隣接する導体の存在範囲(mm)
FIG. 1 is a diagram for explaining the effects of one embodiment of the present invention. 0.25 0.50 0.75 1.00
Existence range of adjacent conductors (mm)

Claims (3)

Translated fromJapanese
【特許請求の範囲】[Claims]1. 銅張積層板にスルーホールとなる穴をあけ、穴内
壁と該積層板の全表面に薄く無電解めっきを行った後電
気めっきを行うときに、スルーホールとなる穴と後に回
路導体となる箇所に、予め求めた最適な電気めっき量と
の関係によって定められた穴径、穴数を持ったマスク板
を、陽極となる金属と被めっき物との間にセットして電
気めっきする方法。
1. A hole that will become a through-hole is made in a copper-clad laminate, and the inner wall of the hole and the entire surface of the laminate are electroplated thinly, and then electroplated. A method of electroplating in which a mask plate with a hole diameter and number of holes determined based on the relationship with the optimal electroplating amount determined in advance is set between the metal that will serve as the anode and the object to be plated.
2. 陽極となる金属と被めっき物との間にセットされ
るマスク板として、銅張積層板の穴あけで銅張積層板の
表面に重ねられ銅箔の穴あけによるバリを防ぐために用
いたあて板に、後に回路導体となる箇所に予め求めた最
適な電気めっき量との関係によって定められた穴径、穴
数の穴をあけた絶縁材料を用いる請求項1記載の電気め
っき方法。
2. As a mask plate that is set between the metal that will become the anode and the object to be plated, it is used as a backing plate that is overlapped on the surface of the copper clad laminate when drilling holes in the copper clad laminate to prevent burrs from forming in the copper foil. 2. The electroplating method according to claim 1, wherein an insulating material is used in which holes are drilled in locations that will later become circuit conductors, with holes having a hole diameter and number of holes determined based on a relationship with a predetermined optimum amount of electroplating.
3. マスク板にあける穴数は、予め求めた最適な電気
めっき量との関係として、後に回路となる導体の周囲約
0.75mm以内に隣接する導体の数によって定める請
求項1または2記載の電気めっき方法。
3. The electroplating according to claim 1 or 2, wherein the number of holes to be formed in the mask plate is determined by the number of adjacent conductors within about 0.75 mm around a conductor that will later become a circuit, in relation to a predetermined optimal electroplating amount. Method.
JP794989A1989-01-171989-01-17Electrically plating method for printed circuit boardPendingJPH02188989A (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP794989AJPH02188989A (en)1989-01-171989-01-17Electrically plating method for printed circuit board

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP794989AJPH02188989A (en)1989-01-171989-01-17Electrically plating method for printed circuit board

Publications (1)

Publication NumberPublication Date
JPH02188989Atrue JPH02188989A (en)1990-07-25

Family

ID=11679747

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP794989APendingJPH02188989A (en)1989-01-171989-01-17Electrically plating method for printed circuit board

Country Status (1)

CountryLink
JP (1)JPH02188989A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN113411991A (en)*2021-04-292021-09-17广州美维电子有限公司Method for transferring pattern of PCB to align target

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN113411991A (en)*2021-04-292021-09-17广州美维电子有限公司Method for transferring pattern of PCB to align target

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