【発明の詳細な説明】産業上の利用分野本発明はシリコン基板上に形成される絶縁膜上へ単結晶
シリコン膜を形成する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming a single crystal silicon film on an insulating film formed on a silicon substrate.
従来の技術絶縁膜上へ単結晶半導体層を形成する方法の一つである
ヘテロエピタキシャル法は、サファイア基板を用いて実
用化され、集積回路へ応用されて高速性、耐ラツチアツ
プ性及び耐放射線性の向上に有効であることが確認され
ている。Conventional technology The heteroepitaxial method, which is one of the methods for forming a single crystal semiconductor layer on an insulating film, was put into practical use using a sapphire substrate and applied to integrated circuits, achieving high speed, latch-up resistance, and radiation resistance. It has been confirmed that it is effective in improving
また、開発段階にある方法として、単結晶シリコン層内
へ酸素イオンを注入して酸化膜を埋め込む埋め込み酸化
膜形成法、レーザ及び電子ビームにより酸化膜上のシリ
コン層を単結晶化する再結晶化法あるいは、気相エピタ
キシャル選択成長または固相成長法による横方向結晶成
長法等の方法がある。In addition, methods currently in the development stage include buried oxide film formation, in which oxygen ions are implanted into the single crystal silicon layer to bury the oxide film, and recrystallization, in which the silicon layer on the oxide film is made into a single crystal using laser and electron beams. Alternatively, there are methods such as a lateral crystal growth method using a vapor phase epitaxial selective growth method or a solid phase growth method.
発明が解決しようとする課題ヘテロエピタキシャル法は使用するサファイア基板の製
造コストが高く経済性に乏しい。また、開発段階の方法
として示した後者の方法には結晶性や処理能力の点で問
題があり、歩留りや量産性の要求を満たすことが現段階
では難かしい。Problems to be Solved by the Invention The heteroepitaxial method is not economical because the manufacturing cost of the sapphire substrate used is high. Furthermore, the latter method shown as a method at the development stage has problems in terms of crystallinity and processing capacity, and it is difficult at the current stage to meet the requirements for yield and mass production.
課題を解決するための手段本発明はシリコン基板上に並設配置された酸化膜パター
ンの上に気相エピタキクヤル選択成長法による横方向結
晶成長技術で形成した単結晶シリコン膜を、酸化膜の上
部にのみ残すようにエツチングして基板から分離し、さ
らに気相成長処理及び異方性エツチング処理により、酸
化膜上に残された単結晶シリコン膜の周囲のみを窒化シ
リコン膜で被覆し、これをマスクにして露呈するシリコ
ン基板部を熱酸化して前記の酸化膜と連続した酸化膜の
層を形成した後、単結晶シリコン膜を覆う被膜を除去し
て単結晶シリコン膜を露出させ、これを核に横方向結晶
成長処理により酸化膜上の全域に単結晶シリコン膜を成
長させる方法である。Means for Solving the Problems The present invention provides a monocrystalline silicon film formed on oxide film patterns arranged in parallel on a silicon substrate by a lateral crystal growth technique using a vapor phase epitaxial selective growth method. The monocrystalline silicon film is separated from the substrate by etching so as to leave only the oxide film on the oxide film, and then by vapor phase growth treatment and anisotropic etching treatment, only the periphery of the single crystal silicon film remaining on the oxide film is covered with a silicon nitride film. After thermally oxidizing the exposed portion of the silicon substrate using a mask to form a layer of oxide film that is continuous with the oxide film described above, the film covering the single crystal silicon film is removed to expose the single crystal silicon film. This is a method in which a single crystal silicon film is grown over the entire area on the oxide film by lateral crystal growth treatment on the core.
作用本発明の方法によれば、絶縁膜パターン幅を素子の寸法
とは関係なく、結晶成長に適する寸法に選択することが
できるため、結晶欠陥の少ない単結晶膜が得られ、また
、横方向結晶成長の際にエツチング処理を付加すること
により単結晶膜の厚さを薄くして次の酸化分離処理によ
る単結晶部分の分離を容易にすることが出来る。Effect: According to the method of the present invention, the width of the insulating film pattern can be selected to be a size suitable for crystal growth regardless of the dimensions of the device, so a single crystal film with few crystal defects can be obtained. By adding an etching process during crystal growth, the thickness of the single crystal film can be reduced and the single crystal portion can be easily separated by the subsequent oxidation separation process.
実施例以下に図面を参照して本発明の方法を詳しく説明する。ExampleThe method of the present invention will be explained in detail below with reference to the drawings.
第１図は本発明の方法を工程順に示した図であり、先ず
、シリコン（１ｏＯ）ウェハ１を熱酸化して厚さが０，
４μｍの酸化膜を形成したのち、ポジレジストを用いた
フォトリングラフィ技術とドライエツチング技術により
延長方向がぐＯｏン方向となるように格子縞状の酸化膜
パターン２を形成する（パターン形成工程、第１図ム）
。次いで、表面汚染層を除去した後、気相エピタキシャ
ル成長法により酸化膜２を覆うように約１μｍの厚さの
単結晶シリコン膜３を形成したのち、この単結晶シリコ
ン膜の表面を熱酸化して厚さが２００人の酸化膜４を形
成し、さらに気相成長法により約０．２μｍの厚さの窒
化シリコン膜６を形成する（第１堆積工程、第１図Ｂ）
。以上の過程を経て形成した単結晶シリコン膜３、熱酸
化膜４および窒化シリコン膜６をフォトリングラフィ技
術とドライエツチング技術により選択的にエツチングし
、酸化膜パターン２の上にこれとほぼ同パターンで各被
膜を残す。なお、この処理で形成したパターンの端縁が
酸化膜パターン２の端縁よりも約０．２μｍ内側に位置
するように設定する（単結晶分離工程、第１図Ｃ）。こ
のエツチング処理で露出した単結晶シリコン膜３の側面
を熱酸化して約２００人の厚さの酸化膜６を形成したの
ち、気相成長法により全面に約０．２μｍの厚さの窒化
シリコン膜７を形成する（第２堆積工程、第１図Ｄ）。FIG. 1 is a diagram showing the method of the present invention in the order of steps. First, a silicon (1oO) wafer 1 is thermally oxidized to a thickness of 0.
After forming a 4 μm oxide film, a checkered oxide film pattern 2 is formed by photolithography and dry etching using a positive resist so that the extension direction is in the Oon direction (pattern formation step, step Figure 1)
. Next, after removing the surface contamination layer, a single crystal silicon film 3 with a thickness of about 1 μm was formed to cover the oxide film 2 by vapor phase epitaxial growth, and then the surface of this single crystal silicon film was thermally oxidized. An oxide film 4 with a thickness of 200 μm is formed, and a silicon nitride film 6 with a thickness of about 0.2 μm is further formed by vapor phase growth (first deposition step, FIG. 1B).
. The single-crystal silicon film 3, thermal oxide film 4, and silicon nitride film 6 formed through the above process are selectively etched using photolithography technology and dry etching technology, and a pattern almost identical to this is formed on the oxide film pattern 2. Leave each coating on. The edge of the pattern formed by this process is set to be located approximately 0.2 μm inside the edge of the oxide film pattern 2 (single crystal separation step, FIG. 1C). After thermally oxidizing the side surfaces of the single crystal silicon film 3 exposed by this etching process to form an oxide film 6 with a thickness of approximately 200 μm, silicon nitride with a thickness of approximately 0.2 μm is deposited over the entire surface by vapor phase growth. A film 7 is formed (second deposition step, FIG. 1D).
次に、異方性ドライエツチング処理を施して単結晶シリ
コン膜３の周囲のみを残して窒化シリコン膜を除去する
（エツチング処理、第１図Ｅ）。こののち、単結晶シリ
コン膜３の周囲に残された窒化シリコン被膜８をマスク
として用いたウェットエツチングでシリコン基板１の表
面に形成されている熱酸化膜６を除去して直下のシリコ
ン基板部を露出させ、さらに熱酸化して約０．８μｍの
酸化膜９を形成する（酸化膜形成工程、第１図Ｆ）。最
後に単結晶シリコン膜３を覆う窒化シリコン被膜８と酸
化膜６をウェットエツチング処理で除去して、単結晶シ
リコン膜３を露出させ、これを核にして気相エピタキシ
ャル成長処理を施すことによって酸化膜９の上に単結晶
シリコン膜１ｏを形成する（第３堆積工程、第１図Ｇ）
。Next, an anisotropic dry etching process is performed to remove the silicon nitride film leaving only the periphery of the single crystal silicon film 3 (etching process, FIG. 1E). Thereafter, the thermal oxide film 6 formed on the surface of the silicon substrate 1 is removed by wet etching using the silicon nitride film 8 left around the single crystal silicon film 3 as a mask, and the silicon substrate directly below is removed. It is exposed and further thermally oxidized to form an oxide film 9 of about 0.8 μm (oxide film formation step, FIG. 1F). Finally, the silicon nitride film 8 and oxide film 6 covering the single-crystal silicon film 3 are removed by wet etching to expose the single-crystal silicon film 3. Using this as a core, a vapor phase epitaxial growth process is performed to form an oxide film. A single crystal silicon film 1o is formed on 9 (third deposition step, FIG. 1G)
.
なお、上記のエピタキシャル成長工程では水素−ジクロ
ールシラン−塩酸のガス系を用い、９５０℃の温度で成
長させる。また途中で水素−塩酸のガス系に切り換える
ことにより塩酸ガスエツチングを行なう。In the above epitaxial growth process, a hydrogen-dichlorosilane-hydrochloric acid gas system is used, and the growth is performed at a temperature of 950°C. In addition, hydrochloric acid gas etching is performed by switching to a hydrogen-hydrochloric acid gas system midway through the process.
第２図は、パターン形成工程で使用するマスクパターン
の実施例を示す図であり、図示するように格子縞状とな
っている。また、パターン幅ａとｂはａが１〜３μｍｂ
が約１μｍと設定されている。FIG. 2 is a diagram showing an example of a mask pattern used in the pattern forming process, which has a checkered pattern as shown. Also, the pattern widths a and b are 1 to 3 μm.
is set to approximately 1 μm.
発明の詳細な説明した様に本発明の方法によれば、既存の量産可能
な技術のみの組み合わせにより絶縁膜上への単結晶膜の
成長を容易に実現することができる。また、この単結晶
膜内に回路素子を作り込むならば、回路素子が基板と電
気的に完全に分離される。したがって、回路素子がＭＯ
Ｓ ｌ−ランジスタの場合にはラッチアップのない高性
能なものが得られる。As described in detail, according to the method of the present invention, it is possible to easily grow a single crystal film on an insulating film by combining only existing techniques that can be mass-produced. Further, if a circuit element is formed within this single crystal film, the circuit element is completely electrically isolated from the substrate. Therefore, the circuit element is MO
In the case of the S l-transistor, high performance without latch-up can be obtained.
第１図Ａ〜Ｇは本発明方法の工程図、第２図はフォトリ
ングラフィ工程で用いるマスクパターンの一例を示す平
面図である。１・・・・・・シリコン（１００）基板、２・・・・・
・酸化膜、３・・・・・・単結晶シリコン膜、４・・・
・・・酸化膜、６・・・・・・窒化シリコン膜、６・・
・・・・酸化膜、７・・・・・・窒化シリコン膜、８・
・・・・・窒化シリコン膜、９・・・・・・酸化膜、１
０・・・・・・単結晶シリコン膜。代理人の氏名 弁理士 中 尾 敏 男 ほか１名（（
Ｄ ＣＪ1A to 1G are process diagrams of the method of the present invention, and FIG. 2 is a plan view showing an example of a mask pattern used in the photolithography process. 1...Silicon (100) substrate, 2...
・Oxide film, 3... Single crystal silicon film, 4...
...Oxide film, 6...Silicon nitride film, 6...
...Oxide film, 7...Silicon nitride film, 8.
...Silicon nitride film, 9...Oxide film, 1
0... Single crystal silicon film. Name of agent: Patent attorney Toshio Nakao and one other person ((
DCJ
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63023063AJPH01196811A (en) | 1988-02-02 | 1988-02-02 | Formation of single crystal silicon film on insulating film |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63023063AJPH01196811A (en) | 1988-02-02 | 1988-02-02 | Formation of single crystal silicon film on insulating film |
| Publication Number | Publication Date |
|---|---|
| JPH01196811Atrue JPH01196811A (en) | 1989-08-08 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63023063APendingJPH01196811A (en) | 1988-02-02 | 1988-02-02 | Formation of single crystal silicon film on insulating film |
| Country | Link |
|---|---|
| JP (1) | JPH01196811A (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905286A (en)* | 1994-11-02 | 1999-05-18 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905286A (en)* | 1994-11-02 | 1999-05-18 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| US6144072A (en)* | 1994-11-02 | 2000-11-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device formed on insulating layer and method of manufacturing the same |
| US6509583B1 (en) | 1994-11-02 | 2003-01-21 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device formed on insulating layer and method of manufacturing the same |
| US6653656B2 (en) | 1994-11-02 | 2003-11-25 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device formed on insulating layer and method of manufacturing the same |
| US7001822B2 (en) | 1994-11-02 | 2006-02-21 | Renesas Technology Corp. | Semiconductor device formed on insulating layer and method of manufacturing the same |
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