JPH01125989A - Semiconductor photodetector - Google Patents

Abstract

PURPOSE:To avoid the creation of carriers in the region other than a depletion layer extended from a P-N junction boundary and improve the high speed responsiveness of a photodiode by a method wherein semi-insulating ions are implanted into the surface of a semiconductor crystal with a planar structure other than a photodetecting part so as to reach the substrate or the single crystal layer which has the same conductivity type and is composed of the same crystal as the substrate. CONSTITUTION:Ions (Fe, Co or proton) are implanted into the region outside a P-type side electrode which is the region other than the photodetecting part so as to reach an n<->type InP layer or an n+type InP substrate 1. A light applied to the region onside the P-type side electrode 6 creates carriers in a depletion layer extended from a P-N junction boundary to produce a photocurrent. On the other hand, a light entering the region outside the P-type side electrode 6 is absorbed in a semi-insulating crystal and free carriers are not produced in that region 8. With this constitution, the large share of the photocurrent is occupied by a drift current produced by the carriers created in the depletion layer extended from the P-N junction boundary so that the high speed responsiveness of the photodiode can be improved.

Description

Translated fromJapanese

【発明の詳細な説明】〔麺業上の利用分野〕この発明は、半導体受光素子に関するものである。[Detailed description of the invention][Application field in noodle industry]The present invention relates to a semiconductor light receiving element.

（従来の技術〕第３図は例えば三菱電機技報Ｖｏ１．６０．４８　（１
９８６）に示された従来の半導体受光装置を示す断面図
であり、図において、１１＋はｎ”　−Ｉ♂基板、（２
）はｎ−−ＩｎＰ層、（３）はｎ″″−工ｎＧａＡａ　
（光吸収）層、（４１はｆ−ｒａｐ（窓）層、（５）は
反射防止膜（受光部）・、（６１はＰ側電極、（７）は
ｎ側電極である。(Prior art) Figure 3 shows, for example, Mitsubishi Electric Technical Report Vol. 1.60.48 (1
986) is a cross-sectional view showing the conventional semiconductor light receiving device shown in 986), in which 11+ is an n''-I♂ substrate, (2
) is an n--InP layer, (3) is an n--InP layer, and (3) is an n--InP layer.
(light absorption) layer, (41 is an f-rap (window) layer, (5) is an antireflection film (light receiving part), (61 is a P-side electrode, and (7) is an n-side electrode.

次に動作について説明する。反射防止膜（受光部）（５
）に入射した波長１．３声風の光は、最上層の工♂層（
バシドギャップ波長０．９２　ｓｒｓ　）を透過し、Ｉ
ｎＧａＡｓ層（３）で光吸収をうける。本装置に逆方向
にバイアスが印加されていると、ＰＮ接合界面がら空乏
層が延びてきて、光によシ発生したキャリアは空乏層内
をドリフト電流となって走行し、これが光電流となる。Next, the operation will be explained. Anti-reflection film (light receiving part) (5
), the light with a wavelength of 1.3 voices enters the top layer of the female layer (
Transmits the bassid gap wavelength 0.92 srs) and I
Light is absorbed by the nGaAs layer (3). When a bias is applied to this device in the opposite direction, the depletion layer extends from the PN junction interface, and the carriers generated by light travel in the depletion layer as a drift current, which becomes a photocurrent. .

プレーナ型フォトダイオードの最大の利点は、結晶内部
ＫＰＮ接合を有していることにある。このため、リーク
電流が少ない。また、最上層がＩぴからなるので、波長
１．３声風以上の光は透過し、キャリアが表面再結合に
より光電流に寄与できず感度が低下するという問題も生
じない。The biggest advantage of planar photodiodes is that they have a KPN junction inside the crystal. Therefore, leakage current is small. Furthermore, since the uppermost layer is made of I-P, light having a wavelength of 1.3 or more wavelengths is transmitted, and there is no problem that carriers cannot contribute to the photocurrent due to surface recombination, resulting in a decrease in sensitivity.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の半導体受光装置は以上のように構成されているの
で、Ｐ側電極の外周部よシ入射した光は、同じようにＩ
ｎＧａＡＳ層に到達するが、この付近には空乏層がない
ので発生したキャリアは拡散で、ＰＮ接合付近の空乏層
までいかなければ、光電流に寄生できない。この拡散成
分は、パルス応答時におけるすそ引きの要因であり、数
ｎ５ｅｏの長い時間遅れを生じる。これがフォトダイオ
ードの高速応答性を遅延させる原因となっている。Since the conventional semiconductor light-receiving device is configured as described above, the light incident from the outer periphery of the P-side electrode is similarly
The carriers reach the nGaAS layer, but since there is no depletion layer in this vicinity, the generated carriers diffuse and cannot become parasitic to the photocurrent unless they reach the depletion layer near the PN junction. This diffusion component is a cause of trailing during pulse response, and causes a long time delay of several n5eo. This causes a delay in the high-speed response of the photodiode.

この発明は上記のような問題点を解消するためになされ
たもので、ＰＮ接合界面よシ延びた空乏層以外ではキャ
リアが発生し得ないようにしてフォトダイオードの高速
応答性を薦めた半導体受光装置を得ることを目的とする
。This invention was made to solve the above-mentioned problems, and is a semiconductor light receiving device that promotes high-speed response of photodiodes by preventing carriers from being generated outside the depletion layer extending from the PN junction interface. The purpose is to obtain equipment.

〔問題点を解決するための手段〕この発明に係る半導体受光装置は、受光部以外のＰ電極
の外周部ｎ７−Ｉ征層又はｎ”　−ＩｎＰ基板ｉｌ＋ま
で、イオン（Ｆｅ、Ｃｏ、プロトン）注入を施した構造
にしたものである。[Means for Solving the Problems] The semiconductor light receiving device according to the present invention is characterized in that ions (Fe, Co, protons) It has an injected structure.

〔作用〕[Effect]

この発明における半導体受光装置は、外周部はイオン注
入によりこの領域（８）の結晶は半絶縁性を帯びる。こ
のため、同領域（８）に進入した光は、自由キャリアの
発生をおこさせない。また、半絶縁性結晶を有するため
受光装装置の容量は小さくなる。In the semiconductor light-receiving device according to the present invention, the crystal in this region (8) has semi-insulating properties due to ion implantation in the outer peripheral portion. Therefore, the light entering the region (8) does not generate free carriers. Furthermore, since it has a semi-insulating crystal, the capacity of the light receiving device becomes small.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明について図を用いて説明する。This invention will be explained below with reference to the drawings.

第１図はこの発明の一実施例による半導体受光装置を示
す断面図であシ、図において、（１１は♂−ＩｎＰ基板
、（２１はｎ−Ｉｅ層、（３）はｒｒ　−ＩｎＧａＡｓ
層、（４）はＰ−ＩｎＰ層、（５）は反射防止膜、（６
１はＰ側電極、（７）はｎ側電極、（８）はイオン注入
された半絶縁結晶領域である。FIG. 1 is a sectional view showing a semiconductor photodetector according to an embodiment of the present invention. In the figure, (11 is a male-InP substrate, (21 is an n-Ie layer, and (3) is a
layer, (4) is a P-InP layer, (5) is an antireflection film, (6
1 is a P-side electrode, (7) is an N-side electrode, and (8) is an ion-implanted semi-insulating crystal region.

従来の半導体受光装置と同じようにＰ側電極の内側に入
射した光は、ＰＮ接合界面より延びた空乏層で、キャリ
アが発生し光電流となる。一方、Ｐ側電極の外周部よシ
進入する光は半絶縁結晶内部で光吸収を受けるが、同領
域（８）では自由キャリアを生じることはない。As in the conventional semiconductor light receiving device, light incident on the inside of the P-side electrode generates carriers in a depletion layer extending from the PN junction interface and becomes a photocurrent. On the other hand, light entering from the outer peripheral part of the P-side electrode is absorbed inside the semi-insulating crystal, but no free carriers are generated in the region (8).

こ９ため、光電流はＰＮ接合界面よシ延びた空乏Ｊｆｌ
内で発生したキャリアによるドリフト電流が大半を占め
、フォトダイオードの高速性を高める・ことになる。つ
まり従来の半導体受光装置のような拡散電流の寄与はほ
とんど生じない。又、半絶縁結晶層があるため、この発
明になる半導体受光装置の容量は小さくなる。これも高
速性を高める要因となる。Therefore, the photocurrent is caused by the depletion Jfl extending from the PN junction interface.
Most of the drift current is caused by carriers generated within the photodiode, increasing the speed of the photodiode. In other words, there is almost no contribution from diffusion current as in conventional semiconductor light receiving devices. Furthermore, since there is a semi-insulating crystal layer, the capacity of the semiconductor light receiving device according to the present invention is reduced. This is also a factor that increases high speed.

なお、上記実施例ではイオン注入によシ半絶縁性結晶領
域を形成したが、第２図に示すように工ｎＧａＡｓ　（
光吸収）層（３１の両側を半絶縁性のＩｎＰ層α〔で埋
めこんでもよい。半絶縁層としては、ＦｅドープのＩｎ
Ｐ層を、気相成長法又は有機金属気相成長法にて形成す
る。In the above embodiment, the semi-insulating crystal region was formed by ion implantation, but as shown in FIG.
Both sides of the light absorption layer (31) may be buried with a semi-insulating InP layer α.As the semi-insulating layer, an Fe-doped InP layer (31) may be buried.
The P layer is formed by vapor phase epitaxy or organometallic vapor phase epitaxy.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば光吸収層（３）の両側
は半絶縁性の結晶層にすることで、この領域内でのキャ
リアの発生を防ぎ、拡散電流を少なくし、光電流の寄与
は大半がドリフト電流になることで、フォトダイオード
の高速応答性を高める効果がある。又、容量が小さくな
ることでも高速応答を高める効果がある。As described above, according to the present invention, by forming semi-insulating crystal layers on both sides of the light absorption layer (3), generation of carriers in this region is prevented, diffusion current is reduced, and photocurrent is reduced. Most of the contribution comes from drift current, which has the effect of increasing the high-speed response of the photodiode. Furthermore, the reduction in capacitance also has the effect of increasing high-speed response.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の一実施例による半導体受光装置を示
す断面図、第２図はこの発明の他の実施例を示す断面図
、第３図は従来の半導体受光装置を示す断面図である。図において、＋１１はｎ’−ＩｎＰ基板、（２１はｎ−
−ＩｎＰ層、（３）はｎ−ＩｎＧａＡｓ層、（４）はｉ
’　−１ｎＰ層、＋５１は反射防止膜、（６）はＰ側電
極、（７）はｎ側電極、（８）はイオン注入された半絶
縁結晶領域である。なお、図中、同一符号は同一、又は相当部分を示す。FIG. 1 is a sectional view showing a semiconductor light receiving device according to one embodiment of the present invention, FIG. 2 is a sectional view showing another embodiment of the present invention, and FIG. 3 is a sectional view showing a conventional semiconductor light receiving device. . In the figure, +11 is an n'-InP substrate, (21 is an n-
-InP layer, (3) is n-InGaAs layer, (4) is i
' -1nP layer, +51 is an antireflection film, (6) is a P-side electrode, (7) is an n-side electrode, and (8) is an ion-implanted semi-insulating crystal region. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (3)

Translated fromJapanese

【特許請求の範囲】[Claims]（１）プレーナ構造を有する半導体結晶において、受光
部以外の表面から、基板又は基板と同じ導電型で同じ結
晶から成る単結晶層まで、半絶縁性のイオンが打ち込ま
れていることを特徴とする半導体受光装置。(1) In a semiconductor crystal having a planar structure, semi-insulating ions are implanted from the surface other than the light receiving part to the substrate or a single crystal layer made of the same crystal and of the same conductivity type as the substrate. Semiconductor photodetector.（２）上記半絶縁イオンはＦｅ、Ｃｏ又はプロトン等か
ら成ることを特徴とする特許請求の範囲第１項記載の半
導体受光装置。(2) The semiconductor light receiving device according to claim 1, wherein the semi-insulating ions are made of Fe, Co, protons, or the like.（３）プレーナ構造を有する半導体結晶において、光吸
収層の両側を、半絶縁層で埋めこむことを特徴とする半
導体受光装置。(3) A semiconductor light-receiving device characterized in that, in a semiconductor crystal having a planar structure, both sides of a light-absorbing layer are buried with semi-insulating layers.