【０００１】[0001]
【産業上の利用分野】本発明は発光ダイオード（ＬＥ
Ｄ）、レーザダイオード（ＬＤ）等に使用される窒化物
半導体（ＩｎaＡｌbＧａ1-a-bＮ、０≦a、０≦b、a＋b
≦１）よりなる発光素子に係り、特にｎ型窒化物半導体
層とｐ型窒化物半導体層との間に活性層を有するダブル
へテロ構造の窒化物半導体発光素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode (LE).
D), a nitride semiconductor used in the laser diode (LD), etc.(In a Al b Ga 1- ab N, 0 ≦ a, 0 ≦ b, a + b
≦ 1) The present invention relates to a light emitting device having a double hetero structure having an active layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer.
【０００２】[0002]
【従来の技術】紫外〜赤色に発光するＬＥＤ、ＬＤ等の
発光素子の材料として窒化物半導体（ＩｎaＡｌbＧａ
1-a-bＮ、０≦a、０≦b、a＋b≦１）が知られている。
我々はこの半導体材料を用いて、１９９３年１１月に光
度１ｃｄの青色ＬＥＤを発表し、１９９４年４月に光度
２ｃｄの青緑色ＬＥＤを発表し、１９９４年１０月には
光度２ｃｄの青色ＬＥＤを発表した。これらのＬＥＤは
全て製品化されて、現在ディスプレイ、道路信号等の実
用に供されている。BACKGROUND ART LED that emits ultraviolet to red, nitride semiconductor as a material of the light emitting element LD, etc. (Ina Alb Ga
1-ab N, 0 ≦ a, 0 ≦ b, a + b ≦ 1) are known.
Using this semiconductor material, we announced a blue LED with a luminance of 1 cd in November 1993, a blue-green LED with a luminance of 2 cd in April 1994, and a blue LED with a luminance of 2 cd in October 1994. Announced. These LEDs have all been commercialized and are currently being put to practical use in displays, road signals, and the like.
【０００３】図２に窒化物半導体よりなる従来の青色、
青緑色ＬＥＤの発光チップの構造を示す。基本的には、
基板２１の上に、ＧａＮよりなるバッファ層２２、ｎ型
ＧａＮよりなるｎ型コンタクト層２３と、ｎ型ＡｌＧａ
Ｎよりなるｎ型クラッド層２４と、ｎ型ＩｎＧａＮより
なる活性層２５と、ｐ型ＡｌＧａＮよりなるｐ型クラッ
ド層２６と、ｐ型ＧａＮよりなるｐ型コンタクト層２７
とが順に積層されたダブルへテロ構造を有している。活
性層２５のｎ型ＩｎＧａＮにはＳｉ、Ｇｅ等のドナー不
純物および／またはＺｎ、Ｍｇ等のアクセプター不純物
がドープされており、ＬＥＤ素子の発光波長は、その活
性層のＩｎＧａＮのＩｎ組成比を変更するか、若しくは
活性層にドープする不純物の種類を変更することで、紫
外〜赤色まで変化させることが可能となっている。現
在、活性層にドナー不純物とアクセプター不純物とが同
時にドープされた発光波長５１０ｎｍ以下のＬＥＤが実
用化されている。FIG. 2 shows a conventional blue color made of a nitride semiconductor.
1 shows a structure of a light emitting chip of a blue-green LED. Basically,
A buffer layer 22 made of GaN, an n-type contact layer 23 made of n-type GaN, and an n-type AlGa
N-type cladding layer 24 of N, active layer 25 of n-type InGaN, p-type cladding layer 26 of p-type AlGaN, and p-type contact layer 27 of p-type GaN
And have a double heterostructure in which layers are sequentially stacked. The n-type InGaN of the active layer 25 is doped with a donor impurity such as Si and Ge and / or an acceptor impurity such as Zn and Mg. The emission wavelength of the LED element changes the In composition ratio of InGaN of the active layer. Alternatively, by changing the type of impurities to be doped into the active layer, it is possible to change from ultraviolet to red. At present, an LED having an emission wavelength of 510 nm or less in which an active layer is simultaneously doped with a donor impurity and an acceptor impurity has been put to practical use.
【０００４】[0004]
【発明が解決しようとする課題】従来の青色ＬＥＤは順
方向電流（Ｉｆ）２０ｍＡで順方向電圧（Ｖｆ）が３．
６Ｖ〜３．８Ｖ、発光出力は３ｍＷ近くあり、ＳｉＣよ
りなる青色ＬＥＤと比較して２０倍以上の発光出力を有
している。順方向電圧が低いのはｐ−ｎ接合を形成して
いるためであり、発光出力が高いのはダブルへテロ構造
を実現しているためである。このように、現在実用化さ
れているＬＥＤは非常に性能の高いものであるが、さら
に高性能なＬＥＤ、ＬＤのような発光素子が求められて
いる。例えばＬＥＤのＶｆは前記のように３．６Ｖ〜
３．８Ｖという低い値を達成しているが、ＬＤのように
電極幅や電極面積の小さい発光素子を実現するために
は、さらにＶｆを低下させる必要がある。A conventional blue LED has a forward current (If) of 20 mA and a forward voltage (Vf) of 3.
6 V to 3.8 V, the light emission output is close to 3 mW, and the light emission output is 20 times or more as compared with the blue LED made of SiC. The forward voltage is low because a pn junction is formed, and the light emission output is high because a double heterostructure is realized. As described above, the LEDs currently in practical use have extremely high performance, but light emitting elements such as LEDs and LDs with higher performance are required. For example, the Vf of the LED is 3.6 V to
Although a low value of 3.8 V has been achieved, it is necessary to further reduce Vf in order to realize a light-emitting element having a small electrode width and a small electrode area such as an LD.
【０００５】従って、本発明はこのような事情を鑑みて
成されたものであり、その目的とするところは、ダブル
へテロ構造の窒化物半導体よりなる発光素子の性能をさ
らに向上させることにあり、具体的には、発光素子のＶ
ｆをさらに低下させることにより発光効率に優れた素子
を提供することにある。Accordingly, the present invention has been made in view of such circumstances, and an object of the present invention is to further improve the performance of a light emitting device made of a nitride semiconductor having a double hetero structure. Specifically, V of the light emitting element
An object of the present invention is to provide a device having excellent luminous efficiency by further reducing f.
【０００６】[0006]
【課題を解決するための手段】本発明の発光素子は、ｎ
型窒化物半導体層とｐ型窒化物半導体層との間にＩｎｘ
Ｇａ１−ｘＮ（０≦X＜１）よりなる井戸層のみの単一
量子井戸構造、若しくはＩｎｘＧａ１−ｘＮ（０＜X＜
１）よりなる井戸層と、ＩｎＹＧａ１−ＹＮ（０≦Y＜
１、Y＜X）よりなる障壁層との多重量子井戸構造のＩｎ
を含む活性層を有し、前記ｐ型窒化物半導体層表面に正
電極が形成されてなる窒化物半導体発光素子において、
前記ｐ型窒化物半導体層は正電極と接する側から順にア
クセプター不純物濃度の高い第一のｐ型窒化物半導体層
と、第一のｐ型窒化物半導体層よりもアクセプター不純
物の低い第二のｐ型窒化物半導体層とを含み、且つ前記
活性層はＩｎを含むｎ型の窒化物半導体上に形成されダ
ブルへテロ構造を構成することを特徴とする。The light emitting device according to the present invention has n
Inx between the type nitride semiconductor layer and a p-type nitride semiconductor layer
A single quantum well structure having only a well layer made of Ga1-x N (0 ≦ X <1) or Inx Ga1-x N (0 <X <
1) and the well layer madeof, In Y Ga 1-Y N (0 ≦ Y <
1, Y <X) with a barrier layer of multiple quantum well structure
A nitride semiconductor light-emitting device having an active layer containing: a positive electrode formed on the surface of the p-type nitride semiconductor layer;
The p-type nitride semiconductor layer has a first p-type nitride semiconductor layer having a higher acceptor impurity concentration and a second p-type nitride semiconductor layer having a lower acceptor impurity than the first p-type nitride semiconductor layer in order from the side in contact with the positive electrode. And the active layer is formed on an n-type nitride semiconductor containing In to form a double hetero structure.
【０００７】さらに前記発光素子において、第一のｐ型
窒化物半導体の膜厚は０．１μｍ以下、さらに好ましく
は５００オングストローム以下、最も好ましくは２００
オングストローム以下に調整する。０．１μｍよりも厚
いと結晶自体に不純物による結晶欠陥が多くなり、逆に
Ｖｆが高くなる傾向にある。Further, in the light emitting device, the thickness of the first p-type nitride semiconductor is 0.1 μm or less, more preferably 500 Å or less, and most preferably 200 Å or less.
Adjust to less than Angstrom. If the thickness is larger than 0.1 μm, crystal defects due to impurities in the crystal itself increase, and conversely, Vf tends to increase.
【０００８】[0008]
【作用】ｐ層を高キャリア濃度のｐ+型と低キャリア濃
度のｐ型とする技術が特開平６−１５１９６４号、特開
平６−１５１９６５号、特開平６−１５１９６６号等に
記載されている。これらの公報に開示される発光素子は
ＧａＮのホモ接合により発光する。このためｐ−ｎ接合
界面を基準として、この接合界面より遠ざかる方向にｎ
型ＧａＮ層を低キャリア濃度のｎ型と高キャリア濃度の
ｎ+型とし、ｐ型ＧａＮを低キャリア濃度のｐ型と、高
キャリア濃度のｐ+型としている。そしてこれら二段の
キャリア濃度よりなるｎ層とｐ層とを組み合わせること
により、発光素子の長寿命と発光輝度の向上を図ってい
る。A technique for forming the p layer into a p + type with a high carrier concentration and a p type with a low carrier concentration is described in JP-A-6-151964, JP-A-6-151965 and JP-A-6-151966. . The light emitting devices disclosed in these publications emit light by a homojunction of GaN. Therefore, based on the pn junction interface, n
The p-type GaN layers are of a low carrier concentration n-type and a high carrier concentration n + type, and the p-type GaN is of a low carrier concentration p-type and a high carrier concentration p + type. By combining the n-layer and the p-layer having the two-stage carrier concentration, long life of the light-emitting element and improvement of the light emission luminance are achieved.
【０００９】一方、本発明の発光素子が前記公報と異な
るところは、ダブルへテロ構造の発光素子のｐ型層をア
クセプター不純物濃度の低い第二のｐ型層と、アクセプ
ター不純物濃度の高い第一のｐ型層とにしている点であ
る。ダブルへテロ構造の発光素子はホモ接合の発光素子
に比較して１０倍以上発光出力が高い。従って、前記公
報のようにｐ型層をｐ+型とｐ型との組み合わせにして
も、出力の増加はほとんどない。むしろ本発明では発光
出力よりも、ダブルへテロ構造のＶｆを低下させ、発光
効率を改善している点が従来の技術と異なる。また、ア
クセプター不純物に関して、一般にキャリア濃度はアク
セプター不純物の濃度とおおよそ比例しているが、窒化
物半導体の場合、半導体層にアクセプター不純物をドー
プした後、４００℃以上でアニーリングを行うことによ
り完全なｐ型として作用する。このためホールキャリア
濃度はアニーリング状態、アニール温度等により変動す
ることが多く、素子構造とした時の正確なキャリア濃度
を測定することは困難であるので、本発明ではアクセプ
ター不純物濃度で発光素子を特徴づけている。On the other hand, the light emitting device of the present invention is different from the above publication in that a p-type layer of a light emitting device having a double hetero structure has a second p-type layer having a low acceptor impurity concentration and a first p-type layer having a high acceptor impurity concentration. Is a p-type layer. A light emitting element having a double heterostructure has a light emission output that is at least 10 times higher than a light emitting element having a homojunction. Therefore, even if the p-type layer is a combination of the p + -type and the p-type as in the above publication, there is almost no increase in output. Rather, the present invention differs from the prior art in that the Vf of the double heterostructure is reduced rather than the light emission output to improve the light emission efficiency. In addition, regarding the acceptor impurity, the carrier concentration is generally approximately proportional to the concentration of the acceptor impurity. However, in the case of a nitride semiconductor, after the semiconductor layer is doped with the acceptor impurity, annealing is performed at 400 ° C. or more to complete the p-type. Acts as a type. For this reason, the hole carrier concentration often fluctuates depending on the annealing state, the annealing temperature, and the like, and it is difficult to accurately measure the carrier concentration in the device structure. Therefore, in the present invention, the light emitting device is characterized by the acceptor impurity concentration. I have.
【００１０】次に、本発明の発光素子は従来のようにｐ
−ｎ接合界面を基準としているのではなく、正電極の接
触面を基準とし、この正電極と接する面を高不純物濃度
の第一のｐ型層として、その第一のｐ型層に接して低不
純物濃度の第二のｐ型層としている点で異なる。正電極
に接する層を基準としてｐ層を構成することにより、Ｖ
ｆを低下させることができる。Next, the light emitting device of the present invention has a p
Rather than using the n-junction interface as a reference, the contact surface of the positive electrode is used as a reference, and the surface in contact with the positive electrode is used as a first p-type layer having a high impurity concentration and is in contact with the first p-type layer. The difference is that the second p-type layer has a low impurity concentration. By configuring the p-layer based on the layer in contact with the positive electrode, V
f can be reduced.
【００１１】さらに前記公報に開示される発光素子と、
本発明の発光素子とが最も異なる点はｐ+層の膜厚であ
る。つまり、前記公報では高キャリア濃度のｐ+型の半
導体層の膜厚が０．２μｍ以上なければ発光素子の発光
出力が低下するが、本発明の発光素子では高不純物濃度
の第一のｐ型層の膜厚を０．２μｍ以上にすると、Ｖｆ
が高くなる。これは不純物ドープによる結晶性の悪化に
よるものである。逆に本発明の発光素子では高不純物濃
度の第一のｐ型層の膜厚は０．１μｍ以下であることが
好ましい。０．１μｍ以下とすることにより、効果的に
発光素子のＶｆを低下させることが可能である。Further, a light emitting device disclosed in the above publication,
The most different point from the light emitting element of the present invention is the thickness of the p + layer. In other words, in the above publication, the light emitting output of the light emitting element is reduced unless the thickness of the high carrier concentration p + type semiconductor layer is 0.2 μm or more. When the thickness of the layer is 0.2 μm or more, Vf
Will be higher. This is due to deterioration of crystallinity due to impurity doping. Conversely, in the light emitting device of the present invention, the thickness of the first p-type layer having a high impurity concentration is preferably 0.1 μm or less. When the thickness is 0.1 μm or less, Vf of the light emitting element can be effectively reduced.
【００１２】[0012]
【実施例】［実施例１］ 以下、図面を元に本発明の発光素子を詳説する。図１は
本発明の一実施例の発光素子の構造を示す模式断面図で
ある。この発光素子は基板１の上にバッファ層２、ｎ型
コンタクト層３、ｎ型クラッド層４、活性層５、ｐ型ク
ラッド層６、アクセプター不純物濃度の低い第二のｐ型
コンタクト層７２、アクセプター不純物濃度が高い第一
のｐ型コンタクト層７１を順に積層した構造を示してい
る。さらに第一のｐ型コンタクト層７１には正電極９が
形成され、ｎ型コンタクト層３には負電極８が形成され
ている。[Example 1] Hereinafter, a light emitting device of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic sectional view showing the structure of a light emitting device according to one embodiment of the present invention. This light-emitting device has a buffer layer 2, an n-type contact layer 3, an n-type cladding layer 4, an active layer 5, a p-type cladding layer 6, a second p-type contact layer 72 having a low acceptor impurity concentration, an acceptor This shows a structure in which first p-type contact layers 71 having a high impurity concentration are sequentially stacked. Further, a positive electrode 9 is formed on the first p-type contact layer 71, and a negative electrode 8 is formed on the n-type contact layer 3.
【００１３】基板１にはサファイア（Ａ面、Ｃ面、Ｒ面
を含む）の他、ＳｉＣ（６Ｈ、４Ｈを含む）、ＺｎＯ、
Ｓｉ、ＧａＡｓのような窒化物半導体と格子不整合の基
板、またＮＧＯ（ネオジウムガリウム酸化物）のような
酸化物単結晶よりなる窒化物半導体と格子定数の近い基
板等を使用することができる。The substrate 1 includes sapphire (including A-plane, C-plane and R-plane), SiC (including 6H and 4H), ZnO,
A substrate having a lattice mismatch with a nitride semiconductor such as Si or GaAs, a substrate having a lattice constant similar to that of a nitride semiconductor made of an oxide single crystal such as NGO (neodymium gallium oxide), or the like can be used.
【００１４】バッファ層２はＧａＮ、ＡｌＮ、ＧａＡｌ
Ｎ等を例えば５０オングストローム〜０．１μｍの膜厚
で成長させることが好ましく、例えばＭＯＶＰＥ法によ
ると４００℃〜６００℃の低温で成長させることにより
形成できる。バッファ層２は基板１と窒化物半導体との
格子不整合を緩和するために設けられるが、ＳｉＣ、Ｚ
ｎＯのような窒化物半導体と格子定数が近い基板、窒化
物半導体と格子整合した基板を使用する際にはバッファ
層が形成されないこともある。The buffer layer 2 is made of GaN, AlN, GaAl
It is preferable to grow N or the like at a film thickness of, for example, 50 Å to 0.1 μm. For example, it can be formed by growing at a low temperature of 400 ° C. to 600 ° C. according to the MOVPE method. The buffer layer 2 is provided to alleviate lattice mismatch between the substrate 1 and the nitride semiconductor.
When a substrate such as nO having a lattice constant close to that of a nitride semiconductor or a substrate lattice-matched with a nitride semiconductor is used, a buffer layer may not be formed.
【００１５】ｎ型コンタクト層３は負電極８を形成する
層であり、ＧａＮ、ＡｌＧａＮ、ＩｎＡｌＧａＮ等を例
えば１μｍ〜１０μｍの膜厚で成長させることが好まし
く、その中でもＧａＮを選択することにより負電極の材
料と好ましいオーミック接触を得ることができる。負電
極８の材料としては例えばＴｉとＡｌ、ＴｉとＡｕ等を
好ましく用いることができる。The n-type contact layer 3 is a layer for forming the negative electrode 8, and it is preferable to grow GaN, AlGaN, InAlGaN, or the like to a thickness of, for example, 1 μm to 10 μm. And a preferable ohmic contact with the above material can be obtained. As the material of the negative electrode 8, for example, Ti and Al, Ti and Au, or the like can be preferably used.
【００１６】ｎ型クラッド層４はＧａＮ、ＡｌＧａＮ、
ＩｎＡｌＧａＮ等を例えば５００オングストローム〜
０．５μｍの膜厚で成長させることが好ましく、その中
でもＧａＮ、ＡｌＧａＮを選択することにより結晶性の
良い層が得られる。また、ｎ型クラッド層４、ｎ型コン
タクト層３のいずれかを省略することも可能である。ど
ちらかを省略すると、残った層がｎ型クラッド層および
ｎ型コンタクト層として作用する。The n-type cladding layer 4 is made of GaN, AlGaN,
InAlGaN or the like is, for example, 500 angstroms or more.
It is preferable to grow the layer with a thickness of 0.5 μm. Among them, a layer having good crystallinity can be obtained by selecting GaN or AlGaN. Further, either the n-type cladding layer 4 or the n-type contact layer 3 can be omitted. If either is omitted, the remaining layers act as an n-type cladding layer and an n-type contact layer.
【００１７】活性層５はクラッド層よりもバンドギャッ
プエネルギーが小さいＩｎＧａＮ、ＩｎＡｌＧａＮ、Ａ
ｌＧａＮ等の窒化物半導体であれば良く、特に所望のバ
ンドギャップによってインジウムの組成比を適宜変更し
たＩｎＧａＮにすることが好ましい。また活性層５を例
えばＩｎＧａＮ／ＧａＮ、ＩｎＧａＮ／ＩｎＧａＮ（組
成が異なる）等の組み合わせで、それぞれの薄膜を積層
した多重量子井戸構造としてもよい。単一量子井戸構
造、多重量子井戸構造いずれの活性層においても、活性
層はｎ型、ｐ型いずれでもよいが、特にノンドープ（無
添加）とすることにより半値幅の狭いバンド間発光、励
起子発光、あるいは量子井戸準位発光が得られ、ＬＥＤ
素子、ＬＤ素子を実現する上で特に好ましい。活性層を
単一量子井戸（ＳＱＷ：single quantum well）構造若
しくは多重量子井戸（ＭＱＷ：multiquantum well）構
造とすると非常に出力の高い発光素子が得られる。ＳＱ
Ｗ、ＭＱＷとはノンドープのＩｎＧａＮによる量子準位
間の発光が得られる活性層の構造を指し、例えばＳＱＷ
では活性層を単一組成のＩｎXＧａ1-XＮ（０≦X＜１）
で構成した層であり、ＩｎXＧａ1-XＮの膜厚を１００オ
ングストローム以下、さらに好ましくは７０オングスト
ローム以下とすることにより量子準位間の強い発光が得
られる。またＭＱＷは組成比の異なるＩｎXＧａ1-XＮ
（この場合X＝０、X＝１を含む）の薄膜を複数積層した
多層膜とする。このように活性層をＳＱＷ、ＭＱＷとす
ることにより量子準位間発光で、約３６５ｎｍ〜６６０
ｎｍまでの発光が得られる。量子構造の井戸層の厚さと
しては、前記のように７０オングストローム以下が好ま
しい。多重量子井戸構造では井戸層はＩｎXＧａ1-XＮで
構成し、障壁層は同じくＩｎYＧａ1-YＮ（Y＜X、この場
合Y＝０を含む）で構成することが望ましい。特に好ま
しくは井戸層と障壁層をＩｎＧａＮで形成すると同一温
度で成長できるので結晶性のよい活性層が得られる。障
壁層の膜厚は１５０オングストローム以下、さらに好ま
しくは１２０オングストローム以下にすると高出力な発
光素子が得られる。また、活性層５にドナー不純物およ
び／またはアクセプター不純物をドープしてもよい。不
純物をドープした活性層の結晶性がノンドープと同じで
あれば、ドナー不純物をドープするとノンドープのもの
に比べてバンド間発光強度をさらに強くすることができ
る。アクセプター不純物をドープするとバンド間発光の
ピーク波長よりも約０．５ｅＶ低エネルギー側にピーク
波長を持っていくことができるが、半値幅は広くなる。
アクセプター不純物とドナー不純物を同時にドープする
と、アクセプター不純物のみドープした活性層の発光強
度をさらに大きくすることができる。特にアクセプター
不純物をドープした活性層を実現する場合、活性層の導
電型はＳｉ等のドナー不純物を同時にドープしてｎ型と
することが好ましい。活性層５は例えば数オングストロ
ーム〜０．５μｍの膜厚で成長させることができる。但
し、活性層を単一量子井戸構造若しくは多重量子井戸構
造として、活性層を構成する窒化物半導体層の膜厚を薄
くするときはｎ型クラッド層４と活性層５との間にＩｎ
を含むｎ型の窒化物半導体よりなる第二のｎ型クラッド
層４０を形成することが望ましい。The active layer 5 has a band gap energy smaller than that of the cladding layer.
Any nitride semiconductor such as lGaN may be used, and it is particularly preferable to use InGaN in which the composition ratio of indium is appropriately changed according to a desired band gap. The active layer 5 may have a multiple quantum well structure in which respective thin films are stacked, for example, by a combination of InGaN / GaN, InGaN / InGaN (different in composition), or the like. In either the single quantum well structure or the multiple quantum well structure, the active layer may be either an n-type or a p-type. Light emission or quantum well level light emission
It is particularly preferable for realizing an element and an LD element. When the active layer has a single quantum well (SQW: single quantum well) structure or a multiple quantum well (MQW: multiquantum well) structure, a light-emitting element having an extremely high output can be obtained. SQ
W and MQW indicate the structure of an active layer in which light emission between quantum levels by non-doped InGaN is obtained, for example, SQW
In the above, the active layer is made of a single composition Inx Ga1 -xN (0 ≦ X <1).
By setting the thickness of Inx Ga1 -xN to 100 Å or less, more preferably 70 Å or less, strong light emission between quantum levels can be obtained. In addition, MQW has Inx Ga1 -xN having different composition ratios.
(In this case, X = 0 and X = 1 are included). When the active layer is made of SQW or MQW in this way, light emission between quantum levels of about 365 nm to
Light emission up to nm is obtained. As described above, the thickness of the well layer of the quantum structure is preferably 70 Å or less. Well layer is a multiple quantum well structure composed of InX Ga1-X N, the barrier layer alsoIn Y Ga 1-Y N ( Y <X, in this case including the Y = 0) it is desirable to configure at. Particularly preferably, when the well layer and the barrier layer are formed of InGaN, they can be grown at the same temperature, so that an active layer having good crystallinity can be obtained. When the thickness of the barrier layer is 150 Å or less, more preferably 120 Å or less, a high-output light-emitting element can be obtained. Further, the active layer 5 may be doped with a donor impurity and / or an acceptor impurity. If the crystallinity of the active layer doped with the impurity is the same as that of the non-doped layer, doping with the donor impurity can further increase the interband emission intensity as compared with the non-doped one. When an acceptor impurity is doped, the peak wavelength can be brought to a lower energy side by about 0.5 eV than the peak wavelength of the interband emission, but the half width becomes wider.
When the acceptor impurity and the donor impurity are simultaneously doped, the emission intensity of the active layer doped only with the acceptor impurity can be further increased. In particular, when an active layer doped with an acceptor impurity is realized, the conductivity type of the active layer is preferably n-type by simultaneously doping a donor impurity such as Si. The active layer 5 can be grown to a thickness of, for example, several angstroms to 0.5 μm. However, when the active layer has a single quantum well structure or a multiple quantum well structure and the thickness of the nitride semiconductor layer constituting the active layer is reduced, the In between the n-type cladding layer 4 and the active layer 5 is formed.
It is desirable to form the second n-type cladding layer 40 made of an n-type nitride semiconductor containing:
【００１８】ｐ型クラッド層６はＧａＮ、ＡｌＧａＮ、
ＩｎＡｌＧａＮ等を例えば５００オングストローム〜
０．５μｍの膜厚で成長させることが好ましく、その中
でもＧａＮ、ＡｌＧａＮを選択することにより結晶性の
良い層が得られる。なおこのｐ型クラッド層６を省略す
ることも可能である。The p-type cladding layer 6 is made of GaN, AlGaN,
InAlGaN or the like is, for example, 500 angstroms or more.
It is preferable to grow the layer with a thickness of 0.5 μm. Among them, a layer having good crystallinity can be obtained by selecting GaN or AlGaN. The p-type cladding layer 6 can be omitted.
【００１９】次に、本発明の特徴であるコンタクト層７
１、７２について述べる。このコンタクト層７１、７２
は正電極９を形成して、正電極９と好ましいオーミック
接触を得る層であり完全なオーミックに近ければ近いほ
ど、発光素子のＶｆを低下させることができる。そのた
め、このコンタクト層は、正電極９に接する層をアクセ
プター不純物濃度が高い第一の窒化物半導体層である第
一のｐ型コンタクト層７１と、その第一のｐ型コンタク
ト層よりもアクセプター不純物濃度が低い第二の窒化物
半導体である第二のｐ型コンタクト層７２とで構成され
ている。Next, the contact layer 7 which is a feature of the present invention is described.
1 and 72 will be described. These contact layers 71 and 72
Is a layer that forms a positive electrode 9 and obtains a favorable ohmic contact with the positive electrode 9. The closer to a perfect ohmic, the lower the Vf of the light emitting element can be. Therefore, this contact layer includes a first p-type contact layer 71 that is a first nitride semiconductor layer having a high acceptor impurity concentration and a layer that is in contact with the positive electrode 9 with an acceptor impurity higher than the first p-type contact layer. And a second p-type contact layer 72 which is a second nitride semiconductor having a low concentration.
【００２０】第一のｐ型コンタクト層７１、および第二
のｐ型コンタクト層７２は同一組成の窒化物半導体で形
成することが望ましく、例えばＧａＮ、ＡｌＧａＮ、Ｉ
ｎＡｌＧａＮ等を成長させることができる。その中でも
ＧａＮを選択することにより正電極９の材料と好ましい
オーミック接触を得ることができる。The first p-type contact layer 71 and the second p-type contact layer 72 are desirably formed of nitride semiconductors having the same composition. For example, GaN, AlGaN, I
nAlGaN or the like can be grown. Among them, by selecting GaN, a preferable ohmic contact with the material of the positive electrode 9 can be obtained.
【００２１】高濃度の第一のｐ型コンタクト層７１のア
クセプター不純物濃度は１×１０17〜５×１０21／cm3
に調整することが望ましい。１×１０17／cm3よりも低
いと、電極とオーミック接触を得ることが難しく、５×
１０21／cm3よりも高いと不純物により窒化物半導体の
結晶性が悪くなり、Ｖｆが高くなる傾向にある。The high-concentration first p-type contact layer 71 has an acceptor impurity concentration of 1 × 1017 to 5 × 1021 / cm3.
It is desirable to adjust to. If it is lower than 1 × 1017 / cm3 , it is difficult to obtain ohmic contact with the electrode, and it is difficult to obtain 5 ×
If it is higher than 1021 / cm3, the crystallinity of the nitride semiconductor will be deteriorated due to impurities, and Vf tends to increase.
【００２２】一方、低濃度の第二のｐ型コンタクト層７
２のアクセプター不純物濃度は２×１０15〜５×１０20
／cm3の範囲に調整することが望ましい。２×１０15／c
m3よりも低いと、ｐ型としての抵抗が高くなるのでＶｆ
が高くなる傾向にある。５×１０20／cm3よりも高いと
高濃度の第一のｐ型コンタクト層７１とのバランスが取
りにくく、Ｖｆの向上があまり望めなくなる傾向にあ
る。On the other hand, the low concentration second p-type contact layer 7
2 has an acceptor impurity concentration of 2 × 1015 to 5 × 1020.
/ Cm3 is desirable. 2 × 1015 / c
Below the m3, the resistance of the p-type is high Vf
Tend to be higher. If it is higher than 5 × 1020 / cm3, it is difficult to balance with the first p-type contact layer 71 having a high concentration, and the improvement of Vf tends to be hardly expected.
【００２３】コンタクト層７１、７２のホールキャリア
濃度は前にも述べたように、窒化物半導体にドープする
アクセプター不純物の濃度を変化させるか、あるいはア
クセプター不純物をドープしたコンタクト層７１、７２
を、４００℃以上でアニーリングすることにより調整で
きるが、正確な値を測定することは困難である。おおよ
その値としては、前記アクセプター不純物濃度で４００
℃以上のアニールを行うことにより、例えばホールキャ
リア濃度およそ１×１０16〜５×１０19／cm3の第一の
ｐ型コンタクト層７１が得られ、同じくホールキャリア
濃度およそ１×１０15〜１×１０19／cm3の第二のｐ型
コンタクト層７２が得られる。As described above, the hole carrier concentration of the contact layers 71 and 72 changes the concentration of the acceptor impurity doped into the nitride semiconductor or the contact layers 71 and 72 doped with the acceptor impurity.
Can be adjusted by annealing at 400 ° C. or higher, but it is difficult to measure an accurate value. As an approximate value, the acceptor impurity concentration is 400
By performing annealing at a temperature of not less than C., for example, the first p-type contact layer 71 having a hole carrier concentration of about 1 × 1016 to 5 × 1019 / cm3 is obtained, and the hole carrier concentration is also about 1 × 1015 to 1 × 1019 / cm3 . A second p-type contact layer 72 of × 1019 / cm3 is obtained.
【００２４】第一のｐ型コンタクト層７１と好ましいオ
ーミックが得られる正電極９の材料としてはＮｉおよび
Ａｕを含む金属を用いることができる。ＮｉおよびＡｕ
を含む正電極は特にｐ型ＧａＮと好ましいオーミックを
得ることができる。As a material of the first p-type contact layer 71 and the positive electrode 9 that can obtain a preferable ohmic, a metal containing Ni and Au can be used. Ni and Au
The positive electrode containing in particular can obtain a preferable ohmic with p-type GaN.
【００２５】本発明の発光素子は例えばＭＯＶＰＥ（有
機金属気相成長法）、ＭＢＥ（分子線気相成長法）、Ｈ
ＤＶＰＥ（ハイドライド気相成長法）等の気相成長法を
用いて、基板上にＩｎaＡｌbＧａ1-a-bＮ（０≦a、０≦
b、a＋b≦１）をｎ型、ｐ型等の導電型で積層すること
によって得られる。ｎ型の窒化物半導体はノンドープの
状態でも得られるが、Ｓｉ、Ｇｅ、Ｓ等のドナー不純物
を結晶成長中に半導体層中に導入することによって得ら
れる。The light emitting device of the present invention can be manufactured by MOVPE (metal organic chemical vapor deposition), MBE (molecular beam chemical vapor deposition), H
DVPE by a vapor deposition method (hydride vapor phase epitaxy) or the like, In the substratea Al b Ga 1-ab N (0 ≦ a, 0 ≦
b, a + b ≦ 1) can be obtained by laminating n-type, p-type and other conductive types. An n-type nitride semiconductor can be obtained even in a non-doped state, but can be obtained by introducing a donor impurity such as Si, Ge, or S into a semiconductor layer during crystal growth.
【００２６】一方、ｐ型の窒化物半導体層はＭｇ、Ｚ
ｎ、Ｃｄ、Ｃａ、Ｂｅ、Ｃ等のアクセプター不純物を同
じく結晶成長中に半導体層中に導入することにより得ら
れるが、前にも述べたように、アクセプター不純物導入
後４００℃以上でアニーリングを行うことにより、さら
に好ましいｐ型が得られる。On the other hand, the p-type nitride semiconductor layer is made of Mg, Z
It is also obtained by introducing an acceptor impurity such as n, Cd, Ca, Be, or C into the semiconductor layer during the crystal growth. As described above, annealing is performed at 400 ° C. or more after the introduction of the acceptor impurity. Thereby, a more preferable p-type is obtained.
【００２７】次に図１の発光素子を具体的に述べる。以
下の実施例はＭＯＶＰＥ法による成長方法を示してい
る。Next, the light emitting device shown in FIG. 1 will be specifically described. The following example shows a growth method by the MOVPE method.
【００２８】まず、ＴＭＧ（トリメチルガリウム）とＮ
Ｈ3とを用い、反応容器にセットしたサファイア基板１
のＣ面に５００℃でＧａＮよりなるバッファ層２を５０
０オングストロームの膜厚で成長させる。First, TMG (trimethylgallium) and N
Sapphire substrate 1 set in a reaction vessel using H3
Buffer layer 2 made of GaN at 500 ° C.
It is grown to a thickness of 0 Å.
【００２９】次に温度を１０５０℃まで上げ、ＴＭＧ、
ＮＨ3に加えシランガスを用い、Ｓｉドープｎ型ＧａＮ
よりなるｎ型コンタクト層２３を４μｍの膜厚で成長さ
せる。Next, the temperature is increased to 1050 ° C., and TMG,
Si-doped n-type GaN using silane gas in addition to NH3
An n-type contact layer 23 is grown to a thickness of 4 μm.
【００３０】続いて原料ガスにＴＭＡ（トリメチルアル
ミニウム）を加え、同じく１０５０℃でＳｉドープｎ型
Ａｌ0.3Ｇａ0.7Ｎ層よりなるｎ型クラッド層４を０．１
μｍの膜厚で成長させる。Subsequently, TMA (trimethylaluminum) was added to the raw material gas, and the Si-doped n-type was
The n-type cladding layer 4 made ofAl0.3Ga0.7N
It is grown to a thickness of μm.
【００３１】次に温度を８００℃に下げ、ＴＭＧ、ＴＭ
Ｉ（トリメチルインジウム）、ＮＨ3、シランガス、Ｄ
ＥＺ（ジエチルジンク）を用い、Ｓｉ＋Ｚｎドープｎ型
Ｉｎ0.05Ｇａ0.95Ｎよりなる活性層５を０．１μｍの膜
厚で成長させる。Next, the temperature was lowered to 800 ° C., and TMG, TM
I (trimethylindium), NH3 , silane gas, D
Si + Zn doped n-type using EZ (diethyl zinc)
An active layer 5 ofIn0.05Ga0.95N is grown to a thickness of 0.1 μm.
【００３２】次に温度を１０５０℃に上げ、ＴＭＧ、Ｔ
ＭＡ、ＮＨ3、Ｃｐ2Ｍｇ（シクロペンタジエニルマグネ
シウム）を用い、Ｍｇドープｐ型Ａｌ0.3Ｇａ0.7Ｎより
なるｐ型クラッド層６を０．１μｍの膜厚で成長させ
る。Next, the temperature was raised to 1050 ° C., and TMG, T
Using MA, NH3 , and Cp 2 Mg (cyclopentadienyl magnesium), a p-type cladding layer 6 made of Mg-doped p-typeAl0.3Ga0.7N is grown to a thickness of 0.1 μm.
【００３３】次に１０５０℃でＴＭＧ、ＮＨ3、Ｃｐ2Ｍ
ｇを用い、Ｍｇドープｐ型ＧａＮよりなる第二のｐ型コ
ンタクト層７２を０．５μｍの膜厚で成長させる。なお
この第二のｐ型コンタクト層のＭｇ濃度は１×１０18／
cm3であった。Next, at 1050 ° C., TMG, NH3 , Cp2M
Using g, a second p-type contact layer 72 of Mg-doped p-type GaN is grown to a thickness of 0.5 μm. The Mg concentration of the second p-type contact layer is 1 × 1018 /
It was cm3.
【００３４】続いて１０５０℃でＣｐ2Ｍｇの流量を多
くして、Ｍｇドープｐ型ＧａＮよりなる第一のｐ型コン
タクト層７１を２００オングストロームの膜厚で成長さ
せる。なおこの第一のｐ型コンタクト層７１のＭｇ濃度
は２×１０19／cm3であった。Subsequently, the flow rate of Cp 2 Mg is increased at 1050 ° C., and a first p-type contact layer 71 made of Mg-doped p-type GaN is grown to a thickness of 200 Å. The Mg concentration of the first p-type contact layer 71 was 2 × 1019 / cm3 .
【００３５】反応終了後、温度を室温まで下げてウェー
ハを反応容器から取り出し、７００℃でウェーハのアニ
ーリングを行い、ｐ型層をさらに低抵抗化する。次に最
上層のｐ型コンタクト層７の表面に所定の形状のマスク
を形成し、ｎ型コンタクト層３の表面が露出するまでエ
ッチングする。エッチング後、ｎ型コンタクト層３の表
面にＴｉとＡｌよりなる負電極８、第一のｐ型コンタク
ト層７１の表面にＮｉとＡｕよりなる正電極９を形成す
る。電極形成後、ウェーハを３５０μｍ角のチップに分
離した後、ＬＥＤ素子とした。このＬＥＤ素子はＩｆ２
０ｍＡで、Ｖｆ３．１Ｖ、発光ピーク波長４５０ｎｍ、
半値幅７０ｎｍの青色発光を示し、発光出力は３ｍＷで
あった。After the completion of the reaction, the temperature is lowered to room temperature, the wafer is taken out of the reaction vessel, and the wafer is annealed at 700 ° C. to further reduce the resistance of the p-type layer. Next, a mask having a predetermined shape is formed on the surface of the uppermost p-type contact layer 7, and etching is performed until the surface of the n-type contact layer 3 is exposed. After the etching, a negative electrode 8 made of Ti and Al is formed on the surface of the n-type contact layer 3, and a positive electrode 9 made of Ni and Au is formed on the surface of the first p-type contact layer 71. After the electrodes were formed, the wafer was separated into chips of 350 μm square, and then used as LED elements. This LED element is If2
At 0 mA, Vf 3.1 V, emission peak wavelength 450 nm,
The device exhibited blue light emission with a half-value width of 70 nm, and the light emission output was 3 mW.
【００３６】［実施例２］ 実施例１において第一のｐ型コンタクト層７１の膜厚を
５００オングストロームとする他は同様にして発光素子
を得たところ、Ｉｆ２０ｍＡにおいて、Ｖｆ３．２Ｖ、
発光出力はほぼ同一であった。Example 2 A light emitting device was obtained in the same manner as in Example 1 except that the thickness of the first p-type contact layer 71 was changed to 500 Å.
The light emission output was almost the same.
【００３７】［実施例３］ 実施例１において第一のｐ型コンタクト層７１の膜厚を
０．１μｍとする他は同様にして発光素子を得たとこ
ろ、Ｉｆ２０ｍＡにおいて、Ｖｆが３．３Ｖ、発光出力
２．９ｍＷであった。Example 3 A light-emitting device was obtained in the same manner as in Example 1 except that the thickness of the first p-type contact layer 71 was changed to 0.1 μm. At 20 mA If, Vf was 3.3 V, The light emission output was 2.9 mW.
【００３８】［実施例４］ 実施例１において第一のｐ型コンタクト層７１の膜厚を
０．３μｍとする他は同様にして発光素子を得たとこ
ろ、Ｉｆ２０ｍＡにおいてＶｆは３．７Ｖとなり、発光
出力は２．８ｍＷであった。Example 4 A light-emitting device was obtained in the same manner as in Example 1 except that the thickness of the first p-type contact layer 71 was changed to 0.3 μm, and Vf was 3.7 V at If 20 mA. The light emission output was 2.8 mW.
【００３９】［実施例５］ 実施例１において、第二のｐ型コンタクト層７２のＭｇ
濃度を５×１０17／cm3とし、第一のｐ型コンタクト層
７１のＭｇ濃度を１×１０19／cm3とする他は、同様に
してＬＥＤ素子を得たところ、実施例１とほぼ同一の特
性を示した。Fifth Embodiment In the first embodiment, the second p-type contact layer 72 is made of Mg.
An LED element was obtained in the same manner as in Example 1 except that the concentration was set to 5 × 1017 / cm3 and the Mg concentration of the first p-type contact layer 71 was set to 1 × 1019 / cm3. It showed the same characteristics.
【００４０】［実施例６］ 図３は実施例５に係る発光素子の構造を示す模式的な断
面図である。この発光素子が図１の発光素子と異なると
ころは、ｎ型クラッド層４と活性層５との間に新たなバ
ッファ層としてＩｎを含むｎ型の窒化物半導体よりなる
第二のｎ型クラッド層４０を形成しているところであ
る。この第二のクラッド層４０は１０オングストローム
以上、０．１μｍ以下の膜厚で形成することが望まし
く、さらに第二のｎ型クラッド層４０と活性層５の膜厚
を３００オングストローム以上にすると、Ｉｎを含む第
二のｎ型クラッド層４０とＩｎを含む活性層５とがバッ
ファ層として作用し、ｎ型クラッド層４、ｐ型クラッド
層６にクラックが入らず結晶性良く成長できる。さら
に、この第二のｎ型クラッド層４０を成長させることに
より、不純物をドープしない量子構造の活性層が実現で
き、半値幅が狭く、出力の高い発光を得ることができ
る。なおこの第二のｎ型クラッド層４０はＧａＮでもよ
い。Example 6 FIG. 3 is a schematic sectional view showing the structure of a light emitting device according to Example 5. This light emitting device is different from the light emitting device of FIG. 1 in that a second n-type cladding layer made of an n-type nitride semiconductor containing In as a new buffer layer is provided between the n-type cladding layer 4 and the active layer 5. 40 is being formed. This second cladding layer 40 is desirably formed with a thickness of 10 Å or more and 0.1 μm or less. When the thicknesses of the second n-type cladding layer 40 and the active layer 5 are made 300 Å or more, Insecond, including the
The two n-type cladding layers 40 and the active layer 5 containing In act as a buffer layer, and the n-type cladding layer 4 and the p-type cladding layer 6 can be grown with good crystallinity without cracks. Further, by growing this second n-type cladding layer 40, an active layer having a quantum structure without impurity doping can be realized, and light emission with a narrow half-value width and high output can be obtained. Note that the second n-type cladding layer 40 may be GaN.
【００４１】この第二のｎ型クラッド層４０は、活性層
５とＡｌとＧａとを含むｎ型クラッド層４との間のバッ
ファ層として作用する。つまりＩｎとＧａとを含む第二
のｎ型クラッド層４０が結晶の性質として柔らかい性質
を有しているので、ＡｌとＧａとを含むｎ型クラッド層
４と活性層５との格子定数不整と熱膨張係数差によって
生じる歪を吸収する働きがある。従って活性層を単一量
子井戸構造、若しくは多重量子井戸構造として、活性層
を構成する窒化物半導体層の膜厚を薄くしても、活性層
５、ｎ型クラッド層４にクラックが入らないので、活性
層が弾性的に変形し、活性層の結晶欠陥が少なくなる。
つまり活性層を量子井戸構造としたことにより、活性層
の結晶性が良くなるので発光出力が増大する。さらに、
活性層を量子井戸構造とすると、量子効果および励起子
効果により発光出力が増大する。言い換えると、従来の
発光素子では活性層の膜厚を例えば１０００オングスト
ローム以上と厚くすることにより、クラッド層、活性層
にクラックが入るのを防止していた。しかしながら活性
層には常に熱膨張係数差、格子不整による歪が係ってお
り、従来の発光素子では活性層の厚さが弾性的に変形可
能な臨界膜厚を超えているので、弾性的に変形すること
ができず、活性層中に多数の結晶欠陥を生じ、バンド間
発光ではあまり光らない。この第二のｎ型クラッド層４
０を形成することにより、活性層が量子構造の状態にお
いて、発光素子の発光出力を飛躍的に向上させることが
可能である。The second n-type cladding layer 40 functions as a buffer layer between the active layer 5 and the n-type cladding layer 4 containing Al and Ga. That is, since the second n-type cladding layer 40 containing In and Ga has a soft property as a crystalline property, the lattice constant irregularity between the n-type cladding layer 4 containing Al and Ga and the active layer 5 is reduced. It has the function of absorbing the strain caused by the difference in thermal expansion coefficient. Therefore, even if the active layer has a single quantum well structure or a multiple quantum well structure, the active layer 5 and the n-type clad layer 4 do not crack even if the thickness of the nitride semiconductor layer constituting the active layer is reduced. In addition, the active layer is elastically deformed, and crystal defects of the active layer are reduced.
In other words, when the active layer has the quantum well structure, the crystallinity of the active layer is improved, so that the light emission output is increased. further,
When the active layer has a quantum well structure, the light emission output increases due to the quantum effect and the exciton effect. In other words, in the conventional light emitting device, cracks are prevented from being formed in the cladding layer and the active layer by increasing the thickness of the active layer to, for example, 1000 Å or more. However, the active layer is always strained due to the difference in thermal expansion coefficient and lattice irregularity. In the conventional light emitting device, the thickness of the active layer exceeds the critical thickness that can be elastically deformed. It cannot be deformed, causes many crystal defects in the active layer, and does not emit much light in interband emission. This second n-type cladding layer 4
By forming 0, the light emitting output of the light emitting element can be remarkably improved in a state where the active layer has a quantum structure.
【００４２】具体的には、実施例１においてｎ型クラッ
ド層４を成長させた後、温度を８００℃に下げ、ＴＭ
Ｇ、ＴＭＩ（トリメチルインジウム）、ＮＨ3、シラン
ガスを用い、Ｓｉドープｎ型Ｉｎ0.01Ｇａ0.99Ｎよりな
る第二のｎ型クラッド層４０を５００オングストローム
の膜厚で成長させる。Specifically, after growing the n-type cladding layer 4 in Example 1, the temperature was lowered to 800 ° C.
G, TMI (trimethylindium), NH3 , and silane gas are used to grow a second n-type cladding layer 40 of Si-doped n-typeIn0.01Ga0.99N with a thickness of 500 Å.
【００４３】続いてＴＭＧ、ＴＭＩ、ＮＨ3を用い８０
０℃でノンドープｎ型Ｉｎ0.05Ｇａ0.95Ｎよりなる活性
層５を８０オングストロームの膜厚で成長させる。後は
実施例１と同様にして、ｐ型クラッド層６、第二のｐ型
コンタクト層７２、第一のｐ型コンタクト層７１を成長
させてＬＥＤ素子としたところ、このＬＥＤ素子は、Ｉ
ｆ２０ｍＡでＶｆ３．１Ｖ、発光ピーク波長４００ｎｍ
の青色発光を示し、発光出力は１２ｍＷであった。さら
に、発光スペクトルの半値幅は２０ｎｍであり、非常に
色純度の良い発光を示した。Subsequently, TMG, TMI, NH3
At 0 ° C., an active layer 5 made of non-doped n-typeIn0.05Ga0.95N is grown to a thickness of 80 Å. After that, the p-type cladding layer 6, the second p-type contact layer 72, and the first p-type contact layer 71 were grown to form an LED element in the same manner as in Example 1.
Vf 3.1 V at f20 mA, emission peak wavelength 400 nm
And emitted light of 12 mW. Further, the half width of the light emission spectrum was 20 nm, and light emission with very good color purity was exhibited.
【００４４】［実施例７］ 実施例６において、活性層５の組成をノンドープＩｎ
0.05Ｇａ0.95Ｎよりなる井戸層を２５オングストローム
と、ノンドープＩｎ0.01Ｇａ0.99Ｎよりなる障壁層を５
０オングストロームの膜厚で成長させる。この操作を２
６回繰り返し、最後に井戸層を積層して総厚約２０００
オングストロームの活性層６を成長させた。後は実施例
６と同様にして、ＬＥＤ素子としたところ、このＬＥＤ
素子も、Ｉｆ２０ｍＡでＶｆ３．１Ｖ、発光ピーク波長
４００ｎｍの青色発光を示し、発光出力は１２ｍＷであ
った。さらに、発光スペクトルの半値幅は２０ｎｍであ
り、非常に色純度の良い発光を示した。Example 7 In Example 6, the composition of the active layer 5 was changed to non-dopedIn.
A well layer made of0.05Ga0.95N is 25 Å, and a barrier layer made of non-dopedIn0.01Ga0.99N is 5 Å.
It is grown to a thickness of 0 Å. This operation 2
Repeat 6 times and finally stack well layers to a total thickness of about 2000
An active layer 6 of Angstrom was grown. After that, as in Example 6, an LED element was obtained.
The device also emitted blue light with a Vf of 3.1 V and an emission peak wavelength of 400 nm at If 20 mA, and an emission output of 12 mW. Further, the half width of the light emission spectrum was 20 nm, and light emission with very good color purity was exhibited.
【００４５】[0045]
【発明の効果】以上説明したように、本発明の発光素子
はダブルへテロ構造の発光素子において、正電極を形成
するｐ型層を高アクセプター不純物濃度の第一のｐ型層
と、低不純物濃度の第二のｐ型層とすることにより、Ｖ
ｆを低下させることができるので発光効率が向上する。
従ってＬＥＤを大量に用いた大型ディスプレイ、屋外広
告板等を実現した際には消費電力の少ないデバイスを実
現でき、その産業上の利用価値は大きい。As described above, in the light emitting device of the present invention, in a light emitting device having a double hetero structure, the p-type layer forming the positive electrode is formed by the first p-type layer having a high acceptor impurity concentration and the low impurity By providing a second p-type layer having a concentration of
Since f can be reduced, the luminous efficiency is improved.
Therefore, when realizing a large display using a large amount of LEDs, an outdoor billboard, or the like, a device with low power consumption can be realized, and its industrial utility value is great.
【図１】 本発明の一実施例に係る発光素子の構造を示
す模式断面図。FIG. 1 is a schematic sectional view showing the structure of a light emitting device according to one embodiment of the present invention.
【図２】 従来の発光素子の構造を示す模式断面図。FIG. 2 is a schematic cross-sectional view illustrating a structure of a conventional light-emitting element.
【図３】 本発明の他の実施例に係る発光素子の構造を
示す模式断面図。FIG. 3 is a schematic sectional view showing the structure of a light emitting device according to another embodiment of the present invention.
１・・・・基板 ２・・・・バッファ層 ３・・・・ｎ型コンタクト層 ４・・・・ｎ型クラッド層 ５・・・・活性層 ６・・・・ｐ型クラッド層 ７２・・・・第二のｐ型コンタクト層 ７１・・・・第一のｐ型コンタクト層 ８・・・・負電極 ９・・・・正電極 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Buffer layer 3 ... N-type contact layer 4 ... N-type cladding layer 5 ... Active layer 6 ... P-type cladding layer 72 ... ..Second p-type contact layer 71... First p-type contact layer 8... Negative electrode 9.
フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 33/00 H01S 5/00 - 5/50Continuation of the front page (58) Field surveyed (Int.Cl.7 , DB name) H01L 33/00 H01S 5/00-5/50
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31784495AJP3250438B2 (en) | 1995-03-29 | 1995-12-06 | Nitride semiconductor light emitting device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7098995 | 1995-03-29 | ||
| JP7-70989 | 1995-03-29 | ||
| JP31784495AJP3250438B2 (en) | 1995-03-29 | 1995-12-06 | Nitride semiconductor light emitting device |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001238146ADivisionJP3890930B2 (en) | 1995-03-29 | 2001-08-06 | Nitride semiconductor light emitting device |
| Publication Number | Publication Date |
|---|---|
| JPH08330629A JPH08330629A (en) | 1996-12-13 |
| JP3250438B2true JP3250438B2 (en) | 2002-01-28 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31784495AExpired - Fee RelatedJP3250438B2 (en) | 1995-03-29 | 1995-12-06 | Nitride semiconductor light emitting device |
| Country | Link |
|---|---|
| JP (1) | JP3250438B2 (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008153130A1 (en) | 2007-06-15 | 2008-12-18 | Rohm Co., Ltd. | Nitride semiconductor light emitting element and method for manufacturing nitride semiconductor |
| WO2011108703A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Single crystal substrate with multilayer film, production method for single crystal substrate with multilayer film, and device production method |
| WO2011108706A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Single crystal substrate, production method for single crystal substrate, production method for single crystal substrate with multilayer film, and device production method |
| WO2011108698A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Internal reforming substrate for epitaxial growth, internal reforming substrate with multilayer film, semiconductor device, bulk semiconductor substrate, and production methods therefor |
| US8395165B2 (en) | 2011-07-08 | 2013-03-12 | Bridelux, Inc. | Laterally contacted blue LED with superlattice current spreading layer |
| US8525221B2 (en) | 2009-11-25 | 2013-09-03 | Toshiba Techno Center, Inc. | LED with improved injection efficiency |
| US8536601B2 (en) | 2009-06-10 | 2013-09-17 | Toshiba Techno Center, Inc. | Thin-film LED with P and N contacts electrically isolated from the substrate |
| US8552465B2 (en) | 2011-11-09 | 2013-10-08 | Toshiba Techno Center Inc. | Method for reducing stress in epitaxial growth |
| US8558247B2 (en) | 2011-09-06 | 2013-10-15 | Toshiba Techno Center Inc. | GaN LEDs with improved area and method for making the same |
| US8564010B2 (en) | 2011-08-04 | 2013-10-22 | Toshiba Techno Center Inc. | Distributed current blocking structures for light emitting diodes |
| US8581267B2 (en) | 2011-11-09 | 2013-11-12 | Toshiba Techno Center Inc. | Series connected segmented LED |
| US8624482B2 (en) | 2011-09-01 | 2014-01-07 | Toshiba Techno Center Inc. | Distributed bragg reflector for reflecting light of multiple wavelengths from an LED |
| US8664747B2 (en) | 2008-04-28 | 2014-03-04 | Toshiba Techno Center Inc. | Trenched substrate for crystal growth and wafer bonding |
| US8686430B2 (en) | 2011-09-07 | 2014-04-01 | Toshiba Techno Center Inc. | Buffer layer for GaN-on-Si LED |
| US8865565B2 (en) | 2011-08-02 | 2014-10-21 | Kabushiki Kaisha Toshiba | LED having a low defect N-type layer that has grown on a silicon substrate |
| US8916906B2 (en) | 2011-07-29 | 2014-12-23 | Kabushiki Kaisha Toshiba | Boron-containing buffer layer for growing gallium nitride on silicon |
| US8994064B2 (en) | 2011-09-03 | 2015-03-31 | Kabushiki Kaisha Toshiba | Led that has bounding silicon-doped regions on either side of a strain release layer |
| US9012939B2 (en) | 2011-08-02 | 2015-04-21 | Kabushiki Kaisha Toshiba | N-type gallium-nitride layer having multiple conductive intervening layers |
| US9130068B2 (en) | 2011-09-29 | 2015-09-08 | Manutius Ip, Inc. | Light emitting devices having dislocation density maintaining buffer layers |
| US9142743B2 (en) | 2011-08-02 | 2015-09-22 | Kabushiki Kaisha Toshiba | High temperature gold-free wafer bonding for light emitting diodes |
| US9159869B2 (en) | 2011-08-03 | 2015-10-13 | Kabushiki Kaisha Toshiba | LED on silicon substrate using zinc-sulfide as buffer layer |
| US9343641B2 (en) | 2011-08-02 | 2016-05-17 | Manutius Ip, Inc. | Non-reactive barrier metal for eutectic bonding process |
| US9490392B2 (en) | 2011-09-29 | 2016-11-08 | Toshiba Corporation | P-type doping layers for use with light emitting devices |
| US10174439B2 (en) | 2011-07-25 | 2019-01-08 | Samsung Electronics Co., Ltd. | Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0772247B1 (en)* | 1994-07-21 | 2004-09-15 | Matsushita Electric Industrial Co., Ltd. | Semiconductor light-emitting device and production method thereof |
| US6057565A (en)* | 1996-09-26 | 2000-05-02 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device including a non-stoichiometric compound layer and manufacturing method thereof |
| JP4492013B2 (en)* | 1997-02-17 | 2010-06-30 | 日亜化学工業株式会社 | Nitride semiconductor device |
| JP3681540B2 (en)* | 1997-06-16 | 2005-08-10 | 松下電器産業株式会社 | Semiconductor manufacturing method, semiconductor device manufacturing method, and semiconductor substrate manufacturing method |
| CN100426545C (en)* | 1998-03-12 | 2008-10-15 | 日亚化学工业株式会社 | Nitride semiconductor device |
| EP2273571A3 (en) | 1998-03-12 | 2012-06-27 | Nichia Corporation | A nitride semiconductor device |
| KR100499117B1 (en)* | 1998-05-08 | 2005-07-04 | 삼성전자주식회사 | Method for activating compound semiconductor layer |
| JP4166885B2 (en) | 1998-05-18 | 2008-10-15 | 富士通株式会社 | Optical semiconductor device and manufacturing method thereof |
| US6657300B2 (en) | 1998-06-05 | 2003-12-02 | Lumileds Lighting U.S., Llc | Formation of ohmic contacts in III-nitride light emitting devices |
| US6838705B1 (en)* | 1999-03-29 | 2005-01-04 | Nichia Corporation | Nitride semiconductor device |
| JP2003046127A (en)* | 2001-05-23 | 2003-02-14 | Sanyo Electric Co Ltd | Nitride semiconductor light-emitting element |
| SG115549A1 (en) | 2002-07-08 | 2005-10-28 | Sumitomo Chemical Co | Epitaxial substrate for compound semiconductor light emitting device, method for producing the same and light emitting device |
| WO2004013916A1 (en) | 2002-08-01 | 2004-02-12 | Nichia Corporation | Semiconductor light-emitting device, method for manufacturing same and light-emitting apparatus using same |
| US7345297B2 (en) | 2004-02-09 | 2008-03-18 | Nichia Corporation | Nitride semiconductor device |
| WO2005106979A1 (en)* | 2004-04-28 | 2005-11-10 | Mitsubishi Cable Industries, Ltd. | Nitride semiconductor light emitting element |
| JP4341702B2 (en) | 2007-06-21 | 2009-10-07 | 住友電気工業株式会社 | Group III nitride semiconductor light emitting device |
| US9312432B2 (en)* | 2012-03-13 | 2016-04-12 | Tsmc Solid State Lighting Ltd. | Growing an improved P-GaN layer of an LED through pressure ramping |
| JP2013258231A (en) | 2012-06-12 | 2013-12-26 | Disco Abrasive Syst Ltd | Method for processing optical device |
| JP6025410B2 (en) | 2012-06-12 | 2016-11-16 | 株式会社ディスコ | Optical device processing method |
| JP2015170803A (en) | 2014-03-10 | 2015-09-28 | 住友電気工業株式会社 | GROUP III NITRIDE SEMICONDUCTOR ELEMENT, p-TYPE CONTACT STRUCTURE AND GROUP III NITRIDE SEMICONDUCTOR ELEMENT MANUFACTURING METHOD |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008153130A1 (en) | 2007-06-15 | 2008-12-18 | Rohm Co., Ltd. | Nitride semiconductor light emitting element and method for manufacturing nitride semiconductor |
| US8664747B2 (en) | 2008-04-28 | 2014-03-04 | Toshiba Techno Center Inc. | Trenched substrate for crystal growth and wafer bonding |
| US8536601B2 (en) | 2009-06-10 | 2013-09-17 | Toshiba Techno Center, Inc. | Thin-film LED with P and N contacts electrically isolated from the substrate |
| US8871539B2 (en) | 2009-06-10 | 2014-10-28 | Kabushiki Kaisha Toshiba | Thin-film LED with P and N contacts electrically isolated from the substrate |
| US9142742B2 (en) | 2009-06-10 | 2015-09-22 | Kabushiki Kaisha Toshiba | Thin-film LED with P and N contacts electrically isolated from the substrate |
| US8546832B2 (en) | 2009-06-10 | 2013-10-01 | Toshiba Techno Center Inc. | Thin-film LED with p and n contacts electrically isolated from the substrate |
| US8684749B2 (en) | 2009-11-25 | 2014-04-01 | Toshiba Techno Center Inc. | LED with improved injection efficiency |
| US9012953B2 (en) | 2009-11-25 | 2015-04-21 | Kabushiki Kaisha Toshiba | LED with improved injection efficiency |
| US8525221B2 (en) | 2009-11-25 | 2013-09-03 | Toshiba Techno Center, Inc. | LED with improved injection efficiency |
| WO2011108703A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Single crystal substrate with multilayer film, production method for single crystal substrate with multilayer film, and device production method |
| WO2011108698A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Internal reforming substrate for epitaxial growth, internal reforming substrate with multilayer film, semiconductor device, bulk semiconductor substrate, and production methods therefor |
| WO2011108706A1 (en) | 2010-03-05 | 2011-09-09 | 並木精密宝石株式会社 | Single crystal substrate, production method for single crystal substrate, production method for single crystal substrate with multilayer film, and device production method |
| US8395165B2 (en) | 2011-07-08 | 2013-03-12 | Bridelux, Inc. | Laterally contacted blue LED with superlattice current spreading layer |
| US10174439B2 (en) | 2011-07-25 | 2019-01-08 | Samsung Electronics Co., Ltd. | Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow |
| US8916906B2 (en) | 2011-07-29 | 2014-12-23 | Kabushiki Kaisha Toshiba | Boron-containing buffer layer for growing gallium nitride on silicon |
| US8865565B2 (en) | 2011-08-02 | 2014-10-21 | Kabushiki Kaisha Toshiba | LED having a low defect N-type layer that has grown on a silicon substrate |
| US9142743B2 (en) | 2011-08-02 | 2015-09-22 | Kabushiki Kaisha Toshiba | High temperature gold-free wafer bonding for light emitting diodes |
| US9343641B2 (en) | 2011-08-02 | 2016-05-17 | Manutius Ip, Inc. | Non-reactive barrier metal for eutectic bonding process |
| US9012939B2 (en) | 2011-08-02 | 2015-04-21 | Kabushiki Kaisha Toshiba | N-type gallium-nitride layer having multiple conductive intervening layers |
| US9159869B2 (en) | 2011-08-03 | 2015-10-13 | Kabushiki Kaisha Toshiba | LED on silicon substrate using zinc-sulfide as buffer layer |
| US9070833B2 (en) | 2011-08-04 | 2015-06-30 | Kabushiki Kaisha Toshiba | Distributed current blocking structures for light emitting diodes |
| US8564010B2 (en) | 2011-08-04 | 2013-10-22 | Toshiba Techno Center Inc. | Distributed current blocking structures for light emitting diodes |
| US8624482B2 (en) | 2011-09-01 | 2014-01-07 | Toshiba Techno Center Inc. | Distributed bragg reflector for reflecting light of multiple wavelengths from an LED |
| US8981410B1 (en) | 2011-09-01 | 2015-03-17 | Kabushiki Kaisha Toshiba | Distributed bragg reflector for reflecting light of multiple wavelengths from an LED |
| US8994064B2 (en) | 2011-09-03 | 2015-03-31 | Kabushiki Kaisha Toshiba | Led that has bounding silicon-doped regions on either side of a strain release layer |
| US8558247B2 (en) | 2011-09-06 | 2013-10-15 | Toshiba Techno Center Inc. | GaN LEDs with improved area and method for making the same |
| US9018643B2 (en) | 2011-09-06 | 2015-04-28 | Kabushiki Kaisha Toshiba | GaN LEDs with improved area and method for making the same |
| US8686430B2 (en) | 2011-09-07 | 2014-04-01 | Toshiba Techno Center Inc. | Buffer layer for GaN-on-Si LED |
| US9130068B2 (en) | 2011-09-29 | 2015-09-08 | Manutius Ip, Inc. | Light emitting devices having dislocation density maintaining buffer layers |
| US9490392B2 (en) | 2011-09-29 | 2016-11-08 | Toshiba Corporation | P-type doping layers for use with light emitting devices |
| US9123853B2 (en) | 2011-11-09 | 2015-09-01 | Manutius Ip, Inc. | Series connected segmented LED |
| US8581267B2 (en) | 2011-11-09 | 2013-11-12 | Toshiba Techno Center Inc. | Series connected segmented LED |
| US9391234B2 (en) | 2011-11-09 | 2016-07-12 | Toshiba Corporation | Series connected segmented LED |
| US8552465B2 (en) | 2011-11-09 | 2013-10-08 | Toshiba Techno Center Inc. | Method for reducing stress in epitaxial growth |
| Publication number | Publication date |
|---|---|
| JPH08330629A (en) | 1996-12-13 |
| Publication | Publication Date | Title |
|---|---|---|
| JP3250438B2 (en) | Nitride semiconductor light emitting device | |
| JP2890396B2 (en) | Nitride semiconductor light emitting device | |
| JP3890930B2 (en) | Nitride semiconductor light emitting device | |
| JP2778405B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP3551101B2 (en) | Nitride semiconductor device | |
| JP3868136B2 (en) | Gallium nitride compound semiconductor light emitting device | |
| JP2785254B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP2735057B2 (en) | Nitride semiconductor light emitting device | |
| JP3744211B2 (en) | Nitride semiconductor device | |
| JP3135041B2 (en) | Nitride semiconductor light emitting device | |
| JP2890390B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP2780691B2 (en) | Nitride semiconductor light emitting device | |
| KR20020021121A (en) | Nitride Semiconductor Device | |
| JP3835225B2 (en) | Nitride semiconductor light emitting device | |
| JP3651260B2 (en) | Nitride semiconductor device | |
| JP3620292B2 (en) | Nitride semiconductor device | |
| JP2713095B2 (en) | Semiconductor light emitting device and method of manufacturing the same | |
| JP2918139B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP2713094B2 (en) | Semiconductor light emitting device and method of manufacturing the same | |
| JP2001298215A (en) | Light emitting element | |
| JP2976951B2 (en) | Display device with nitride semiconductor light emitting diode | |
| JP3484997B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP3924973B2 (en) | Nitride semiconductor light emitting device manufacturing method and nitride semiconductor light emitting device | |
| JP3216596B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP3267250B2 (en) | Nitride semiconductor light emitting device |
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20071116 Year of fee payment:6 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20081116 Year of fee payment:7 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20081116 Year of fee payment:7 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20091116 Year of fee payment:8 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20091116 Year of fee payment:8 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20091116 Year of fee payment:8 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20101116 Year of fee payment:9 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20101116 Year of fee payment:9 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20111116 Year of fee payment:10 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20111116 Year of fee payment:10 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20121116 Year of fee payment:11 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20121116 Year of fee payment:11 | |
| FPAY | Renewal fee payment (prs date is renewal date of database) | Free format text:PAYMENT UNTIL: 20131116 Year of fee payment:12 | |
| R250 | Receipt of annual fees | Free format text:JAPANESE INTERMEDIATE CODE: R250 | |
| LAPS | Cancellation because of no payment of annual fees |