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JP3008533B2 - Semiconductor quantum well structure manufacturing method - Google Patents

Semiconductor quantum well structure manufacturing method

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Publication number
JP3008533B2
JP3008533B2JP8215491AJP8215491AJP3008533B2JP 3008533 B2JP3008533 B2JP 3008533B2JP 8215491 AJP8215491 AJP 8215491AJP 8215491 AJP8215491 AJP 8215491AJP 3008533 B2JP3008533 B2JP 3008533B2
Authority
JP
Japan
Prior art keywords
substrate
temperature
region
quantum well
quantum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP8215491A
Other languages
Japanese (ja)
Other versions
JPH04315418A (en
Inventor
普 岩田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC CorpfiledCriticalNEC Corp
Priority to JP8215491ApriorityCriticalpatent/JP3008533B2/en
Publication of JPH04315418ApublicationCriticalpatent/JPH04315418A/en
Application grantedgrantedCritical
Publication of JP3008533B2publicationCriticalpatent/JP3008533B2/en
Anticipated expirationlegal-statusCritical
Expired - Fee Relatedlegal-statusCriticalCurrent

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Description

Translated fromJapanese
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の結晶成長方
法に関する。
The present invention relates to a method for growing a crystal of a semiconductor device.

【0002】[0002]

【従来の技術】量子井戸構造は半導体レーザなどに広く
用いられており発振閾値電流が小さいなど非常に優れた
特性を有している。この量子井戸構造をさらに小さくし
て量子細線や量子箱にする事により、さらに特性が改善
される事が予測されている。ウェットエッチングと再成
長により、量子箱の作製が行なわれている(ジパニーズ
ジーナル オブ アプライド フィジックス[Japa
nese Journal of Applied P
hysics]第26巻 L225ページ 1987
年)。
2. Description of the Related Art Quantum well structures are widely used in semiconductor lasers and the like and have extremely excellent characteristics such as a small oscillation threshold current. It is expected that the characteristics will be further improved by further reducing the quantum well structure to quantum wires or quantum boxes. Quantum boxes are manufactured by wet etching and regrowth (Japanese Genial of Applied Physics [Japan
nice Journal of Applied P
physics] Vol. 26, page L225 1987
Year).

【0003】[0003]

【発明が解決しようとする課題】しかし、10nmレベ
ルの微細な加工技術が必要なため従来の方法ではレーザ
ー発振を達成する事はできなかった。
However, laser oscillation cannot be achieved by the conventional method because a fine processing technique of the order of 10 nm is required.

【0004】[0004]

【課題を解決するための手段】前述の問題点を解決する
ために本発明が提供する製造方法は、基板上の半導体結
晶成長において、前記基板温度を結晶成長温度より低く
保ち、少なくとも2種類以上の半導体材料を前記基板上
に非結晶状に成長させる第1工程と、前記基板を加熱し
前記半導体材料の一方のみを結晶化させ、直径10nm
程度の結晶領域を形成する第2工程とを含むことを特徴
としている。
According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising: maintaining a substrate temperature lower than a crystal growth temperature; A first step of growing the semiconductor material in an amorphous state on the substrate, and heating the substrate to crystallize only one of the semiconductor materials to form a semiconductor material having a diameter of 10 nm.
And a second step of forming a crystalline region of a certain degree.

【0005】[0005]

【作用】第1工程において、基板温度が低いため、半導
体材料はアモルファス状となる。第2工程において基板
を加熱する事によりこのアモルファス状の半導体材料を
結晶化する事ができる。結晶化する温度は半導体材料に
より異なるため特定の温度に保持する事により一方の半
導体材料のみを結晶化させることができる。また、結晶
化する領域は特定温度に保持する時間の長さに比例する
ため、時間を制御する事により結晶化の領域を10nm
程度の量子効果を現われる大きさにする事ができる。ま
たこれにより結晶化したのち急激に基板温度を上昇させ
る事により、前述の結晶化領域のまわりに第2の半導体
材料を結晶化する事もできる。最初の結晶化でできた1
0nm程度の領域は、そのまわりの領域と物性的に異な
るため、これにより量子箱構造が形成される。
In the first step, the semiconductor material becomes amorphous because the substrate temperature is low. By heating the substrate in the second step, the amorphous semiconductor material can be crystallized. Since the crystallization temperature varies depending on the semiconductor material, only one of the semiconductor materials can be crystallized by maintaining the specific temperature. Further, since the crystallization region is proportional to the length of time for holding at a specific temperature, by controlling the time, the crystallization region can be reduced to 10 nm.
It can be made large enough to show a quantum effect of a degree. In addition, by rapidly increasing the substrate temperature after crystallization, the second semiconductor material can be crystallized around the above-mentioned crystallization region. 1 from the first crystallization
Since the region of about 0 nm is physically different from the surrounding region, a quantum box structure is thereby formed.

【0006】[0006]

【実施例】次に、本発明の実施例について図面を参照し
ながら説明する。図1は本発明の一実施例がGe,Si
半導体材料に適用されている例を示す工程図である。結
晶成長装置として分子線結晶成長装置を用いた。第1工
程としてSiからなる基板1上に基板温度を100℃と
し、Si2およびGe3の分子線と照射した。分子線の
強度はGe3をSi2の1/10とした。基板温度が低
いため、Si2およびGe3は非結晶状態で基板1上に
たい積した(図1(A))。次に第2工程として基板温
度を400℃にし1時間保持した。この温度ではGe3
は結晶化するため、Ge3原子は拡散してGe3の集ま
った領域を形成する。この領域の大きさは時間に依存す
る。基板1を400℃に1時間保った時の平均的な大き
さは10nmであり、量子箱領域4が形成された(図1
(B))。この後急激に基板温度を1000℃に上げ3
0分間保持した。この温度ではSi2も結晶化するので
量子箱領域4のまわりに結晶化したSiGeからなる量
子障壁領域5が形成した(図1(C))。素子障壁領域
5のポテンシャルが量子箱領域4のポテンシャルより高
いため、電子正孔は量子箱領域4に閉じ込められる。こ
の半導体量子井戸構造の光学特性は、非線形屈折率が非
常に大きく、高性能な光論理素子を形成する事が可能と
なった。
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows that one embodiment of the present invention is Ge, Si
FIG. 4 is a process chart showing an example applied to a semiconductor material. A molecular beam crystal growth device was used as a crystal growth device. As a first step, a substrate temperature of 100 ° C. was applied onto a substrate 1 made of Si, and irradiation was performed with molecular beams of Si 2 and Ge 3. The molecular beam intensity was set such that Ge3 was 1/10 of Si2. Since the substrate temperature was low, Si2 and Ge3 were deposited on the substrate 1 in an amorphous state (FIG. 1A). Next, as a second step, the substrate temperature was set to 400 ° C. and held for one hour. At this temperature, Ge3
Is crystallized, and Ge3 atoms diffuse to form a region where Ge3 is gathered. The size of this area depends on time. When the substrate 1 was kept at 400 ° C. for 1 hour, the average size was 10 nm, and the quantum box region 4 was formed.
(B)). Thereafter, the temperature of the substrate is rapidly increased to 1000 ° C. 3
Hold for 0 minutes. At this temperature, Si2 is also crystallized, so that a quantum barrier region 5 made of crystallized SiGe is formed around the quantum box region 4 (FIG. 1C). Since the potential of the element barrier region 5 is higher than the potential of the quantum box region 4, electron holes are confined in the quantum box region 4. The optical characteristics of this semiconductor quantum well structure have a very large nonlinear refractive index, and a high-performance optical logic device can be formed.

【0007】図2は本発明がInAs,GaAs半導体
材料に適用されている例を示す工程図である。製造は分
子線結晶成長装置を用いて行なった。第1工程として、
GaAsからなる基板6上に、基板温度を200℃と
し、Ga7,In8,As9分子線を照射した。このと
きのGa7とIn8の分子線強度比は10:1とした。
基板温度が低いことから基板6上には非結晶状にGa
7,In8,As9がたい積した(図2(A))。第2
工程としてAs9分子線を照射しながら基板6を450
℃に加熱し、1時間保持した。この温度ではInが拡散
してInAs結晶領域が形成されるため、直径約2nm
の量子箱領域10が形成できる(図2(B))。この後
短時間で基板温度を上げて600℃にし、1時間保持し
た。この温度ではGaAsも結晶化するため、In8の
組成が10%以下であるInGaAsからなる量子障壁
領域11が形成した(図2(C))。この量子井戸構造
をAlGaAs系半導体レーザの活性層に用いたとこ
ろ、発振閾値電流が1mAという高性能な半導体レーザ
が得られた。上述の実施例では、半導体材料としてS
i,GeおよびInAs,GaAsを用いたがこれに限
らず他の元素半導体の組合せ他の化合物半導体の組合
せ、また元素半導体と化合物半導体の組合せを用いるこ
ともできる。
FIG. 2 is a process chart showing an example in which the present invention is applied to InAs and GaAs semiconductor materials. The production was performed using a molecular beam crystal growth apparatus. As the first step,
On a substrate 6 made of GaAs, the substrate temperature was set to 200 ° C., and Ga7, In8, and As9 molecular beams were irradiated. At this time, the molecular beam intensity ratio of Ga7 and In8 was set to 10: 1.
Because the substrate temperature is low, Ga
7, In8 and As9 were deposited (FIG. 2 (A)). Second
As a step, the substrate 6 is irradiated with an As9 molecular beam by 450.
C. and held for 1 hour. At this temperature, In is diffused to form an InAs crystal region, so that the diameter is about 2 nm.
Can be formed (FIG. 2B). Thereafter, the temperature of the substrate was raised to 600 ° C. in a short time and maintained for 1 hour. At this temperature, GaAs is also crystallized, so that a quantum barrier region 11 made of InGaAs having an In8 composition of 10% or less was formed (FIG. 2C). When this quantum well structure was used for the active layer of an AlGaAs-based semiconductor laser, a high-performance semiconductor laser having an oscillation threshold current of 1 mA was obtained. In the above embodiment, the semiconductor material is S
Although i, Ge and InAs and GaAs were used, the present invention is not limited to this, and combinations of other element semiconductors, combinations of other compound semiconductors, and combinations of elemental semiconductors and compound semiconductors can be used.

【0008】[0008]

【発明の効果】以上に説明したように本発明によれば、
量子箱を容易に得る事ができ、高性能な半導体レーザ
や、新たな機能を持った光学素子や電気素子が実現でき
る。
According to the present invention as described above,
A quantum box can be easily obtained, and a high-performance semiconductor laser, and an optical element and an electric element having new functions can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示す工程図。FIG. 1 is a process chart showing one embodiment of the present invention.

【図2】第2の実施例を示す工程図。FIG. 2 is a process chart showing a second embodiment.

【符号の説明】[Explanation of symbols]

1 基板 2 Si 3 Ge 4 量子箱領域 5 量子障壁領域 6 基板 7 Gu 8 In 9 As 10 量子箱領域 11 量子障壁領域 Reference Signs List 1 substrate 2 Si 3 Ge 4 quantum box region 5 quantum barrier region 6 substrate 7 Gu 8 In 9 As 10 quantum box region 11 quantum barrier region

Claims (1)

Translated fromJapanese
(57)【特許請求の範囲】(57) [Claims]【請求項1】 基板温度を結晶成長温度より低く保ち、
少なくとも2種類以上の半導体材料を基板上に非結晶状
に成長させる第1工程と、前記基板を加熱し前記半導体
材料の一方のみを結晶化させ、直径10nm程度の結晶
領域を形成する第2工程とを少くとも含むことを特徴と
する半導体量子井戸構造製造方法。
1. The method according to claim 1, wherein the substrate temperature is kept lower than the crystal growth temperature.
A first step of growing at least two or more types of semiconductor materials on a substrate in an amorphous state, and a second step of heating the substrate to crystallize only one of the semiconductor materials to form a crystal region having a diameter of about 10 nm. And at least a method for manufacturing a semiconductor quantum well structure.
JP8215491A1991-04-151991-04-15 Semiconductor quantum well structure manufacturing methodExpired - Fee RelatedJP3008533B2 (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP8215491AJP3008533B2 (en)1991-04-151991-04-15 Semiconductor quantum well structure manufacturing method

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP8215491AJP3008533B2 (en)1991-04-151991-04-15 Semiconductor quantum well structure manufacturing method

Publications (2)

Publication NumberPublication Date
JPH04315418A JPH04315418A (en)1992-11-06
JP3008533B2true JP3008533B2 (en)2000-02-14

Family

ID=13766521

Family Applications (1)

Application NumberTitlePriority DateFiling Date
JP8215491AExpired - Fee RelatedJP3008533B2 (en)1991-04-151991-04-15 Semiconductor quantum well structure manufacturing method

Country Status (1)

CountryLink
JP (1)JP3008533B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5293050A (en)*1993-03-251994-03-08International Business Machines CorporationSemiconductor quantum dot light emitting/detecting devices
JP2687843B2 (en)*1993-06-081997-12-08日本電気株式会社 Quantum well box manufacturing method

Also Published As

Publication numberPublication date
JPH04315418A (en)1992-11-06

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