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JP2890494B2 - プラズマ薄膜の製造方法 - Google Patents

プラズマ薄膜の製造方法

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Publication number
JP2890494B2
JP2890494B2JP17851689AJP17851689AJP2890494B2JP 2890494 B2JP2890494 B2JP 2890494B2JP 17851689 AJP17851689 AJP 17851689AJP 17851689 AJP17851689 AJP 17851689AJP 2890494 B2JP2890494 B2JP 2890494B2
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JP
Japan
Prior art keywords
thin film
plasma
plasma thin
semiconductor substrate
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP17851689A
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English (en)
Other versions
JPH0344472A (ja
Inventor
宏 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
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Filing date
Publication date
Application filed by Seiko Epson CorpfiledCriticalSeiko Epson Corp
Priority to JP17851689ApriorityCriticalpatent/JP2890494B2/ja
Publication of JPH0344472ApublicationCriticalpatent/JPH0344472A/ja
Application grantedgrantedCritical
Publication of JP2890494B2publicationCriticalpatent/JP2890494B2/ja
Anticipated expirationlegal-statusCritical
Expired - Lifetimelegal-statusCriticalCurrent

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、プラズマ薄膜の製造方法に関するものであ
る。
〔従来の技術〕
従来、半導体基板上にプラズマ酸化シリコン膜を形成
する方法は、例えば第３図に示すように表面を絶縁した
電極を平行に配置し、一定温度に保たれた真空容器内に
半導体基板を搬送する。続いて、容器内を真空に引いた
後、第４図のチャートに示すように膜成長に必要な反応
ガスを流す。ガスの流量と圧力か所定値に達した後、前
記電極に高周波（RF）を印加し、一定時間保持した後、
高周波（RF）を切る。膜形成の終了した半導体基板は真
空容器外に搬出される。
〔発明が解決しようとする課題〕
しかしながら、従来技術では、膜形成終了後高周波
（RF）を急激に切るために印加された電荷の一部が半導
体基板上に残る。通常、下部電極は、半導体基板の支持
も兼ねているので、残った電荷は、半導体基板と電気的
に絶縁され電極間で逃げ場を失い静電気力となって半導
体基板と電極を引きつける。静電気力は酸化シリコン膜
の生成条件によっては大きな力となり、搬送トラブルを
引き起こしていた。
しかるに本発明は、かかる課題の解決するものであ
り、その目的とするところは、搬送トラブルのない安定
したプラズマ薄膜を提供することである。
〔課題を解決するための手段〕
本発明のプラズマ薄膜の製造方法は、高周波（RF）を
印加したプラズマCVDにより薄膜を形成するプラズマ薄
膜の製造方法において、前記高周波を印加し所望の時間
経過後、膜成長に必要な主反応ガスを遮断し、膜を成長
させないガスを流しながら高周波出力を経時的に下げて
いくことを特徴とする。
また、高周波出力の変化が100％から徐々に小さくな
っていくことを特徴とする。
また、高周波出力の変化が100％から一旦０になった
後、再度50％以下の値をとり、その後０になることを特
徴とするプラズマ薄膜の製造方法。
〔実施例〕
以下本発明の実施例における工程を、第１図に示すチ
ャートに基づいて詳細に説明する。
まず、トランジスタや抵抗等の半導体素子及びアルミ
ニウム配線の形成された半導体基板をプラズマ酸化シリ
コン膜を形成するために、約400℃に保たれ、絶縁され
た電極が平行に配置された真空容器内に搬送する。この
容器内を一旦真空に引いた後、TEOS［Si(OC2H5)4］／O2
等の反応ガスを流し、所定の流量、圧力にコントロール
した後、13.56MHz、400Wの高周波（RF）を印加する。所
望の時間経過した後、主反応ガス（TEOS）を切り、圧力
を下げ、O2ガスを流しながら徐々にRF出力を下げてい
く。半導体基板上に蓄積された電荷は、RFの減少と共に
減っていきついには零になり、基板を下部電極から離す
ときに吸着することはなくなる。
また、第２図に示すチャートでは、同様に所望の時間
の経過した後、主反応ガス（TEOS）を切り、O2ガスのみ
を流し圧力を下げ、RFを一旦切った後、再度ごく弱くRF
を印加し、切る。半導体基板に蓄積された電荷は２度目
の印加によってO2のプラズマ状態を導体として電極から
逃げ、吸着は起こらない。
〔発明の効果〕
以上の如く本発明によれば、高周波（RF）を印加した
プラズマCVDにより薄膜を形成するプラズマ薄膜の製造
方法において、前記高周波を印加し所望の時間経過後、
膜成長に必要な主反応ガスを遮断し、膜を成長させない
ガスを流しながら高周波出力を経時的に下げていくこと
により、プラズマCVDによる成膜時に起こる電極と半導
体基板の吸着をなくすことができ半導体基板上に安定し
た薄膜を形成することができる。
【図面の簡単な説明】
第１図乃び第２図は、本発明の一実施例によるプラズマ
薄膜形成時のRF出力、主反応ガス及び酸素の流量を示す
チャートである。 第３図は、プラズマ薄膜の形成装置の概略図である。 第４図は、従来のプラズマ薄膜形成時のRF出力、主反応
ガス及び酸素の流量を示すチャートである。 31……RF発信器 32……上部電極 33……下部電極 34……真空容器 35……半導体基板

Claims (3)

    (57)【特許請求の範囲】
  1. 【請求項１】高周波（RF）を印加したプラズマCVDによ
    り薄膜を形成するプラズマ薄膜の製造方法において、前
    記高周波を印加し所望の時間経過後、膜成長に必要な主
    反応ガスを遮断し、膜を成長させないガスを流しながら
    高周波出力を経時的に下げていくことを特徴とするプラ
    ズマ薄膜の製造方法。
  2. 【請求項２】請求項１記載の高周波出力の変化が100％
    から徐々に小さくなっていくことを特徴とするプラズマ
    薄膜の製造方法。
  3. 【請求項３】請求項１記載の高周波出力の変化が100％
    から一旦零になった後、再度50％以下の値をとり、その
    後零になることを特徴とするプラズマ薄膜の製造方法。
JP17851689A1989-07-111989-07-11プラズマ薄膜の製造方法Expired - LifetimeJP2890494B2 (ja)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
JP17851689AJP2890494B2 (ja)1989-07-111989-07-11プラズマ薄膜の製造方法

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
JP17851689AJP2890494B2 (ja)1989-07-111989-07-11プラズマ薄膜の製造方法

Publications (2)

Publication NumberPublication Date
JPH0344472A JPH0344472A (ja)1991-02-26
JP2890494B2true JP2890494B2 (ja)1999-05-17

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