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IN2012DN06399A - - Google Patents

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Publication number
IN2012DN06399A
IN2012DN06399AIN6399DEN2012AIN2012DN06399AIN 2012DN06399 AIN2012DN06399 AIN 2012DN06399AIN 6399DEN2012 AIN6399DEN2012 AIN 6399DEN2012AIN 2012DN06399 AIN2012DN06399 AIN 2012DN06399A
Authority
IN
India
Prior art keywords
region
floating body
cell
body region
electrical contact
Prior art date
Application number
Inventor
Yuniarto Widjaja
Bach Zvi Or
Original Assignee
Zeno Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/797,334external-prioritypatent/US8130547B2/en
Priority claimed from US12/797,320external-prioritypatent/US8130548B2/en
Priority claimed from US12/897,528external-prioritypatent/US8514622B2/en
Priority claimed from US12/897,516external-prioritypatent/US8547756B2/en
Priority claimed from US12/897,538external-prioritypatent/US8264875B2/en
Application filed by Zeno Semiconductor IncfiledCriticalZeno Semiconductor Inc
Publication of IN2012DN06399ApublicationCriticalpatent/IN2012DN06399A/en

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Abstract

A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in electrical contact with said floating body region; a second region in electrical contact with said floating body region and spaced apart from said first region; and a gate positioned between said first and second regions. The cell may be a multi level cell. Arrays of memory cells are disclosed for making a memory device. Methods of operating memory cells are also provided.
IN6399DEN20122010-02-072011-02-07IN2012DN06399A (en)

Applications Claiming Priority (9)

Application NumberPriority DateFiling DateTitle
US30212910P2010-02-072010-02-07
US30958910P2010-03-022010-03-02
US12/797,334US8130547B2 (en)2007-11-292010-06-09Method of maintaining the state of semiconductor memory having electrically floating body transistor
US12/797,320US8130548B2 (en)2007-11-292010-06-09Semiconductor memory having electrically floating body transistor
US12/897,528US8514622B2 (en)2007-11-292010-10-04Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US12/897,516US8547756B2 (en)2010-10-042010-10-04Semiconductor memory device having an electrically floating body transistor
US12/897,538US8264875B2 (en)2010-10-042010-10-04Semiconductor memory device having an electrically floating body transistor
US201061425820P2010-12-222010-12-22
PCT/US2011/023947WO2011097592A1 (en)2010-02-072011-02-07Semiconductor memory device having electrically floating body transistor, and having both volatile and non-volatile functionality and method

Publications (1)

Publication NumberPublication Date
IN2012DN06399Atrue IN2012DN06399A (en)2015-10-02

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Family Applications (1)

Application NumberTitlePriority DateFiling Date
IN6399DEN2012IN2012DN06399A (en)2010-02-072011-02-07

Country Status (7)

CountryLink
US (13)US9153309B2 (en)
EP (1)EP2532005A4 (en)
CN (1)CN107293322B (en)
IN (1)IN2012DN06399A (en)
SG (2)SG182538A1 (en)
TW (3)TWI613648B (en)
WO (1)WO2011097592A1 (en)

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