Detailed Description
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.
Fig. 1 is a diagram illustrating a Radio Frequency (RF) tracking and communication device 100 according to one embodiment of the present invention. Hereinafter, the RF tracking and communication device 100 is referred to as TAG 100. TAG100 includes a processor 103 defined on a chip 101. TAG100 also includes a radio 105 defined on chip 101. Radio 105 operates on international frequencies and is defined to efficiently manage power consumption. In one embodiment, radio 105 is defined as an Institute of Electrical and Electronics Engineers (IEEE)802.15.4 compliant radio 105. The radio 105 is connected to electrically communicate with the processor 103. It should be appreciated that implementation of an IEEE 802.15.4 compliant radio 105 provides international operation and secure communications, as well as efficient power management.
TAG100 further includes a position determining device (LDD)111, the position determining device (LDD)111 being defined in electrical communication with the processor 103 of chip 101. In one embodiment, the LDD111 is defined as a Global Positioning System (GPS) receiver device. Additionally, the TAG100 includes a power supply 143, which power supply 143 is defined to power the processor 103, the radio 105, the LDD111, and other powered TAG100 components (described below with respect to fig. 2). TAG100 implements a power management system defined to enable long-term TAG100 deployment with minimal maintenance. In one embodiment, the power management system is defined to enable operation of TAG100 using a single 3-volt battery, such as a 3-volt No. 1 battery (D-cell battery), for more than a 3-year deployment period.
In one embodiment, the TAG100 is defined as a self-contained battery-operated device that can be attached to an asset, such as a shipping container, to provide secure tracking and communication associated with the motion and status of the asset. In some embodiments, TAG100 may also be configured to provide/execute security applications associated with the asset. By communicating with local and global communication networks, the TAG100 is able to communicate data associated with its assigned asset while the asset is in transit, on a vehicle (e.g., ship, car, train), and at the end point.
As can be appreciated from the following description, TAG100 provides a fully autonomous position determination and recording of asset location (latitude and longitude) anywhere in the world. The TAG100 electronics provide the ability to store location waypoints, security events, and status in non-volatile memory onboard the TAG 100. TAG100 is also defined to support isolation (segregation) and prioritization of data storage in non-volatile memory. The delivery of business and/or security content associated with the operation of TAG100, including data generated by an external device interfacing with TAG100, may be virtually and/or physically isolated in non-volatile memory.
Further, in one embodiment, the wireless communication system of TAG100 is defined to detect network access in a range of up to 3 kilometers (km) and negotiate network access with a network gateway. The TAG100 processor 103 is defined to perform all functions required to: securely identifying the sequence number of TAG 100; providing encrypted two-way communication between TAG100 and a reader device within a wireless network; and maintaining network connectivity while within range of the network gateway.
Additionally, TAG100 is defined to provide users (both government and business) with expanded capabilities to add additional sensors and/or communication modes of operation. In addition to being fixed on a mobile asset, TAG100 is also defined for use in handheld reader devices as well as network gateway reader devices. TAG100 provides dual functionality of radio and GPS beacons when disposed in a handheld or network gateway reader device. Furthermore, TAG100 is defined to implement a proprietary communication protocol to secure and manage data communication between TAG100 and a network reader device and to control access to TAG 100.
In one embodiment, the various components of TAG100 are disposed on a printed circuit board, wherein the desired electrical connections between the various components are accomplished through conductive traces defined within the printed circuit board. In one exemplary embodiment, the printed circuit board of TAG100 is a low cost rigid four layer 0.062 "FR-4 dielectric fiberglass substrate. However, it should be understood that in other embodiments, other types of printed circuit boards or similarly functioning assemblies may be used as a platform for supporting and interconnecting the various TAG100 components. In one particular embodiment, chip 101 is defined as a model CC2430-64 chip manufactured by Texas instruments (Texas instruments) and LDD111 is implemented as a model GSC3f/LP single chip ASIC manufactured by SiRF.
Fig. 2 is a diagram illustrating a schematic diagram of the TAG100 of fig. 1 according to one embodiment of the invention. In various illustrative embodiments, chip 101, which includes both processor 103 and radio 105, may be implemented, inter alia, as one of the following chips:
model CC2430 chip manufactured by texas instruments,
model CC2431 chip manufactured by texas instruments,
model CC2420 chip manufactured by texas instruments,
model MC13211 chip manufactured by Freescale (Freescale),
model MC13212 chip made by Freescale, or
Model MC13213 chip manufactured by missilcarl.
In each of the chip 101 embodiments identified above, radio 105 is defined as an IEEE 802.15.4 compliant radio operating at a frequency of 2.4GHz (gigahertz). It should be understood that the type of chip 101 may be different in other embodiments, as long as the radio 105 is defined to operate at international frequencies and provide sufficient power management capabilities to meet TAG100 operating and deployment requirements. Additionally, the type of chip 101 may be different in other embodiments, as long as the processor 103 serves as the main processor of the TAG100 and enables communication via the radio 105 implemented onboard the chip 101. Furthermore, chip 101 includes a memory 104, such as a Random Access Memory (RAM), which memory 104 is accessible by processor 103 for reading and writing for storing data associated with TAG100 operation.
TAG100 also includes a power amplifier 107 and a Low Noise Amplifier (LNA)137 to increase the communication range of radio 105. The radio 105 is connected to receive and transmit RF signals (indicated by arrow 171) through a receive/transmit (RX/TX) switch 139. The transmit path of radio 105 extends from radio 105 to switch 139 (indicated by arrow 171), then from switch 139 to power amplifier 107 (indicated by arrow 179), then from power amplifier 107 to another RX/TX switch 141 (indicated by arrow 183), then from RX/TX switch 141 to radio antenna 109 (indicated by arrow 185).
The receive path of radio 105 extends from radio antenna 109 to RX/TX switch 141 (indicated by arrow 185), then from RX/TX switch 141 to LNA 137 (indicated by arrow 181), then from LNA 137 to RX/TX switch 139 (indicated by arrow 177), and then from RX/TX switch 139 to radio 105 (indicated by arrow 171). RX/TX switches 139 and 141 are defined to operate cooperatively so that the transmit and receive paths of radio 105 can be isolated from each other while performing transmit and receive operations, respectively. In other words, RX/TX switches 139 and 141 may operate to route RF signals through power amplifier 107 during transmission and to route RF signals around power amplifier 107 during reception. Thus, the RF power amplifier 107 output may be spaced apart from the RF input of radio 105.
In one embodiment, RX/TX switches 139 and 141 are each defined as a model HMC174MS 8 switch manufactured by Hittite. However, it should be understood that in other embodiments, each of the RX/TX switches 139 and 141 may be defined as another type of RF switch, as long as it is capable of transitioning between transmit and receive channels in accordance with a control signal. Also, in one embodiment, the power amplifier 107 is defined as a model HMC414MS82.4GHZ power amplifier manufactured by Hittite. However, it should be understood that in other embodiments, the power amplifier 107 may be defined as another type of amplifier as long as it is capable of processing RF signals for long distance communication and power may be managed according to a control signal. In one embodiment, the power amplifier 107 and RX/TX switches 139 and 141 may be combined into a single device, such as, for example, a model CC2591 device manufactured by texas instruments.
TAG100 is further provided with RX/TX control circuitry 189, the RX/TX control circuitry 189 being defined to direct the cooperative operation of RX/TX switches 139 and 141 and to direct the power control of power amplifier 107 and LNA 137. RX/TX control circuitry 189 receives RX/TX control signals (indicated by arrow 191) from chip 101. In response to the RX/TX control signals, RX/TX control circuitry 189 transmits corresponding control signals to RX/TX switches 139 and 141 (indicated by arrows 193 and 195, respectively) such that continuity is established along either the transmit path or the receive path as directed by the RX/TX control signals received from chip 101. Also, in response to the RX/TX control signal, RX/TX control circuitry 189 transmits a power control signal to power amplifier 107 (indicated by arrow 201). The power control signal directs the power amplifier 107 to power up when the RF transmit path is to be used and to power down when the RF transmit path is to be idle.
In one embodiment, the LDD111 includes a processor 113 and a memory 115, such as a RAM, wherein the memory 115 is accessible by the processor 113 for reading and writing for storing data associated with the operation of the LDD 111. In one embodiment, the LDD111 and chip 101 are docked together (indicated by arrow 161) so that the processor 103 of chip 101 may communicate with the processor 113 of LDD111 to enable programming of LDD 111. In various embodiments, the interface between the LDD111 and the chip 101 may be implemented using a serial port, such as a Universal Serial Bus (USB), conductive traces on a TAG100 printed circuit board, or substantially any other type of interface suitable for conveying digital signals.
Also in one embodiment, the pins of the LDD111 are defined to act as external interrupt pins to enable the LDD111 to wake up from a low power mode of operation, i.e. sleep mode. For example, the chip 101 may be connected to an external interrupt pin of the LDD111 to enable a wake-up signal to be passed from the chip 101 to the LDD111 (indicated by arrow 165). The LDD111 is further connected to the chip 101 to enable data to be transferred from the LDD111 to the chip 101 (indicated by arrow 163).
The LDD111 is also defined to receive RF signals (indicated by arrow 157). The RF signal received by LDD111 is transmitted from LDD antenna 121 to Low Noise Amplifier (LNA)117 (indicated by arrow 159). The RF signal is then transmitted from the LNA 117 to the signal filter 119 (indicated by arrow 155). The RF signal is then transmitted from the signal filter 119 to the LDD111 (indicated by arrow 157).
Additionally in one embodiment, the LDD111 is defined as a single chip ASIC that includes an on-board flash memory 115 and an ARM processor core 113. For example, in various embodiments, the LDD111 may be implemented as one of the following types of GPS receivers, among others:
model GSC3f/LP GPS receiver manufactured by SiRF,
model GSC2f/LP GPS receiver manufactured by SiRF,
model GSC3e/LP GPS receiver manufactured by SiRF,
model NX 3GPS receiver made by Nemerix, or
Model NJ030A GPS receiver manufactured by Nemerix.
An LNA 117 and a signal filter 119 are provided to amplify and purify the RF signal received from the LDD antenna 121. In one embodiment, LNA 117 may be implemented as an L-band device, such as an 18dBi low noise amplifier. For example, in this embodiment, the LNA 117 may be implemented as a model UPC8211TK amplifier manufactured by NEC. In another embodiment, LNA 117 may be implemented as a model BGA615L7 amplifier manufactured by England (Infineon). Also, the LNA 117 is defined to have a control input (indicated by arrow 153) for receiving control signals from the LDD 111. Accordingly, the LNA is defined to understand the control signal received from the LDD111 and to operate in accordance with the control signal. In embodiments where the LDD111 is implemented as a model GSC3f/LP GPS receiver manufactured by SiRF, the GPIO4 pin on the GSC3f/LP chip may be used to control LNA 117 power, thereby enabling the LNA 117 to be powered down and up according to a control algorithm.
In one embodiment, the signal filter 119 is defined as an L-band device, such as a Surface Acoustic Wave (SAW) filter. For example, in one embodiment, the signal filter 119 is implemented as a model B39162B3520U410 SAW filter manufactured by EPCOS. As stated previously, the output of the signal filter 119 is connected to the RF input of the LDD111 (indicated by arrow 157). In one embodiment, a 50 ohm microstrip trace on the printed circuit board of the TAG100 is used to connect the output of the signal filter 119 to the RF input of the LDD 111. Also in one embodiment, the signal filter 119 is tuned to deliver a 1575MHz RF signal to the RF input of the LDD 111.
TAG100 also includes a data interface 123, which data interface 123 is defined to enable various external devices to be connected to the LDD111 and chip 101 of TAG 100. For example, in one embodiment, chip 101 includes a plurality of configurable general purpose interfaces that are electrically connected to respective pins of data interface 123. Thus, in this embodiment, external devices, such as sensors for commercial and/or security applications, may be electrically connected to communicate with chip 101 through data interface 123 (indicated by arrow 169). The LDD111 is also connected to a data interface 123 to enable communication (indicated by arrow 167) between external entities and the LDD 111. For example, an external entity may be connected to the LDD111 through the data structure 123 to program the LDD 111. It should be understood that data interface 123 may be defined differently in various embodiments. For example, in one embodiment, the data interface 123 is defined as a serial interface that includes a plurality of pins to which external devices may be connected. In other examples, the data interface may be defined as a USB interface, among others.
TAG100 further comprises an expansion memory 135, said expansion memory 135 being connected to the processor 103 of the chip 101 (indicated by arrow 175). Expansion memory 135 is defined as a non-volatile memory as follows: which may be accessed by the processor 103 for data storage and retrieval. In one embodiment, expansion memory 135 is defined as a solid-state non-volatile memory, such as flash memory. Expansion storage 135 may be defined to provide segmented non-volatile storage and may be controlled by software executing on processor 103. In one embodiment, separate memory blocks within expansion memory 135 may be allocated for exclusive use by security applications or business applications. In one embodiment, expansion memory 135 is a model M25P10-A flash memory manufactured by Standard semiconductors (STMicroelectronics). In another embodiment, expansion memory 135 is a model M25PE20 flash memory manufactured by Numonyx. It should be appreciated that in other embodiments, many other different types of expansion memory 135 may be used, so long as expansion memory 135 is capable of operably interfacing with processor 103.
TAG100 further comprises a motion sensor 133, said motion sensor 133 being in communication (indicated by arrow 173) with the chip 101, i.e. with the processor 103. Motion sensor 133 is defined to detect physical motion of TAG100 and thus the asset to which TAG100 is attached. The processor 103 is defined to receive motion detection signals from the motion sensor 133 and to determine a suitable mode of operation of the TAG100 based on the received motion detection signals. Many different types of motion sensors 133 may be used in various embodiments. For example, in some embodiments, the motion sensor 133 may be defined, inter alia, as being of the type: accelerometer, gyroscope, mercury switch, micro-pendulum. Also, in one embodiment, TAG100 may be equipped with a plurality of motion sensors 133 in electrical communication with chip 101. The use of multiple motion sensors 133 may be implemented to provide redundancy (redundancy) and/or diversity in sensing techniques/stimuli. For example, in one embodiment, motion sensor 133 is a model ADXL 330 motion sensor manufactured by Analog Devices. In another exemplary embodiment, the motion sensor 133 is a model ADXL 311 accelerometer manufactured by Analog Devices. In yet another embodiment, the motion sensor 133 is a model ADXRS50 gyroscope manufactured by analog devices.
TAG100 also includes a voltage regulator 187 connected to power supply 143. The voltage regulator 187 is defined to provide a minimum power droop (dropout) when the power source 143 is implemented as a battery. Voltage regulator 187 is further defined to provide optimized voltage control and regulation to the powered components of TAG 100. In one embodiment, a capacitive filter is connected at the output of the voltage regulator 187 to work with a tuned bypass circuit between the power plane (power plane) of the TAG100 and ground potential to minimize noise and RF coupling with the LNAs 117 of the LDDs 111 and 137 of the radio 105, respectively.
Also, in one embodiment, the radio 105 and LDD111 are connected to receive a common reset and brown-out protection signal from the voltage regulator 187 to synchronize TAG100 activation and prevent operation of a corrupted memory (115/104) during a slow-up power-up or during a brown-out of the power supply 143 (e.g., battery). In one exemplary embodiment, voltage regulator 187 is a model TPS77930 voltage regulator manufactured by texas instruments. In another embodiment, voltage regulator 187 is a model TPS77901 voltage regulator manufactured by texas instruments. It should be understood that in other embodiments, different types of voltage regulators 187 may be used, as long as the voltage regulators are defined to provide optimized voltage control and regulation to the powered components of the TAG 100.
To enable long-term TAG100 deployment with minimal maintenance, processor 103 of chip 101 operates to execute the power management program of TAG 100. The power management program controls the power to the various components within the TAG100, primarily the LDD111 and the radio 105. TAG100 has four main power states:
1) the LDD111 is powered down and the radio 105 is powered down,
2) the LDD111 is powered off and the radio 105 is powered on,
3) the LDD111 is powered on and the radio 105 is powered off, an
4) The LDD111 is powered on and the radio 105 is powered on.
The power management procedure is defined such that the normal operating state of TAG100 is a sleep mode in which both the LDD111 and the radio 105 are powered down. The power management program is defined to power up the LDD111 and/or radio 105 in response to events such as the conditions mentioned, external stimuli, and preprogrammed settings. For example, a motion event or motion time record detected by the motion sensor 133 and communicated to the processor 103 may be used as an event to power up one or both of the LDD111 and radio 105 from sleep mode. In another example, a pre-programmed schedule may be used to trigger power-up of one or both of the LDD111 and the radio 105 from a sleep mode. Additionally, receipt of other events, such as a communication request, external sensor data, geographic location, or a combination thereof, may be used as a trigger to power up one or both of the LDD111 and the radio 105 from sleep mode.
The power manager is also defined to power down the TAG100 components as soon as possible after the requested or desired operation is completed. Depending on the operation performed, the power management program may direct either of the LDD111 and the radio 105 to power down while the other continues to operate. Alternatively, the operating conditions may allow the power management program to power down both the LDD111 and the radio 105 at the same time. As previously mentioned, in one embodiment, the power management program is defined to enable operation of TAG100 for more than three years on a single 3-volt battery (e.g., 3-volt battery No. 1).
To support the power management procedure, TAG100 uses 4 separate crystal oscillators. Specifically, referring to fig. 2, chip 101 uses a 32MHz (megahertz) oscillator 125 to provide a basic operational clock (indicated by arrow 149) to chip 101. The chip 101 also uses a 32kHz oscillator 127 to provide a real time clock for waking up the chip 101 from a sleep mode of operation (indicated by arrow 151). The LDD111 uses a 24MHz oscillator 129 to provide the LDD111 with a basic operating clock (indicated by arrow 147). Also, the LDD111 uses the 32kHz oscillator 131 to provide a real-time clock for waking up the chip 101 from the sleep mode of operation (indicated by arrow 145). It should be understood, however, that other oscillator arrangements may be used in other embodiments to provide the necessary timing to the chip 101 and LDD 111. For example, crystal oscillators of different frequencies may be used depending on the operational requirements of the LDD111 and chip 101.
Fig. 3 is a diagram illustrating a flow chart of a method for operating a radio frequency tracking and communication device, i.e., TAG100, in accordance with one embodiment of the present invention. The method of fig. 3 shows an example of how the power management procedure may be implemented within TAG 100. The method includes an operation 301 for maintaining a minimum power consumption state of TAG100 until a wake-up signal is issued by processor 103. As mentioned above, the minimum power consumption state of the TAG100 exists when both the LDD111 and the radio 105 are powered down.
The method also includes an operation 303 for operating the motion sensor 133 during a minimum power consumption state. The method further includes an operation 305 for identifying detection of a threshold level of motion by the motion sensor 133. It should be appreciated that, since the motion sensor 133 is disposed onboard the TAG100, the threshold level of motion detected by the motion sensor 133 corresponds to motion of the TAG100 and the asset to which the TAG100 is attached.
In one embodiment, the threshold level of motion is defined as a single motion detection signal having at least a specified magnitude. In this embodiment, the processor 103 is defined to receive the motion detection signal from the motion sensor 133 and determine whether the received motion detection signal exceeds a specified size stored in the memory 104. In another embodiment, the threshold level of motion is defined as the motion detection signal integration having reached at least a prescribed magnitude. In this embodiment, the motion detection signal is received and stored by the processor 103 for a certain period of time. The processor 103 determines whether the integral, i.e. the sum, of the received motion detection signals over the time period has reached or exceeded the specified size stored in the memory 104. Additionally, the two above-disclosed embodiments regarding motion threshold levels may be implemented in combination.
In response to identifying that the threshold level of motion has been reached or exceeded, the method includes an operation 307 for issuing a wake-up signal to transition from the minimum power consumption state of the TAG100 to a normal operating power consumption state. The wake-up signal is generated by the processor 103 after the processor 103 recognizes that a threshold level of motion has been reached or exceeded. The processor 103 may operate to transmit a wake-up signal to one or both of the LDD111 and the radio 105 according to a sequence of operations to be performed after a threshold level of motion is reached. The method further includes an operation 309 in which operation 309 the TAG100 transitions from the normal operation power consumption state back to the minimum power consumption state after the TAG100 completes the specified operation or the specified idle period.
Referring back to operation 301, the method may continue to operation 311, in which operation 311 an RF communication signal is received during a minimum power consumption state. In response to receiving the RF communication signal, the method continues with operation 307, which is for issuing a wake-up signal to transition the TAG100 from the minimum power consumption state to the normal operating power consumption state. Again, the wake-up signal is generated by the processor 103 and may direct the radio 105, the LDD111, or both to power up depending on the content of the received RF communication signal.
And referring back to operation 301, the method may continue with operation 313, which is for monitoring the real time clock relative to the wakeup schedule. In one embodiment, monitoring of the real time clock relative to the wakeup schedule is performed by the processor 103 when the TAG100 is in a minimum power state. After the specified wake-up time in the wake-up schedule is reached, the method continues with operation 307 to issue a wake-up signal to transition the TAG100 from the minimum power consumption state to the normal operating power consumption state.
Referring back to operation 301, the method may continue with operation 315 for receiving signals over the data interface 123 during a minimum power consumption state. In one embodiment, the signal received through the data interface 123 may be a data signal generated by an external device connected to the data interface 123. For example, the sensor may be connected to the data interface 123 and may transmit data signals as follows: which indicates a monitoring alarm or condition that triggers the processor 103 to generate a wake-up signal for powering up one or both of the LDD111 and the radio 105. For example, the data signal may be a push button signal, an intrusion alert signal, a chemical/biological agent monitoring signal, a temperature signal, a humidity signal, or substantially any other type of signal that may be generated by a sensing device.
Additionally, a user may connect a computing device, such as a handheld computing device or laptop, to the data interface 123 to communicate with the LDD111 or the processor 103. In one embodiment, connection of the computing device to the data interface 123 will cause the processor 103 to generate a wake-up signal to power up one or both of the LDD111 and the radio 105. In response to receiving the signal over the data interface 123 in operation 315, the method continues with operation 307, which operation 307 is for issuing a wake-up signal to transition the TAG100 from the minimum power consumption state to the normal operating power consumption state. Again, in operation 307, a wake-up signal is generated by the processor 103 and the radio 105, LDD111, or both may be directed to power up depending on the type of signal received over the data interface 123.
Inductive loops are integrated into TAG100 to provide RF impedance matching between the various RF sections of TAG 100. In one embodiment, the inductive loop is tuned to provide a 0.5nH (nanohertz) reactive load through the wavelength trace. In one embodiment, the impedance match between the RF output from radio 105 and the RF output from RX/TX switch 139 is 50 ohms. Also, the RF power amplifier 107 is capacitively coupled with the RX/TX switch 141. Additionally, in one embodiment, to provide decoupling of the power supply 143 from the radio 105, 8 high frequency ceramic capacitors are connected between the power pins of the chip 101 and the ground potential of the TAG 100.
In one embodiment, the power plane of the chip 101 is defined as a shunt independent internal power plane that is dc coupled to the LDD111 power plane through RF chokes and capacitive filters. In this embodiment, noise from the phase locked loop circuit within the radio 105 is not coupled to the power plane of the LDD111 through the internal power plane of the chip 101. In this way, radio harmonics associated with the operation of radio 105 are prevented from significantly coupling with LDD111 during the simultaneous operation of both radio 105 and LDD111, thereby preserving LDD111 sensitivity.
An impedance matching circuit is also provided to ensure that the RF signal can be received by the LDD111 without significant signal loss. More specifically, the RF input to the LDD111 uses an impedance matching circuit tuned for the dielectric properties of the circuit board of the TAG 100. In one embodiment, the connection from the LDD antenna 121 to the LNA 117 is dc isolated from the RF input at the LNA 117 using a 100pf (pico farad) capacitor and impedance matched to 50 ohms. Also, in one embodiment, the output of the LNA 117 is impedance matched to 50 ohms.
While the invention has been described in terms of several embodiments, it will be appreciated that those skilled in the art upon reading the preceding specifications and studying the drawings will realize various alterations, additions, permutations and equivalents thereof. Accordingly, it is intended that the present invention includes all such alterations, additions, permutations, and equivalents as fall within the true spirit and scope of the invention.