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GB2442995B - Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress - Google Patents

Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress

Info

Publication number
GB2442995B
GB2442995BGB0624048AGB0624048AGB2442995BGB 2442995 BGB2442995 BGB 2442995BGB 0624048 AGB0624048 AGB 0624048AGB 0624048 AGB0624048 AGB 0624048AGB 2442995 BGB2442995 BGB 2442995B
Authority
GB
United Kingdom
Prior art keywords
stress
technique
forming
stop layer
etch stop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB0624048A
Other versions
GB0624048D0 (en
GB2442995A (en
Inventor
Kai Frohberg
Matthias Schaller
Massud Aminpur
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE102004026149Aexternal-prioritypatent/DE102004026149B4/en
Application filed by Advanced Micro Devices IncfiledCriticalAdvanced Micro Devices Inc
Publication of GB0624048D0publicationCriticalpatent/GB0624048D0/en
Publication of GB2442995ApublicationCriticalpatent/GB2442995A/en
Application grantedgrantedCritical
Publication of GB2442995BpublicationCriticalpatent/GB2442995B/en
Anticipated expirationlegal-statusCritical
Expired - Lifetimelegal-statusCriticalCurrent

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GB0624048A2004-05-282005-03-29Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stressExpired - LifetimeGB2442995B (en)

Applications Claiming Priority (3)

Application NumberPriority DateFiling DateTitle
DE102004026149ADE102004026149B4 (en)2004-05-282004-05-28 A method of producing a semiconductor device having transistor elements with voltage-inducing etch stop layers
US11/058,035US7517816B2 (en)2004-05-282005-02-15Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress
PCT/US2005/010516WO2005119760A1 (en)2004-05-282005-03-29Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress

Publications (3)

Publication NumberPublication Date
GB0624048D0 GB0624048D0 (en)2007-01-10
GB2442995A GB2442995A (en)2008-04-23
GB2442995Btrue GB2442995B (en)2010-06-30

Family

ID=34964271

Family Applications (1)

Application NumberTitlePriority DateFiling Date
GB0624048AExpired - LifetimeGB2442995B (en)2004-05-282005-03-29Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress

Country Status (2)

CountryLink
GB (1)GB2442995B (en)
WO (1)WO2005119760A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US7776695B2 (en)*2006-01-092010-08-17International Business Machines CorporationSemiconductor device structure having low and high performance devices of same conductive type on same substrate
US7566605B2 (en)*2006-03-312009-07-28Intel CorporationEpitaxial silicon germanium for reduced contact resistance in field-effect transistors
US7868390B2 (en)2007-02-132011-01-11United Microelectronics Corp.Method for fabricating strained-silicon CMOS transistor
CN111211091B (en)*2018-11-212025-04-04长鑫存储技术有限公司 Semiconductor device and method for manufacturing the same

Citations (7)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20030040158A1 (en)*2001-08-212003-02-27Nec CorporationSemiconductor device and method of fabricating the same
US6573172B1 (en)*2002-09-162003-06-03Advanced Micro Devices, Inc.Methods for improving carrier mobility of PMOS and NMOS devices
US20030181005A1 (en)*2002-03-192003-09-25Kiyota HachimineSemiconductor device and a method of manufacturing the same
US20040029323A1 (en)*2000-11-222004-02-12Akihiro ShimizuSemiconductor device and method for fabricating the same
US20040075148A1 (en)*2000-12-082004-04-22Yukihiro KumagaiSemiconductor device
US20040104405A1 (en)*2002-12-022004-06-03Taiwan Semiconductor Manufacturing CompanyNovel CMOS device
WO2004049406A1 (en)*2002-11-252004-06-10International Business Machines CorporationStrained finfet cmos device structures

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US20040029323A1 (en)*2000-11-222004-02-12Akihiro ShimizuSemiconductor device and method for fabricating the same
US20040075148A1 (en)*2000-12-082004-04-22Yukihiro KumagaiSemiconductor device
US20030040158A1 (en)*2001-08-212003-02-27Nec CorporationSemiconductor device and method of fabricating the same
US20030181005A1 (en)*2002-03-192003-09-25Kiyota HachimineSemiconductor device and a method of manufacturing the same
US6573172B1 (en)*2002-09-162003-06-03Advanced Micro Devices, Inc.Methods for improving carrier mobility of PMOS and NMOS devices
WO2004049406A1 (en)*2002-11-252004-06-10International Business Machines CorporationStrained finfet cmos device structures
US20040104405A1 (en)*2002-12-022004-06-03Taiwan Semiconductor Manufacturing CompanyNovel CMOS device

Also Published As

Publication numberPublication date
WO2005119760A1 (en)2005-12-15
GB0624048D0 (en)2007-01-10
GB2442995A (en)2008-04-23

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PE20Patent expired after termination of 20 years

Expiry date:20250328


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