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GB2095908A - Series connected solar cells on a single substrate - Google Patents

Series connected solar cells on a single substrate
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Publication number
GB2095908A
GB2095908AGB8208562AGB8208562AGB2095908AGB 2095908 AGB2095908 AGB 2095908AGB 8208562 AGB8208562 AGB 8208562AGB 8208562 AGB8208562 AGB 8208562AGB 2095908 AGB2095908 AGB 2095908A
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series
conductive
semiconductor layer
solar cell
forming
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GB8208562A
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GB2095908B (en
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RCA Corp
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RCA Corp
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Abstract

Solar cells (12) in an array (10) are interconnected (26) by heating metal stripes (22), e.g. Cu, Al or Au, to cause them to spike through (26) the semiconductor layer (20), between the upper electrode (24) of one cell and the lower electrode (16) of the next adjacent cell. The stripes may be fabricated using a thick striped pattern material as a lift off mask, so that conductive material applied to the mask during deposition of the stripes, is removed with the mask ("paint and peel" method). Electrodes (24) may be isolated by laser scribing or by deposition using a "paint and peel" method, however it is not necessary for semiconductor layer (20) to be discontinuous between cells because of the low lateral conductivity of this layer. Semiconductor layer (20) may comprise a PIN structure, or I and N type regions and a Schottky barrier. <IMAGE>

Description

SPECIFICATIONSeries connected solar cells on a single substrateThe present invention relates to solar cells. It has particular application to series connected amorphous silicon solar cells which are formed on a single substrate.
In order to convert solar energy into electrical energy, solar cells are used. Such cells may be formed of various semiconductor materials, such as amorphous silicon. In order for solar cells to become available for general use, it is necessary that the formation of such solar cells into arrays comprising a plurality of cells, be made possible at a relatively low cost to the consuming public. As a typical amorphous silicon solar cell produces approximately one volt of electricity when exposed to the sun, such cells will have to be connected in series in order to build up their voltages in order that their outputs may be used either directly or transferred into storage devices, such as batteries, for indirect use.
The process of connecting solar cells in series can be a labor intensive one. Accordingly, such a process would ordinarily be very expensive to perform.
The present invention provides an automatic method of producing series connected solar cells, such as amophous silicon solar cells. The cells are produced as series connected arrays as a consequence of the manufacturing method. Such arrays may be produced to have a desired output voltage without requiring labor intensive operations.
In accordance with the present invention, a solar cell array comprises a plurality of adjacent, series connected solar cells on a single insulating substrate wherein adjacent cells are connected together by spiking a metal interelectrode connection from the electrode on top of one cell through the amorphous silicon layer to the electrode on the bottom of the next adjacent cell.
In the accompanying drawings:Figure 1 illustrates a first embodiment of a solar cell of the type manufactured in accordance with the present invention;Figures 2-4 illustrate the method of manufacturing the solar cell of Figure 1;Figure 5 illustrates a second embodiment of the solar cell of the present invention; andFigures 6 - 7 illustrate the method of manufacturing the solar cell of Figure 5.
Referring now to Figure 1, a solar array 10 comprised of a plurality of solar cells 12 is shown.
The solar cells 12 are formed on a substrate 14 which is comprised of glass, or other similar transparent material, in the present embodiment of the invention. A series of metal electrodes 16, comprised of molybdenum in the preferred embodiment of the invention, although any other suitable metal could be used, is on a surface 18 of the glass substrate 14.
Semiconductor silicon portions 20 of the cells 12 overlie the molybdenum electrodes 16 on the glass substrate 14. In the preferred embodiment of the invention, the semiconductor portions 20 are comprised of amorphous silicon. A series of metal electrodes 22, which are comprised of a metal such as aluminum, copper, or gold, overlie both the top surface of the amorphous silicon 20 of one cell 12 and at least part of the electrode 16 of the next adjcent cell. Overlying the electrodes 22 is a transparent, conductive material, such as indium-tin-oxide (ITO) 24, for reasons which will be explaind hereinafter.
There are also interelectrode connections 26 between the electrodes 22 on the top surface of the amorphous silicon layers 20 and the electrodes 16 on the glass substrate 14. The method of forming the connections 26 will be described hereinafter.
As can be seen, there is an electrical series connection which exists between the ITO electrode 24, the top metal electrode 22, the interelectrode connection 26, and the molybdenum electrode 16.
Thus, each ITO electrode 24, at the top of a cell 12, makes electrical contact to the bottom electrode 16 of the adjacent cell 12 to the right of the cell 12 over which the ITO electrode 24 lies. It should be noted, hoever, that the amorphous silicon portions 20 must have a low conductivity, such that the connection made by the semiconductor layer 20 between electrodes 16 can be ignored.
The amorphous silicon portions 20 of each cell 12 are connected in series such that the top of each amorphous silicon layer 20 makes electrical contact to the bottom of the adjacent amorphous silicon layer20to its right as viewed in Figure 1.
The number of series connected cells 12 in a particular array is determined by the voltage requirements for a particular application.
Referring now to Figures 2-4, the methods for manufacturing the series connected cells 12 ofFigure 1 will be explained. With reference to Figure 2, one starts with a substrate 14, such as a glass substrate, upon which a conductive layer 16, which is comprised of molybdenum in the preferred embodiment of the invention, is applied. The conductive layer 16 may be applied by any desired technique, such as by evaporation. Following the deposition of the conductive layer 16 on the substrate 14, the conductive layer 16 is scribed in order to make it discontinuous as shown in Figure 3. The scribing of the conductive layer 16 can be accomplished by any means, such as by laser scribing, in which case the scribe lines 28 may extend into the glass substrate 14 as shown.Following the scribing of the conductive layer 16, an amorphous silicon layer 20 is deposited on the surface of the scribed metal layer 16.
As is well known in the art, the amorphous silicon layer 20 will typically comprise a three-part structure having P, I, and N type semiconductor material.
However, in the present invention the amorphous silicon layer 20 may have only I and N type semiconductor material and a Schottky barrier. In view of the fact that either the P type material of theN type material can be on the surface of the amorphous silicon layer 20 which is exposed to incident radiation, for the purpose of describing the present invention, the amorphous silicon layer 20 will simply be referred to as a layer. However, those of ordinary skill in the art will recognize that the manner of manufacturing the structures known in the art is well known: see for example U.S. Patent No.4,064,521 entitled SEMICONDUCTOR DEVICEHAVING A BODY OF AMORPHOUS SILICON which issued on December 1977 to D. E. Carlson; U.S.
Patent No.4,142,195 entitled SCHOTTKY BARRIERSEMICONDUCTOR DEVICE AND METHOD OF MAKING SAME which issued on February 27, 1979two D.
E. Carlson metal; U.S. Patent No. 4,162,505 entitledINVERTED AMORPHOUS SILICON SOLAR CELL UTILIZING CERMET LAYERS which issued on July 24, 1979 to J. J. Hanak; and U.S. Patent No.4,163,677 entitled SCHOTTKY BARRIER AMORPHOUS SILICON SOLAR CELL WITH THIN DOPED REGIONADJACENT METAL SCHOTTKY BARRIER which issued on August 7, 1979 to D. E. Carlson et al. Each of the foregoing U. S. patents are incorpoated herein by reference for the purpose of explaining the manner in which the amorphous silicon layer 20 can be manufactured and for the purpose of describing the composition of the amorphous silicon layer 20.
With continued reference to Figure 3, conductive metal stripes 22 are applied over the surface of the amorphous silicon layer 20 by any convenient technique. Thus, the metal stripes 22 may be evaporated onto the surface of the amorphous silicon layer 20 through a mask. Alternatively, the stripes 22 can be formed using a photolithographic method of the type commonly known in the art or by a "paint and peel" method of the type to be more fully described hereinafter. The metal stripes 22 are comprised of a metal, such as aluminum, copper, or gold, which can be spiked through the amorphous silicon layer 20 in the manner which will be described more fully hereinafter.
Following the application of the metal stripes 22, a conductive layer 24 is applied over the surface of the device. The conductive layer 24 must be comprised of a material selected so that it is transparent to incident radiation if the upper surface of the amorphous silicon layer 20 is to receive light. Accordingly, a material such as indium-tin-oxide (ITO) is typically used for the layer 24. Following the application of the conductive layer 24 the structure is again subjected to a scribing process, such as a laser scribing, in order to cut through the conductive layer 24thereby making it discontinuous, as shown in Figure 4.In view of the fact that ITO layers of the type used in the manufacture of amorphous silicon solar cells are typically on the order of a few hundred Angstroms thick, a laser scribe of the ITO layer 24 will typically cut through the amorphous silicon layer 20, as shown. However, as will be seen hereinafter, it is not necessary for the laser scribe to cut entirely, or even partially, through the amorphous silicon layer 20 as long as it serves to cut entirely through the ITO layer 24 so that the ITO layer 24 is electrically discontinuous.
Next, the device is subjected to an annealing process in which it is heated for a time and to a temperature sufficient to cause the metal stripes 22 to generate spikes 26 through the amorphous silicon layer 20 to electrically connect the ITO layer 24 to the underlying metal electrodes 16, as shown in Figure 1. The time and temperaure of the annealing will be determined by the particular material used for the metal stripes 22, and the thickness of the amorphous silicon layer 20. By way of example, if copper is used, an anneal at 2600C for thirty minutes can be used. A longer anneal at a lower temperature or a shorter one at a higher temperature would, of course have the same results. Following the annealing procedure, the device 10, as shown in Figure 1, will be completed, and there will be a series connection between the amorphous silicon solar cells 12.
Referring now to Figure 5, a second embodiment 30 of the present invention is shown. In this embodiment 30, a series of amorphous silicon solar cells 32 are connected in series similar to the manner heretofore described with reference to the first embodiment 10. The series connected amorphous silicon solar cells 32 are formed on an insulting substrate 34, which may be comprised of a transparent material, such as glass. On a surface 36 of the substrate 34 are a series of conductive electrodes 38 which may be comprised of either a metal or ITO, depending upon whether incident light is to reach the solar cells 32 from above the surface 36 or whether it is to travel through the substrate 34, either of which is comtemplated by the present invention.
Each of the solar cells 32 further comprises an amorphous silicon layer 40 which overlies the conductive electrodes 38. In addition, there are upper electrodes 42, which may be either metal orITO for the reasons heretofore described. The upper electrodes 42 are electrically connected to the lower elcrodes 38 of the next adjoining cell 32 through the use of metal stripes 44 and interelectrode contacts 46 in much the same manner as was heretofore described with reference to the first embodiment 10 of the invention.
In order to manufacture the second embodiment 30 of the invention, one starts with a substrate 34, as shown in Figure 6. On a surface 36 of the substrate 34 a series of stripes 48, such as photoresist or paint strips, is applied. The paint stripes 48 used in the preferred embodiment of the invention are sprayed onto the surface 36 of the substrate 34 through a striped mask. Such paint stripes are relatively thick when compared to the materials typically used in amorphous silicon solar cells. Next, the material which will comprise the lower electrodes 38 is applied to the surface 36 of the substrate 34 and to the exposed surface of the stripes 48. In the case ofITO, the material is simply sprayed onto the surface of the stripes 48 and the surface 36 of the substrate 34. In the case of a metal, the material can be sputtered or evaporated onto the surfaces. In view of the thickness of the stripes 48, the material 38 will not form a continuous layer due to the high step topology of the stripes 48. Accordingly, after the application of the material 38 the paint stripes 48 may be peeled from the surface 36 of the substrate 34. Thus, while a photolithographic process could have been used in order to accomplish the same result, and while such a photolithographic process is contemplated within the inventive concept, by using the "paint and peel" method just described, considerable time and labor, as well as expense, may be saved in the manufacture of the solar cell array 30.
Referring now to Figure 7, after the stripes 48 have been removed, an amorphous silicon layer 40 is applied over the surface of the structure in any suitable manner depending upon the particular structure desired. The manner of applying the amorphous silicon layer 40, and its composition, is more fully described in the U.S. patents which have heretofore been incorporated herein by reference.
Next, metal stripes 44 are applied to the surface of the amorphous silicon layer 40 in any suitable manner, such as by evaporating through a striped mask. Then, the interelectrode connections 46 are formed by heating the structure in the manner heretofore described in order to cause the metal stripes 44 to spike through to the underlying electrodes 38.
Thereafter, the upper electrodes 42 are formed.
The upper electrodes 42 may be formed by using a "paint and peel" method which entails first applying a series of paint stripes 49 in the manner heretofore described, and then applying the material which will comprise the upper electrodes 42 in the manner heretofore described. The material which comprises the upper electrodes 42 will be either a metal or 1TO, and due to the abrupt topology of the paint stripes 49 it will be discontinuous for the reasons already discussed.
Following the application of the material which will comprise the upper elctrodes 42, the paint stripes 49 along with the material 42 on their upper surface are removed through a peeling process whereby the structure of the array 30 shown inFigure 5 will remain.
In accordance with the present embodiment of the invention, it is not necessary to do any scribing in the manufacture of the array 30, because a property of amorphous silicon is that it has virtually no lateral conduction. Therefore, an interesting aspect of a solar cell array 30 of the type described with reference to Figure 5, is that it is not necessary to make the amorphous silicon layer 40 electrically discontinuous. Thus, while the laser scribing described with reference to the first embodiment 10, and shown in Figures 1 and 4 did cut through the amorphous silicon-layer 20, such cutting is not required in order to form a solar cell array.
While the present invention has been described with reference to amorphous silicon solar cells, as will be obvious to those skilled in the art, the invention may be employed with other types of solar cells, including, but not limited to, single crystal, polycrystalline silicon, or microcrystalline silicon cells, or cadmium sulfide solar cells without departing from the spirit or scope of the invention.
Accordingly, wherever the term "amorphous silicon layer" is used herein, it is to be understood that the layer may be of any type of semiconductor solar cell material which permits interconnection by spiking and which has a low lateral conductivity for the reasons discussed herein.

Claims (14)

GB8208562A1981-03-311982-03-24Series connected solar cells on a single substrateExpiredGB2095908B (en)

Applications Claiming Priority (1)

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US24972981A1981-03-311981-03-31

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GB2095908Atrue GB2095908A (en)1982-10-06
GB2095908B GB2095908B (en)1985-10-02

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GB8208562AExpiredGB2095908B (en)1981-03-311982-03-24Series connected solar cells on a single substrate

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JP (1)JPS57176778A (en)
DE (1)DE3210742A1 (en)
FR (1)FR2503457B1 (en)
GB (1)GB2095908B (en)

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GB2133213A (en)*1982-11-241984-07-18Semiconductor Energy LabPhotoelectric conversion device and method of manufacturing the same
GB2133617A (en)*1982-11-241984-07-25Semiconductor Energy LabPhotoelectric conversion device and method of manufacture
US4517403A (en)*1983-05-161985-05-14Atlantic Richfield CompanySeries connected solar cells and method of formation
FR2594597A1 (en)*1986-02-171987-08-21Messerschmitt Boelkow Blohm METHOD FOR MANUFACTURING AN INTEGRATED MODULE OF THIN-FILM-TYPE SINGLE-USE SOLAR CELLS
US4724011A (en)*1983-05-161988-02-09Atlantic Richfield CompanySolar cell interconnection by discrete conductive regions
US5288456A (en)*1993-02-231994-02-22International Business Machines CorporationCompound with room temperature electrical resistivity comparable to that of elemental copper
EP2450964A4 (en)*2009-06-302013-11-06Lg Innotek Co Ltd APPARATUS FOR GENERATING PHOTOVOLTAIC ENERGY, AND METHOD OF MANUFACTURING THE SAME
EP2426732A4 (en)*2009-10-012014-08-13Lg Innotek Co Ltd PHOTOVOLTAIC DEVICE AND METHOD OF MANUFACTURING THE SAME

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JPS607778A (en)*1983-06-271985-01-16Semiconductor Energy Lab Co Ltd Photoelectric conversion semiconductor device
JPS59201471A (en)*1983-04-291984-11-15Semiconductor Energy Lab Co LtdPhotoelectric conversion semiconductor device
JPS5996779A (en)*1982-11-241984-06-04Semiconductor Energy Lab Co Ltd Photoelectric conversion device
JPS59107579A (en)*1982-12-111984-06-21Semiconductor Energy Lab Co Ltd Method for manufacturing photoelectric conversion device
JPS59108374A (en)*1982-12-141984-06-22Semiconductor Energy Lab Co Ltd Method for manufacturing photoelectric conversion device
JPS59172274A (en)*1983-03-181984-09-28Sanyo Electric Co LtdManufacture of photovoltage device
JPH0758797B2 (en)*1983-04-181995-06-21株式会社半導体エネルギー研究所 Method for manufacturing photoelectric conversion semiconductor device
JPS59193075A (en)*1983-04-181984-11-01Semiconductor Energy Lab Co LtdManufacture of photoelectric conversion semiconductor device
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JPS6041266A (en)*1983-08-151985-03-04Semiconductor Energy Lab Co LtdManufacture of photoelectric converter
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JP2540501B2 (en)*1983-11-101996-10-02株式会社 半導体エネルギー研究所 Laser processing method
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JPS61210681A (en)*1986-02-201986-09-18Sanyo Electric Co LtdManufacture of photovoltaic device
DE3714920C1 (en)*1987-05-051988-07-14Messerschmitt Boelkow Blohm Method for producing a thin-layer solar cell arrangement
JPS62295467A (en)*1987-05-291987-12-22Semiconductor Energy Lab Co LtdPhotoelectric convertor
JPH088369B2 (en)*1993-01-261996-01-29株式会社半導体エネルギー研究所 Photoelectric conversion semiconductor device
JPH06314808A (en)*1993-06-211994-11-08Semiconductor Energy Lab Co LtdPhotoelectric conversion semiconductor device
USD621682S1 (en)2009-08-212010-08-17Schlage Lock Company LlcDoor lever
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Cited By (13)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
GB2133213A (en)*1982-11-241984-07-18Semiconductor Energy LabPhotoelectric conversion device and method of manufacturing the same
GB2133617A (en)*1982-11-241984-07-25Semiconductor Energy LabPhotoelectric conversion device and method of manufacture
EP0111402B1 (en)*1982-11-241993-08-18Semiconductor Energy Laboratory Co., Ltd.Photoelectric conversion device
EP0113959A3 (en)*1982-11-241985-09-18Semiconductor Energy Laboratory Co., Ltd.Photoelectric conversion device
US4724011A (en)*1983-05-161988-02-09Atlantic Richfield CompanySolar cell interconnection by discrete conductive regions
EP0195148A1 (en)*1983-05-161986-09-24Siemens Solar Industries L.P.Photovoltaic device and method of manufacture
US4517403A (en)*1983-05-161985-05-14Atlantic Richfield CompanySeries connected solar cells and method of formation
EP0201312A3 (en)*1985-05-031988-12-07Atlantic Richfield CompanySolar cell interconnection by discrete conductive regions
FR2594597A1 (en)*1986-02-171987-08-21Messerschmitt Boelkow Blohm METHOD FOR MANUFACTURING AN INTEGRATED MODULE OF THIN-FILM-TYPE SINGLE-USE SOLAR CELLS
US5288456A (en)*1993-02-231994-02-22International Business Machines CorporationCompound with room temperature electrical resistivity comparable to that of elemental copper
US5330592A (en)*1993-02-231994-07-19International Business Machines CorporationProcess of deposition and solid state reaction for making alloyed highly conductive copper germanide
EP2450964A4 (en)*2009-06-302013-11-06Lg Innotek Co Ltd APPARATUS FOR GENERATING PHOTOVOLTAIC ENERGY, AND METHOD OF MANUFACTURING THE SAME
EP2426732A4 (en)*2009-10-012014-08-13Lg Innotek Co Ltd PHOTOVOLTAIC DEVICE AND METHOD OF MANUFACTURING THE SAME

Also Published As

Publication numberPublication date
FR2503457A1 (en)1982-10-08
DE3210742A1 (en)1982-10-21
GB2095908B (en)1985-10-02
JPS57176778A (en)1982-10-30
FR2503457B1 (en)1987-01-23
DE3210742C2 (en)1991-05-08
JPH0467348B2 (en)1992-10-28

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