EP2843758A1

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Publication number: EP2843758A1
Application number: EP13181843.7A
Authority: EP
Inventors: Chung Jui Wang
Original assignee: Microelectronics Technology Inc
Current assignee: Microelectronics Technology Inc
Priority date: 2013-08-27
Filing date: 2013-08-27
Publication date: 2015-03-04

Abstract

A multi-layer circuit board with a waveguide to microstrip transition structure includes a laminated structure having a plurality of dielectric layers, a top metal frame disposed over the laminated structure, a microstrip line disposed over the laminated structure, a bottom metal frame underlying the laminated structure, and a plurality of conductors electrically connecting the top metal frame and the bottom metal frame. The top metal frame defines a top cavity, the bottom metal frame defines a bottom cavity corresponding to the top cavity, and the microstrip line extends into the top cavity. The laminated structure includes an upper dielectric layer and at least one lower dielectric layer, wherein top cavity exposes a top surface of the upper dielectric layer, and the bottom cavity exposes a bottom surface of the at least one lower dielectric layer.

Description

TECHNICAL FIELD

The present disclosure relates to a multi-layer circuit board, and more particularly, to a multi-layer circuit board with a waveguide to microstrip transition structure.

DISCUSSION OF THE BACKGROUND

Microwave and millimeter wave circuits may use a combination of rectangular and/or circular waveguides and planar transmission lines such as striplines, microstrips, and co-planar waveguides. Waveguides are commonly used, for example, in antenna feed networks. Microwave circuit modules typically use microstrip transmission lines to interconnect microwave integrated circuits and semiconductor devices mounted on planar substrates. Transition devices are used to couple signals between microstrip transmission lines and waveguides.

This "Discussion of the Background" section is provided for background information only. The statements in this "Discussion of the Background" are not an admission that the subject matter disclosed in this "Discussion of the Background" section constitutes prior art to the present disclosure, and no part of this "Discussion of the Background" section may be used as an admission that any part of this application, including this "Discussion of the Background" section, constitutes prior art to the present disclosure.

SUMMARY

One aspect of the present disclosure provides a multi-layer circuit board with a waveguide to microstrip transition structure.

According to some embodiments of the present disclosure, a multi-layer circuit board with a waveguide to microstrip transition structure comprises a laminated structure including a plurality of dielectric layers, a top metal frame disposed over the laminated structure, a microstrip line disposed over the laminated structure, a bottom metal frame underlying the laminated structure, and a plurality of conductors electrically connecting the top metal frame and the bottom metal frame. In some embodiments of the present disclosure, the top metal frame defines a top cavity, the bottom metal frame defines a bottom cavity corresponding to the top cavity, and the microstrip line extends into the top cavity. In an exemplary embodiment of the present disclosure, the laminated structure includes an upper dielectric layer and at least one lower dielectric layer, wherein the top cavity exposes a top surface of the upper dielectric layer, and the bottom cavity exposes a bottom surface of the at least one lower dielectric layer.

According to another embodiment of the present disclosure, a multi-layer circuit board with a waveguide to microstrip transition structure comprises a laminated structure including a plurality of dielectric layers, a top metal frame disposed over the laminated structure, a microstrip line disposed over the laminated structure, a bottom metal frame underlying the laminated structure, and a plurality of conductors electrically connecting the top metal frame and the bottom metal frame. In some embodiments of the present disclosure, the laminated structure has a waveguide cavity and a protrusion extending into the waveguide cavity, wherein the waveguide cavity penetrates through the laminated structure, and the microstrip line is disposed over the protrusion and extends into the waveguide cavity. In an exemplary embodiment of the present disclosure, the laminated structure includes an upper dielectric layer and at least one lower dielectric layer, wherein the waveguide cavity exposes a top surface of the upper dielectric layer of the protrusion and a bottom surface of the lower dielectric layer of the protrusion.

According to another embodiment of the present disclosure, a multi-layer circuit board with a waveguide to microstrip transition structure comprises a laminated structure including a plurality of dielectric layers, a top metal frame disposed over the laminated structure, a microstrip line disposed over the laminated structure, a bottom metal frame underlying the laminated structure, wherein the bottom metal frame defines a bottom cavity corresponding to the top cavity, and a plurality of conductors electrically connecting the top metal frame and the bottom metal frame. In some embodiments of the present disclosure, the top metal frame defines a top cavity, the bottom metal frame defines a bottom cavity corresponding to the top cavity, and the microstrip line is disposed over the laminated structure and extends into the top cavity. In an exemplary embodiment of the present disclosure, the laminated structure includes an upper dielectric layer and at least one lower dielectric layer, wherein the bottom cavity extends into the at least one lower dielectric layer and exposes a bottom surface of the upper dielectric layer.

The foregoing has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description of the disclosure that follows may be better understood. Additional features and advantages of the disclosure will be described hereinafter, which form the subject of the claims of the disclosure. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the disclosure as set forth in the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present disclosure may be derived by referring to the detailed description and claims when considered in connection with the Figures, where like reference numbers refer to similar elements throughout the Figures, and:

FIG. 1 is a top full view of a multi-layer circuit board with a waveguide to microstrip transition structure according to some embodiments of the present disclosure;
FIG. 2 is a bottom full view of the multi-layer circuit board inFIG. 1;
FIG. 3 is a distant cross-sectional view of the multi-layer circuit board along the cross-sectional line 1-1 inFIG. 1;
FIG. 4 is an exploded view of the multi-layer circuit board inFIG. 1 with other components;
FIG. 5 is a simulated frequency response diagram of the multi-layer circuit board with a waveguide to microstrip transition structure inFIG. 1;
FIG. 6 is a measured frequency response diagram of the multi-layer circuit board inFIG. 1;
FIG. 7 is a top full view of a multi-layer circuit board with a waveguide to microstrip transition structure according to some embodiments of the present disclosure;
FIG. 8 is a bottom full view of the multi-layer circuit board inFIG. 7;
FIG. 9 is a distant cross-sectional view of the multi-layer circuit board along the cross-sectional line 2-2 inFIG. 7;
FIG. 10 is an exploded view of the multi-layer circuit board inFIG. 7 with other components;
FIG. 11 is a simulated frequency response diagram of the multi-layer circuit board with a waveguide to microstrip transition structure inFIG. 7;
FIG. 12 is a measured frequency response diagram of the multi-layer circuit board, as shown inFIG. 7;
FIG. 13 is a distant cross-sectional view of the multi-layer circuit board according to some embodiments of the present disclosure;
FIG. 14 is a simulated frequency response diagram of the multi-layer circuit board with a waveguide to microstrip transition structure inFIG. 13;
FIG. 15 is a measured frequency response diagram of the multi-layer circuit board inFIG. 13;
FIG. 16 is a top full view of a multi-layer circuit board with a waveguide to microstrip transition structure according to some embodiments of the present disclosure;
FIG. 17 is a bottom full view of the multi-layer circuit board inFIG. 16;
FIG. 18 is a distant cross-sectional view of the multi-layer circuit board along the cross-sectional line 3-3 inFIG. 16;
FIG. 19 is an exploded view of the multi-layer circuit board inFIG. 16 with other components;
FIG. 20 is a simulated frequency response diagram of the multi-layer circuit board with a waveguide to microstrip transition structure, as shown inFIG. 16; and
FIG. 21 is a measured frequency response diagram of the multi-layer circuit board inFIG. 16.

DETAILED DESCRIPTION

The following description of the disclosure accompanies drawings, which are incorporated in and constitute a part of this specification, and illustrate embodiments of the disclosure, but the disclosure is not limited to the embodiments. In addition, the following embodiments can be properly integrated to complete another embodiment.

References to "some embodiments," "an embodiment," "exemplary embodiment," "other embodiments," "another embodiment," etc. indicate that the embodiment(s) of the disclosure so described may include a particular feature, structure, or characteristic, but not every embodiment necessarily includes the particular feature, structure, or characteristic. Further, repeated use of the phrase "in the embodiment" does not necessarily refer to the same embodiment, although it may.

The present disclosure is directed to a multi-layer circuit board with a waveguide to microstrip transition structure. In order to make the present disclosure completely comprehensible, detailed steps and structures are provided in the following description. Obviously, implementation of the present disclosure does not limit special details known by persons skilled in the art. In addition, known structures and steps are not described in detail, so as not to limit the present disclosure unnecessarily. Preferred embodiments of the present disclosure will be described below in detail. However, in addition to the detailed description, the present disclosure may also be widely implemented in other embodiments. The scope of the present disclosure is not limited to the detailed description, and is defined by the claims.

FIG. 1 is a top full view of amulti-layer circuit board 10 with a waveguide to microstrip transition structure according to some embodiments of the present disclosure, andFIG. 2 is a bottom full view of themulti-layer circuit board 10 inFIG. 1. In some embodiments of the present disclosure, themulti-layer circuit board 10 comprises a laminatedstructure 20 including a plurality of dielectric layers 21-29, atop metal frame 41 disposed over the laminatedstructure 20, amicrostrip line 45 disposed over the laminatedstructure 20, abottom metal frame 51 underlying the laminatedstructure 20, and a plurality ofconductors 47 electrically connecting thetop metal frame 41 and thebottom metal frame 51.

In some embodiments of the present disclosure, thetop metal frame 41 defines atop cavity 43, thebottom metal frame 51 defines abottom cavity 53 corresponding to thetop cavity 43, and themicrostrip line 45 extends into thetop cavity 43. In some embodiments of the present disclosure, thetop metal frame 41 has apassage gap 49, and themicrostrip line 45 extends into thetop cavity 43 through thepassage gap 49. In some embodiments of the present disclosure, theconductors 47 are conductive through holes which are either plated or filled with conductive material such as copper or copper alloy; in addition, other conductive material can also be used to form theconductors 47.

In an exemplary embodiment of the present disclosure, thetop metal frame 41 and thebottom metal frame 51 may be formed of copper or copper alloy; in addition, other conductive material can also be used to form thetop metal frame 41 and thebottom metal frame 51. In an exemplary embodiment of the present disclosure, thetop metal frame 41 and thebottom metal frame 51 may have a thickness of 17.5 micrometers, which is commonly referred to as 0.5oz copper.

In some embodiments of the present disclosure, thelaminated structure 20 includes anupper dielectric layer 21 and a lowerdielectric layer 29, wherein theupper dielectric layer 21 has a first dissipation factor, the lowerdielectric layer 29 has a second dissipation factor, and the first dissipation factor is smaller than the second dissipation factor. For example, theupper dielectric layer 21 may use an RO4003C™ dielectric having a dissipation factor of 0.0027, which is commercially available from Rogers Corporation, or a TLY-5 dielectric having a dissipation factor of 0.0009, which is commercially available from Taconic International, Ltd, and the lowerdielectric layer 29 may use epoxy-glass composite (FR4) material having a dissipation factor of 0.017. In a preferred embodiment of the present disclosure, theupper dielectric layer 21 is implemented by the RO4003C™ dielectric, and is considered inexpensive as compared to the TLY-5 dielectric.

In some embodiments of the present disclosure, thetop cavity 43 exposes atop surface 21A of theupper dielectric layer 21, and thebottom cavity 53 exposes abottom surface 29A of the lowerdielectric layer 29. In an exemplary embodiment of the present disclosure, theupper dielectric layer 21 can be implemented by a sheet of an RO4003C™ dielectric having a thickness of 8.0 mil, and the lower dielectric layers 23-29 can be implemented by sheets of epoxy-glass composite (FR4) material having thicknesses from 4.7 mil to 8.0 mil.

FIG. 3 is a distant cross-sectional view of themulti-layer circuit board 10 along the cross-sectional line 1-1 inFIG. 1, showing the other portion of themulti-layer circuit board 10. In some embodiments of the present disclosure, themulti-layer circuit board 10 further comprises a plurality ofmetal layers 15 disposed between two of the plurality of dielectric layers 21-29. In an exemplary embodiment of the present disclosure, the metal layers 15 are electrically connected throughconductors 16 such as conductive through holes which are either plated or filled with conductive material.

In some embodiments of the present disclosure, themulti-layer circuit board 10 further comprises anelectronic device 13 electrically connected to themicrostrip line 45 or at least one of the metal layers 15. In an exemplary embodiment of the present disclosure, theelectronic device 13 is an RF signal processing circuit, a power amplifier, or a filter. In addition, theelectronic device 13 may electrically connect to another device (not shown in the drawings) disposed on themulti-layer circuit board 10 through the metal layers 15 and theconductive members 16. In an exemplary embodiment of the present disclosure, the metal layers 15 may have a thickness of 17.5 micrometers (commonly referred to as 0.5oz copper) or a thickness of 35.0 micrometers (commonly referred to as 1.0oz copper).

FIG. 4 is an exploded view of themulti-layer circuit board 10 inFIG. 1 with other components. In some embodiments of the present disclosure, themulti-layer circuit board 10 may be assembled with awaveguide 17 coupled to thetop cavity 43 and awave reflector 19 coupled to thebottom cavity 53. In an exemplary embodiment of the present disclosure, thewaveguide 17 may use a WR-62 waveguide.

FIG. 5 is a simulated frequency response diagram of themulti-layer circuit board 10 with a waveguide to microstrip transition structure, as shown inFIG. 1, andFIG. 6 is a measured frequency response diagram of themulti-layer circuit board 10, as shown inFIG. 1, in which the transverse axis represents the frequency and the longitudinal axis represents the insertion loss (solid line) or return loss (dotted line). ComparingFIG. 5 andFIG. 6, it is clear that the simulated frequency response diagram is substantially the same as that of the measured frequency response diagram. As shown inFIG. 5 andFIG. 6, according to some embodiments of the present disclosure, the center frequency of themulti-layer circuit board 10 is designed to be about 15.0 GHz, wherein the return loss is optimized and the insertion loss is very low, at about 0.4dB.

FIG. 7 is a top full view of amulti-layer circuit board 110 with a waveguide to microstrip transition structure according to some embodiments of the present disclosure, andFIG. 8 is a bottom full view of themulti-layer circuit board 110 inFIG. 7. In some embodiments of the present disclosure, themulti-layer circuit board 110 comprises alaminated structure 120 including a plurality of dielectric layers 121-129, atop metal frame 141 disposed over thelaminated structure 120, amicrostrip line 145 disposed over thelaminated structure 120, abottom metal frame 151 underlying thelaminated structure 120, and a plurality ofconductors 147 electrically connecting thetop metal frame 141 and thebottom metal frame 151. In an exemplary embodiment of the present disclosure, theconductors 147 are conductive through holes which are either plated or filled with conductive material such as copper or copper alloy; in addition, other conductive material can also be used to form theconductors 147.

In some embodiments of the present disclosure, thelaminated structure 120 has awaveguide cavity 143 and aprotrusion 146 extending into thewaveguide cavity 143, and thewaveguide cavity 143 penetrates through thelaminated structure 120. In some embodiments of the present disclosure, themicrostrip line 145 is disposed over theprotrusion 146 and extends into thewaveguide cavity 143. In some embodiments of the present disclosure, thetop metal frame 141 has apassage gap 149, and themicrostrip line 145 extends into thetop cavity 143 through thepassage gap 149.

In some embodiments of the present disclosure, the sidewalls of thewaveguide cavity 143 are plated with aconductive plating 153; further, the sidewalls of theprotrusion 146 are not plated with conductive material, and the corners between the sidewall of thewaveguide cavity 143 and the sidewall of theprotrusion 146 are not plated with conductive material. In an exemplary embodiment of the present disclosure, theconductive plating 153 may be formed of copper or copper alloy; in addition, other conductive material can also be used to form theconductive plating 153.

In an exemplary embodiment of the present disclosure, thetop metal frame 141 and thebottom metal frame 151 may be formed of copper or copper alloy; in addition, other conductive material can also be used to form thetop metal frame 141 and thebottom metal frame 151. In an exemplary embodiment of the present disclosure, thetop metal frame 141 and thebottom metal frame 151 may have a thickness of 17.5 micrometers, which is commonly referred to as 0.5oz copper.

In some embodiments of the present disclosure, thelaminated structure 120 includes anupper dielectric layer 121 and a lowerdielectric layer 129, wherein theupper dielectric layer 121 has a first dissipation factor, the lowerdielectric layer 129 has a second dissipation factor, and the first dissipation factor is smaller than the second dissipation factor. For example, theupper dielectric layer 121 may use an RO4003C™ dielectric having a dissipation factor of 0.0027, which is commercially available from Rogers Corporation, or a TLY-5 dielectric having a dissipation factor of 0.0009, which is commercially available from Taconic International, Ltd, and the lowerdielectric layer 129 may use epoxy-glass composite (FR4) material having a dissipation factor of 0.017. In a preferred embodiment of the present disclosure, theupper dielectric layer 21 is implemented by the RO4003C™ dielectric, and is considered inexpensive as compared to the TLY-5 dielectric.

In some embodiments of the present disclosure, thewaveguide cavity 143 exposes atop surface 121A of theupper dielectric layer 121 of theprotrusion 146 and abottom surface 129A of the lowerdielectric layer 129 of theprotrusion 146. In an exemplary embodiment of the present disclosure, theupper dielectric layer 121 can be implemented by a sheet of an RO4003C™ dielectric having a thickness of 8.0 mil, and the lower dielectric layers 123-129 can be implemented by sheets of epoxy-glass composite (FR4) material having thicknesses from 4.7 mil to 8.0 mil.

FIG. 9 is a distant cross-sectional view of themulti-layer circuit board 110 along the cross-sectional line 2-2 inFIG. 7, showing the other portion of themulti-layer circuit board 110. In some embodiments of the present disclosure, themulti-layer circuit board 110 further comprises a plurality ofmetal layers 115 each disposed between two of the plurality of dielectric layers 121-129. In an exemplary embodiment of the present disclosure, the metal layers 115 are electrically connected throughconductive members 116 such as conductive through holes which are either plated or filled with conductive material.

In some embodiments of the present disclosure, themulti-layer circuit board 110 further comprises anelectronic device 113 electrically connected to themicrostrip line 145 or at least one of the metal layers 115. In an exemplary embodiment of the present disclosure, theelectronic device 113 is an RF signal processing circuit, a power amplifier, or a filter. In addition, theelectronic device 113 may electrically connect to another device (not shown in the drawings) disposed on themulti-layer circuit board 110 through the metal layers 115 and theconductive members 116. In an exemplary embodiment of the present disclosure, the metal layers 115 may have a thickness of 17.5 micrometers (commonly referred to as 0.5oz copper) or a thickness of 35.0 micrometers (commonly referred to as 1.0oz copper).

FIG. 10 is an exploded view of themulti-layer circuit board 110 inFIG. 7 with other components. In some embodiments of the present disclosure, themulti-layer circuit board 110 may be assembled with awaveguide 117 coupled to the top of thewaveguide cavity 143 and awave reflector 119 coupled to the bottom of thewaveguide cavity 143. In an exemplary embodiment of the present disclosure, thewaveguide 117 may use a WR-42 waveguide.

FIG. 11 is a simulated frequency response diagram of themulti-layer circuit board 110 with a waveguide to microstrip transition structure, as shown inFIG. 7, andFIG. 12 is a measured frequency response diagram of themulti-layer circuit board 110, as shown inFIG. 7, in which the transverse axis represents the frequency and the longitudinal axis represents the insertion loss (solid line) or return loss (dotted line). ComparingFIG. 11 andFIG. 12, it is clear that the simulated frequency response diagram is substantially the same as that of the measured frequency response diagram. As shown inFIG. 11 andFIG. 12, according to some embodiments of the present disclosure, the center frequency of themulti-layer circuit board 110 is designed to be about 22.5 GHz, wherein the return loss is optimized and the insertion loss is very low, at about 1.0dB.

FIG. 13 is a distant cross-sectional view of the multi-layer circuit board 110' according to some embodiments of the present disclosure. Comparing the multi-layer circuit board 110' inFIG. 13 and themulti-layer circuit board 110 inFIG. 9, it is clear that the shape of the microstrip line 145' inFIG. 11 is different from that of themicrostrip line 145 inFIG. 9, and the shape of the passage gap 149' inFIG. 11 is different from that of thepassage gap 149 inFIG. 9.

FIG. 14 is a simulated frequency response diagram of the multi-layer circuit board 110' with a waveguide to microstrip transition structure, as shown inFIG. 13, andFIG. 15 is a measured frequency response diagram of the multi-layer circuit board 110', as shown inFIG. 13, in which the transverse axis represents the frequency and the longitudinal axis represents the insertion loss (solid line) or return loss (dotted line). ComparingFIG. 14 andFIG. 15, it is clear that the simulated frequency response diagram is substantially the same as that of the measured frequency response diagram. As shown inFIG. 14 andFIG. 15, according to some embodiments of the present disclosure, the center frequency of the multi-layer circuit board 110' is designed to be about 18.0 GHz, wherein the return loss is optimized and the insertion loss is very low, at about 0.6dB.

The structure of the multi-layer circuit board 110' is substantially the same as that of themulti-layer circuit board 110, except for the shape of the microstrip line and the shape of the passage gap. In other words, the structure design of the present disclosure can be used to design the multi-layer circuit board with a waveguide to microstrip transition structure for different frequency application by changing the shape of the microstrip line and the shape of the passage gap.

FIG. 16 is a top full view of amulti-layer circuit board 210 with a waveguide to microstrip transition structure according to some embodiments of the present disclosure, andFIG. 17 is a bottom full view of themulti-layer circuit board 210 inFIG. 16. In some embodiments of the present disclosure, themulti-layer circuit board 210 comprises alaminated structure 220 including a plurality of dielectric layers 221-229, atop metal frame 241 disposed over thelaminated structure 220, amicrostrip line 245 disposed over thelaminated structure 220, abottom metal frame 251 underlying thelaminated structure 220, and a plurality ofconductors 247 electrically connecting thetop metal frame 241 and thebottom metal frame 251. In an exemplary embodiment of the present disclosure, theconductors 247 are conductive through holes which are either plated or filled with conductive material such as copper or copper alloy; in addition, other conductive material can also be used to form theconductors 247.

In some embodiments of the present disclosure, thetop metal frame 241 defines atop cavity 243, thebottom metal frame 251 defines abottom cavity 253 corresponding to thetop cavity 243, and themicrostrip line 245 extends into thetop cavity 243. In some embodiments of the present disclosure, thetop metal frame 241 has apassage gap 249, and themicrostrip line 245 extends into thetop cavity 243 through thepassage gap 249. In some embodiments of the present disclosure, theconductors 247 are conductive through holes which are either plated or filled with conductive material such as copper or copper alloy; in addition, other conductive material can also be used to form theconductors 247. In some embodiments of the present disclosure, the sidewalls of thebottom cavity 253 are plated with aconductive plating 246. In an exemplary embodiment of the present disclosure, theconductive plating 246 may be formed of copper or copper alloy; in addition, other conductive material can also be used to form theconductive plating 246.

In an exemplary embodiment of the present disclosure, thetop metal frame 241 and thebottom metal frame 251 may be formed of copper or copper alloy; in addition, other conductive material can also be used to form thetop metal frame 241 and thebottom metal frame 251. In an exemplary embodiment of the present disclosure, thetop metal frame 241 and thebottom metal frame 251 may have a thickness of 17.5 micrometers, which is commonly referred to as 0.5oz copper.

In some embodiments of the present disclosure, thelaminated structure 220 includes anupper dielectric layer 221 and a lowerdielectric layer 229, wherein theupper dielectric layer 221 has a first dissipation factor, the lowerdielectric layer 229 has a second dissipation factor, and the first dissipation factor is smaller than the second dissipation factor. For example, theupper dielectric layer 221 may use a TLY-5 dielectric having a dissipation factor of 0.0009, which is commercially available from Taconic International, Ltd, and the lowerdielectric layer 229 may use epoxy-glass composite (FR4) material having a dissipation factor of 0.017.

In some embodiments of the present disclosure, thetop cavity 243 exposes atop surface 221A of theupper dielectric layer 221, and thebottom cavity 253 exposes abottom surface 221B of theupper dielectric layer 221. In an exemplary embodiment of the present disclosure, theupper dielectric layer 221 can be implemented by a sheet of a TLY-5 dielectric having a thickness of 10.0 mil, and the lower dielectric layers 223-229 can be implemented by sheets of epoxy-glass composite (FR4) material having thicknesses from 4.7 mil to 8.0 mil.

FIG. 18 is a distant cross-sectional view of themulti-layer circuit board 210 along the cross-sectional line 3-3 inFIG. 16, showing the other portion of themulti-layer circuit board 210. In some embodiments of the present disclosure, themulti-layer circuit board 210 further comprises a plurality ofmetal layers 215 each disposed between two of the plurality of dielectric layers 221-229. In an exemplary embodiment of the present disclosure, the metal layers 215 are electrically connected throughconductive members 216 such as conductive through holes which are either plated or filled with conductive material.

In some embodiments of the present disclosure, themulti-layer circuit board 210 further comprises anelectronic device 213 electrically connected to themicrostrip line 245 or one of the metal layers 215. In an exemplary embodiment of the present disclosure, theelectronic device 213 is an RF signal processing circuit, a power amplifier, or a filter. In addition, theelectronic device 213 may electrically connect to another device (not shown in the drawings) disposed on themulti-layer circuit board 210 through the metal layers 215 and theconductive members 216. In an exemplary embodiment of the present disclosure, the metal layers 215 may have a thickness of 17.5 micrometers (commonly referred to as 0.5oz copper) or a thickness of 35.0 micrometers (commonly referred to as 1.0oz copper).

FIG. 19 is an exploded view of themulti-layer circuit board 210 inFIG. 16 with other components. In some embodiments of the present disclosure, themulti-layer circuit board 210 may be assembled with awaveguide 217 coupled to thetop cavity 243 and awave reflector 219 coupled to thebottom cavity 253. In an exemplary embodiment of the present disclosure, thewaveguide 127 may use a WR-28 waveguide.

FIG. 20 is a simulated frequency response diagram of themulti-layer circuit board 210 with a waveguide to microstrip transition structure, as shown inFIG. 16, andFIG. 21 is a measured frequency response diagram of themulti-layer circuit board 210, as shown inFIG. 16, in which the transverse axis represents the frequency and the longitudinal axis represents the insertion loss (solid line) or return loss (dotted line). ComparingFIG. 20 andFIG. 21, it is clear that the simulated frequency response diagram is substantially the same as that of the measured frequency response diagram. As shown inFIG. 20 andFIG. 21, according to some embodiments of the present disclosure, the center frequency of themulti-layer circuit board 210 is designed to be about 38.75 GHz, wherein the return loss is optimized and the insertion loss is very low, at about 0.3dB.

Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims. For example, many of the processes discussed above can be implemented in different methodologies and replaced by other processes, or a combination thereof.

Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.