EP0574213B1 - Object position detector - Google Patents

Description

• The present invention relates to object positionsensing transducers and systems. More particularly, thepresent invention relates to object position sensors usefulin applications such as cursor movement for computingdevices and other applications.
• Numerous devices are available or have been proposedfor use as object position detectors for use in computersystems and other applications. The most familiar of suchdevices is the computer "mouse". While extremely popularas a position indicating device a mouse has mechanicalparts and requires a surface upon which to roll itsposition ball. Furthermore, a mouse usually needs to bemoved over long distances for reasonable resolution.Finally, a mouse requires the user to lift a hand for thekeyboard to make the cursor movement, thereby upsetting theprime purpose, which is usually typing on the computer.
• Trackball devices are similar to mouse devices. Amajor difference, however is that, unlike a mouse device, atrackball device does not require a surface across which itmust be rolled. Trackball devices are still expensive,have moving parts, and require a relatively heavy touch asdoe the mouse devices. They are also large in size and donot fit well in a volume sensitive application like laptopcomputer.
• There are several available touch-sense technologieswhich may be employed for use as a position indicator.Resistive-membrane position sensors are known and used inseveral applications. However, they generally suffer frompoor resolution, the sensor surface is exposed to the user and is thus subject to wear. In addition, resistive-membranetouch sensors are relatively expensive. A one-surfaceapproach requires a user to be grounded to thesensor for reliable operation. This cannot be guaranteedin portable computers. An example of a one-surfaceapproach is the UnMouse product by MicroTouch, ofWilmington, MA. A two-surface approach has poorerresolution and potentially will wear out very quickly intime.
• Surface Acoustic Wave (SAW) devices have potential useas position indicators. However, this sensor technology isexpensive and is not sensitive to light touch. Inaddition, SAW devices are sensitive to residue buildup onthe touch surfaces and generally have poor resolution.
• Strain gauge or pressure plate approaches are aninteresting position sensing technology, but suffer fromseveral drawbacks. This approach may employ piezo-electrictransducers. One drawback is that the piezo phenomena isan AC phenomena and may be sensitive to the user's rate ofmovement. In addition, strain gauge or pressure plateapproaches are somewhat expensive because special sensorsare required.
• Optical approaches are also possible but are somewhatlimited for several reasons.
• All would require light generation which will requireexternal components and increase cost and power drain. Forexample, a "finger-breaking" infra-red matrix positiondetector consumes high power and suffers from relatively poor resolution.
• US 4,550,221 discloses a touch pad in which theproximity of an object is detailed by applying a voltagecontrolled oscillator to row and column lines.
• "A High Performance Silicon Tactile Layer Based on aCoquitive Cell" IEEE TRANSACTIONS of Electron Devices VolED-32 No 7 July 1985 pp 1196-1201 describes a touchsensitive pad utilising an 8x8 array of force sensors.
• FR-2,662,528 discloses a touch sensitive keyboard inwhich the barycentre of an object in contact with thekeyboard is calculated by averaging the respective effectson the capacitance of row and column lines.
• The present invention is defined in the appendedclaims and provides a position-sensing technologyparticularly useful for applications where finger positioninformation is needed, such as in computer "mouse" ortrackball environments. However the position-sensingtechnology of the present invention has much more generalapplication than a computer mouse, because its sensor candetect and report if one or more points are being touched.In addition, the detector can sense the pressure of thetouch.
• A "finger pointer" position sensing system includes aposition sensing transducer comprising a touch-sensitivesurface disposed on a substrate, such as a printed circuitboard, including a matrix of conductive lines. A first setof conductive lines runs in a first direction and is insulated from a second set of conductive lines running ina second direction generally perpendicular to the firstdirection. An insulating layer is disposed over the firstand second sets of conductive lines. The insulating layeris thin enough to promote significant capacitive couplingbetween a finger placed on its surface and the first andsecond sets of conductive lines.
• Sensing electronics respond to the proximity of afinger to translate the capacitance changes between theconductors caused by finger proximity into position andtouch pressure information. Its output is a simple X, Yand pressure value of the object on its surface. Thematrix of conductive lines are successively scanned, one ata time, with the capacitive information from that scanindicating how close a finger is to that node. Thatinformation provides a profile of the proximity of thefinger to the sensor in each dimension. The centroid ofthe profile is computed with that value being the positionof the finger in that dimension. The profile of positionis also integrated with that result providing the Z(pressure) information.
• Embodiments of the present invention include aposition sensing transducer as described herein. Sensingelectronics repsond to the proximity of a finger totranslate the capacitance changes between the conductors running in one direction and those running in the otherdirection caused by finger proximity into a position andtouch pressure information. The sensing electronics of theinvention saves information for every node in its sensormatrix and can thereby give the full X/Y dimension pictureof what it is sensing. It thus has much broaderapplication for richer multi-dimensional sensing than doesthe "finger pointer" system that is described forreference. In an embodiment, referred to as the "positionmatrix" approach the x,y coordinate information can be usedas input to a on-chip neural network processor. Thisallows an operator to use multiple fingers, coordinatedgestures, etc. For even more complex interactions.
• The present invention will be further described belowwith reference to the accompanying drawings, in which:
• FIG. 1a is a top view of an object position sensortransducer usable with the invention showing the objectposition sensor surface layer including a top conductivetrace layer and conductive pads connected to a bottom tracelayer;
• FIG. 1b is a bottom view of the object position sensortransducer of FIG. 1a showing the botton conductive tracelayer;
• FIG. 1c is a composite view of the object positionsensor transducer of FIGS. 1a and 1b showing the top andbottom conductive trace layers;
• FIG. 1d is a cross-sectional view of the object position sensor transducer of FIGS. 1a-1c;
• FIG. 2 is a block diagram of sensor decodingelectronics which may be used with the sensor transducer ina "finger pointer" system described for reference;
• FIGS. 3a and 3b are graphs of output voltage versusmatrix conductor position which illustrate the effect ofthe minimum detector;
• FIG. 4 is a simplified schematic diagram of anintergrating charge amplifier circuit suitable for use inthe "finger pointer" system;
• FIG. 5 is a timing diagram showing the relative timingof control signals used to operate the "finger pointer"system with an integrating charge amplifier as shown inFIG. 4;
• FIG. 6a is a schematic diagram of a first alternateform of an integrating charge amplifier circuit suitablefor use in the "finger pointer" system including additionalcomponents to bring the circuit to equilibrium prior tointegration measurement.
• FIG. 6b is a timing diagram showing the control andtiming signals used to drive the integrating chargeamplifier of FIG. 6a and the response to various nodes inthe amplifier to those signals.
• FIG. 7a is a schematic diagram of a second form of anintegrating charge amplifier circuit suitable for use in the "finger pointer" system including additional componentsto bring the circuit to equilibrium prior to integrationmeasurement.
• FIG. 7b is a timing diagram showing the control andtiming signals used to drive the integrating chargeaplifier of FIG. 7a and the response of various nodes inthe amplifier to those signals.
• FIG.8 is a schematic diagram of a minimum circuit;
• FIG. 9 is a schematic diagram of a maximum detectorcircuit;
• FIG. 10 is a schematic diagram of a linear voltage-to-currentconverter circuit;
• FIG. 11 is a schematic diagram of a position encodercentroid computing circuit;
• FIG. 12 is a schematic diagram of a Z Sum circuit;
• FIG. 13 is a schematic diagram of a multipliercircuit;
• FIG. 14 is a schematic diagram of a combinationdriving-point impedance circuit and receiving-pointimpedance circuit according to a presently preferredposition matrix embodiment of the invention;
• FIG. 15 is a block diagram of a the structure of a portion of a sample/hold arraysuitable for use in the present invention.
• FIG. 16a is a block diagram of a simple version of a position matrix embodiment ofthe present invention in which the matrix of voltage information is sent to a computer whichprocesses the data.
• FIG 16b is a block diagram of a second version of a position matrix embodiment ofthe present invention employing a sample/hold array such as that depicted in FIG. 15.
• Those of ordinary skill in the art will realize that the following description of thepresent invention is illustrative only and not in any way limiting. Other embodiments of theinvention will readily suggest themselves to such skilled persons.
• The present invention brings together in combination a number of unique featureswhich allow for new applications not before possible. Because the object position sensor ofthe present invention has very low power requirements, it is beneficial for use in batteryoperated or low power applications such as lap top or portable computers . It is also a verylow cost solution, has no moving parts (and is therefore virtually maintenance free), anduses the existing printed circuit board traces for sensors. The sensing technology of thepresent invention can be integrated into a computer motherboard to even further lower itscost in computer applications. Similarly, in other applications the sensor can be part of analready existent circuit board.
• Because of its small size and low profile, the sensor technology of the presentinvnetion is useful in lap top or portable applications where volume is importantconsideration. The sensor technology of the present invention requires circuit board spacefor only a single sensor interface chip that Can interface directly to a microprocessor, plusthe area needed on the printed circuit board for sensing.
• The sensor material can be anything that allows creation of a conductive X/Y matrixof pads. This includes not only standard PC board, but also flexible PC board, conductiveelastomer materials, and piezo-electric Kynar plastic materials. This renders it useful aswell in any portable equipment application or in human interface where the sensor needs tobe molded to fit within the hand.
• The sensor can be conformed to any three dimensional surface. Copper can be platedin two layers on most any surface contour producing the sensor. This will allow the sensorto be adapted to the best ergonomic form needed for a application. This coupled with the"light-touch" feature will make it effortless to use in many applications. The sensor canalso be used in an indirect manner, i.e it can have a conductive foam over the surface and beused to detect any object (not just conductive) that presses against it's surface.
• Small sensor areas are practical, i.e., a presently conceived embodiment takes about1.5"x 1.5" of area, however those of ordinary skill In the art will recognize that the area isscalable for different applications. The matrix area is scaleable by either varying thematrix trace spacing or by varying the number of traces. Large sensor areas are practicalwhere more information is needed.
• Besides simple X and Y position information, the sensor technology of the presentinvention also provides finger pressure information. This additional dimension ofinformation may be used by programs to control special features such as "brush-width"modes in Paint programs, special menu accesses, etc., allowing provision of a more naturalsensory input to computers.
• The user will not even have to touch the surface to generate the minimum reaction.This feature can greatly minimize user strain and allow for more flexible use.
• The sense system of the present invention depends on a transducer device capable ofproviding position and pressure information regarding the object contacting the transducer.Referring first to FIGS. 1a-1d, top, bottom, composite, and cross-sectional views,respectively, are shown of a presently-preferred touch sensor array for use in the present invention. Since capacitance is exploited by this embodiment of the present invention, thesensor surface is designed to maximize the capacitive coupling between top (X) trace pads tothe bottom (Y) trace pads in a way that can be maximally perturbed and coupled to a fingeror other object placed above the surface.
• A presently preferredsensor array 10 according to the present invention comprisesasubstrate 12 Including a set of firstconductive traces 14 disposed on atop surface 16thereof and run in a first direction to comprise rows of the array. A second set ofconductivetraces 18 are disposed on abottom surface 20 thereof and run In a second directionpreferably orthogonal to the first direction to form the columns of the array. The top andbottom conductive traces 14 and 18 are alternately in contact withperiodic sense pads 22comprising enlarged areas, shown as diamonds in FIGS. 1a-1c. Whilesense pads 22 areshown as diamonds in FIGS. 1a-1c, any shape, such as circles, which allows close packing ofthe sense pads, is equivalent for purposes of this invention.
• The number and spacing of thesesense pads 22 depends upon the resolution desired.For example, in an actual embodiment constructed according to the principles of the presentinvention, a 0.10 inch center-to-center diamond-shaped pattern of conductive pads disposedalong a matrix of 15 rows and 15 columns of conductors is employed. Everyother sense pad22 in each direction in the pad pattern is connected to conductive traces on the top andbottom surfaces 16 and 20, respectively ofsubstrate 12.
• Substrate 12 may be a printed circuit board, a flexible circuit board or any of anumber of available circuit interconnect technology structures. Its thickness isunimportant as long as contact may be made therethrough from the bottom conductive traces18 to theirsense pads 22 on thetop surface 16. The printed circuitboard comprisingsubstrate 12 can be constructed using standard Industry techniques. Board thickness is notimportant. Pad-to-pad spacing should preferably be minimized to something in the range ofabout 15 mils or less. Connections from theconductive pads 22 to the bottom traces 18may be made employing standard plated-through hole techniques well known in the printed circuit board art.
• An insulatinglayer 24 is disposed over thesense pads 22 ontop surface 16 toinsulate a human finger or other object therefrom. Insulatinglayer 24 is preferably a thinlayer (i.e., approximately 5 mils) to keep capacitive coupling large and may comprise amaterial, such as mylar, chosen for its protective and ergonomic characteristics.
• There are two different capacitive effects taking place when a finger approaches thesensor array 10. The first capacitive effect is trans-capacitance, or coupling betweensensepads 22, and the second capacitive effect is self-capacitance (ground capacitance), orcoupling to earth-ground. Sensing circuitry is coupled to thesensor array 10 of thepresent invention and responds to changes in either or both of these capacitances. This isimportant because the relative sizes of the two capacitances change greatly depending on theuser environment. The ability of the present invention to detect changes intrans-capacitance results in a very versatile system having a wide range ofapplications.
• Firstly, a "finger position" system is described forreference. This system includessensor array 10 and associated touch detector circuitry will detect a finger position on amatrix of printed circuit board traces via the capacitive effect of finger proximity to thesensor array 10. The position sensor system will report the X, Y position of a finger placednear thesensor array 10 to much finer resolution than the spacing between the row andcolumn traces 14 and 18. The position sensorwill also report a Z value proportional to the outline of that finger and hence indicative ofthe pressure with which the finger contacts the surface of insulatinglayer 22 over thesensing array 10.
• A very sensitive,light-touch detector circuit may be provided using adaptive analog VLSI techniques. Thecircuit is very robust and calibrates out process and systematicerrors. The detector circuit will process the capacitive input information and provide digital information to a microprocessor.
• Sensing circuitry is contained on asingle sensor processor integrated circuit chip. The sensor processor chip can have anynumber of X and Y matrix" inputs. The number of X and Y inputs does not have to be equal.The Integrated circuit has a digital bus as output. In the illustrative example disclosed inFIGS. 1a-1d herein, the sensor array has 15 traces in both the Y and Y directions. Thesensor processor chip thus has 15 X inputs and 15 Y inputs.
• The X and Y matrix nodes are successively scanned, one at a time, with the capacitiveinformation from that scan indicating how close a finger is to that node. The scannedinformation provides a profile of the finger proximity in each dimension. According to thisaspect of the present invention, the profile centroid is derived in both the X and Y directionsand is the position in that dimension. The profile curve of proximity is also integrated toprovide the Z information.
• Referring now to FIG. 2, a block diagram of presently preferredsensing circuitry30 is shown. The sensing circuitry of thisembodiment employs a driving-point impedance measurement for each X and Y line in thesensing matrix 10. The block diagram of FIG 2 illustrates the portion of the sensingcircuitry for developing signals from one direction (shown as X in the matrix). Thecircuitry for developing signals from the other direction in the matrix is identical and itsinterconnection to the circuitry shown in FIG 2 will be disclosed herein. The circuitry ofFIG. 2 illustratively discloses an arrangement in which information from six X matrix linesX1 ... X6 are processed. Those of ordinary skill in the art will recognize that thisarrangement is illustrative only, and that actual systemsmay employ an arbitrarily sized matrix, limited only by technologyconstraints.
• The driving-point capacitance measurement for each of X lines X1 ... X6 is derivedfrom an integrating charge amplifier circuit. These circuits are shown in block form at reference numerals 32-1 through 32-6. The function of each of integrating chargeamplifier circuits 32-1 through 32-6 is to develop an output voltage proportional to thecapacitance sensed on its corresponding X matrix line.
• The driving-point capacitance measurement is made for all X (row)conductors 14and all Y (column)conductors 18 in thesensor matrix array 10. A profile of the fingerproximity mapped into the X and Y dimension is generated from the driving-pointcapacitance measurement data. This profile is then used to determine a centroid in bothdimensions, thereby determining the X and Y position of the finger.
• The output voltages of integrating charge amplifier circuits 32-1 through 32-6 areutilized by several other circuit elements and are shown for convenience in FIG. 2 asdistributed bybus 34.Bus 34 is a six conductor bus, and those of ordinary skill in the artwill recognize that each of its conductors comprises the output of one of integrating chargeamplifiers 32-1 through 32-6.
• The first of circuit elements driven by the outputs of integrating charge amplifiercircuits 32-1 through 32-6 is linear voltage-to-current converter 36. The function oflinear voltage-to-current converter 36 is to convert the output voltages of integratingcharge amplifiers 32-1 through 32-6 to currents for subsequent processing.
• The current outputs from linear voltage-to-current converter 36 are presented asinputs to X position encodecircuit 38. The function of X position encodecircuit 38 is toconvert the input information into a signal representing object proximity in the Xdimension of the sensor array matrix.
• This circuit will provide a scaled weighted mean (centroid) of the set of inputcurrents. The result is a circuit which is a linear position encoder,having an output voltagewhich varies between the power supply rails. Because it is a weighted mean, it averages allcurrent inputs and can in turn generate an output voltage which represents an X positionwith a finer resolution than the spacing of the X matrix grid spacing.
• The output voltage of X position encodecircuit 38 is presented to sample/hold circuit 40, the output of which, as is well known in the art, either follows the Input or holds avalue present at the input depending on the state of itscontrol input 42. The structure andoperation of sample/hold circuits are well known in the art.
• The output of sample/hold circuit 40 drives the input of analog-to-digital (A/D)converter 44. The output of A/D converter 44 is a digital value proportional to the positionof the object in the X dimension of thesensor array matrix 10.
• While the portion of the circuit described so far is useful for providing a digitalsignal indicating object position in one dimension, the addition of further circuit elementsyields a more useful device which is more immune to noise, detects and subtracts the no-object-proximatesignal from the outputs of the sensors, and provides threshold detection ofan approaching object.
• The first of these additional circuit elements isminimum detector circuit 46. Thefunction ofminimum detector circuit 46 is to determine the level of signal representingambient no-object-proximate to thesensor array matrix 10 and to provide a signal whichmay be fed back to integrating charge amplifiers 32-1 through 32-6 to control their outputvoltages to effectively zero out the outputs of the amplifiers under the ambient condition.The output ofminimum detector 46 circuit is a voltage. This voltage is compared inoperational amplifier 48 with an adjustable voltage representing a minimum thresholdvalue V_Thmin. Through feedback to the integrating charge amplifiers 32-1 through 32-6,amplifier 48 adjusts its output to balance the output voltage ofMinimum detector circuit 46with the voltage VThmin. Feedback'is controlled by P-channel MOS transistor 50, whichallows the feedback to operate only when the PROCESS signal is active.
• FIGS. 3a and 3b are graphs of output voltage versus matrix conductor position whichillustrate the effect of theminimum detector circuit 46. In order to better illustrate theeffect of offset cancellation, FIGS. 3a and 3b show the outputs of integrating chargeamplifiers from a fifteen row matrix, rather than from a six row matrix as is implied byFIG. 2. FIG. 3a shows the offset component of the voltage outputs of integrating charge amplifiers without the operation ofminimum detector 46, and FIG. 3b shows the voltageoutputs with the offset having been zeroed out by the feedback loop comprisingminimumdetector circuit 46, P-channel MOS transistor 50, andfeedback conductor 52.
• Another additional circuit component is maximum,detector circuit 54. The functionofmaximum detector circuit 54, working in co-operation withamplifier 56, ORgate 58,and ANDgate 60 is to provide a MAX INTERRUPT signal. The MAX INTERRUPT signal alertsthe microprocessor controlling the object sensor system that anobject is approaching thesensor array matrix 10. Theamplifier 56 acts as a comparatorwhich trips if the output voltage frommaximum detector circuit 54 exceeds the thresholdset by the voltage V_Thmax. When the output voltage frommaximum detector circuit 54exceeds the threshold, or the output voltage from the corresponding Y maximum detector(not shown) exceeds the threshold set for its corresponding amplifier, the output ofOR gate58 becomes true. That and a true SAMPLE signal at the second input of ANDgate 60 causes atrue MAX INTERRUPT signal at its output.
• TheZ Sum circuit 62 produces an output which is proportional to the pressure withwhich a finger is pressing on the sensor. This is done in both the X and Y dimensions byeffectively integrating the areas under the curves of FIG. 3b. Referring again to FIG. 3b forillustration purposes, it can be seen that the width of the contact area in the X dimension ofthesensor array 10 is from about X₂ to X₁₀.Z Sum circuit 62 isconfigured to produce an output voltage V_O. Output voltage V_O is a scaled function of all theinput voltages.
• Since the outputs of theZ Sum circuits 62 in both the X and Y directions areproportional to the width of the pointing finger or other flexible object in the twodimensions of thesensor array matrix 10, the area of the finger or other flexible object is areliable measure of the pressure with which the finger is contacting the surface of thesensor array matrix 20. The area may be calculated bymultiplier circuit 64, having theoutput of the Z Sum circuit in the X dimension as one of its inputs and the output of the ZSum circuit in the Y dimension as the other one of its inputs.
• The multiplier circuit takes two analog voltageinputs and performs an analog computation on those voltages to create a voltage output whichis proportional to the product of the two input voltages. As shown in FIG. 2, a first inputterm is the output voltage of the X dimensionZ Sum circuit 62 and a second input term is theoutput of the Y dimension Z Sum circuit (not shown).
• Since multiplication is commutative process and since the multiplier inputsare symmetrical, it does not matter which of the X and Y Z sum circuits contributes the firstinput term and which contributes the second input term.
• The output ofmultiplier circuit 64 is a voltage and drives a sample/hold circuit 66.Sample/hold circuit 66 may be identical to sample/hold circuit 40 and may be driven by thesame SAMPLE signal which drives sample/hold circuit 40.
• The output of sample/hold circuit 66 drives the input of analog-to-digital (A/D)converter 68. A/D converter 68 may be identical to A/D converter 44. The output of A/Dconverter 68 is a digital value proportional to the pressure with which the finger (or otherflexible object) is contacting the surface ofsensor array matrix 10.
• The object position sensor system may be operated under thecontrol of a microprocessor which provides the timing and other control signals necessaryto operate the system. For example, the MAX INTERRUPT signal from the output of ANDgate60 may be used to interrupt the microprocessor and invoke an object sensing routine. Theparticular timing and control signals employed by any systemwill vary according to the individual design.
• Referring now to FIG. 4, a simplified schematic diagram of an integratingchargeamplifier circuit 70 operating in a driving-point capacitance measuring mode suitable foruse in the present invention is shown. Integratingcharge amplifier circuit 70 is derivedfrom the common integrating amplifier seen in the literature, for example in Gregorian andTemes, Analog MOS Integrated Circuits, John Wiley & Sons (1986) pp. 270-271; Haskardand May, Analog VLSI Design, Prentice Hall (1988), pp. 105-106, and is built aroundamplifyingelement 72, which may comprise a common transconductance amplifier asdescribed in Mead, Analog VLSI and Neural Systems, Addison-Wesley (1989) pp. 70-71.The inverting input of amplifying element is connected to aninput node 74 through aswitch76 controlled by a SELECT(n)node 78. The input node is connected to one of the lines in thesensor array matrix of FIG. 1. While the disclosure herein illustrates the use of anintegrating charge amplifier connected to a row line of the matrix,the operation of the integrating charge amplifiers connected to thecolumn lines of the array is identical.
• The non-inverting input of amplifyingelement 72 is connected to a Voltagestepinput node 80. Acapacitor 82 is connected as an integrating feedback element between theoutput and inverting input of amplifyingelement 72.Capacitor 82 may have a capacitance of about 10 pF.
• The output of amplifyingelement 72 is connected to anoutput node 84 through aswitch 86.Switch 86 is controlled by the SELECT(n)node 78 which also controlsswitch76. Acapacitor 88, which may have a capacitance of about 3 pF, is connected betweenoutput node 84 and an offset adjustnode 90.Switches 76 and 86 may comprise common CMOS pass gates, each including an N-channeland a P-channel MOS transistor connected in parallel with their gates driven bycomplimentary signals. Thecombination ofswitch 86 andcapacitor 88 form a simple sample/hold circuit the offset ofwhich may be adjusted when the switch is in its off position via the voltage onnode 90.
• Amplifyingelement 72 also includes aBIAS input node 92, which may be connectedto an on-chip current bias reference which may be used for all of the integrating chargeamplifiers on the chip.
• A driving-point capacitance measurement is made by closingswitches 76 and 86 andstepping, by an amount Vstep, the input voltage on Voltagestep input node 80 at the non-invertinginput of amplifyingelement 72. Because of the negative feedback arrangement,the output of amplifyingelement 72 will then move to force the voltage at its invertinginput to match the voltage at its non-inverting input. The result is that the voltage at theoutput node 84 changes to a value that injects enough charge intocapacitor 82 to match thecharge that is injected into the capacitance on the sensor array matrix line connected toinputnode 74. This change may be expressed as:Vout = Vstep * ( 1 + Cmatrix/C82)where V_out is the output voltage, C_matrix is the capacitance on the row or column line of thesensor array matrix to whichinput node 74 is connected and C₈₂ is capacitor 82..
• When a finger approaches thesensor array matrix 10, C_matrix will increase inmagnitude. The result is that Vout will also increase in a driving-point capacitancemeasurement made as the finger approaches. V_out is proportional to the proximity of afinger (conductive object) to the sensor array matrix line connected to inputnode 74. Asdescribed above, the driving-point capacitance measurement gives an output voltage changethat is directly proportional to the sensor capacitance that is to be measured.
• Subtracting the V_out value with no object present from the V_out value where there isan object present results in a V_out difference that is proportional to the change incapacitance at the row line of the sensor array matrix to whichinput node 74 is connected.Thus:Vout(final) = Vout (with finger) - Vout (no object)Vout (with finger) = VSTEP *(1+((Cno object + Cfinger)/C82))Vout (no object) = VSTEP *(1+(Cno object/C82))Vout (final) = VSTEP (Cfinger/C82)
• This subtractionoperation may be performed by applying an the offset adjust voltage tocapacitor 88 at offsetadjustnode 90. This voltage may be presented to the amplifier circuit via line 52 (FIG. 2)and is controlled by the Minimum Detectcircuit 46 when the PROCESS control line isactive. The Offset Adjust subtracts the "no object voltage" from theoutput node 84 and leavesan output voltage directly proportional to the change of the capacitance at the row line of thesensor array matrix to whichinput node 74 is connected caused by the approaching object.
• To operate the object position sensing system theintegratingcharge amplifiers 70 are selected one at a time using theirselect nodes 78. Thiscloses bothswitch 76 and 86 to start the integrator and to start sampling the results of thisoperation. The voltage at the Voltagestep input node 80 is stepped, and the circuit is allowedto settle. After sufficient settling time the select signal is disabled, switches 76 and 86 areopened and the sampled result is left stored at theoutput node 84 oncapacitor 88.
• After all of the row and column lines of thesensor array matrix 10 have beenscanned, a PROCESS cycle takes place, and the minimum Detectcircuits 46 in both the X andY dimensions adjust the output voltages oncapacitors 88 in all integratingcharge amplifiers70 via thecommon input line 52 to all amplifiers.
• Referring now to FIG. 5 a timing diagram shows the relationship between the timingand control signals used to operate the object position sensor systemutilizing the integrating charge amplifier of FIG. 4. As illustrated in FIG. 5,first all X and Y integrating charge amplifiers are sequentially selected, followed by aPROCESS signal and then a SAMPLE signal.
• Additional components may be added to integratingcharge amplifiers 70, largely tobring the circuits to equilibrium before the integration takes place. Referring now to FIG.6a, in an alternate arrangement of an integratingcharge amplifier 100, all components of the system of FIG. 4 are present. In the arrangement of FIG. 6a, the portion of the cyclein which a global RESET node is true is used to equibrilate the circuit by discharging theintegrating feedback capacitor to zero volts. The voltage V_STEP is then provided to the non-invertinginput of the amplifyingelement 72 in a manner which allows easily controlledstepping between the two designated voltages, V_LOW and V_HIGH.
• The additional components in integratingcharge amplifier 100 include aswitch 102connected acrosscapacitor 82 connected to aRESET node 104 connected to all of theintegrating charge amplifiers in the system. When the RESET signal is true at the beginningof each scanning cycle, switch 102 turns on and discharges thecapacitor 82 to zero volts.
• Aswitch 106 is connected between theinput node 74 and ground has a controlelement connected to a RESET1(n)node 108. The RESET1(n)node 108 is active for allIntegrating charge amplifiers except for the one selected by its SELECT(n) node to performthe driving-point impedance measurement. Its function is to discharge any voltage presenton those nodes due to the capacitive coupling to the other nodes which have been driven bythe scanning process and thereby eliminate or minimize the error which such voltageswould introduce into the measurement process.
• Finally, the V_STEP voltage may be provided to the non-inverting input of amplifyingelement 72 by employingswitches 110 and 112.Switch 110 is connected between a V_HIGHvoltage node 114 and the non-inverting input of amplifyingelement 72, and is controlled byaSTEP node 116.Switch 112 is connected between a V_LOW voltage node 118 and the non-invertinginput of amplifyingelement 72, and is controlled by aSTEP\ node 120.Switches102, 106, 110, and 112 may comprise common CMOS pass gates.
• Referring now to FIG. 6b, a timing diagram shows the relationships between thevarious control signals and the voltages present on selected nodes of the integratingchargeamplifier circuit 100 of FIG. 6a during scan cycles (n-1), (n), and (n+1). As can be seenfrom FIG. 6b, the global RESET signal atnode 104 discharges thecapacitors 82 of all integratingcharge amplifiers 100 in the system at the beginning of each scanning cycle.
• The RESET1(n) signal atnode 108 is coincident with the RESET signal during scanningcycles (n-1) and (n+1) but does not appear at thenode 108 of the integratingchargeamplifier 100 which is making the driving-point impedance measurement during scanningcycle (n).
• The RESET1(n) signal for any integrating charge amplifier 100n may be generatedby simple logic circuitry to implement the logic function RESET1(n) = RESET •SELECT(n)\.
• FIG. 6b also shows the STEP and STEP\ signals drive the non-inverting input ofamplifyingelement 72 first to V_LOW and then to V_HIGH during each scanning cycle. Thesignals N1, N2, and N3 represent the voltages present at the inverting input, the non-invertinginput, and the output, respectively, of amplifyingelement 72. As can be seenfrom FIG. 6b, the voltage V_meas, the voltage of interest, remains at the output node ofintegratingcharge amplifier 100 even after the end of scan cycle (n) in which it wasdeveloped.
• Referring now to FIG. 7a, an integratingcharge amplifier 130provides a larger operating range forthe integration. The arrangement of FIG. 7a is nearly identical in its structure and operationto the arrangement of FIG. 6a, except that instead ofswitch 102 acting to dischargecapacitor82 to zero volts when theRESET input 104 is true,switch 132, which may comprise acommon CMOS pass gate, is used to force the output of amplifyingelement 72 to ground(zero volts) instead of to V_LOW as in the arrangement of FIG. 6a. Aswitch 134, alsocontrolled byRESET input 104, is used to short together the inverting and non-invertinginputs ofamplifier 72, forcing them both to an equilibrium voltage of V_LOW. In low powersupply-voltage applications, such as found in notebook computers, this circuit increases thesignal sensitivity by a factor of two.
• FIG. 7b is a timing diagram which shows the relationships between the variouscontrol signals and the voltages present on selected nodes of the integratingcharge amplifiercircuit 130 of FIG. 7a during scan cycles (n-1), (n), and (n+1). As can be seen from FIG.7b, the global RESET signal atnode 104 forces the outputs of all integratingchargeamplifiers 100 in the system to zero volts at the beginning of each scanning cycle. As in theembodiment of FIG. 7a, the RESET1(n) signal atnode 108 is coincident with the RESETsignal during scanning cycles (n-1) and (n+1) but does not appear at thenode 108 of theintegratingcharge amplifier 130 which is making the driving-point impedancemeasurement during scanning cycle (n).
• Like the arrangement of FIG. 6a, in the arrangement of FIG. 7a the STEP and STEP\signals drive the non-inverting input of amplifyingelement 72 first to V_LOW and then toV_HIGH during each scanning cycle. The signals N1, N2, and N3 represent the voltages presentat the inverting input, the non-inverting input, and the output, respectively, of amplifyingelement 72. As can be seen from FIG. 7b, the voltage V_meas, the voltage of interest, remainsat the output node of integratingcharge amplifier 130 even after the end of scan cycle (n) inwhich it was developed.
• Referring now to FIG. 8, a schematic diagram is presented of aminimum detectorcircuit 46 of FIG. 2. While the X dimensionminimum detector circuit 46 is illustrativelydisclosed herein, the Y dimensionminimum detector circuit functions in the same manner.
• Minimum detectorcircuit 46 includes a P-channel bias transistor 142 having its source connected to a voltagesource V_DD and its gate connected to a bias voltage V_BIAS. The inputs of the minimum detectorcircuit are connected to theoutput nodes 84 of the respective integrating charge amplifiers.In the minimum detector circuit illustrated in FIG. 8, there are (n) inputs. Each inputsection comprises a series pair of MOS transistors connected between the drain of P-channel bias transistor 142 and ground.
• Thus, the input section for In₁ comprises P-channelMOS input transistor 144having its source connected to the drain of P-channelMOS bias transistor 142 and N-channelMOS current-limitingtransistor 146 having its drain connected to the drain of P-channelMOS input transistor 144 and its source connected to ground. The gate of P-channelMOS input transistor 144 is connected to In₁ input node 148 and the gate of N-channel MOScurrent-limitingtransistor 146 is connected to a source of limiting bias voltage VL_BIAS atnode 150.
• Similarly, the input section for In₂ comprises P-channelMOS input transistor 152having its source connected to the drain of P-channelMOS bias transistor 142 and N-channelMOS current-limitingtransistor 154 having its drain connected to the drain of N-channelMOS input transistor 152 and its source connected to ground. The gate of P-channelMOS input transistor 152 is connected to In₂input node 156 and the gate of N-channel MOScurrent-limitingtransistor 154 is connected tonode 150.
• The input section for In₃ comprises P-channelMOS input transistor 158 having itssource connected to the drain of P-channelMOS bias transistor 142 and N-channel MOScurrent-limitingtransistor 160 having its drain connected to the drain of P-channelMOSInput transistor 158 and Its source connected to ground. The gate of P-channelMOS Inputtransistor 158 Is connected to In₃Input node 162 and the gate of N-channel MOS current-limitingtransistor 160 is connected tonode 150.
• The input section for In_(n) comprises P-channelMOS input transistor 164 havingits source connected to the drain of P-channelMOS bias transistor 142 and N-channel MOScurrent-limitingtransistor 166 having its drain connected to the drain of P-channelMOSinput transistor 164 and its source connected to ground. The gate of P-channelMOS inputtransistor 164 is connected to In_(n)input node 168 and the gate of N-channel MOS current-limitingtransistor 146 is connected tonode 150. The output ofminimum detector circuit 46 isnode 170.
• Without averaging control, V_BIAS and V_LBIAS would be set so that the saturationcurrents in any one oftransistors 146, 154, 160 .. 166 is much larger than thesaturation current intransistor 142. In this mode, assume that In₁ is the smallest voltageof all n inputs. In thiscase transistor 144 is turned on strongly withtransistor 146 takingall the current fromtransistor 142. As a result,output node 170 moves down untiltransistor 144 is on just enough to sink all the current fromtransistor 142. In this caseall other transistor pairs (152/154, 158/160, ...164/166) turn off because their p-channeldevices have an input voltage drive of less than that oftransistor 144. The result isthat the output is directly related to the minimum input voltage and is offset therefrom by agate bias voltage.
• Operating theminimum detector circuit 46 of FIG. 8 in an averaging mode providessubstantial noise rejection in the system. If for some reason one input was noisy and gave amuch smaller value than all other values it could cause the generation of an erroneousoutput voltage. The goal is to detect the "backgroundlevel" of an input with no input stimulus. This would be the true minimum value. Sincethere are typically more than one input in this state, several inputs can be averaged to formthe minimum signal. This is done via the averaging mode, which is enabled by setting theV_LBIAS current of eachtransistor 146, 154, 160, ... 166 to be some fraction of thecurrent fromtransistor 142.
• The current set by V_LBIAS is approximately one-third of thecurrent fromtransistor 142. Therefore, in order to sink all of the current fromtransistor142, at least three input pairs (144/146, ...164/166) must be turned on. For that tohappen theoutput node 170 must then be sitting at a voltage equal to a p-channel biasvoltage above the third lowest input. It has thus, in effect, filtered out and ignored the twolower values.
• The minimum detect circuit of FIG. 8 has been describedin terms of separately deriving an X minimum signal and a Y minimum signal and separatelycomputing their weighted minima.The weighted minima of the combined X and Y signalscould be computed utilizing the principles disclosed herein.
• Referring again to FIG. 2, the output of amplifier 48 (a transconductance amplifieroperating as a comparator) and the bottom ofcapacitor 88 in the integratingchargeamplifiers 70, 100, and 130 of FIGS. 4, 6a, and 7a has been held high byMOS transistor50 during the scan operation or non-PROCESS cycles when the global PROCESS signal (FIG.5) is low. When the PROCESS cycle starts, the PROCESS line goes high andMOS transistor50 is turned off, thus enabling the action ofminimum detector circuit 46. If the output ofminimum detector circuit 46 is greater than the V_Thmin at the input ofamplifier 48, theoutput ofamplifier 48 is driven low. This is a feedback loop because when the bottom ofcapacitor 88 in the integrating charge amplifiers drives low it pulls the outputs of allintegrating charge amplifiers (32-1 through 32-6) low also. This in turn pulls the outputofminimum detector circuit 46 low. This feedback-settling process continues until theminimum detector circuit 46 output equals the V_Thmin (FIG. 3b).
• The V_Thmin voltage is chosen so that when the integrating charge amplifiers (32-1through 32-6) outputs are shifted down, the minimum charge amplifier output willgenerate no current in the voltage-to-current converter circuits 36.
• Referring now to FIG. 9, themaximum detector circuit 54 will be disclosed.Maximum detector circuit54 includes an N-channel bias transistor 182 having its source connected to ground and itsgate connected to a bias voltage V_BIAS atnode 184. The inputs of the maximum detectorcircuit are connected to theoutput nodes 84 of the respective integrating charge amplifiersIn the maximum detector circuit illustrated in FIG. 9, there are (n) inputs. Each input section comprises a series pair of MOS transistors connected between the drain of N-channelbias transistor 182 and a voltage source V_DD.
• Thus, the input section for ln₁ comprises P-channel MOS current-limitingtransistor 186 having its source connected to V_DD and its drain connected to the drain of N-channelMOS input transistor 188. The gate of N-channelMOS input transistor 188 isconnected to ln₁input node 190 and the gate of P-channel MOS current-limitingtransistor186 is connected to a source of bias voltage VL_BIAS atnode 192. Similarly, the input sectionfor ln₂ comprises P-channel MOS current-limitingtransistor 194 having its sourceconnected to V_DD and its drain connected to the drain of N-channelMOS input transistor 196.The gate of N-channelMOS input transistor 196 is connected to ln₂ input node 198 and thegate of P-channel MOS current-limitingtransistor 194 is connected tonode 192. The inputsection for ln₃ comprises P-channel MOS current-limitingtransistor 200 having itssource connected to VDD and its drain connected to the drain of N-channelMOS inputtransistor 202. The gate of N-channelMOS input transistor 202 is connected to ln₃ inputnode 204 and the gate of R-channel MOS current-limitingtransistor 200 is connected tonode 192. The input section for ln_(n) comprises P-channel MOS current-limitingtransistor 206 having its source connected to VDD and its drain connected to the drain of N-channelMOS input transistor 208. The gate of N-channelMOS input transistor 208 isconnected to ln_(n)input node 210 and the gate of N-channel MOS current-limitingtransistor 206 is connected tonode 192. The sources of N-channelMOS input transistors188, 196, 202, and 208 are connected together to the drain of N-channelMOS biastransistor 182. The output ofmaximum detector circuit 54 isnode 212 at the commonconnection of the drain of N-channel bias transistor 182 and the sources of the N-channelinput transistors.
• Themaximum detector circuit 54 acts analogously to theminimum detector circuit 46. The difference is that an N-channel bias transistor is used instead of a P-channel biastransistor and an N-channel transconductance amplifier is used in place of a P-channeltransconductance amplifier. The result is the output will now track approximately an N-channelbias drop below the largest input (in non-averaging mode), since that muchdifference is needed to guarantee at least one input pair is on (186/188, 194/196, ...206/208).
• However for this circuit the output is not used for feedback, but is instead used todrive a comparator 56 (FIG. 2) which is set to trip if the input is greater than the voltageV_Thmax. If tripped, a MAX INTERRUPT signal is generated. The MAX INTERRUPT is used to"wake-up" a microprocessor and tell it that there is an object detected at the sensor. Thesignal is prevented from appearing on the MAX INTERRUPT line by gate ANDgate 60 and theSAMPLE signal. The SAMPLE signal only allows the interrupt signal to pass after the circuithas settled completely. As shown in FIG. 2 byOR gate 58, either the X or the Y dimensionmaximum detector circuit may be used to enable the MAX INTERRUPT signal.
• Referring now to FIG. 10, a of linear voltage-to-currentcircuit 36 is shown in schematic form.
• Block 36 in FIG. 2 actually contains one voltage to current converter circuitof FIG. 10 for each output of an integrating charge amplifier.
• In the circuit of FIG. 10, a current mirror comprises diode-connected P-channelMOS transistor 222 having its source connected to voltage source V_DD, and P-channel MOStransistor 224 having its source connected to voltage source V_DD and its gate connected to thegate and drain oftransistor 222. An N-channelMOS input transistor 226 has its drainconnected to the drain of P-channel transistor 222, its gate connected to avoltage input node228, and its source connected to the drain of N-channel bias transistor 230. The source ofN-channel bias transistor 230 is connected to ground and its gate is connected to biasinput232. The drain of P-channel MOS transistor 224 is connected to the gate and drain of diode connected N-channel MOS transistor 234. The source of diode connected N-channel MOStransistor 234 is connected to ground. The common gate and drain connection of diode-connectedN-channel MOS transistor 234 is an N Biascurrent output node 236 and thecommon connection of the gate of P-channel MOS transistor 224 and the drain of P-channelMOS transistor 222 is a P Biascurrent output node 236 of the voltage-to-current-converter.
• To generate a linear transformation N-channelMOS bias transistor 230 is biased init's linear region by setting V_BIAS to be a value which is much greater than the largest valueexpected on thevoltage input node 228. This will guarantee it is always operating in itslinear region. For this invention the voltage to be expected at thevoltage input 228 of thevoltage-to-current converter circuit is typically less than half of the power supply, so itwill operate linearly if V_BIAS is set to the power supply or greater.
• The transconductance of N-channel input transistor 226 is designed to be as large asreasonable. The result is that N-channel input transistor 226 will operate like a followerwith a resistor in it's source, and hence will give a linear change of output current versus alinear change in input voltage.
• The current is sourced by diode-connected P-channel MOS transistor 222 which actsas half of a CMOS P-channel current mirror and provides a reference for PBias Output node236 for the position encoder circuit. The current is mirrored thru P-channel MOStransistor 224 and diode connectedMOS transistor 232 generating a reference at NBiasOutput node 238 for the position encoder circuit.
• A linear transfer function between voltage andcurrent has been selected. Undercertain circumstances, a non-linear transfer function will be desired.
• The linear voltage-to-current converter of FIG. 10 is disclosed in U.S. Patent No.5,096,284 operating in the weak inversion region.. This circuit is used in the stronginversion region in this system, however, for certain applications, the weak inversion mode may be preferred.
• Referring now to FIG. 11, aposition encodercircuit 38 of FIG. 2 is shown in schematic diagram form. The circuits in the X and Ydimensions are identical. Theposition encoder circuit 38 is shown having six inputs,due to its symmetry, it may bearbitrarily expanded.
• As presently preferred,position encoder circuit 38 includes a plurality oftransconductance amplifiers 242-1 through 242-6 connected as followers. The outputs ofall amplifiers 242-1 through 242-6 are connected together to acommon node 244, whichcomprises the output node of the circuit.
• The non-inverting inputs of amplifiers 242-1 through 242-6 are connected to aresistive voltage dividernetwork comprising resistors 246, 248, 250, 252, 254, 256,and 258, shown connected between V_DD and ground.
• Amplifiers 242-1 through 242-3 have P-channel bias transistors and differentialpair inputs due to the input operating range between zero volts and V_DD/2, and amplifiers242-4 through 242-6 have N-channel bias transistors and differential pair inputs due tothe input operating range between V_DD/2 and V_DD. Those of ordinary skill in the art willreadily recognize that amplifiers 242-4 through 242-6 will be configured exactly likeamplifiers 242-1 through 242-3, except that all transistor and supply voltage polaritiesare reversed. The input nodes I_ln1 through I_ln6 (reference numerals 260, 262, 264, 266,268, and 270) of the circuit are connected to the gates of the bias transistors of thetransconductance amplifiers 242-1 through 242-6, respectively. The inputs I_ln1 throughI_ln3 are driven by the PBias output nodes 236 of their respective linear voltage-to-currentconverters and the inputs I_ln4 through I_ln6 are driven by the NBias output nodes 238 oftheir respective linear voltage-to-current converters.
• The position encoder circuit of FIG. 11 will provide a weighted mean (centroid) of the input currents weighted by the voltages on the resistor divider circuit to which theinputs of the amplifiers are connected. If theresistors 246, 248, 250, 252, 254, 256,and 258 are all equal then the result is a circuit which is a linear position encoder, with itsoutput voltage varying between the power supply rails. Because it is a weighted mean, itaverages all current inputs which in turn generates an interpolated output. Thisarrangement affords finer resolution than the voltage spacing of voltage nodes "n" at theinput. This is key to making a dense circuit function. This circuit is an improvement of acircuit described in DeWeerth, Stephen P., Analog VLSI Circuits For Sensorimotor Feedback,Ph.D Thesis. California Institute of Technology, 1991.
• Referring now to FIG. 12, aZ Sum circuit 62 ofFIG. 2 is shown. For purposes of illustration,Z Sum circuit 62 is shown to include fourinputs. Those of ordinary skill in the art will readily understand how to provide additionalinputs.
• The four input sections for the Z Sum circuit illustrated in FIG. 12 each comprisetwo N-channel MOS transistors connected in series. Thus a first input section comprises N-channelMOS input transistor 290, having its drain connected to the drain of P-channelMOSbias transistor 282 and its source connected top the drain of N-channel MOS transistor292. The gate of N-channelMOS input transistor 290 is connected to input node In₁ atreference numeral 294. The gate of N-channelMOS bias transistor 292 is connected tobiasinput node 296.
• A second input section comprises N-channelMOS input transistor 298, having itsdrain connected to the drain of P-channelMOS bias transistor 282 and its source connectedtop the drain of N-channel MOS transistor 300. The gate of N-channelMOS input transistor298 is connected to input node ln₂ atreference numeral 302. The gate of N-channelMOSbias transistor 300 is connected to biasinput node 296.
• A third input section comprises N-channelMOS input transistor 304, having itsdrain connected to the drain of P-channelMOS bias transistor 282 and its source connected top the drain of N-channel MOS transistor 306. The gate of N-channelMOS input transistor304 is connected to input node In₃ atreference numeral 308. The gate of N-channelMOSbias transistor 306 is connected to biasinput node 296.
• A fourth input section comprises N-channelMOS input transistor 310, having itsdrain connected to the drain of P-channelMOS bias transistor 282 and its source connectedtop the drain of N-channel MOS transistor 312. The gate of N-channelMOS input transistor310 is connected to input node ln₄ atreference numeral 314. The gate of N-channelMOSbias transistor 312 is connected to biasinput node 296. The common drain connections of N-channelMOS input transistors 290, 298, 304, and 310 are connected to the gate of P-channelMOS transistor 316.
• The Z sum circuit FIG. 12 is analogous to the Linear voltage-to-current convertercircuit 36 of FIG. 10. However in this case there are multiple circuit sections which havetheir currents all summed together (transistors 290/292, 298/300, 304/306, ...310/312) into the P-channel MOS transistor 282.
• P-channel MOS transistors 282 and 316 form a current mirror. Their sources areconnected to voltage source V_DD and their gates are connected together to the drain P-channelMOS oftransistor 282. The drain of P-channel MOS transistor 316 is connected to thedrain of N-channel MOS transistor 318, which has its source connected to ground. Thecommon connection of the drains ofMOS transistors 316 and 318 forms a voltage outputnode 288 for the circuit.
• MOS transistor 316drives MOS transistor 318 which is operating in its linearregion. The result is a voltage which is proportional to the current fromtransistor 316.Therefore the voltage atvoltage output node 320 is a scaled sum of all the input voltages, andis utilized by the multiplier circuit.
• Referring now to FIG. 13, themultipliercircuit 64 of FIG. 2 is presented in schematic form. P-channel MOS transistors 332 and 334 form a current mirror. N-channel MOS transistor 336 has its drain connected to thedrain of P-channel MOS transistor 332, its gate connected to firstvoltage input node 338,and its source connected to the drain of N-channel MOS transistor 340. The gate of N-channelMOS transistor 340 is connected to secondvoltage input node 342 and its source isconnected to ground. N-channel MOS transistor 344 has its drain connected to the gate anddrain of P-channel MOS transistor 332. The gate of N-channel MOS transistor 344 isconnected to secondvoltage input node 342 and its source is connected to the drain of N-channelMOS transistor 346. The gate of N-channel MOS transistor 346 is connected tofirstvoltage input node 338 and its source is connected to ground. The sources of P-channelMOS transistors 332 and 334 are connected to voltage source V_DD. The drain of P-channelMOS transistor 334 is connected tooutput node 348 and to the drain of N-channel MOStransistor 350 The gate of N-channel MOS transistor 350 is connected to input bias node352.
• The multiplier circuit of FIG. 13 is a symmetrized extension of the multiplierdescribed in U.S. Patent 5,095,284 and is a wide input range, voltage-input, voltage-outputmultiplier circuit. Because of the symmetrical input stage, the multiplier can beoperated both above and below the threshold voltages oftransistors 340 and 346.
• The currents from the twotransistor pairs 336/340 and 344/346 are summed intothe current mirror oftransistors 332 and 334 and appear at the drain oftransistor 334.Transistor 350 is biased to be in its linear region by bias input 352. Therefore, the outputvoltage atoutput node 348 will be proportional to the conductance ofdevice 350 multipliedby the current driven bydevice 334. The bias voltage at input 352 is adjusted to scale therange of Vout values atnode 348 and, once set, is left constant. Thereafter, the outputvoltage is proportional to the current injected fromdevice 334, and hence is proportional tothe product of the two input voltages atinput nodes 338 and 342.
• A position matrix sensing system according to thepresent invention, is now disclosed. The position matrixembodiment of the present invention is a straightforward extension of the finger position system and uses much the same circuitryand basic signal flow. The main differences are in the measurement technique and theamount of information stored. The goal is to provide a matrix of voltages, V(x,y), thatrepresent the proximity of the object to every node (x,y) on the sensor matrix. Instead ofusing this set of voltages to drive position encoders in the X and Y dimensions separately, asin the finger position embodiment, the information is instead sent to the input of a neuralnetwork circuit, which uses this multi-dimensional information to help it make decisionsabout what the input means.
• In the finger position system the driving-point capacitance information is usedfor position detection. However, because the driving-point capacitance looks at the totalcapacitive effect on the node being measured, it is incapable of resolving what is happeningat each X and Y location on the sensor.
• The position matrix embodiment of the present invention has the capability ofresolving the capacitive effect at each X and Y location of the sensor. In this embodiment thedriving-point capacitance circuit is only used to inject charge into the X matrix node. Thetrans-capacitance (i.e, the capacitance between a selected X node and a selected Y node in thesensor matrix) causes some of that charge to in turn be injected into a Y node. This injectedcharge is measured by the charge-sensitive amplifier connected to the Y node, thus forminga receiving-point capacitance circuit.
• Referring now to FIG. 14, a presently preferred combination driving-pointcapacitance circuit and receiving-point capacitance circuit is shown in schematic diagramform. A representative X node X_(n) atreference numeral 14 and a selected Y node Y_(n) atreference numeral 18, are shown each having a self capacitance C_X and C_Y, respectively.Transcapacitance between nodes X_(n) Y_(n) is represented by capacitor C_XY.
• A driving-point capacitance measurement is made of row line X_(n) by a circuitwhich as shown, may be one of the integrating charge amplifier circuits of either FIG. 6a or FIG. 7a, equipped with switches to zero out the matrix prior to injecting charge onto thematrix. The output of this circuit need not be used for anything. After the driving-pointmeasurement has been made for a particular X line, charge is injected into all of the Yreceiving-point impedance measuring circuits (the integrating charge amplifier). If all Youtputs are monitored simultaneously then for one X node, a profile of all the trans-capacitiveeffects at all the Y nodes that cross it will be created as a set of voltages V(x,1),V(x,2), ... V(x,m) that are a profile of the object (or objects) proximity on that X node.This sequence is done for every X node in the matrix resulting in a complete matrix ofvoltages whose values are proportional to the proximity of nearby objects.
• As shown in FIG. 14, the receiving-point circuit can be an integrating chargeamplifier identical to that used in the driving-point circuit. However, there are threedifferences in the way that the Y receiving circuit is used. First, the V_STEP node is left at aconstant voltage, V_LOW, by disabling the STEP input such that switch 112 (FIGS. 6a and 7a)is always on and switch 110 is always off. Second, the Y receiving circuits are notindividually selected, but instead are all selected simultaneously. Hence, there is only one Yselect line for all Y inputs. Third, the RESET1 line is not used in the receiving-pointcircuit, and switch 106 (FIGS. 6a and 7a) is always off. These circuits will give an outputvoltage which is proportional to the amount of charge injected onto the Y node. Since thetrans-capacitance varies with the proximity of an object, the voltage is proportional to theproximity of an object.
• The position matrix embodiment requires storage of all of the output signals from thereceiving-point impedance circuits in both the X and Y directions. This may be aaccomplished by providing a sample/hold circuit matrix or a charge-coupled device (CCD)array as is known in the art. The structure of an illustrative sample/hold matrix isdisclosed in FIG. 15, which shows a portion of a sample/hold array 350 suitable for use inthe present invention. Thearray 350 is arranged as a plurality of rows and columns ofindividual sample/hold circuits. The number of rows is equal to the number of Y positions in the sensor matrix and the number of columns is equal to the number of X positions in thesensor matrix. For example, a 15x15 sensor matrix requires 15 rows and 15 columns.All of the voltage data inputs in a row are wired together and the sample/hold control inputsof all the sample/hold circuits in a column are connected to one of the select signals (FIG. 5)such that the select inputs from the X direction drive the sample/hold circuits in the matrixstoring the Y data. Those of ordinary skill in the art will note that the roles of X and Y maybe reversed.
• Referring now to FIGS. 16a and 16b two possible embodiments of the positionmatrix system of the present invention are illustrated. In the simplest embodiment, thematrix of voltage information is sent to a computer which processes the data. This simpleembodiment is shown in FIG. 16a. The approach of FIG. 16a is feasible if the input profileshapes change no faster than about every millisecond.
• In the embodiment of position matrix system (reference numeral 360) illustratedin FIG. 16a, the X dimension integrating charge amplifiers (reference numerals 362-1through 362-n) are used to perform the driving-point capacitance measurements disclosedherein for all X lines in the matrix. For each X line driven, the Y dimension integratingcharge amplifiers (reference numerals 364-1 through 364-n) are used to perform thereceiving-point capacitance measurements disclosed herein. The sample/hold matrix ofFIG. 15 is not required. Instead, one sample/hold amplifier (366-1 through 366-n) isrequired per Y output to sample the output voltages from the Y dimension integrating chargeamplifiers 364-1 through 364-n at the end of each X select period.
• These outputs are digitized by A/D converters 368-1 through 368-n respectively.In the illustrative embodiment of FIG. 16a, the digital resolution will be of the order of 8bits. The 8-bit data words from each A/D converter 368-1 through 368-n aremultiplexed down to a bus width that is more easily handled by a computer bymultiplexer370.Multiplexer 370 is a conventional multiplexer device known to those of ordinary skillin the art. The output ofmultiplexer 370 is presented to a computer which may then process the data in an appropriate manner.
• A second illustrative embodiment of position matrix system (reference numeral380) is shown in FIG. 16b. As in the embodiment of FIG. 16a, the X dimension integratingcharge amplifiers (reference numerals 362-1 through 362-n) are used to perform thedriving-point capacitance measurements disclosed herein for all X lines in the matrix. Foreach X line driven, the Y dimension integrating charge amplifiers (reference numerals 364-1through 364-n) are used to perform the receiving-point capacitance measurementsdisclosed herein.
• The sample/hold array 350 of FIG. 15 is employed and describes the extraction ofderivation of the n by m array of voltages applications (V(1,1) to V(n,m)). These voltagesare then sent to the input of a single or multiple levelneural network 382. Each inputneuron will have to have n*m input nodes to support the full size of the sensor array voltagematrix V(n,m).
• An example of a single level neuralnetwork array circuitry 382, including the pre-processingand sample/hold circuitry 350 required, is disclosed in U.S. Patent No.5,083,044. This circuit could be used as is or could be replicated and built into two orthree layers giving more power and functionality. These variations and many others arewell described in the literature, such as Hertz, Krogh, and Palmer, A Lecture Notes Volumein the Santa Fe Institute Studies in the Sciences of Complexity, Allen M. Wilde, Publ.(1991).
• The typical application of this embodiment would require a neural network orcomputer program that at the primitive level can discern objects (finger touch points).This is the basic symbol, the presence of a finger, that is manipulated. From that pointthere may be predetermined gestures that the system looks for which indicate action.Motion may also need to be detected. A possible solution for this may be found in Mead,Analog VLSI and Neural Systems, Addison-Wesley (1989),Chapter 14, Optical MotionSensor.
• Because of the unique physical features of the present invention, there are severalergonomically interesting applications that were not previously possible. Presently aMouse or Trackball is not physically convenient to use on portable computers. The presentinvention provides a very convenient and easy-to-use cursor position solution that replacesthose devices.
• In mouse-type applications, the sensor of the present invention may be placed in aconvenient location, e.g., below the "space bar" key in a portable computer. When placed inthis location, the thumb of the user may be ysed as the position pointer on the sensor tocontrol the cursor position on the computer screen. The cursor may then be moved withoutthe need for the user's fingers to leave the keyboard. Ergonomically, this is similar to theconcept of the Macintosh Power Book with it's trackball, however the present inventionprovides a significant advantage in size over the track ball. Extensions of this basic idea arepossible in that two sensors could be placed below the "space bar" key for even more featurecontrol.
• The computer display with it's cursor feedback is one small example of a verygeneral area of application where a display could be a field of lights or LED's, a LCD display,or a CRT. Examples include touch controls on laboratory equipment where presentequipment uses a knob/button/touch screen combination. Because of the articulating abilityof this interface, one or more of those inputs could be combined into one of our inputs.
• Consumer Electronic Equipment (stereos, graphic equalizers, mixers) applicationsoften utilize significant front panel surface area for slide potentiometers because variablecontrol is needed. The present invention can provide such control in one small touch padlocation. As Electronic Home Systems become more common, denser and more powerfulhuman interface is needed. The sensor technology of the present invention permits a verydense control panel. Hand Held TV/VCR/Stereo controls could be ergonomically formed andallow for more powerful features if this sensor technology is used.
• The sensor of the present invention can be conformed to any surface and can be made to detect multiple touching points, making possible a more powerful joystick. The uniquepressure detection ability of the sensor technology of the present invention is also key tothis application. Computer games, "remote" controls (hobby electronics, planes), andmachine tool controls are a few examples of applications which would benefit from thesensor technology of the present invention.
• Musical keyboards (synthesizers, electric pianos) require velocity sensitive keyswhich can be provided by the pressure sensing ability of this sensor. There are also pitchbending controls, and other slide switches that could be replaced with this technology. Aneven more unique application comprises a musical instrument that creates notes as afunction of the position and pressure of the hands and fingers in a very articulate 3-dinterface.
• The sensor technology of the present invention can best detect any conductingmaterial pressing against it. By adding a conductive foam material on top of the sensor thesensor of the present invention may also Indirectly detect pressure from any object beinghandled, regardless of its electrical conductivity.
• Because of the amount of information available from this sensor it will serve verywell as an input device to virtual reality machines. It is easy to envision a construction thatallows position-monitoring in three dimensions and some degree of response (pressure) toactions.
• While embodiments and applications of this invention have been shown and described,it would be apparent to those skilled in the art that many more modifications than mentionedabove are possible within the scopeof the appended claims.

Claims (9)

1. An object proximity sensor, including:

   a plurality of spaced-apart conductive sensor pads (22)disposed in a matrix of rows and columns on a first face (16)of a substrate (12);

   a plurality of row conductive lines (18) disposed on saidsubstrate and generally aligned with said rows, each of saidrow conductive lines electrically contacting certain ones ofsaid sensor pads in one of said rows; and

   a plurality of column conductive lines (14) disposed onsaid substrate, insulated from said row conductive lines andgenerally aligned with said columns, each of said columnconductive lines electrically contacting the ones of saidsensor pads in one of said columns which are not contacted bysaid row conductive lines; characterised by:

   means for applying a step voltage to each of said rowconductive lines one at a time to perform a driving pointcapacitance measurement, charge being injected into each ofsaid column conductive lines in response to said stepvoltage; and

   sensing means for sensing said charge on each of saidcolumn conductive lines simultaneously and for producing aset of object-sensed electrical signals related thereto.
2. The object proximity sensor of claim 1, furtherincluding:

   means for sensing a no-object-present capacitance of eachof said row conductive lines and sensing a no-object-presentcapacitance of each of said column conductive lines, for producing a set of no-object-present electrical signals relatedthereto; and

   means for subtracting said set of no-object-presentelectrical signals from said set of object-sensed electricalsignals.
3. The object proximity sensor of claim 2 wherein said meansfor producing a set of no-object-present electrical signalsrelated to said no-object-present capacitance of each of saidrow conductive lines and said no-object-present capacitance ofeach of said column conductive lines (14) comprises means forcomputing weighted minima of said object-sensed electricalsignals thereof.
4. The object proximity sensor of any one of the precedingclaims wherein said row conductive lines (18) are disposed onsaid first face of said substrate and said column conductivelines (14) are disposed on a second face of said substrateopposite said first face.
5. An object proximity sensor according to any one of thepreceding claims, wherein the sensor pads (22) in odd numberedrows are disposed along a first set of column positions and thesensor pads in even numbered rows are disposed at a second setof column positions offset from said first set of columnpositions such that said sensor pads form a repetitive diamondpattern;

   said row conductive lines (18) electrically contact everyone of said sensor pads (22) in one of said odd-numbered rows; and

   said column conductive lines (14) are generally alignedwith said offset column positions, each electrically contactsthrough said substrate the sensor pads (22) in one of saidoffset column positions.
6. An object proximity sensor, according to any one ofclaims 1 to 4 wherein:

   the sensor pads (22) in odd numbered rows are disposedalong a first set of column positions and the sensor pads ineven numbered rows are disposed at a second set of columnpositions offset from said first set of column positions andsaid rows are spaced apart such that said sensor pads form aclosely packet repetitive pattern wherein each pad is not incontact with adjoining pads;

   each of said row conductive lines (18) electricallycontacts every one of said sensor pads (22) in one of said odd-numberedrows;

   said column conductive lines (14) are generally alignedwith said offset column positions and each of said columnconductive lines electrically contacts the ones of said sensorpads (22) in one of said offset column positions.
7. An object proximity sensor according to any one of thepreceding claims wherein said sensing means comprises:

   a plurality of sense amplifiers (CA₁-CA₆), each of saidsense amplifiers having an input connected to a different oneof said column conductive lines and an output;

   a plurality of sample/hold circuits (S/H), each of saidsample/hold circuits having a data input connected to the output of a different one of said sense amplifiers, a controlinput, and an output; and

   means for simultaneously placing a sample signal on thecontrol inputs of all of said sample/hold circuits in responseto said step voltage placed onto each of said row conductivelines to produce a set of object-sensed electrical signalsrelated thereto at the outputs of said sample/hold circuits.
8. A method for sensing the proximity of an object,including the steps of:

   providing a sensing plane (10) including a matrix ofconductive lines arranged as a plurality of rows and columns ofspaced apart row and column conductive lines (14,18), saidsensing plane including an inherent capacitance betweenthe various ones of said row and column conductive lines, saidcapacitance varying with the proximity of an object to said rowand column conductive lines; characterised by:

   placing a step voltage onto each of said row conductivelines one at a time to perform a driving capacitancemeasurement, and sensing the charge injectedonto each of said column conductive lines simultaneously in response to saidstep voltage;

   producing a set of object-sensed electrical signalsrelated to said charge injected onto each of said columnconductive lines as a result of placing said step voltage oneach of said row conductive lines.
9. The method of claim 8, further including the step ofsubtracting a set of electrical signals obtained when no object is proximate said sensing plane (10) from said set of object-sensedoptical signals to form a set of row and a set of columnelectrical signals defining a profile of the proximity of saidobject in both said row and column dimensions.

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