Disclosure of utility model
In order to solve the above technical problems, according to an aspect of the present disclosure, there is provided a hybrid package structure including two or more chips having at least two package structures, wherein the two or more chips include wire-bonded chips; a substrate having the two or more chips mounted on a surface thereof, wherein each wire-bonded chip is electrically connected to the substrate through a metal wire and individually molded; and a heat dissipation cover having a shape of a lower surface corresponding to a mounting height of the two or more chips, the lower surface being fixed to the two or more chips by a heat conductive adhesive, and an edge of the heat dissipation cover being fixed to the substrate.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the heat dissipation cover is integrally formed and the lower surface of the heat dissipation cover is in a concave-convex shape.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the wire bonding chip is individually encapsulated by the encapsulation body and isolated from other chips, the lower surface of the heat dissipation cover is connected to the upper surface of the encapsulation body of the wire bonding chip through heat conduction glue, and a gas medium is arranged between the two or more chips.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the two or more chips include flip chips connected with the substrate through metal bumps, an underfill material is filled between gaps of the metal bumps, and a lower surface of the heat dissipation cover is connected to an upper surface of the flip chips through conductive adhesive.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the mounting height of the flip chip is higher than the height of the plastic package body of the wire bonding chip, and the thickness of the opposite part of the heat dissipation cover fixed with the wire bonding chip is greater than the thickness of the opposite part fixed with the flip chip.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the external shape of the plastic packaging body is determined according to the shape of the cavity mold, and the material of the plastic packaging body is epoxy resin, silica gel or polyimide.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the edge of the heat dissipation cover is fixed to the substrate by glue, and the heat conduction glue is TIM glue.
According to the hybrid packaging structure of the embodiment of the disclosure, optionally, the thickness of the plastic package body is the sum of the height of the chip, the height of the wire arc and twice the particle size of the plastic package material.
Compared with the prior art, the utility model has at least the following advantages: the mixed packaging structure in the embodiment of the utility model can place chips with different packaging modes in one chip product, and the heat dissipation path is reduced, the heat dissipation performance is improved, the heat dissipation problem of the upper surface of the chip is solved, and meanwhile, the electrical performance is also considered by independently packaging the wire bonding chips and using the heat dissipation cover with the concave-convex shape of the lower surface matched with the thickness of each chip (or after the chip is packaged).
Not all of the advantages described above need be achieved at the same time in practicing any one of the devices of the present disclosure. Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the disclosure. The objects and advantages of the disclosed embodiments may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. Various embodiments may be combined with one another to form further embodiments not shown in the following description. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a" or "an" and the like do not necessarily denote a limitation of quantity. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
Fig. 1 is a schematic diagram of a structure for mounting a wafer on a substrate in different packaging modes according to one embodiment of the present disclosure. The chips in the hybrid package are two or more chips having at least two different package structures.
As in the embodiment shown in fig. 1, three chips in two package forms, namely a flip chip 1 in the middle and wire-bonded chips 8 on both sides, are mounted on a substrate 10.
The wire bond chip 8 is fixed to the substrate 10 by an adhesive material, for example, by an adhesive sheet 9. Next, the wire-bonded chip 8 is electrically connected to the substrate by the wire 7 through a wire bonding process. For individual plastic packaging of the wire-bonded chip, the wire-bonded chip 8 and the metal wires 7 may be wrapped inside the plastic package 4, for example, by injecting a plastic molding material into a mold cavity using a mold, isolating the chip from the outside, protecting the metal wires on the lead frame. The plastic package material can be made of epoxy resin, silica gel, polyimide and other materials, and is selected according to the technological requirements. The thickness of the plastic package body 4 can be the common thickness of the independent package of the wire bonding chip, the thinner the thickness of the plastic package body is, the better the thinner the thickness of the plastic package body is on the premise of meeting the technological requirement, and the thickness of the chip after the plastic package can be the sum of the thickness of the chip, the wire arc height and the double size of plastic package material particles. Too thick plastic package body can influence the heat dissipation of chip.
In this embodiment, the plastic package body is not filled in the entire heat dissipation cover, but rather the wire-bonded chip is individually plastic-packaged.
The flip chip 1 is electrically connected to the substrate 10 by flip chip connecting metal bumps or solder balls (bumps) 2 to the surface of the substrate 10. The flip chip 1 is packaged by filling the gaps of the metal bumps with an Underfill material (Underfill) 3 between the flip chip 1 and the surface of the substrate 10. The underfill material may be an epoxy or other suitable type of underfill material. The upper portion of the flip chip is not encapsulated by epoxy or other filler material.
For example, chips of two package structures may be mounted according to the following operation steps: firstly, mounting a wire bonding chip on a substrate, wherein the wire bonding chip is fixed on the substrate, and then the wire bonding chip is tightly welded with a bonding pad of the substrate in a pressure, heat or ultrasonic mode; the metal convex points of the flip chip are welded to the substrate, and filling of the bottom gaps can be performed in a dispensing mode; then, the lead-bonded chip is subjected to plastic package through a customized cavity die; finally, a custom heat-dissipating cover is attached to the upper surface of the chip mounting structure (see fig. 2). The height of the chip mounted on the substrate before the heat dissipating cover is mounted is hereinafter referred to as mounting height, wherein the mounting height of the wire-bonded chip is the height of the plastic package, and the height of the flip chip is the height from the upper surface of the flip chip to the substrate. The specific structure of the heat dissipating cover is described below.
In the present embodiment, the package form of the hybrid packaged chip is not limited to the wire bond chip and the flip chip, and may include, for example, a TAB (tape automated bonding) packaged chip, which may also be packaged separately. In general, the height (mounting height) of the wire-bonded chip after plastic packaging is relatively low, and thus the heat dissipation path from the heat dissipation cover to the substrate is long. In order to improve the heat dissipation path of the surface of the wire-bonded chip, the lower surface of the heat dissipation cover may be designed to be suitable for the shape of the mounting height of each chip in the hybrid package, for example, the lower surface of the heat dissipation cover has a concave-convex shape for chips with different mounting heights.
Fig. 2 shows a schematic diagram of a package structure according to one embodiment of the present disclosure. The upper surface of the heat dissipation cover 6 is a conventional surface, and may be planar, for example. The thickness of the heat dissipation cover 6 is matched with the mounting height of the packaged chip, and the lower surface may be formed in a concave-convex shape. The lower surface of the heat radiation cover 6 is fixed with each chip through heat conducting glue, and the heat radiation cover is attached and installed. The edge of the heat-dissipating cover 6 is fixed to the substrate 10 by glue 5, isolating the chip inside thereof from the outside. The heat-conducting glue may be, for example, a TIM glue, and glue 5 may also be a TIM glue. Since the wire-bonded chip is packaged alone, a gaseous medium, such as air, exists between the heat spreader lid 6 and the chip after the chip is mounted.
More specifically, in a hybrid package structure, in general, a wire bond chip alone to be packaged is low in height and a flip chip is high in height. Other package type chips may be mounted therein, and there may be a difference in mounting height of the chips after mounting. For chips with different mounting heights, if the lower surface of the heat dissipation cover is a plane, a heat dissipation path between the chip with relatively lower temperature after mounting and the heat dissipation cover is longer, and the value of the crusting thermal resistance Jc is larger. In order to reduce Jc value in the heat dissipation path, a heat dissipation cover matched with the mounting height of the chip can be designed, and the shape of the lower surface of the heat dissipation cover can be concave-convex according to the mounting height of each chip, so that the heat dissipation path of the chip with lower mounting height is reduced by connecting the heat conduction glue to the top of the mounting structure of each chip, the heat dissipation performance of each chip in the mixed package is improved, and especially the heat dissipation performance of the surface of the wire bonding chip is improved.
In the present utility model, the heat dissipating cover may be a custom heat dissipating cover corresponding to the internal chip thereof, for example, a special-shaped heat dissipating cover having a concave-convex shape on the lower surface thereof, and may be an integrally molded structure. The interior of the heat dissipating cover is not filled with a molding compound, such as epoxy. The thermal conductivity of the plastic package material is generally lower (for example, about 0.7-1W/m.k), while the thermal conductivity of the metal heat dissipation cover is higher (for example, the thermal conductivity of the metal copper is about 387.7W/m.k), the heat dissipation path can be reduced by attaching the conductive adhesive to the lower surface of the heat dissipation cover for the chip with lower mounting height, and the heat of the chip can be directly released through the upper heat dissipation cover, so that the heat dissipation effect advantage of the package scheme is obvious. The above-mentioned mode has solved the problem of the upper surface heat dissipation of the chip, especially the upper surface heat dissipation problem of the wire bonding chip.
In addition, because the cavity packaging structure which is not fully filled with the plastic packaging material is adopted, the medium in the cavity can be air, the dielectric constant is 1, and is far smaller than that of the plastic packaging material (the dielectric constant of epoxy resin which is commonly used as the plastic packaging material is about 4), the scheme of independently packaging the chip in the cavity is less in loss, better in high-frequency performance and better in internal transmission and electric performance of the System In Package (SIP), so that the scheme of considering both electric performance and heat dissipation is realized.
The foregoing is merely exemplary embodiments of the present disclosure and is not intended to limit the scope of the disclosure, which is defined by the appended claims.