CN220066867U

Movatterモバイル変換

Info

Publication number: CN220066867U
Application number: CN202321057857.8U
Authority: CN
Inventors: 崔英杰; 邓兴培; 孙浩源
Original assignee: Shijiazhuang Zerun Technology Co ltd
Current assignee: Shijiazhuang Zerun Technology Co ltd
Priority date: 2023-05-06
Filing date: 2023-05-06
Publication date: 2023-11-21
Anticipated expiration: 2033-05-06

Abstract

The utility model discloses a low-loss power supply circuit with overvoltage, undervoltage, overcurrent protection and turn-off functions, which comprises a power supply VCC, an NMOS switching circuit and a current detection resistor R1, wherein the power supply VCC sequentially passes through the NMOS switching circuit and the current detection resistor R1 and then outputs a power supply Vout, and the control end of the NMOS switching circuit is respectively connected with the output end of a logic AND gate circuit and the output end of an NMOS drive circuit and jointly controls the on or off of the NMOS switching circuit. The utility model adopts the NMOS switching tube, has low power consumption, simultaneously introduces the input over-voltage and under-voltage signals and outputs the over-current signals to carry out logic control on the NMOS switching tube, improves the reliability of the circuit, introduces the high-priority turn-off signal to control the working state of the NMOS switching tube, is convenient for carrying out manual or automatic control on the power supply state, and has the advantages of greatly reducing the cost and high cost performance due to the adoption of discrete elements in the whole circuit.

Description

Low-loss power supply circuit with overvoltage-undervoltage and overcurrent protection and turn-off functions

Technical Field

The utility model belongs to the technical field of electronic circuits, and particularly relates to a low-loss power supply circuit with overvoltage-undervoltage and overcurrent protection and turn-off functions.

Background

In electronic circuit design, a direct current power supply is often used, and reliability, convenience and controllability of the power supply are always important to people. At present, although the direct current power supply circuit in the market has certain controllability, the direct current power supply circuit has the characteristics of poor controllability, high power consumption of the power supply circuit and the like. Such as: in the power supply circuit, the problems of overvoltage, undervoltage and overcurrent of the power supply are generally required to be solved, but in the current design, the circuit design is unreasonable, devices are easy to damage, and most of the faults are required to be considered to be recovered after the faults disappear. For some cases where protection of the load circuit of the subsequent stage is required, it is also difficult to realize controllable operation.

In the electronic component, the MOS switch tube has quite low conduction voltage drop compared with the diode, which is usually a few tenths of the conduction voltage drop of the diode, and is often used in some application scenes with large conduction current, so that the problems of high self-power consumption and large heat productivity in most application scenes are solved, and therefore, in the design of an electronic circuit, the MOS switch tube is used as a control switch, and the self-loss of a power supply circuit can be greatly reduced.

Disclosure of Invention

The utility model aims to solve the technical problem of providing a low-loss power supply circuit with overvoltage and undervoltage and overcurrent protection and turn-off functions, and the low-loss power supply circuit has the characteristics of high reliability, high cost performance and convenient control.

In order to solve the problems, the utility model adopts the following technical scheme:

the low-loss power supply circuit with the over-voltage and under-voltage protection and turn-off functions comprises a main power supply circuit, wherein the main power supply circuit comprises a power supply VCC, an NMOS switch circuit and a current detection resistor R1, the power supply VCC sequentially outputs a power supply Vout after passing through the NMOS switch circuit and the current detection resistor R1, a control end of the NMOS switch circuit is respectively connected with an output end of a logic AND gate circuit and an output end of an NMOS drive circuit, the output of the NMOS drive circuit and the output of the logic AND gate circuit are subjected to logic operation and jointly control the on-off of the NMOS switch circuit, an input end of the logic AND gate circuit is respectively connected with a turn-off signal Sut down, an output end of an over-current detection circuit and an output end of the over-voltage and under-voltage detection circuit, and an over-voltage and under-voltage signal output by the over-voltage detection circuit are output to a control end of the NMOS switch circuit after being subjected to logic AND gate circuit operation.

Further, the NMOS drive circuit comprises a boost DC-DC circuit and a voltage stabilizing circuit, wherein the input end of the boost DC-DC circuit is connected with a power supply VCC, the output end of the boost DC-DC circuit is connected with the input end of the voltage stabilizing circuit, and the power supply VCC is boosted by the boost DC-DC circuit and then is stabilized by the voltage stabilizing circuit and then is output to the control end of the NMOS switch circuit.

Still further, the boost DC-DC circuit comprises a square wave generating circuit, a charge pump boost circuit and a resistance-capacitance filter circuit, wherein the output end of the square wave generating circuit is connected with the input end of the charge pump boost circuit, the output end of the charge pump boost circuit is connected with the input end of the resistance-capacitance filter circuit, the output end of the resistance-capacitance filter circuit is connected with the input end of the voltage stabilizing circuit, the power supply VCC is connected with the square wave generating circuit, the charge pump boost circuit and the resistance-capacitance filter circuit, a working power supply is provided for the square wave generating circuit, a working power supply is provided for the charge pump boost circuit, and a zero reference potential is provided for the resistance-capacitance filter circuit.

Preferably, the charge pump boost circuit includes a capacitor C2, a capacitor C4 and a high-speed switching diode D3, where one end of the capacitor C4 is connected to an output end of the square wave generating circuit, the other end of the capacitor C4 is connected to a two-diode series node of the high-speed switching diode D3, an input end of the high-speed switching diode D3 is connected to a power VCC, an output end of the high-speed switching diode D3 is connected to an input end of the rc filter circuit, and the capacitor C2 is connected in parallel between an input end and an output end of the high-speed switching diode D1, and the model of the high-speed switching diode D3 is BAV99.

Preferably, the rc filter circuit includes a resistor R2 and a capacitor C3, where the resistor R2 and the capacitor C3 are connected in series and then connected between the output end of the charge pump boost circuit and the power VCC, and one end of the capacitor C3 is connected to the power VCC.

Preferably, the overcurrent detection circuit comprises resistors R22 to R28, an operational amplifier IC4A and an operational amplifier IC4B, wherein the non-inverting input end of the operational amplifier IC4A is connected with one end of a current detection resistor R1 through a resistor R23 and is grounded through a resistor R22, the inverting input end of the operational amplifier IC4A is connected with the other end of the current detection resistor R1 through a resistor R24, and a resistor R25 is connected between the output end and the inverting input end of the operational amplifier IC4A in parallel; the non-inverting input end of the operational amplifier IC4B is connected with the output end of the operational amplifier IC4A through a resistor R27, the inverting input end of the operational amplifier IC4B is connected with the cathode of the voltage reference chip IC3 through a resistor R26, and a resistor R28 is connected between the output end and the non-inverting input end of the operational amplifier IC4B in parallel.

Preferably, the logic AND gate circuit comprises resistors R10-R11, diodes D4-D7 and a triode Q1, wherein the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the control end of the NMOS switch circuit, meanwhile, the collector of the triode Q1 is connected with a shutdown signal Sout down through the diode D4, the base of the triode Q1 is connected with the cathodes of the diodes D5-D7 through the resistor R10, the anodes of the diodes D5-D7 are respectively connected with the output end of the undervoltage detection circuit and the output end of the overcurrent detection circuit, and the resistor R11 is connected between the base and the emitter of the triode Q1 in parallel.

Preferably, the NMOS switching circuit is composed of two NMOS switching tubes D1 and D2 connected back-to-back, where the drain electrode of the NMOS switching tube D1 is connected to the power VCC, the source electrode of the NMOS switching tube D1 is connected to the source electrode of the NMOS switching tube D2, the drain electrode of the NMOS switching tube D2 is connected to one end of the current detection resistor R1, and the gates of the NMOS switching tube D1 and the NMOS switching tube D2 are connected to each other and then connected to the output end of the logic and gate circuit and the output end of the voltage stabilizing circuit.

The beneficial effects of adopting above-mentioned technical scheme to produce lie in:

the utility model utilizes the characteristic of low power consumption of the NMOS switching tube, reduces the consumption of a direct current power supply circuit, simultaneously introduces the input over-voltage and under-voltage signals and outputs the over-current signals to carry out logic control on the NMOS switching tube, improves the reliability of the circuit, introduces the high-priority turn-off signal to control the working state of the NMOS switching tube, is convenient for carrying out manual or automatic control on the power supply state, and has the advantages of greatly reducing the cost and high cost performance by adopting discrete elements in the whole circuit.

Drawings

FIG. 1 is a schematic block diagram of a low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to the present utility model;

fig. 2 is a schematic diagram of a low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to the present utility model.

Detailed Description

In order to make the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described below with reference to specific embodiments of the present utility model and corresponding drawings. It is apparent that the described embodiments of the utility model are only some, but not all embodiments of the utility model. Accordingly, the following detailed description of the embodiments is not intended to limit the scope of the utility model, but is to be construed as providing those skilled in the art with the benefit of the teachings presented herein; all other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.

As shown in fig. 1 and 2, the utility model comprises a main power supply circuit, the main power supply circuit comprises a power supply VCC, an NMOS switch circuit 7 and a current detection resistor R1, the power supply VCC outputs a power supply Vout after passing through the NMOS switch circuit 7 and the current detection resistor R1 in sequence, the control end of the NMOS switch circuit 7 is respectively connected with the output end of a logic and gate circuit 6 and the output end of an NMOS drive circuit, the output of the NMOS drive circuit and the output of the logic and gate circuit 6 are subjected to logic operation to jointly control the on/off of the NMOS switch circuit 7, the input end of the logic and gate circuit 6 is respectively connected with a turn-off signal shutdown, the output end of an overcurrent detection circuit 5 and the output end of an overvoltage and undervoltage detection circuit 4, and the overcurrent and undervoltage signals output by the turn-off signal shutdown, the overcurrent detection circuit 5 and the overvoltage and undervoltage detection circuit 4 are output to the control end of the NMOS switch circuit 7 after being operated by the logic and gate circuit 6.

In order to drive the NMOS switching circuit 7, a voltage boosting is required by using a power supply VCC to obtain a stable NMOS switching transistor driving voltage, so that the NMOS driving circuit includes a boost DC-DC circuit and a voltage stabilizing circuit, an input end of the boost DC-DC circuit is connected to the power supply VCC, an output end of the boost DC-DC circuit is connected to an input end of the voltage stabilizing circuit, and the power supply VCC is boosted by the boost DC-DC circuit and then stabilized by the voltage stabilizing circuit and then output to a control end of the NMOS switching circuit.

As a specific embodiment of the present utility model, the boost DC-DC circuit includes a square wave generating circuit 1, a charge pump boost circuit 2, and a rc filter circuit 3, where an output end of the square wave generating circuit 1 is connected to an input end of the charge pump boost circuit 2, an output end of the charge pump boost circuit 2 is connected to an input end of the rc filter circuit 3, an output end of the rc filter circuit 3 is connected to an input end of the voltage stabilizing circuit, a power VCC is connected to the square wave generating circuit 1, the charge pump boost circuit 2, and the rc filter circuit 3, and provides an operating power for the square wave generating circuit 1, and provides an operating power for the charge pump boost circuit 2, and provides a zero reference potential for the rc filter circuit 3.

The charge pump boost circuit comprises a capacitor C2, a capacitor C4 and a high-speed switch diode D3, wherein one end of the capacitor C4 is connected with the output end of the square wave generating circuit, the other end of the capacitor C4 is connected with a two-diode series node of the high-speed switch diode D3, the input end of the high-speed switch diode D3 is connected with a power supply VCC, the output end of the high-speed switch diode D3 is connected with the input end of the resistance-capacitance filter circuit, the capacitor C2 is connected between the input end and the output end of the high-speed switch diode D1 in parallel, and the model of the high-speed switch diode D3 is BAV99.

The resistance-capacitance filter circuit comprises a resistor R2 and a capacitor C3, wherein the resistor R2 and the capacitor C3 are connected in series and then connected between the output end of the charge pump booster circuit and a power supply VCC, and one end of the capacitor C3 is connected with the power supply VCC.

The overcurrent detection circuit comprises resistors R22-R28, an operational amplifier IC4A and an operational amplifier IC4B, wherein the non-inverting input end of the operational amplifier IC4A is connected with one end of a current detection resistor R1 through a resistor R23 and is grounded through a resistor R22, the inverting input end of the operational amplifier IC4A is connected with the other end of the current detection resistor R1 through a resistor R24, and a resistor R25 is connected between the output end and the inverting input end of the operational amplifier IC4A in parallel; the non-inverting input end of the operational amplifier IC4B is connected with the output end of the operational amplifier IC4A through a resistor R27, the inverting input end of the operational amplifier IC4B is connected with the cathode of the voltage reference chip IC3 through a resistor R26, and a resistor R28 is connected between the output end and the non-inverting input end of the operational amplifier IC4B in parallel.

The logic AND circuit comprises resistors R10-R11, diodes D4-D7 and a triode Q1, wherein the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the control end of the NMOS switching circuit, meanwhile, the collector of the triode Q1 is connected with a shutdown signal Sut down through the diode D4, the base of the triode Q1 is connected with the cathodes of the diodes D5-D7 through a resistor R10, the anodes of the diodes D5-D7 are respectively connected with the output end of the undervoltage detection circuit and the output end of the overcurrent detection circuit, and the resistor R11 is connected between the base and the emitter of the triode Q1 in parallel.

The NMOS switching circuit is composed of two NMOS switching tubes D1 and D2 which are connected back to back, wherein the drain electrode of the NMOS switching tube D1 is connected with a power supply VCC, the source electrode of the NMOS switching tube D1 is connected with the source electrode of the NMOS switching tube D2, the drain electrode of the NMOS switching tube D2 is connected with one end of a current detection resistor R1, and the grid electrodes of the NMOS switching tube D1 and the NMOS switching tube D2 are connected with the output end of the logic AND circuit and the output end of the voltage stabilizing circuit.

Description of working principle:

the utility model relates to a direct current low-loss power supply circuit with input overvoltage, undervoltage detection and output overcurrent detection and a shutdown function.

The square wave generating circuit 1 converts a power supply VCC into a square wave signal, realizes voltage doubling and boosting through the charge pump boosting circuit 2, filters through the resistance-capacitance filter circuit 3, stabilizes voltage through the voltage stabilizing circuit and outputs the voltage, thus forming a high-voltage driving power supply (the reference zero potential is the power supply VCC).

The core of the main power supply circuit is an NMOS switching circuit 7, which consists of two NMOS switching tubes D1 and D2 back to back, wherein a resistor R1 is a current sampling resistor in the main power supply circuit, and a high-voltage driving power supply is connected with the grid electrodes of the two NMOS switching tubes as driving signals.

The driving signals of the two NMOS switching tubes further comprise signals from a logic AND gate circuit 6, the logic AND gate circuit 6 carries out AND logic operation on the two signals from the over-voltage and under-voltage detection circuits and the signal from the over-current detection circuit, and the on state of the triode Q1 is controlled according to the logic operation result, so that the on-off state of the two NMOS switching tubes is controlled.

The logic and circuit 6 further comprises a shutdown signal, which is connected to the gates of the two NMOS switching tubes through a diode D4 and has a higher priority than the over-voltage signal, the under-voltage signal and the over-current signal, when the shutdown signal is shorted to the ground, the high-voltage driving signal is pulled Down, the two back-to-back NMOS switching tubes stop conducting, and the main power supply circuit outputs Vout with a voltage of 0V; when the signal is high or the signal input end is suspended, whether the output of the Vout end depends on the state of the over-voltage signal, the under-voltage signal and the over-current signal.

In the over-voltage and under-voltage detection circuit, a dual op-amp IC2 is used as a comparator to realize the function. The series voltage division of the resistors R12, R13 and R14 is used as an input voltage sampling resistor, UVP is an input under-voltage signal, and OVP is an input over-voltage signal. When input overvoltage occurs, the OVP voltage exceeds the reference voltage of the reverse input end of the operational amplifier IC2A, the comparator outputs high level, the triode Q1 is conducted, the grid voltages of the two NMOS switching tubes are pulled down, and the NOMS switching tube is closed; when the input undervoltage occurs, the UVP voltage is smaller than the voltage of the non-inverting input end of the operational amplifier IC2B, the comparator outputs high level, and the NMOS switching tube is closed.

In the overcurrent detection circuit, the current amplification and comparison are realized by using the same dual operational amplifier chip IC 4. IC4A constitutes a differential amplifier that amplifies the voltage across current sampling resistor R1, and the amplified voltage is fed into IC4B for comparison with a reference voltage. When the output is over-current, the signal of the non-inverting input end of the IC4B is larger than the reference voltage of the inverting input end of the IC4B, and the high level is output, so that the NMOS switching tube is closed.

Only when no input overvoltage, undervoltage output and overcurrent output occur and the shutdown Down input end is suspended or is at high potential, the NMOS switch tube is in a conducting state, the main power supply circuit supplies power normally, and the power supply voltage Vout is almost the power supply voltage VCC.

The low-loss power supply circuit with overvoltage and undervoltage and overcurrent protection and turn-off functions of the embodiment of the utility model is described in detail, specific examples are applied to the description of the principle and implementation mode of the utility model, the specific circuit modules are not limited to the above embodiments, and the power supply VCC is reasonably selected according to different application scenes; the above embodiments are only for helping to understand the method of the present utility model and its core ideas; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present utility model, the present description should not be construed as limiting the present utility model in view of the above.

Claims

1. A low-loss power supply circuit with overvoltage and undervoltage and overcurrent protection and turn-off functions is characterized in that: the power supply comprises a main power supply circuit, wherein the main power supply circuit comprises a power supply VCC, an NMOS switch circuit (7) and a current detection resistor R1, the power supply VCC sequentially outputs a power supply Vout after passing through the NMOS switch circuit (7) and the current detection resistor R1, the control end of the NMOS switch circuit (7) is respectively connected with the output end of a logic AND gate circuit (6) and the output end of an NMOS drive circuit, the output of the NMOS drive circuit and the output of the logic AND gate circuit (6) are subjected to logic operation and jointly control the on or off of the NMOS switch circuit (7), the input end of the logic AND gate circuit (6) is respectively connected with a turn-off signal Sut down, the output end of an overcurrent detection circuit (5) and the output end of an overvoltage and undervoltage detection circuit (4), and the overcurrent signal and the overvoltage and undervoltage signal output by the overcurrent and undervoltage detection circuit (5) are output to the control end of the NMOS switch circuit (7) after being subjected to logic AND gate circuit (6) operation.

2. The low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to claim 1, wherein: the NMOS drive circuit comprises a boost DC-DC circuit and a voltage stabilizing circuit, wherein the input end of the boost DC-DC circuit is connected with a power supply VCC, the output end of the boost DC-DC circuit is connected with the input end of the voltage stabilizing circuit, and the power supply VCC is boosted by the boost DC-DC circuit and then stabilized by the voltage stabilizing circuit and then output to the control end of the NMOS switch circuit.

3. The low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to claim 2, wherein: the boost DC-DC circuit comprises a square wave generating circuit (1), a charge pump boost circuit (2) and a resistance-capacitance filter circuit (3), wherein the output end of the square wave generating circuit (1) is connected with the input end of the charge pump boost circuit (2), the output end of the charge pump boost circuit (2) is connected with the input end of the resistance-capacitance filter circuit (3), the output end of the resistance-capacitance filter circuit (3) is connected with the input end of the voltage stabilizing circuit, a power supply VCC is connected with the square wave generating circuit (1), the charge pump boost circuit (2) and the resistance-capacitance filter circuit (3), a working power supply is provided for the square wave generating circuit (1), a working power supply is provided for the charge pump boost circuit (2), and a zero reference potential is provided for the resistance-capacitance filter circuit (3).

5. A low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to claim 3, characterized in that: the charge pump boost circuit (2) comprises a capacitor C2, a capacitor C4 and a high-speed switch diode D3, wherein one end of the capacitor C4 is connected with the output end of the square wave generating circuit (1), the other end of the capacitor C4 is connected with a two-diode series node of the high-speed switch diode D3, the input end of the high-speed switch diode D3 is connected with a power supply VCC, the output end of the high-speed switch diode D3 is connected with the input end of the resistance-capacitance filter circuit (3), the capacitor C2 is connected between the input end and the output end of the high-speed switch diode D1 in parallel, and the model of the high-speed switch diode D3 is BAV99.

6. A low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to claim 3, characterized in that: the resistance-capacitance filter circuit (3) comprises a resistor R2 and a capacitor C3, the resistor R2 and the capacitor C3 are connected in series and then connected between the output end of the charge pump booster circuit (2) and a power supply VCC, and one end of the capacitor C3 is connected with the power supply VCC.

9. The low-loss power supply circuit with over-voltage and under-voltage and over-current protection and turn-off functions according to claim 1, wherein: the logic AND circuit (6) comprises resistors R10-R11, diodes D4-D7 and a triode Q1, wherein the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected with the control end of the NMOS switching circuit, meanwhile, the collector of the triode Q1 is connected with a shutdown signal Sut Down through the diode D4, the base of the triode Q1 is connected with the cathodes of the diodes D5-D7 through the resistor R10, the anodes of the diodes D5-D7 are respectively connected with the output end of the undervoltage detection circuit and the output end of the overcurrent detection circuit, and the resistor R11 is connected between the base and the emitter of the triode Q1 in parallel.

10. A low loss power supply circuit with over-voltage and over-current protection and turn-off functions according to any one of claims 2-9, characterized in that: the NMOS switching circuit (7) is composed of two NMOS switching tubes D1 and D2 which are connected back to back, wherein the drain electrode of the NMOS switching tube D1 is connected with a power supply VCC, the source electrode of the NMOS switching tube D1 is connected with the source electrode of the NMOS switching tube D2, the drain electrode of the NMOS switching tube D2 is connected with one end of a current detection resistor R1, and the grid electrodes of the NMOS switching tube D1 and the NMOS switching tube D2 are connected with the output end of the logic AND gate circuit and the output end of the voltage stabilizing circuit.