技术领域Technical field
本实用新型涉及但不限于显示技术领域，尤指一种显示基板及显示装置。The utility model relates to but is not limited to the field of display technology, and in particular, to a display substrate and a display device.
背景技术Background technique
有机发光二极管(OLED，Organic Light Emitting Diode)为主动发光显示器件，具有自发光、广视角、高对比度、低耗电、极高反应速度等优点。随着显示技术的不断发展，以OLED为发光器件、由薄膜晶体管(TFT，Thin Film Transistor)进行信号控制的显示装置已成为目前显示领域的主流产品。Organic Light Emitting Diode (OLED, Organic Light Emitting Diode) is an active light-emitting display device with the advantages of self-illumination, wide viewing angle, high contrast, low power consumption, and extremely high response speed. With the continuous development of display technology, display devices using OLEDs as light-emitting devices and thin film transistors (TFTs) for signal control have become mainstream products in the current display field.
实用新型内容Utility model content
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。The following is an overview of the topics described in detail in this article. This summary is not intended to limit the scope of the claims.
针对显示基板在信赖性测试中存在的边框走线腐蚀情况，本实用新型实施例提供了一种显示基板及显示装置。In view of the corrosion of the frame wiring of the display substrate during the reliability test, embodiments of the present invention provide a display substrate and a display device.
一方面，本实施例提供一种显示基板，包括：衬底、至少一个第一电压接触垫和至少一个第二电压接触垫、至少一个第三电压接触垫和至少一个第四电压接触垫、至少一条第一连接线和至少一条第二连接线。衬底包括显示区域和位于所述显示区域一侧的第一信号接入区、第二信号接入区以及连接走线区，所述第二信号接入区位于所述第一信号接入区远离所述显示区域的一侧，所述连接走线区位于所述第一信号接入区和第二信号接入区之间。至少一个第一电压接触垫和至少一个第二电压接触垫位于所述第一信号接入区。至少一个第三电压接触垫和至少一个第四电压接触垫位于所述第二信号接入区。至少一条第一连接线和至少一条第二连接线位于所述连接走线区。至少一条第一连接线与至少一个第一电压接触垫和至少一个第三电压接触垫电连接；至少一条第二连接线与至少一个第二电压接触垫和至少一个第四电压接触垫电连接。所述第一连接线与相邻的第二连接线之间的最短距离大于60微米。In one aspect, this embodiment provides a display substrate, including: a substrate, at least one first voltage contact pad and at least one second voltage contact pad, at least one third voltage contact pad and at least one fourth voltage contact pad, at least a first connection line and at least one second connection line. The substrate includes a display area and a first signal access area, a second signal access area and a connection wiring area located on one side of the display area, and the second signal access area is located in the first signal access area. On the side away from the display area, the connection wiring area is located between the first signal access area and the second signal access area. At least one first voltage contact pad and at least one second voltage contact pad are located in the first signal access area. At least one third voltage contact pad and at least one fourth voltage contact pad are located in the second signal access area. At least one first connection line and at least one second connection line are located in the connection wiring area. At least one first connection line is electrically connected to at least one first voltage contact pad and at least one third voltage contact pad; at least one second connection line is electrically connected to at least one second voltage contact pad and at least one fourth voltage contact pad. The shortest distance between the first connection line and the adjacent second connection line is greater than 60 microns.
在一些示例性实施方式中，所述第一连接线与相邻的所述第二连接线之间的最短距离大于或等于90微米且小于或等于120微米。In some exemplary embodiments, the shortest distance between the first connection line and the adjacent second connection line is greater than or equal to 90 microns and less than or equal to 120 microns.
在一些示例性实施方式中，所述第一连接线传输的电压信号大于所述第二连接线传输的电压信号。In some exemplary embodiments, the voltage signal transmitted by the first connection line is greater than the voltage signal transmitted by the second connection line.
在一些示例性实施方式中，所述显示基板还包括：位于所述第二信号接入区的至少一个第二无效接触垫，所述至少一个第二无效接触垫位于所述至少一个第三电压接触垫和所述至少一个第四电压接触垫之间。In some exemplary embodiments, the display substrate further includes: at least one second inactive contact pad located in the second signal access area, the at least one second inactive contact pad located in the at least one third voltage between the contact pad and the at least one fourth voltage contact pad.
在一些示例性实施方式中，所述显示基板还包括：至少一条第一无效连接线，所述至少一条第一无效连接线与所述至少一个第二无效接触垫电连接，且所述至少一条第一无效连接线位于所述至少一条第一连接线和所述至少一条第二连接线之间。In some exemplary embodiments, the display substrate further includes: at least one first inactive connection line, the at least one first inactive connection line is electrically connected to the at least one second inactive contact pad, and the at least one A first invalid connection line is located between the at least one first connection line and the at least one second connection line.
在一些示例性实施方式中，所述至少一个第三电压接触垫和至少一个第四电压接触垫之间设置一个第二无效接触垫，所述第二无效接触垫与两条所述第一无效连接线电连接，所述两条第一无效连接线位于所述第一连接线和所述第二连接线之间。In some exemplary embodiments, a second inactive contact pad is disposed between the at least one third voltage contact pad and the at least one fourth voltage contact pad, and the second inactive contact pad is connected to two of the first inactive contact pads. The connection lines are electrically connected, and the two first ineffective connection lines are located between the first connection line and the second connection line.
在一些示例性实施方式中，所述显示基板还包括：位于所述第一信号接入区的至少一个第一无效接触垫，所述至少一个第一无效接触垫位于所述至少一个第一电压接触垫和至少一个第二电压接触垫之间。In some exemplary embodiments, the display substrate further includes: at least one first inactive contact pad located in the first signal access area, the at least one first inactive contact pad located in the at least one first voltage between the contact pad and at least one second voltage contact pad.
在一些示例性实施方式中，所述显示基板还包括：至少一条第二无效连接线，所述至少一条第二无效连接线与所述至少一个第一无效接触垫和所述至少一个第二无效接触垫电连接。In some exemplary embodiments, the display substrate further includes: at least one second inactive connection line, the at least one second inactive connection line is connected to the at least one first inactive contact pad and the at least one second inactive contact pad. Contact pads make electrical connections.
在一些示例性实施方式中，所述第一连接线的最小线宽大于所连接的第一电压接触垫的宽度，所述第二连接线的最小线宽大于所连接的第二电压接触垫的宽度。In some exemplary embodiments, the minimum line width of the first connection line is greater than the width of the connected first voltage contact pad, and the minimum line width of the second connection line is greater than the width of the connected second voltage contact pad. width.
在一些示例性实施方式中，所述至少一条第一连接线和所述至少一条第二连接线位于不同膜层。In some exemplary embodiments, the at least one first connection line and the at least one second connection line are located on different film layers.
在一些示例性实施方式中，所述显示区域包括：多个子像素，所述多个子像素中的至少一个子像素包括像素电路和发光元件，所述像素电路包括至少一个薄膜晶体管；所述像素电路通过第一转接电极与所述发光元件电连接。所述至少一条第一连接线与所述薄膜晶体管的源极和漏极为同层结构，所述至少一条第二连接线与所述第一转接电极为同层结构；或者，所述至少一条第一连接线与所述第一转接电极为同层结构，所述至少一条第二连接线与所述薄膜晶体管的源极和漏极为同层结构。In some exemplary embodiments, the display area includes: a plurality of sub-pixels, at least one of the plurality of sub-pixels includes a pixel circuit and a light-emitting element, the pixel circuit includes at least one thin film transistor; the pixel circuit It is electrically connected to the light-emitting element through a first transfer electrode. The at least one first connection line and the source and drain of the thin film transistor have a same layer structure, and the at least one second connection line and the first transfer electrode have a same layer structure; or, the at least one The first connection line and the first transfer electrode have a same layer structure, and the at least one second connection line and the source and drain of the thin film transistor have a same layer structure.
在一些示例性实施方式中，所述至少一条第一连接线和所述至少一条第二连接线为双层走线。In some exemplary embodiments, the at least one first connection line and the at least one second connection line are double-layer traces.
在一些示例性实施方式中，所述显示区域包括：多个子像素，所述多个子像素中的至少一个子像素包括像素电路和发光元件，所述像素电路包括至少一个薄膜晶体管；所述至少一条第一连接线和所述至少一条第二连接线与所述薄膜晶体管的源极和漏极为同层结构。所述显示基板还包括：第一无机绝缘层，位于所述连接走线区，所述第一无机绝缘层在所述衬底的正投影覆盖所述至少一条第一连接线和至少一条第二连接线在所述衬底的正投影。In some exemplary embodiments, the display area includes: a plurality of sub-pixels, at least one of the plurality of sub-pixels includes a pixel circuit and a light-emitting element, the pixel circuit includes at least one thin film transistor; the at least one The first connection line and the at least one second connection line have the same layer structure as the source and drain of the thin film transistor. The display substrate also includes: a first inorganic insulating layer located in the connection wiring area, and the orthographic projection of the first inorganic insulating layer on the substrate covers the at least one first connection line and at least one second The connection lines are in the orthographic projection of the substrate.
在一些示例性实施方式中，所述显示区域包括：多个子像素，所述多个子像素中的至少一个子像素包括像素电路和发光元件，所述像素电路通过第一转接电极与所述发光元件电连接。所述显示基板还包括：位于所述第一转接电极远离所述衬底一侧的第二平坦层，所述第二平坦层在位于所述显示区域一侧的第一边框区域至少具有第一区域和第二区域，所述第二平坦层的第一区域的厚度大于所述第二平坦层的第二区域的厚度；所述第二平坦层的所述第一区域和所述第二区域的交界位置与所述至少一条第一连接线和所述至少一条第二连接线在所述衬底的正投影没有交叠。In some exemplary embodiments, the display area includes: a plurality of sub-pixels, at least one of the plurality of sub-pixels includes a pixel circuit and a light-emitting element, the pixel circuit is connected to the light-emitting element through a first transfer electrode. Components are electrically connected. The display substrate further includes: a second flat layer located on a side of the first transfer electrode away from the substrate, and the second flat layer has at least a third flat layer in a first frame area located on a side of the display area. a region and a second region, the thickness of the first region of the second flat layer is greater than the thickness of the second region of the second flat layer; the first region and the second region of the second flat layer The intersection position of the area does not overlap with the orthographic projection of the at least one first connection line and the at least one second connection line on the substrate.
在一些示例性实施方式中，所述显示基板还包括：设置在所述第一信号接入区的集成电路，所述集成电路通过异方性导电胶膜与所述至少一个第一电压接触垫和所述至少一个第二电压接触垫电连接，所述异方性导电胶膜的边界位于所述连接走线区，并与所述第二平坦层的所述第一区域和所述第二区域的交界位置没有交叠。In some exemplary embodiments, the display substrate further includes: an integrated circuit disposed in the first signal access area, and the integrated circuit is connected to the at least one first voltage contact pad through an anisotropic conductive adhesive film. is electrically connected to the at least one second voltage contact pad, and the boundary of the anisotropic conductive adhesive film is located in the connection wiring area and is connected to the first area of the second planar layer and the second There is no overlap in the area's boundary locations.
另一方面，本实施例提供一种显示装置，包括如上所述的显示面板。On the other hand, this embodiment provides a display device, including the display panel as described above.
本实施例提供的显示基板，通过设置第一连接线与相邻第二连接线之间的最短距离大于或等于60微米，可以有利于改善下边框区域发生电化学腐蚀的情况。In the display substrate provided by this embodiment, by setting the shortest distance between the first connection line and the adjacent second connection line to be greater than or equal to 60 microns, it can be beneficial to improve the electrochemical corrosion in the lower frame area.
在阅读并理解了附图和详细描述后，可以明白其他方面。Other aspects will be apparent after reading and understanding the drawings and detailed description.
附图说明Description of drawings
附图用来提供对本实用新型技术方案的进一步理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本实用新型的技术方案，并不构成对本实用新型技术方案的限制。附图中一个或多个部件的形状和大小不反映真实比例，目的只是示意说明本实用新型内容。The accompanying drawings are used to provide a further understanding of the technical solutions of the present utility model and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solutions of the present utility model and do not constitute a limitation to the technical solutions of the present utility model. The shape and size of one or more components in the drawings do not reflect true proportions and are only intended to illustrate the contents of the present invention.
图1为本实用新型至少一实施例的显示基板的示意图；Figure 1 is a schematic diagram of a display substrate according to at least one embodiment of the present invention;
图2为本实用新型至少一实施例的显示区域的局部剖面示意图；Figure 2 is a partial cross-sectional schematic diagram of the display area of at least one embodiment of the present invention;
图3为本实用新型至少一实施例的第一边框区域的局部平面示意图；Figure 3 is a partial plan view of the first frame area of at least one embodiment of the present invention;
图4为图3中区域S1的局部平面示意图；Figure 4 is a partial plan view of area S1 in Figure 3;
图5A为图4中沿P-P’方向的局部剖面示意图；Figure 5A is a partial cross-sectional schematic diagram along the P-P’ direction in Figure 4;
图5B为图4中沿Q-Q’方向的局部剖面示意图；Figure 5B is a partial cross-sectional schematic diagram along the Q-Q’ direction in Figure 4;
图6为本实用新型至少一实施例的第一连接线和第二连接线的另一示意图；Figure 6 is another schematic diagram of the first connection line and the second connection line according to at least one embodiment of the present invention;
图7为图3中区域S1的另一局部平面示意图；Figure 7 is another partial plan view of area S1 in Figure 3;
图8为图3中区域S1的另一局部平面示意图；Figure 8 is another partial plan view of area S1 in Figure 3;
图9为图3中区域S1的另一局部平面示意图；Figure 9 is another partial plan view of area S1 in Figure 3;
图10为图3中区域S1的另一局部平面示意图；Figure 10 is another partial plan view of area S1 in Figure 3;
图11为图10中区域S2的局部放大示意图；Figure 11 is a partial enlarged schematic diagram of area S2 in Figure 10;
图12为图3中区域S1的另一局部平面示意图；Figure 12 is another partial plan view of area S1 in Figure 3;
图13为图3中区域S1的另一局部平面示意图；Figure 13 is another partial plan view of area S1 in Figure 3;
图14为图3中区域S1的另一局部平面示意图；Figure 14 is another partial plan view of area S1 in Figure 3;
图15为图14中沿R-R’方向的局部剖面示意图；Figure 15 is a partial cross-sectional schematic diagram along the R-R’ direction in Figure 14;
图16为图14中沿R-R’方向的另一局部剖面示意图；Figure 16 is another partial cross-sectional schematic diagram along the R-R’ direction in Figure 14;
图17为图14中沿R-R’方向的另一局部剖面示意图；Figure 17 is another partial cross-sectional schematic diagram along the R-R’ direction in Figure 14;
图18为图14中沿R-R’方向的另一局部剖面示意图；Figure 18 is another partial cross-sectional schematic diagram along the R-R’ direction in Figure 14;
图19为图3中区域S1的局部平面示意图；Figure 19 is a partial plan view of area S1 in Figure 3;
图20为本实用新型至少一实施例的显示装置的示意图。FIG. 20 is a schematic diagram of a display device according to at least one embodiment of the present invention.
具体实施方式Detailed ways
下面将结合附图对本实用新型的实施例进行详细说明。实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本实用新型的宗旨及其范围的条件下被变换为各种各样的形式。因此，本实用新型不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本实用新型中的实施例及实施例中的特征可以相互任意组合。The embodiments of the present utility model will be described in detail below with reference to the accompanying drawings. Embodiments may be implemented in many different forms. Those of ordinary skill in the art can easily understand the fact that the manner and content can be transformed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited only to the contents described in the following embodiments. The embodiments and features in the embodiments of the present invention can be combined with each other arbitrarily unless there is any conflict.
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本实用新型的一个方式并不一定限定于该尺寸，附图中一个或多个部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本实用新型的一个方式不局限于附图所示的形状或数值等。In the drawings, the size of one or more constituent elements, the thickness of a layer, or an area are sometimes exaggerated for clarity. Therefore, one embodiment of the invention is not necessarily limited to these dimensions, and the shape and size of one or more components in the drawings do not reflect true proportions. In addition, the drawings schematically show ideal examples, and one aspect of the present invention is not limited to the shapes, numerical values, etc. shown in the drawings.
本说明书中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本实用新型中的“多个”表示两个及以上的数量。Ordinal numbers such as "first", "second" and "third" in this specification are provided to avoid confusion of constituent elements and are not intended to limit the quantity. "Plural" in this utility model means two or more quantities.
在本说明书中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本实用新型的限制。构成要素的位置关系根据描述各构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。In this manual, for convenience, "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inner" are used , "outside" and other words indicating the orientation or positional relationship are used to illustrate the positional relationship of the constituent elements with reference to the drawings. They are only for the convenience of describing this specification and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation. , is constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention. The positional relationship of the constituent elements is appropriately changed depending on the direction in which each constituent element is described. Therefore, they are not limited to the words and phrases described in the specification, and may be appropriately replaced according to circumstances.
在本说明书中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本实用新型中的含义。In this manual, unless otherwise expressly stated and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, an indirect connection through an intermediate piece, or an internal connection between two elements. For those of ordinary skill in the art, the meanings of the above terms in the present invention can be understood according to the circumstances.
在本说明书中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏电极)与源电极(源电极端子、源区域或源电极)之间具有沟道区域，并且电流能够流过漏电极、沟道区域以及源电极。在本说明书中，沟道区域是指电流主要流过的区域。In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, channel region, and source electrode . In this specification, the channel region refers to a region through which current mainly flows.
在本说明书中，第一极可以为漏电极、第二极可以为源电极，或者第一极可以为源电极、第二极可以为漏电极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本说明书中，“源电极”和“漏电极”可以互相调换。In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. When transistors with opposite polarities are used or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged with each other. Therefore, in this specification, "source electrode" and "drain electrode" may be interchanged with each other.
在本说明书中，“连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的传输，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有各种功能的元件等。In this specification, "connection" includes a case where constituent elements are connected together through an element having some electrical effect. There is no particular limitation on the "element having some electrical function" as long as it can transmit electrical signals between connected components. Examples of "elements having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.
在本说明书中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，也包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，也包括85°以上且95°以下的角度的状态。In this specification, "parallel" refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less. Therefore, it also includes a state in which the angle is -5° or more and 5° or less. In addition, "vertical" refers to a state where the angle formed by two straight lines is 80° or more and 100° or less, and therefore includes an angle of 85° or more and 95° or less.
本实用新型中的“约”、“大致”，是指不严格限定界限，允许工艺和测量误差范围内的情况。"About" and "approximately" in this utility model refer to situations where the limits are not strictly limited and the process and measurement errors are allowed.
本实用新型中，A和B相邻是指A和B相互靠近，且A和B之间没有其他走线或引脚。In this utility model, A and B being adjacent means that A and B are close to each other, and there are no other traces or pins between A and B.
在用户对电子产品的实际使用过程中，面临不同的温度和湿度条件。在不同的国家和地区，受气候和使用环境等影响，可能造成电子产品受损从而影响电子产品的正常使用。信赖性测试是在极端恶劣条件下来评价电子产品耐受性的常用方法。目前的信赖性测试不仅需要满足常规使用，随着电子产品使用范围的扩展，还提出了持续投入直至失效(TTF，Time to Failure)的测试要求。During the actual use of electronic products, users face different temperature and humidity conditions. In different countries and regions, affected by climate and usage environment, electronic products may be damaged and affect the normal use of electronic products. Reliability testing is a common method to evaluate the durability of electronic products under extremely harsh conditions. Current reliability testing not only needs to meet routine use, but as the scope of use of electronic products expands, testing requirements for continuous investment until failure (TTF, Time to Failure) are also proposed.
发明人在产品开发中发现，一些显示产品的下边框区域在信赖性测试中会发生大量腐蚀，从而造成显示产品的显示功能异常，例如包括花屏、闪屏、单根或多根线不良等。其中，显示产品的下边框区域的腐蚀位置集中在集成电路(IC，Integrated Circuit)设置区与绑定引脚区之间的走线区域，尤其是该走线区域内传输高压信号和低压信号的走线位置。发明人通过分析发现，在集成电路设置区和绑定引脚区之间的走线区域，传输高压信号和低压信号的走线之间的距离较近，使得在信赖性过程中容易发生电化学腐蚀情况，而且在该区域受到走线空间限制，高压信号和低压信号的走线的线宽较小，使得高压信号和低压信号传输时更容易导致走线发热膨胀，从而造成腐蚀。During product development, the inventor discovered that a large amount of corrosion occurred in the lower frame area of some display products during reliability testing, resulting in abnormal display functions of the display products, such as blurred screens, flickering screens, single or multiple defective wires, etc. Among them, the corrosion location in the lower frame area of the display product is concentrated in the wiring area between the integrated circuit (IC, Integrated Circuit) setting area and the bonded pin area, especially in the wiring area where high-voltage signals and low-voltage signals are transmitted. Trace location. Through analysis, the inventor found that in the wiring area between the integrated circuit setting area and the binding pin area, the distance between the wiring lines transmitting high-voltage signals and low-voltage signals is relatively close, making it easy for electrochemical damage to occur during the reliability process. Corrosion situation, and due to the limitation of wiring space in this area, the line width of high-voltage signal and low-voltage signal traces is small, which makes it easier for the traces to heat up and expand during the transmission of high-voltage signals and low-voltage signals, thereby causing corrosion.
本实施例提供一种显示基板及显示装置，可以改善显示基板在信赖性测试中存在的边框走线腐蚀情况。This embodiment provides a display substrate and a display device, which can improve the corrosion of the frame wiring of the display substrate during reliability testing.
本实施例提供一种显示基板，包括：衬底、至少一个第一电压接触垫和至少一个第二电压接触垫、至少一个第三电压接触垫和至少一个第四电压接触垫、至少一条第一连接线和至少一条第二连接线。衬底包括显示区域和位于显示区域一侧的第一信号接入区、第二信号接入区以及连接走线区，第二信号接入区位于第一信号接入区远离显示区域的一侧，连接走线区位于第一信号接入区和第二信号接入区之间。至少一个第一电压接触垫和至少一个第二电压接触垫位于第一信号接入区。至少一个第三电压接触垫和至少一个第四电压接触垫位于第二信号接入区。至少一条第一连接线和至少一条第二连接线位于连接走线区。至少一条第一连接线与至少一个第一电压接触垫和至少一个第三电压接触垫电连接；至少一条第二连接线与至少一个第二电压接触垫和至少一个第四电压接触垫电连接。第一连接线与相邻的第二连接线之间的最短距离大于60微米。This embodiment provides a display substrate, including: a substrate, at least one first voltage contact pad and at least one second voltage contact pad, at least one third voltage contact pad and at least one fourth voltage contact pad, at least one first connecting line and at least one second connecting line. The substrate includes a display area and a first signal access area, a second signal access area and a connection wiring area located on one side of the display area, and the second signal access area is located on a side of the first signal access area away from the display area. , the connection wiring area is located between the first signal access area and the second signal access area. At least one first voltage contact pad and at least one second voltage contact pad are located in the first signal access area. At least one third voltage contact pad and at least one fourth voltage contact pad are located in the second signal access area. At least one first connection line and at least one second connection line are located in the connection wiring area. At least one first connection line is electrically connected to at least one first voltage contact pad and at least one third voltage contact pad; at least one second connection line is electrically connected to at least one second voltage contact pad and at least one fourth voltage contact pad. The shortest distance between the first connection line and the adjacent second connection line is greater than 60 microns.
本实施例提供的显示基板，通过设置第一连接线与相邻第二连接线之间的最短距离大于或等于60微米，可以有利于改善下边框区域发生电化学腐蚀的情况。In the display substrate provided by this embodiment, by setting the shortest distance between the first connection line and the adjacent second connection line to be greater than or equal to 60 microns, it can be beneficial to improve the electrochemical corrosion in the lower frame area.
在一些示例性实施方式中，第一连接线与相邻的第二连接线之间的最短距离可以大于或等于90微米且小于或等于120微米。比如，第一连接线与相邻的第二连接线之间的最短距离可以大于或等于100微米且小于或等于110微米。In some exemplary embodiments, the shortest distance between the first connection line and the adjacent second connection line may be greater than or equal to 90 micrometers and less than or equal to 120 micrometers. For example, the shortest distance between the first connection line and the adjacent second connection line may be greater than or equal to 100 microns and less than or equal to 110 microns.
下面通过一些示例对本示例的显示基板进行举例说明。The following illustrates the display substrate of this example through some examples.
图1为本实用新型至少一实施例的一种显示基板的示意图。在一些示例中，如图1所示，显示基板可以包括显示区域AA和位于显示区域AA周边的周边区域BB。周边区域BB可以包括：位于显示区域AA一侧的第一边框区域B1、以及位于显示区域AA其余侧的第二边框区域B2。第一边框区域B1和第二边框区域B2可以相互连通。例如，第一边框区域B1可以为显示基板的下边框区域，第二边框区域B2可以包括显示基板的上边框区域、左边框区域和右边框区域。FIG. 1 is a schematic diagram of a display substrate according to at least one embodiment of the present invention. In some examples, as shown in FIG. 1 , the display substrate may include a display area AA and a peripheral area BB located around the display area AA. The peripheral area BB may include: a first frame area B1 located on one side of the display area AA, and a second frame area B2 located on the other side of the display area AA. The first frame area B1 and the second frame area B2 may be connected to each other. For example, the first frame area B1 may be a lower frame area of the display substrate, and the second frame area B2 may include an upper frame area, a left frame area, and a right frame area of the display substrate.
在一些示例中，如图1所示，显示区域AA可以为矩形，例如圆角矩形。然而，本实施例对此并不限定。例如，显示区域可以为圆形或者椭圆形等其它形状。In some examples, as shown in FIG. 1 , the display area AA may be a rectangle, such as a rounded rectangle. However, this embodiment is not limited to this. For example, the display area may be a circle, an ellipse, or other shapes.
在一些示例中，如图1所示，显示区域AA可以至少包括多个子像素PX、多条栅线GL以及多条数据线DL。多条栅线GL和多条数据线DL在衬底上的正投影可以交叉形成多个子像素区域，一个子像素PX可以设置在一个子像素区域内。多条数据线DL可以与多个子像素PX电连接，多条数据线DL可以被配置为向多个子像素PX提供数据信号。多条栅线GL可以与多个子像素PX电连接，多条栅线GL可以被配置为向多个子像素PX提供栅极控制信号。在一些示例中，栅极控制信号可以包括扫描信号，或者可以包括扫描信号和发光控制信号，或者可以包括扫描信号、复位控制信号和发光控制信号。In some examples, as shown in FIG. 1 , the display area AA may include at least a plurality of sub-pixels PX, a plurality of gate lines GL, and a plurality of data lines DL. Orthographic projections of multiple gate lines GL and multiple data lines DL on the substrate may intersect to form multiple sub-pixel areas, and one sub-pixel PX may be disposed in one sub-pixel area. The plurality of data lines DL may be electrically connected to the plurality of sub-pixels PX, and the plurality of data lines DL may be configured to provide data signals to the plurality of sub-pixels PX. The plurality of gate lines GL may be electrically connected to the plurality of sub-pixels PX, and the plurality of gate lines GL may be configured to provide gate control signals to the plurality of sub-pixels PX. In some examples, the gate control signal may include a scan signal, or may include a scan signal and a lighting control signal, or may include a scanning signal, a reset control signal, and a lighting control signal.
在一些示例中，如图1所示，第一方向X可以是显示区域AA中栅线GL的延伸方向(例如，行方向)，第二方向Y可以是显示区域AA中数据线DL的延伸方向(例如，列方向)。其中，第一方向X和第二方向Y可以相互交叉，例如第一方向X和第二方向Y可以相互垂直。In some examples, as shown in FIG. 1 , the first direction X may be the extending direction (eg, row direction) of the gate line GL in the display area AA, and the second direction Y may be the extending direction of the data line DL in the display area AA (e.g. column direction). The first direction X and the second direction Y may cross each other. For example, the first direction X and the second direction Y may be perpendicular to each other.
在一些示例中，显示区域AA的一个像素单元可以包括三个子像素，三个子像素分别为红色子像素、绿色子像素和蓝色子像素。然而，本实施例对此并不限定。在一些示例中，一个像素单元可以包括四个子像素，四个子像素分别为红色子像素、绿色子像素、蓝色子像素和白色子像素。In some examples, one pixel unit of the display area AA may include three sub-pixels, and the three sub-pixels are red sub-pixels, green sub-pixels and blue sub-pixels respectively. However, this embodiment is not limited to this. In some examples, one pixel unit may include four sub-pixels, which are red sub-pixels, green sub-pixels, blue sub-pixels and white sub-pixels.
在一些示例中，子像素的形状可以是矩形、菱形、五边形或六边形。一个像素单元包括三个子像素时，三个子像素可以采用水平并列、竖直并列或品字方式排列；一个像素单元包括四个子像素时，四个子像素可以采用水平并列、竖直并列或正方形方式排列。然而，本实施例对此并不限定。In some examples, the shape of the subpixel may be a rectangle, a diamond, a pentagon, or a hexagon. When a pixel unit includes three sub-pixels, the three sub-pixels can be arranged horizontally, vertically or squarely; when a pixel unit includes four sub-pixels, the four sub-pixels can be arranged horizontally, vertically or squarely. . However, this embodiment is not limited to this.
在一些示例中，一个子像素可以包括：像素电路以及与像素电路连接的发光元件。像素电路可以包括多个晶体管和至少一个电容。例如，像素电路可以是3T1C、4T1C、5T1C、5T2C、6T1C、7T1C或8T1C结构。其中，上述电路结构中的T指的是薄膜晶体管，C指的是电容，T前面的数字代表电路中薄膜晶体管的数量，C前面的数字代表电路中电容的数量。在一些示例中，像素电路中的多个晶体管可以是P型晶体管，或者可以是N型晶体管。像素电路中采用相同类型的晶体管可以简化工艺流程，减少显示基板的工艺难度，提高产品的良率。在另一些示例中，像素电路中的多个晶体管可以包括P型晶体管和N型晶体管。In some examples, a sub-pixel may include: a pixel circuit and a light-emitting element connected to the pixel circuit. The pixel circuit may include a plurality of transistors and at least one capacitor. For example, the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. Among them, T in the above circuit structure refers to the thin film transistor, C refers to the capacitor, the number in front of T represents the number of thin film transistors in the circuit, and the number in front of C represents the number of capacitors in the circuit. In some examples, the plurality of transistors in the pixel circuit may be P-type transistors, or may be N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the product yield. In other examples, the plurality of transistors in the pixel circuit may include P-type transistors and N-type transistors.
在一些示例中，像素电路中的多个晶体管可以采用低温多晶硅薄膜晶体管，或者可以采用氧化物薄膜晶体管，或者可以采用低温多晶硅薄膜晶体管和氧化物薄膜晶体管。低温多晶硅薄膜晶体管的有源层采用低温多晶硅(LTPS，Low Temperature Poly-Silicon)，氧化物薄膜晶体管的有源层采用氧化物半导体(Oxide)。低温多晶硅薄膜晶体管具有迁移率高、充电快等优点，氧化物薄膜晶体管具有漏电流低等优点，将低温多晶硅薄膜晶体管和氧化物薄膜晶体管集成在一个显示基板上，即LTPS+Oxide(简称LTPO)显示基板，可以利用两者的优势，可以实现低频驱动，可以降低功耗，可以提高显示品质。In some examples, the plurality of transistors in the pixel circuit may employ low-temperature polysilicon thin film transistors, or may employ oxide thin film transistors, or may employ low-temperature polysilicon thin film transistors and oxide thin film transistors. The active layer of the low-temperature polysilicon thin film transistor uses low temperature polysilicon (LTPS, Low Temperature Poly-Silicon), and the active layer of the oxide thin film transistor uses oxide semiconductor (Oxide). Low-temperature polysilicon thin film transistors have the advantages of high mobility and fast charging, and oxide thin film transistors have the advantages of low leakage current. Low-temperature polysilicon thin film transistors and oxide thin film transistors are integrated on a display substrate, that is, LTPS+Oxide (LTPO for short) The display substrate can take advantage of the advantages of both to achieve low-frequency driving, reduce power consumption, and improve display quality.
在一些示例中，发光元件可以是发光二极管(LED，Light Emitting Diode)、有机发光二极管(OLED，Organic Light Emitting Diode)、量子点发光二极管(QLED，QuantumDot Light Emitting Diodes)、微LED(包括：mini-LED或micro-LED)等中的任一者。例如，发光元件可以为OLED，发光元件在其对应的像素电路的驱动下可以发出红光、绿光、蓝光、或者白光等。发光元件发光的颜色可根据需要而定。在一些示例中，发光元件可以包括：阳极、阴极以及位于阳极和阴极之间的有机发光层。发光元件的阳极可以与对应的像素电路电连接。然而，本实施例对此并不限定。In some examples, the light-emitting element may be a light-emitting diode (LED, Light Emitting Diode), an organic light-emitting diode (OLED, Organic Light Emitting Diode), a quantum dot light-emitting diode (QLED, QuantumDot Light Emitting Diodes), a micro-LED (including: mini -LED or micro-LED), etc. For example, the light-emitting element can be an OLED, and the light-emitting element can emit red light, green light, blue light, or white light, etc., driven by its corresponding pixel circuit. The color of the light-emitting element can be determined according to needs. In some examples, the light-emitting element may include: an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode. The anode of the light-emitting element may be electrically connected to the corresponding pixel circuit. However, this embodiment is not limited to this.
图2为本实用新型至少一实施例的显示区域的局部剖面示意图。图2示意了显示基板的显示区域的一个子像素的结构。本示例中，以像素电路中的多个晶体管的类型相同为例，例如，像素电路中的多个晶体管可以均采用低温多晶硅薄膜晶体管或均采用氧化物薄膜晶体管。在另一些示例中，像素电路中的多个晶体管可以采用低温多晶硅薄膜晶体管和氧化物薄膜晶体管。FIG. 2 is a partial cross-sectional schematic diagram of the display area of at least one embodiment of the present invention. FIG. 2 illustrates the structure of a sub-pixel in the display area of the display substrate. In this example, multiple transistors in the pixel circuit are of the same type. For example, the multiple transistors in the pixel circuit may all use low-temperature polysilicon thin film transistors or all use oxide thin film transistors. In other examples, the plurality of transistors in the pixel circuit may use low temperature polysilicon thin film transistors and oxide thin film transistors.
在一些示例中，如图2所示，在垂直于显示基板的方向上，显示基板可以包括：衬底10、以及依次设置在衬底10上的电路结构层20、发光结构层30以及封装结构层40。电路结构层20可以至少包括：多个子像素的像素电路，每个子像素的像素电路可以包括多个晶体管和至少一个电容；发光结构层30可以至少包括：多个子像素的发光元件。在一些可能的实现方式中，显示基板可以包括其它膜层，如隔垫柱、触控结构层、彩色滤光层等，本实用新型在此不做限定。In some examples, as shown in FIG. 2 , in a direction perpendicular to the display substrate, the display substrate may include: a substrate 10 , and a circuit structure layer 20 , a light-emitting structure layer 30 and a packaging structure sequentially disposed on the substrate 10 Layer 40. The circuit structure layer 20 may at least include: a plurality of sub-pixel pixel circuits, and each sub-pixel pixel circuit may include a plurality of transistors and at least one capacitor; the light-emitting structure layer 30 may at least include: a plurality of sub-pixel light-emitting elements. In some possible implementations, the display substrate may include other film layers, such as spacer pillars, touch structure layers, color filter layers, etc., which are not limited by the present invention.
在一些示例中，衬底10可以为刚性基底，例如玻璃基底。然而，本实施例对此并不限定。在另一些示例中，衬底可以为柔性基底，例如由树脂等绝缘材料制备。另外，衬底可以为单层结构或多层结构。当衬底为多层结构时，例如氮化硅、氧化硅和氮氧化硅的无机材料可以以单层或多层置于多个层之间。In some examples, substrate 10 may be a rigid substrate, such as a glass substrate. However, this embodiment is not limited to this. In other examples, the substrate may be a flexible substrate, for example, made of insulating materials such as resin. In addition, the substrate may have a single-layer structure or a multi-layer structure. When the substrate is a multi-layer structure, inorganic materials such as silicon nitride, silicon oxide, and silicon oxynitride may be disposed between multiple layers in a single layer or in multiple layers.
在一些示例中，图2中以每个子像素包括的一个薄膜晶体管21和一个电容22为例进行示意。在一些示例中，显示区域的电路结构层20可以包括：设置在衬底10上的半导体层、第一栅金属层、第二栅金属层、第一源漏金属层以及第二源漏金属层。半导体层和第一栅金属层之间可以设置有第一栅绝缘层101，第一栅金属层和第二栅金属层之间可以设置有第二栅绝缘层102，第二栅金属层和第一源漏金属层之间可以设置有层间绝缘层103，第一源漏金属层和第二源漏金属层之间可以设置有钝化层104和第一平坦层105，第二源漏金属层远离衬底10一侧可以设置有第二平坦层106。然而，本实施例对此并不限定。在另一些示例中，第一源漏金属层和第二源漏金属层之间可以省略钝化层。In some examples, each sub-pixel includes a thin film transistor 21 and a capacitor 22 as an example in FIG. 2 . In some examples, the circuit structure layer 20 of the display area may include: a semiconductor layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer disposed on the substrate 10 . A first gate insulating layer 101 may be disposed between the semiconductor layer and the first gate metal layer, a second gate insulating layer 102 may be disposed between the first gate metal layer and the second gate metal layer, and the second gate metal layer and the second gate metal layer may be disposed between the semiconductor layer and the first gate metal layer. An interlayer insulating layer 103 may be disposed between a source and drain metal layer, a passivation layer 104 and a first planarization layer 105 may be disposed between the first source and drain metal layer and the second source and drain metal layer, and the second source and drain metal layer may be disposed between the source and drain metal layers. A second flat layer 106 may be provided on the side of the layer away from the substrate 10 . However, this embodiment is not limited to this. In other examples, the passivation layer may be omitted between the first source-drain metal layer and the second source-drain metal layer.
在一些示例中，如图2所示，显示区域的半导体层可以至少包括：薄膜晶体管21的有源层210。薄膜晶体管21的有源层210可以包括：第一区2101、第二区2102以及位于第一区2101和第二区2102之间的沟道区2100。第一栅金属层可以至少包括：薄膜晶体管21的栅极213、以及电容22的第一极板221。薄膜晶体管21的栅极213在衬底10的正投影可以覆盖有源层210的沟道区2100在衬底10的正投影。第二栅金属层可以至少包括：电容22的第二极板222。电容22的第二极板222和第一极板221在衬底10的正投影可以至少部分交叠，例如，两者可以重合。第一源漏金属层可以至少包括：薄膜晶体管21的源极211和漏极212。层间绝缘层103在显示区域可以开设有多个过孔(例如，包括第一像素过孔和第二像素过孔)，第一像素过孔内的层间绝缘层103、第二栅绝缘层102和第一栅绝缘层101可以被去掉，暴露出有源层210的第一区2101的至少部分表面；第二像素过孔内的层间绝缘层103、第二栅绝缘层102和第一栅绝缘层101可以被去掉，暴露出有源层210的第二区2102的至少部分表面。薄膜晶体管21的源极211可以通过第一像素过孔与有源层210的第一区2101电连接，漏极212可以通过第二像素过孔与有源层210的第二区2102电连接。第二源漏金属层可以至少包括：第一转接电极231。第一转接电极231可以通过钝化层104和第一平坦层105开设的第三像素过孔与像素电路的薄膜晶体管21的漏极212电连接。第一转接电极231可以通过第二平坦层106开设的第四像素过孔与发光元件的第一电极301(例如阳极)电连接。本示例可以通过第一转接电极231实现像素电路与发光元件之间的电连接。In some examples, as shown in FIG. 2 , the semiconductor layer of the display area may include at least: the active layer 210 of the thin film transistor 21 . The active layer 210 of the thin film transistor 21 may include: a first region 2101, a second region 2102, and a channel region 2100 located between the first region 2101 and the second region 2102. The first gate metal layer may include at least: the gate electrode 213 of the thin film transistor 21 and the first plate 221 of the capacitor 22 . The orthographic projection of the gate electrode 213 of the thin film transistor 21 on the substrate 10 may cover the orthographic projection of the channel region 2100 of the active layer 210 on the substrate 10 . The second gate metal layer may include at least: the second plate 222 of the capacitor 22 . The orthographic projections of the second plate 222 and the first plate 221 of the capacitor 22 on the substrate 10 may at least partially overlap, for example, they may overlap. The first source-drain metal layer may include at least: the source electrode 211 and the drain electrode 212 of the thin film transistor 21 . The interlayer insulating layer 103 may have multiple via holes (for example, including a first pixel via hole and a second pixel via hole) in the display area. The interlayer insulating layer 103 and the second gate insulating layer in the first pixel via hole 102 and the first gate insulating layer 101 can be removed, exposing at least part of the surface of the first region 2101 of the active layer 210; the interlayer insulating layer 103 in the second pixel via hole, the second gate insulating layer 102 and the first The gate insulating layer 101 may be removed, exposing at least part of the surface of the second region 2102 of the active layer 210 . The source electrode 211 of the thin film transistor 21 may be electrically connected to the first region 2101 of the active layer 210 through the first pixel via hole, and the drain electrode 212 may be electrically connected to the second region 2102 of the active layer 210 through the second pixel via hole. The second source-drain metal layer may include at least: a first transfer electrode 231 . The first transfer electrode 231 may be electrically connected to the drain electrode 212 of the thin film transistor 21 of the pixel circuit through the third pixel via hole opened in the passivation layer 104 and the first planarization layer 105 . The first transfer electrode 231 may be electrically connected to the first electrode 301 (eg, anode) of the light-emitting element through the fourth pixel via hole opened in the second planar layer 106 . In this example, the electrical connection between the pixel circuit and the light-emitting element can be realized through the first transfer electrode 231.
在一些示例中，如图2所示，发光结构层30可以包括：像素定义层304和多个发光元件。例如，每个发光元件可以包括：叠设的第一电极301、有机发光层302和第二电极303。发光元件的第一电极301可以为阳极，第一电极301可以设置在第二平坦层106上，并通过第二平坦层106开设的第四像素过孔，与第一转接电极231电连接。像素定义层304设置在第一电极301和第二平坦层106上，像素定义层304可以开设有多个像素开口，一个像素开口可以暴露出对应的一个第一电极301的至少部分表面。有机发光层302的至少部分可以设置在一个像素开口内，并与对应的第一电极301连接。第二电极303可以设置在有机发光层302上，并与有机发光层302连接。有机发光层302在第一电极301和第二电极303的驱动下可以出射相应颜色的光线。像素定义层304远离衬底10的一侧还可以设置隔离柱层，隔离柱层可以包括多个隔离柱(PS)。In some examples, as shown in FIG. 2 , the light-emitting structure layer 30 may include: a pixel definition layer 304 and a plurality of light-emitting elements. For example, each light-emitting element may include: a stacked first electrode 301, an organic light-emitting layer 302, and a second electrode 303. The first electrode 301 of the light-emitting element may be an anode. The first electrode 301 may be disposed on the second planar layer 106 and be electrically connected to the first transfer electrode 231 through the fourth pixel via hole opened in the second planar layer 106 . The pixel definition layer 304 is disposed on the first electrode 301 and the second flat layer 106. The pixel definition layer 304 may be provided with a plurality of pixel openings, and each pixel opening may expose at least part of the surface of a corresponding first electrode 301. At least part of the organic light-emitting layer 302 may be disposed within a pixel opening and connected to the corresponding first electrode 301 . The second electrode 303 may be disposed on the organic light-emitting layer 302 and connected to the organic light-emitting layer 302. The organic light-emitting layer 302 can emit light of corresponding colors under the driving of the first electrode 301 and the second electrode 303 . An isolation pillar layer may also be provided on the side of the pixel definition layer 304 away from the substrate 10, and the isolation pillar layer may include a plurality of isolation pillars (PS).
在一些示例中，发光元件的有机发光层302可以包括发光层(EML，EmittingLayer)，以及包括空穴注入层(HIL，Hole Injection Layer)、空穴传输层(HTL，HoleTransport Layer)、空穴阻挡层(HBL，Hole Block Layer)、电子阻挡层(EBL，ElectronBlock Layer)、电子注入层(EIL，Electron Injection Layer)、电子传输层(ETL，ElectronTransport Layer)中的一个或多个膜层。在第一电极301和第二电极303的电压驱动下，可以利用有机材料的发光特性根据需要的灰度发光。In some examples, the organic light-emitting layer 302 of the light-emitting element may include an Emitting Layer (EML), a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), and a hole blocking layer. One or more film layers among the Hole Block Layer (HBL), Electron Block Layer (EBL), Electron Injection Layer (EIL), and Electron Transport Layer (ETL). Driven by the voltage of the first electrode 301 and the second electrode 303, the light-emitting properties of the organic material can be used to emit light according to the required grayscale.
在一些示例中，不同颜色的发光元件的发光层可以不同。例如，红色发光元件包括红色发光层，绿色发光元件包括绿色发光层，蓝色发光元件包括蓝色发光层。为了降低工艺难度和提升良率，位于发光层一侧的空穴注入层和空穴传输层可以采用共通层，位于发光层另一侧的电子注入层和电子传输层可以采用共通层。在一些示例中，空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以通过一次工艺(一次蒸镀工艺或一次喷墨打印工艺)制作，并通过形成的膜层表面段差或者通过表面处理等手段实现隔离。例如，相邻子像素对应的空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以是隔离的。在一些示例中，有机发光层可以通过采用精细金属掩模版(FMM，FineMetal Mask)或者开放式掩膜版(Open Mask)蒸镀制备形成，或者采用喷墨工艺制备形成。In some examples, the light-emitting layers of light-emitting elements of different colors may be different. For example, a red light-emitting element includes a red light-emitting layer, a green light-emitting element includes a green light-emitting layer, and a blue light-emitting element includes a blue light-emitting layer. In order to reduce process difficulty and improve yield, the hole injection layer and hole transport layer located on one side of the light-emitting layer can use a common layer, and the electron injection layer and electron transport layer located on the other side of the light-emitting layer can use a common layer. In some examples, any one or more layers of the hole injection layer, the hole transport layer, the electron injection layer and the electron transport layer can be produced by one process (one evaporation process or one inkjet printing process), and Isolation can be achieved through surface segmentation of the formed film layer or through surface treatment and other means. For example, any one or more of the hole injection layer, hole transport layer, electron injection layer and electron transport layer corresponding to adjacent sub-pixels may be isolated. In some examples, the organic light-emitting layer can be formed by evaporation using a Fine Metal Mask (FMM) or an Open Mask (Open Mask), or by using an inkjet process.
在一些示例中，如图2所示，封装结构层40可以包括叠设的第一封装层401、第二封装层402和第三封装层403。其中，第一封装层401和第三封装层403可以采用无机材料，第二封装层402可以采用有机材料，第二封装层402可以设置在第一封装层401和第三封装层403之间，以保证外界水汽无法进入发光元件。然而，本实施例对此并不限定。例如，封装结构层可以采用无机/有机/无机/有机/无机的五层叠设结构。In some examples, as shown in FIG. 2 , the packaging structure layer 40 may include a stacked first packaging layer 401 , a second packaging layer 402 , and a third packaging layer 403 . Wherein, the first encapsulation layer 401 and the third encapsulation layer 403 can be made of inorganic materials, the second encapsulation layer 402 can be made of organic materials, and the second encapsulation layer 402 can be disposed between the first encapsulation layer 401 and the third encapsulation layer 403, To ensure that external water vapor cannot enter the light-emitting element. However, this embodiment is not limited to this. For example, the packaging structure layer may adopt a five-layer stacked structure of inorganic/organic/inorganic/organic/inorganic.
在一些示例中，如图1所示，第一边框区域B1可以包括：沿着远离显示区域AA的方向(例如第二方向Y的反方向)依次设置的扇出走线区B10、第一信号接入区B11、连接走线区B13以及第二信号接入区B12。第一信号接入区B11可以设置有多个第一接触垫，多个第一接触垫可以被配置为与集成电路(IC，Integrated Circuit)绑定连接，集成电路可以被配置为产生用于驱动子像素所需的驱动信号。例如，驱动信号可以包括驱动子像素的数据信号。第一信号接入区B11还可以称为集成电路设置区。第二信号接入区B12可以设置有多个第二接触垫，多个第二接触垫可以被配置为与电路板(例如，柔性线路板(FPC，FlexiblePrinted Circuit))绑定连接。连接走线区B13可以设置有多条连接布线，多条连接布线可以被配置为连接第一信号接入区B11内的第一接触垫和第二信号接入区B12内的第二接触垫。第二信号接入区B12还可以称为绑定引脚设置区。In some examples, as shown in FIG. 1 , the first frame area B1 may include: a fan-out wiring area B10 arranged sequentially in a direction away from the display area AA (for example, the opposite direction of the second direction Y), a first signal connector Input area B11, connection wiring area B13 and second signal access area B12. The first signal access area B11 may be provided with a plurality of first contact pads. The plurality of first contact pads may be configured to be bonded and connected to an integrated circuit (IC, Integrated Circuit). The integrated circuit may be configured to generate a signal for driving Driving signals required for sub-pixels. For example, the drive signal may include a data signal that drives a sub-pixel. The first signal access area B11 may also be called an integrated circuit setting area. The second signal access area B12 may be provided with a plurality of second contact pads, and the plurality of second contact pads may be configured to be bound and connected to a circuit board (for example, a flexible circuit board (FPC, Flexible Printed Circuit)). The connection wiring area B13 may be provided with multiple connection wirings, and the multiple connection wirings may be configured to connect the first contact pads in the first signal access area B11 and the second contact pads in the second signal access area B12. The second signal access area B12 may also be called a binding pin setting area.
在一些示例中，显示基板的周边区域可以设置有时序控制器、栅极驱动电路(例如包括扫描驱动电路和发光驱动电路)和数据驱动器。其中，扫描驱动电路可以配置为沿着扫描线将扫描信号提供到子像素，发光驱动电路可以配置为沿着发光控制线将发光控制信号提供到子像素。数据驱动器可以配置为沿着数据线将数据信号提供到子像素。时序控制器可以配置为控制扫描驱动电路、发光驱动电路和数据驱动器。例如，扫描驱动电路可以设置在显示基板的左边框区域，发光驱动电路可以设置在显示基板的右边框区域；或者，显示基板的左边框区域和右边框区域均可以设置扫描驱动电路和发光驱动电路。在一些示例中，扫描驱动电路和发光驱动电路可以在形成子像素的工艺中与子像素一起形成。In some examples, a peripheral area of the display substrate may be provided with a timing controller, a gate driving circuit (for example, including a scanning driving circuit and a light emitting driving circuit), and a data driver. Wherein, the scan driving circuit may be configured to provide the scanning signal to the sub-pixel along the scanning line, and the light-emitting driving circuit may be configured to provide the light-emitting control signal to the sub-pixel along the light-emitting control line. The data driver may be configured to provide data signals along the data lines to the subpixels. The timing controller may be configured to control the scan driving circuit, the light emitting driving circuit and the data driver. For example, the scan driving circuit can be disposed in the left border area of the display substrate, and the light emitting driving circuit can be disposed in the right border area of the display substrate; or, the scanning driving circuit and the light emitting driving circuit can be disposed in both the left border area and the right border area of the display substrate. . In some examples, the scan driving circuit and the light emitting driving circuit may be formed together with the sub-pixels in a process of forming the sub-pixels.
在一些示例中，数据驱动器可以设置在单独的芯片或印刷电路板上，以通过显示基板上的第一信号接入区的第一接触垫连接到子像素。例如，数据驱动器可以采用玻璃上芯片、塑料上芯片、膜上芯片等形成设置在显示基板的第一信号接入区，以连接到第一接触垫。时序控制器可以与数据驱动器分开设置或者可以与数据驱动器一体设置。然而，本实施例对此并不限定。In some examples, the data driver may be provided on a separate chip or printed circuit board to connect to the sub-pixels through the first contact pads of the first signal access area on the display substrate. For example, the data driver may use a chip on glass, a chip on plastic, a chip on film, etc. to form a first signal access area disposed on the display substrate to connect to the first contact pad. The timing controller may be provided separately from the data driver or may be provided integrally with the data driver. However, this embodiment is not limited to this.
图3为本实用新型至少一实施例的第一边框区域的局部平面示意图。在一些示例中，如图1和图3所示，扇出走线区B10和第一信号接入区B11之间还可以设置有第一电路区B14，第一电路区B14内可以设置有多个测试电路，测试电路可以被配置为在测试阶段向显示区域AA的多条数据线DL提供测试数据信号。第一电路区B14还可以设置有多个静电释放电路，以提供静电的释放路径。Figure 3 is a partial plan view of the first frame area of at least one embodiment of the present invention. In some examples, as shown in Figures 1 and 3, a first circuit area B14 may be provided between the fan-out wiring area B10 and the first signal access area B11, and multiple circuit areas B14 may be provided in the first circuit area B14. The test circuit may be configured to provide test data signals to the plurality of data lines DL in the display area AA during the test phase. The first circuit area B14 may also be provided with a plurality of electrostatic discharge circuits to provide electrostatic discharge paths.
在一些示例中，如图1和图3所示，扇出走线区B10可以与显示区域AA连通。扇出走线区B10可以设置有多条引出走线，例如可以包括多条数据引出线511、多条驱动引出线512、第一电源引出线513、第二电源引出线514a和514b。其中，多条数据引出线511可以采用扇出走线方式设置在扇出走线区，并与显示区域AA的多条数据线DL电连接，例如多条数据引出线511与多条数据线DL可以一一对应电连接。多条数据引出线511可以延伸至第一电路区B14，例如与第一电路区B14内的测试电路电连接，还可以延伸至第一信号接入区B11，并与第一信号接入区B11内的对应的第一接触垫电连接。多条驱动引出线512可以从左边框区域和右边框区域分别延伸至扇出走线区B10内，并延伸至第一信号接入区B11，与第一信号接入区B11内的对应的第一接触垫电连接。In some examples, as shown in FIGS. 1 and 3 , the fan-out wiring area B10 may be connected to the display area AA. The fan-out wiring area B10 may be provided with multiple lead-out lines, for example, may include multiple data lead-out lines 511, multiple drive lead-out lines 512, first power lead-out lines 513, and second power lead-out lines 514a and 514b. Among them, the multiple data lead-out lines 511 can be arranged in the fan-out routing area using a fan-out wiring method, and are electrically connected to the multiple data lines DL in the display area AA. For example, the multiple data lead-out lines 511 and the multiple data lines DL can be connected together. One corresponds to the electrical connection. The plurality of data lead-out lines 511 can extend to the first circuit area B14, for example, be electrically connected to the test circuit in the first circuit area B14, or can also extend to the first signal access area B11 and connect with the first signal access area B11. The corresponding first contact pads within are electrically connected. The plurality of drive lead-out lines 512 can respectively extend from the left frame area and the right frame area into the fan-out wiring area B10 and extend to the first signal access area B11, corresponding to the first signal access area B11. Contact pads make electrical connections.
在一些示例中，如图1和图3所示，第一电源引出线513和第二电源引出线514a和514b可以位于多条数据引出线511和多条驱动引出线512远离衬底的一侧。第一电源引出线513可以与显示区域AA的高电位电源线(例如VDD电源线)电连接，并延伸至与第二信号接入区B12的至少一个第二接触垫62电连接。第二电源引出线514a和514b可以为左边框区域和右边框区域内的低电位电源线(例如VSS电源线)电连接线，并延伸至与第二信号接入区B12的至少一个第二接触垫62电连接。第二电源引出线514a和514b可以在第一方向X上位于第一电源引出线513的相对两侧。In some examples, as shown in FIGS. 1 and 3 , the first power lead-out line 513 and the second power lead-out lines 514a and 514b may be located on a side of the plurality of data lead-out lines 511 and the plurality of drive lead-out lines 512 away from the substrate. . The first power lead-out line 513 may be electrically connected to a high-potential power line (eg, a VDD power line) of the display area AA, and extend to be electrically connected to at least one second contact pad 62 of the second signal access area B12. The second power lead-out lines 514a and 514b may be electrical connection lines of low-potential power lines (eg, VSS power lines) in the left and right frame areas, and extend to at least one second contact with the second signal access area B12 Pad 62 is electrically connected. The second power supply lead-out wires 514a and 514b may be located at opposite sides of the first power supply lead-out wire 513 in the first direction X.
在一些示例中，如图3所示，第一信号接入区B11内的多个第一接触垫可以至少包括：第一组第一接触垫61a和第二组第一接触垫61b。第一组第一接触垫61a可以被配置为接收外部控制信号，并将其传输至集成电路，第二组第一接触垫61b可以被配置为接收并传输由集成电路产生的信号，例如将数据信号通过多条数据引出线511传输给显示区域的数据线，将驱动控制信号通过多条驱动引出线512传输给栅极驱动电路。第一信号接入区B11内的第一组第一接触垫61a可以通过多条连接布线63与第二信号接入区B12内的多个第二接触垫62电连接。In some examples, as shown in FIG. 3 , the plurality of first contact pads in the first signal access area B11 may include at least: a first group of first contact pads 61a and a second group of first contact pads 61b. The first set of first contact pads 61a may be configured to receive external control signals and transmit them to the integrated circuit, and the second set of first contact pads 61b may be configured to receive and transmit signals generated by the integrated circuit, such as data. The signal is transmitted to the data lines of the display area through the plurality of data lead-out lines 511, and the drive control signal is transmitted to the gate drive circuit through the plurality of drive lead-out lines 512. The first group of first contact pads 61a in the first signal access area B11 may be electrically connected to the plurality of second contact pads 62 in the second signal access area B12 through a plurality of connection wirings 63.
图4为图3中区域S1的局部平面示意图。图5A为图4中沿P-P’方向的局部剖面示意图。图5B为图4中沿Q-Q’方向的局部剖面示意图。图5A中示意了一个第一接触垫的剖面结构，图5B中示意了一个第二接触垫的剖面结构。FIG. 4 is a partial plan view of area S1 in FIG. 3 . Figure 5A is a partial cross-sectional schematic view along the P-P' direction in Figure 4. Figure 5B is a partial cross-sectional schematic diagram along the Q-Q' direction in Figure 4. FIG. 5A illustrates a cross-sectional structure of a first contact pad, and FIG. 5B illustrates a cross-sectional structure of a second contact pad.
在一些示例中，如图5A所示，一个第一接触垫可以包括：依次叠设的三个接触垫金属层，例如包括第一接触垫金属层711、第二接触垫金属层712和第三接触垫金属层713。第一接触垫金属层711可以与显示区域的第一栅金属层为同层结构，第二接触垫金属层712可以与显示区域的第一源漏金属层为同层结构，第三接触垫金属层713可以与显示区域的第二源漏金属层为同层结构。第一接触垫所连接的连接走线可以与第二接触垫金属层712或第三接触垫金属层713为同层结构，且可以为一体结构。然而，本实施例对此并不限定。在另一些示例中，第一接触垫金属层711可以与显示区域的第一栅金属层为同层结构。In some examples, as shown in FIG. 5A , a first contact pad may include: three contact pad metal layers stacked in sequence, such as a first contact pad metal layer 711 , a second contact pad metal layer 712 and a third contact pad metal layer 712 . Contact pad metal layer 713. The first contact pad metal layer 711 may have the same layer structure as the first gate metal layer of the display area, the second contact pad metal layer 712 may have the same layer structure as the first source and drain metal layer of the display area, and the third contact pad metal layer 711 may have the same layer structure as the first gate metal layer of the display area. Layer 713 may have the same layer structure as the second source and drain metal layer of the display area. The connection trace connected to the first contact pad may be in the same layer structure as the second contact pad metal layer 712 or the third contact pad metal layer 713, and may be an integrated structure. However, this embodiment is not limited to this. In other examples, the first contact pad metal layer 711 may be in the same layer structure as the first gate metal layer of the display area.
在一些示例中，如图5B所示，一个第二接触垫可以包括：依次叠设的两个接触垫金属层，例如包括第四接触垫金属层721和第五接触垫金属层722。第四接触垫金属层721可以与显示区域的第一源漏金属层为同层结构，第五接触垫金属层722可以与显示区域的第二源漏金属层为同层结构。第二接触垫所连接的连接走线可以与第四接触垫金属层721或第五接触垫金属层722为同层结构，且可以为一体结构。In some examples, as shown in FIG. 5B , a second contact pad may include: two contact pad metal layers stacked in sequence, such as a fourth contact pad metal layer 721 and a fifth contact pad metal layer 722 . The fourth contact pad metal layer 721 may be of the same layer structure as the first source and drain metal layer of the display area, and the fifth contact pad metal layer 722 may be of the same layer structure of the second source and drain metal layer of the display area. The connection trace connected to the second contact pad may be in the same layer structure as the fourth contact pad metal layer 721 or the fifth contact pad metal layer 722, and may be an integrated structure.
在一些示例中，如图3和图4所示，第一信号接入区B11的第一组第一接触垫61a可以包括：至少一个第一电压接触垫611和至少一个第二电压接触垫612，例如，两个第一电压接触垫611和两个第二电压接触垫612。其中，两个第一电压接触垫611在第一方向X上相邻，两个第二电压接触垫612在第一方向X上相邻。两个第一电压接触垫611和两个第二电压接触垫612在第一方向X上相邻。两个第一电压接触垫611在第一方向X上可以位于两个第二电压接触垫612远离第一信号接入区B11边缘的一侧。In some examples, as shown in FIGS. 3 and 4 , the first group of first contact pads 61 a in the first signal access area B11 may include: at least one first voltage contact pad 611 and at least one second voltage contact pad 612 , for example, two first voltage contact pads 611 and two second voltage contact pads 612. Wherein, two first voltage contact pads 611 are adjacent in the first direction X, and two second voltage contact pads 612 are adjacent in the first direction X. The two first voltage contact pads 611 and the two second voltage contact pads 612 are adjacent in the first direction X. The two first voltage contact pads 611 may be located on a side of the two second voltage contact pads 612 away from the edge of the first signal access area B11 in the first direction X.
在一些示例中，如图4所示，第二信号接入区B12的多个第二接触垫可以包括：至少一个第三电压接触垫621和至少一个第四电压接触垫622，例如两个第三电压接触垫621和两个第四电压接触垫622。其中，两个第三电压接触垫621在第一方向X上相邻，两个第四电压接触垫622在第一方向X上相邻。两个第三电压接触垫621和两个第四电压接触垫622可以在第一方向X上相邻。两个第三电压接触垫621在第一方向X上可以位于两个第四电压接触垫622远离第二信号接入区B12边缘的一侧。In some examples, as shown in FIG. 4 , the plurality of second contact pads of the second signal access area B12 may include: at least one third voltage contact pad 621 and at least one fourth voltage contact pad 622 , for example, two third voltage contact pads 621 . Three voltage contact pads 621 and two fourth voltage contact pads 622. Among them, two third voltage contact pads 621 are adjacent in the first direction X, and two fourth voltage contact pads 622 are adjacent in the first direction X. The two third voltage contact pads 621 and the two fourth voltage contact pads 622 may be adjacent in the first direction X. The two third voltage contact pads 621 may be located on a side of the two fourth voltage contact pads 622 away from the edge of the second signal access area B12 in the first direction X.
在一些示例中，如图4所示，连接走线区B13的多条连接布线可以包括：至少一条第一连接线631和至少一条第二连接线632，例如两条第一连接线631和两条第二连接线632。一条第一连接线631的两端可以分别与一个第一电压接触垫611和一个第三电压接触垫621电连接，一条第二连接线632的两端可以分别与一个第二电压接触垫612和一个第四电压接触垫622电连接。两条第一连接线631在第一方向X上相邻，两条第二连接线632在第一方向X上相邻，两条第一连接线631和两条第二连接线632在第一方向X上可以相邻。In some examples, as shown in FIG. 4 , the plurality of connection wirings connecting the wiring area B13 may include: at least one first connection line 631 and at least one second connection line 632 , for example, two first connection lines 631 and two second connection line 632. Two ends of a first connection line 631 may be electrically connected to a first voltage contact pad 611 and a third voltage contact pad 621 respectively, and two ends of a second connection line 632 may be electrically connected to a second voltage contact pad 612 and a third voltage contact pad 612 respectively. A fourth voltage contact pad 622 is electrically connected. Two first connection lines 631 are adjacent in the first direction X, two second connection lines 632 are adjacent in the first direction X, and the two first connection lines 631 and the two second connection lines 632 are in the first direction They can be adjacent in direction X.
在一些示例中，第一连接线631传输的电压信号可以大于第二连接线632传输的电压信号。第一电压接触垫611、第三电压接触垫621和第一连接线631可以配置为传输高电压信号，例如VGH信号，第二电压接触垫612、第四电压接触垫622和第二连接线632可以配置为传输低电压信号，例如VGL信号。比如，VGH信号的电压可以约为7V，VGL信号的电压可以约为-7V。本实施例对此并不限定。In some examples, the voltage signal transmitted by the first connection line 631 may be greater than the voltage signal transmitted by the second connection line 632 . The first voltage contact pad 611 , the third voltage contact pad 621 and the first connection line 631 may be configured to transmit a high voltage signal, such as a VGH signal, the second voltage contact pad 612 , the fourth voltage contact pad 622 and the second connection line 632 Can be configured to transmit low voltage signals such as VGL signals. For example, the voltage of the VGH signal can be about 7V, and the voltage of the VGL signal can be about -7V. This embodiment is not limited to this.
在一些示例中，如图4所示，第一连接线631和第二连接线632可以采用非规则布线。例如，第一连接线631可以包括：依次连接的第一线段6311、第二线段6312和第三线段6313。第一线段6311的一端与一个第三电压接触垫621电连接，另一端与第二线段6312的一端电连接，第二线段6312的另一端与第三线段6313的一端电连接，第三线段6313的另一端与一个第一电压接触垫611电连接。例如，第一连接线631与所连接的第三电压接触垫621的第四接触垫金属层和所连接的第一电压接触垫611的第二接触垫金属层可以为一体结构；或者，第一连接线631与所连接的第三电压接触垫621的第五接触垫金属层和所连接的第一电压接触垫611的第三接触垫金属层可以为一体结构。In some examples, as shown in FIG. 4 , the first connection line 631 and the second connection line 632 may adopt irregular wiring. For example, the first connecting line 631 may include: a first line segment 6311, a second line segment 6312, and a third line segment 6313 connected in sequence. One end of the first line segment 6311 is electrically connected to a third voltage contact pad 621, the other end is electrically connected to one end of the second line segment 6312, the other end of the second line segment 6312 is electrically connected to one end of the third line segment 6313, the third line segment The other end of 6313 is electrically connected to a first voltage contact pad 611. For example, the first connection line 631 and the connected fourth contact pad metal layer of the third voltage contact pad 621 and the connected second contact pad metal layer of the first voltage contact pad 611 may be an integrated structure; or, the first The connection line 631 and the connected fifth contact pad metal layer of the third voltage contact pad 621 and the connected third contact pad metal layer of the first voltage contact pad 611 may have an integrated structure.
在一些示例中，如图4所示，第一连接线631的第一线段6311、第二线段6312和第三线段6313可以为直线段，且第一线段6311、第二线段6312和第三线段6313的延伸方向可以不同。在一些示例中，第一线段6311和第二线段6312之间的顺时针夹角可以大于第三线段6313和第二线段6312之间的顺时针夹角。例如，第三线段6313和第二线段6312之间的顺时针夹角可以小于或等于90度，第一线段6311和第二线段6312之间的顺时针夹角可以大于90度。In some examples, as shown in FIG. 4 , the first line segment 6311 , the second line segment 6312 and the third line segment 6313 of the first connecting line 631 may be straight line segments, and the first line segment 6311 , the second line segment 6312 and the third line segment 6311 may be straight lines. The extension directions of the three line segments 6313 may be different. In some examples, the clockwise included angle between the first line segment 6311 and the second line segment 6312 may be greater than the clockwise included angle between the third line segment 6313 and the second line segment 6312. For example, the clockwise angle between the third line segment 6313 and the second line segment 6312 may be less than or equal to 90 degrees, and the clockwise angle between the first line segment 6311 and the second line segment 6312 may be greater than 90 degrees.
在一些示例中，如图4所示，第二连接线632可以包括：依次连接的第四线段6321、第五线段6322和第六线段6323。第四线段6321的一端与一个第四电压接触垫621电连接，另一端与第五线段6322的一端电连接，第五线段6322的另一端与第六线段6323的一端电连接，第六线段6323的另一端与一个第二电压接触垫612电连接。例如，第二连接线632与所连接的第四电压接触垫622的第四接触垫金属层和所连接的第二电压接触垫612的第二接触垫金属层可以为一体结构；或者，第二连接线632与所连接的第四电压接触垫622的第五接触垫金属层和所连接的第二电压接触垫612的第三接触垫金属层可以为一体结构。In some examples, as shown in FIG. 4 , the second connecting line 632 may include: a fourth line segment 6321 , a fifth line segment 6322 , and a sixth line segment 6323 that are connected in sequence. One end of the fourth line segment 6321 is electrically connected to a fourth voltage contact pad 621, the other end is electrically connected to one end of the fifth line segment 6322, the other end of the fifth line segment 6322 is electrically connected to one end of the sixth line segment 6323, and the sixth line segment 6323 The other end is electrically connected to a second voltage contact pad 612. For example, the second connection line 632 and the connected fourth contact pad metal layer of the fourth voltage contact pad 622 and the connected second contact pad metal layer of the second voltage contact pad 612 may be an integrated structure; or, the second The connection line 632 and the connected fifth contact pad metal layer of the fourth voltage contact pad 622 and the connected third contact pad metal layer of the second voltage contact pad 612 may have an integrated structure.
在一些示例中，如图4所示，第二连接线632的第四线段6321、第五线段6322和第六线段6323可以为直线段，且第四线段6321、第五线段6322和第六线段6323的延伸方向可以不同。在一些示例中，第四线段6321和第五线段6322之间的顺时针夹角可以大于第六线段6323和第五线段6322之间的顺时针夹角。例如，第四线段6321和第五线段6322之间的顺时针夹角可以大于90度，第六线段6323和第五线段6322之间的顺时针夹角可以小于或等于90度。In some examples, as shown in FIG. 4 , the fourth line segment 6321 , the fifth line segment 6322 and the sixth line segment 6323 of the second connecting line 632 may be straight line segments, and the fourth line segment 6321 , the fifth line segment 6322 and the sixth line segment 6323 can extend in different directions. In some examples, the clockwise included angle between the fourth line segment 6321 and the fifth line segment 6322 may be greater than the clockwise included angle between the sixth line segment 6323 and the fifth line segment 6322. For example, the clockwise angle between the fourth line segment 6321 and the fifth line segment 6322 may be greater than 90 degrees, and the clockwise angle between the sixth line segment 6323 and the fifth line segment 6322 may be less than or equal to 90 degrees.
在一些示例中，第四线段6321和第五线段6322之间的顺时针夹角可以大于第一线段6311和第二线段6312之间的顺时针夹角，第六线段6323和第五线段6322之间的顺时针夹角可以小于第三线段6313和第二线段6312之间的顺时针夹角。In some examples, the clockwise included angle between the fourth line segment 6321 and the fifth line segment 6322 may be greater than the clockwise included angle between the first line segment 6311 and the second line segment 6312, and the sixth line segment 6323 and the fifth line segment 6322 The clockwise included angle therebetween may be smaller than the clockwise included angle between the third line segment 6313 and the second line segment 6312.
在一些示例中，第一连接线631的第一线段6311的长度可以大于第二线段6312和第三线段6313的长度，第三线段6313的长度可以大于第二线段6312的长度。第二连接线632的第四线段6321的长度可以大于第五线段6322和第六线段6323的长度，例如第五线段6322的长度可以大于或等于第六线段6323的长度。第一连接线631的第一线段6311和相邻的第二连接线632之间的第四线段6321之间的最短距离可以大于第二线段6312和相邻的第五线段6322之间的最短距离，且大于第三线段6313和第六线段6323之间的最短距离。在一些示例中，第一连接线631与相邻的第二连接线632之间的最短距离可以大于或等于60微米，比如，可以大于或等于65微米。例如，第一连接线631的第一线段6311和相邻的第二连接线632之间的第四线段6321之间的最短距离可以为大于或等于90微米且小于或等于120微米，比如可以大于或等于100微米且小于或等于110微米。In some examples, the length of the first line segment 6311 of the first connecting line 631 may be greater than the lengths of the second line segment 6312 and the third line segment 6313, and the length of the third line segment 6313 may be greater than the length of the second line segment 6312. The length of the fourth line segment 6321 of the second connecting line 632 may be greater than the lengths of the fifth line segment 6322 and the sixth line segment 6323. For example, the length of the fifth line segment 6322 may be greater than or equal to the length of the sixth line segment 6323. The shortest distance between the first line segment 6311 of the first connecting line 631 and the adjacent fourth line segment 6321 of the second connecting line 632 may be greater than the shortest distance between the second line segment 6312 and the adjacent fifth line segment 6322 distance, and is greater than the shortest distance between the third line segment 6313 and the sixth line segment 6323. In some examples, the shortest distance between the first connection line 631 and the adjacent second connection line 632 may be greater than or equal to 60 microns, for example, may be greater than or equal to 65 microns. For example, the shortest distance between the first line segment 6311 of the first connection line 631 and the fourth line segment 6321 between the adjacent second connection lines 632 may be greater than or equal to 90 microns and less than or equal to 120 microns, such as Greater than or equal to 100 microns and less than or equal to 110 microns.
本示例通过设置第一连接线631和第二连接线632采用非规则布线方式，可以增大第一连接线631和相邻的第二连接线632之间的距离，以降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。In this example, by setting the first connection line 631 and the second connection line 632 to adopt an irregular wiring method, the distance between the first connection line 631 and the adjacent second connection line 632 can be increased to reduce the risk during the reliability test. Risk of electrochemical corrosion between the first connection line and the adjacent second connection line.
图6为本实用新型至少一实施例的第一连接线和第二连接线的另一示意图。在一些示例中，如图6所示，第一连接线631的第二线段6312和第三线段6313可以大致相互垂直。第一连接线631的第一线段6311和第二线段6312之间的顺时针夹角a1，可以大于第三线段6313和第二线段6312之间的顺时针夹角a2。例如，a2可以约为90度，a1可以大于90度。第二连接线632的第四线段6321和第五线段6322之间的顺时针夹角a3，可以大于第一连接线631的第一线段6311和第二线段6312之间的顺时针夹角a1。第二连接线632的第六线段6323和第五线段6322之间的顺时针夹角a4，可以大于第一连接线631的第三线段6313和第二线段6312之间的顺时针夹角a2。例如，第二连接线632的第四线段6321和第五线段6322之间的顺时针夹角a3与第六线段6323和第五线段6322之间的顺时针夹角a4可以大致相同。Figure 6 is another schematic diagram of the first connection line and the second connection line according to at least one embodiment of the present invention. In some examples, as shown in FIG. 6 , the second line segment 6312 and the third line segment 6313 of the first connecting line 631 may be substantially perpendicular to each other. The clockwise angle a1 between the first line segment 6311 and the second line segment 6312 of the first connecting line 631 may be greater than the clockwise angle a2 between the third line segment 6313 and the second line segment 6312. For example, a2 can be approximately 90 degrees and a1 can be greater than 90 degrees. The clockwise included angle a3 between the fourth line segment 6321 and the fifth line segment 6322 of the second connecting line 632 may be greater than the clockwise included angle a1 between the first line segment 6311 and the second line segment 6312 of the first connecting line 631 . The clockwise angle a4 between the sixth line segment 6323 and the fifth line segment 6322 of the second connecting line 632 may be greater than the clockwise angle a2 between the third line segment 6313 and the second line segment 6312 of the first connecting line 631 . For example, the clockwise angle a3 between the fourth line segment 6321 and the fifth line segment 6322 of the second connecting line 632 and the clockwise angle a4 between the sixth line segment 6323 and the fifth line segment 6322 may be substantially the same.
本示例通过调整a1、a2、a3和a4的角度，可以调整第一连接线和第二连接线的非规则布线方式，从而增大第一连接线631和相邻的第二连接线632之间的距离，以降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。In this example, by adjusting the angles of a1, a2, a3 and a4, the irregular wiring pattern of the first connection line and the second connection line can be adjusted, thereby increasing the distance between the first connection line 631 and the adjacent second connection line 632. distance to reduce the risk of electrochemical corrosion between the first connection line and the adjacent second connection line during the reliability test.
图7为图3中区域S1的另一局部平面示意图。在一些示例中，如图7所示，第二信号接入区B12的多个第二接触垫可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及位于两个第三电压接触垫621和两个第四电压接触垫622之间的一个第二无效接触垫623。两个第三电压接触垫621、第二无效接触垫623以及两个第四电压接触垫622可以沿第一方向X一侧排布。第二无效接触垫623的膜层结构与第三电压接触垫和第四电压接触垫的膜层结构可以一致，故于此不再赘述。FIG. 7 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 7 , the plurality of second contact pads in the second signal access area B12 may include: two third voltage contact pads 621 , two fourth voltage contact pads 622 , and two third voltage contact pads 622 . A second inactive contact pad 623 is between the third voltage contact pad 621 and the two fourth voltage contact pads 622 . The two third voltage contact pads 621, the second invalid contact pad 623 and the two fourth voltage contact pads 622 may be arranged along one side of the first direction X. The film layer structure of the second ineffective contact pad 623 can be consistent with the film layer structure of the third voltage contact pad and the fourth voltage contact pad, so no details are given here.
在一些示例中，第二无效接触垫623的宽度(即沿第一方向X的长度)可以为60微米至70微米，比如可以约为65微米。In some examples, the width of the second invalid contact pad 623 (ie, the length along the first direction X) may be 60 microns to 70 microns, such as about 65 microns.
本示例中，通过在第三电压接触垫和第四电压接触垫之间增加第二无效接触垫，有助于增加第一连接线631和相邻的第二连接线632之间的距离，以降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构的说明可以参照前述实施例的描述，故于此不再赘述。In this example, by adding a second invalid contact pad between the third voltage contact pad and the fourth voltage contact pad, it helps to increase the distance between the first connection line 631 and the adjacent second connection line 632, so as to Reduce the risk of electrochemical corrosion between the first connecting wire and the adjacent second connecting wire during reliability testing. For descriptions of the remaining structures of this example, reference can be made to the descriptions of the previous embodiments, and therefore will not be described again here.
图8为图3中区域S1的另一局部平面示意图。在一些示例中，如图8所示，第二信号接入区B12的多个第二接触垫可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及位于两个第三电压接触垫621和两个第四电压接触垫622之间的一个第二无效接触垫623。连接走线区B13的多条连接走线可以包括：两条第一连接线631、两条第二连接线632、以及一条第一无效连接线633。第一无效连接线633可以位于两条第一连接线631和两条第二连接线632之间。第一无效连接线633可以与第二信号接入区B12的第一无效接触垫623电连接。例如，第一无效连接线633与第一无效接触垫623的其中一个接触垫金属层可以为一体结构。FIG. 8 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 8 , the plurality of second contact pads in the second signal access area B12 may include: two third voltage contact pads 621 , two fourth voltage contact pads 622 , and two third voltage contact pads 622 . A second inactive contact pad 623 is between the third voltage contact pad 621 and the two fourth voltage contact pads 622 . The plurality of connection lines connecting the line area B13 may include: two first connection lines 631, two second connection lines 632, and a first invalid connection line 633. The first invalid connection line 633 may be located between the two first connection lines 631 and the two second connection lines 632 . The first invalid connection line 633 may be electrically connected to the first invalid contact pad 623 of the second signal access area B12. For example, the first inactive connection line 633 and one of the contact pad metal layers of the first inactive contact pad 623 may be an integral structure.
在一些示例中，如图8所示，第一无效连接线633可以沿一个方向延伸。第一无效连接线633可以位于第一连接线631的第一线段和相邻的第二连接线632的第四线段之间。第一无效连接线633与第一连接线631的第一线段的延伸方向可以大致相同，或者，第一无效连接线633与第二连接线632的第四线段的延伸方向可以大致相同。In some examples, as shown in FIG. 8 , the first inactive connection line 633 may extend in one direction. The first invalid connection line 633 may be located between the first line segment of the first connection line 631 and the fourth line segment of the adjacent second connection line 632 . The extending directions of the first line segments of the first ineffective connecting line 633 and the first connecting line 631 may be substantially the same, or the extending directions of the fourth line segments of the first ineffective connecting line 633 and the second connecting line 632 may be substantially the same.
本示例通过在第一连接线和相邻的第二连接线之间设置第一无效连接线，可以增加第一连接线和第二连接线之间传输信号的屏蔽效果，有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构的说明可以参照前述实施例的描述，故于此不再赘述。In this example, by arranging a first invalid connection line between the first connection line and the adjacent second connection line, the shielding effect of the signal transmitted between the first connection line and the second connection line can be increased, which is beneficial to reducing the reliability. Risk of electrochemical corrosion between the first connecting wire and the adjacent second connecting wire during testing. For descriptions of the remaining structures of this example, reference can be made to the descriptions of the previous embodiments, and therefore will not be described again here.
图9为图3中区域S1的另一局部平面示意图。在一些示例中，如图9所示，第二信号接入区B12的多个第二接触垫可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及位于两个第三电压接触垫621和两个第四电压接触垫622之间的一个第二无效接触垫623。连接走线区B13的多条连接走线可以包括：两条第一连接线631、两条第二连接线632、以及两条第一无效连接线633a和633b。两条第一无效连接线633a和633b相邻，并位于两条第一连接线631和两条第二连接线632之间。第一无效连接线633a可以与第一连接线631相邻，第一无效连接线633b可以与第二连接线632相邻。两条第一无效连接线633a和633b可以与第二信号接入区B12的同一个第二无效接触垫623电连接。例如，两条第一无效连接线633a和633b可以与一个第二无效接触垫623的其中一个接触垫金属层为一体结构。然而，本实施例对此并不限定。在另一些示例中，第二信号接入区可以包括：位于第三电压接触垫和第四电压接触垫之间的两个或以上的第二无效接触垫，且每个第二无效接触垫可以与至少一条第一无效连接线电连接。FIG. 9 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 9 , the plurality of second contact pads in the second signal access area B12 may include: two third voltage contact pads 621 , two fourth voltage contact pads 622 , and two third voltage contact pads 622 . A second inactive contact pad 623 is between the third voltage contact pad 621 and the two fourth voltage contact pads 622 . The plurality of connection traces connecting the wiring area B13 may include: two first connection lines 631, two second connection lines 632, and two first invalid connection lines 633a and 633b. The two first ineffective connection lines 633a and 633b are adjacent and located between the two first connection lines 631 and the two second connection lines 632 . The first inactive connection line 633a may be adjacent to the first connection line 631, and the first inactive connection line 633b may be adjacent to the second connection line 632. The two first invalid connection lines 633a and 633b may be electrically connected to the same second invalid contact pad 623 of the second signal access area B12. For example, the two first inactive connection lines 633a and 633b may be integrated with one of the contact pad metal layers of the second inactive contact pad 623. However, this embodiment is not limited to this. In other examples, the second signal access area may include: two or more second inactive contact pads located between the third voltage contact pad and the fourth voltage contact pad, and each second inactive contact pad may It is electrically connected to at least one first invalid connection line.
在一些示例中，如图9所示，第一无效连接线633a和633b的延伸方向可以相同，可以均沿一个方向延伸。第一无效连接线633a和633b可以位于第一连接线631的第一线段和相邻的第二连接线632的第四线段之间。第一无效连接线633a和633b与第一连接线631的第一线段的延伸方向可以大致相同，或者，第一无效连接线633a和633b与第二连接线632的第四线段的延伸方向可以大致相同。In some examples, as shown in FIG. 9 , the extension directions of the first invalid connection lines 633a and 633b may be the same, and may both extend in one direction. The first ineffective connection lines 633a and 633b may be located between the first line segment of the first connection line 631 and the fourth line segment of the adjacent second connection line 632. The extension directions of the first ineffective connection lines 633a and 633b and the first line segment of the first connection line 631 may be substantially the same, or the extension directions of the first ineffective connection lines 633a and 633b and the fourth line segment of the second connection line 632 may be Much the same.
本示例通过在第一连接线和相邻的第二连接线之间设置两条第一无效连接线，可以增加第一连接线和第二连接线之间传输信号的屏蔽效果，有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构的说明可以参照前述实施例的描述，故于此不再赘述。In this example, by arranging two first invalid connection lines between the first connection line and the adjacent second connection line, the shielding effect of the signal transmitted between the first connection line and the second connection line can be increased, which is beneficial to reducing the The risk of electrochemical corrosion between the first connecting wire and the adjacent second connecting wire during the reliability test. For descriptions of the remaining structures of this example, reference can be made to the descriptions of the previous embodiments, and therefore will not be described again here.
图10为图3中区域S1的另一局部平面示意图。图11为图10中区域S2的局部放大示意图。在一些示例中，如图10和图11所示，第一信号接入区B11可以至少包括：两个第一电压接触垫611和两个第二电压接触垫612。两个第一电压接触垫611和两个第二电压接触垫612在第一方向X可以相邻。第二信号接入区B12可以至少包括：两个第三电压接触垫621和两个第四电压接触垫622。两个第三电压接触垫621和两个第四电压接触垫622在第一方向X可以相邻。连接走线区B13可以至少包括：两条第一连接线631和两条第二连接线632。两条第一连接线631和两条第二连接线632可以各自为沿一个方向延伸的直线段。第一连接线631的第一端可以与第一电压接触垫611电连接，第二端可以与第三电压接触垫621电连接；第二连接线632的第一端可以与第二电压接触垫612电连接，第二端可以与第四电压接触垫622电连接。FIG. 10 is another partial plan view of area S1 in FIG. 3 . FIG. 11 is a partially enlarged schematic diagram of area S2 in FIG. 10 . In some examples, as shown in FIGS. 10 and 11 , the first signal access area B11 may include at least two first voltage contact pads 611 and two second voltage contact pads 612 . The two first voltage contact pads 611 and the two second voltage contact pads 612 may be adjacent in the first direction X. The second signal access area B12 may include at least two third voltage contact pads 621 and two fourth voltage contact pads 622 . The two third voltage contact pads 621 and the two fourth voltage contact pads 622 may be adjacent in the first direction X. The connection wiring area B13 may include at least two first connection lines 631 and two second connection lines 632 . The two first connection lines 631 and the two second connection lines 632 may each be a straight segment extending in one direction. The first end of the first connection line 631 can be electrically connected to the first voltage contact pad 611, and the second end can be electrically connected to the third voltage contact pad 621; the first end of the second connection line 632 can be electrically connected to the second voltage contact pad. 612 is electrically connected, the second end may be electrically connected to the fourth voltage contact pad 622 .
在一些示例中，如图11所示，第一连接线631的第一端的线宽可以大于第一电压接触垫611的宽度，第二连接线632的第一端的线宽可以大于第二电压接触垫612的宽度。例如，第一连接线631的第一端的线宽可以大于或等于4微米，第二连接线632的第一端的线宽可以大于或等于4微米。第一连接线631的不同位置的线宽可以大致相同，或者，第一连接线631的线宽可以从第一端开始逐渐增加，第一连接线631的第一端的线宽可以小于第二端的线宽。第二连接线632的不同位置的线宽可以大致相同，或者，第二连接线632的线宽可以从第一端开始逐渐增加，第二连接线632的第一端的线宽可以小于第二端的线宽。在一些示例中，第一连接线631的线宽与第二连接线632的线宽可以大致相同。然而，本实施例对此并不限定。In some examples, as shown in FIG. 11 , the line width of the first end of the first connection line 631 may be greater than the width of the first voltage contact pad 611 , and the line width of the first end of the second connection line 632 may be greater than the width of the second connection line 631 . The width of voltage contact pad 612. For example, the line width of the first end of the first connection line 631 may be greater than or equal to 4 microns, and the line width of the first end of the second connection line 632 may be greater than or equal to 4 microns. The line widths at different positions of the first connection line 631 may be approximately the same, or the line width of the first connection line 631 may gradually increase from the first end, and the line width of the first end of the first connection line 631 may be smaller than the second end. End line width. The line width of the second connection line 632 at different positions may be approximately the same, or the line width of the second connection line 632 may gradually increase from the first end, and the line width of the first end of the second connection line 632 may be smaller than the second connection line 632 . End line width. In some examples, the line width of the first connection line 631 and the line width of the second connection line 632 may be substantially the same. However, this embodiment is not limited to this.
本示例通过增加第一连接线和第二连接线的线宽，可以降低第一连接线和第二连接线的阻抗，从而降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构的说明可以参照前述实施例的描述，故于此不再赘述。In this example, by increasing the line width of the first connection line and the second connection line, the impedance of the first connection line and the second connection line can be reduced, thereby reducing the impact of the first connection line and the adjacent second connection line during the reliability test. risk of electrochemical corrosion. For descriptions of the remaining structures of this example, reference can be made to the descriptions of the previous embodiments, and therefore will not be described again here.
图12为图3中区域S1的另一局部平面示意图。在一些示例中，如图12所示，第一信号接入区B11可以包括：两个第一电压接触垫611、两个第二电压接触垫612、以及位于两个第一电压接触垫611和两个第二电压接触垫612之间的一个第一无效接触垫613。第一无效接触垫613可以与第一电压接触垫611和第二电压接触垫613相邻。例如，第一无效接触垫的宽度可以约为65微米。第二信号接入区B12可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及位于两个第三电压接触垫621和两个第四电压接触垫622之间的一个第二无效接触垫623。连接走线区B13可以至少包括：两条第一连接线631和两条第二连接线632。第一连接线631和第二连接线632的形状例如可以大致为直线形状。FIG. 12 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 12 , the first signal access area B11 may include: two first voltage contact pads 611 , two second voltage contact pads 612 , and two first voltage contact pads 611 and 612 . A first inactive contact pad 613 between the two second voltage contact pads 612 . The first inactive contact pad 613 may be adjacent to the first voltage contact pad 611 and the second voltage contact pad 613 . For example, the width of the first inactive contact pad may be approximately 65 microns. The second signal access area B12 may include: two third voltage contact pads 621, two fourth voltage contact pads 622, and between the two third voltage contact pads 621 and the two fourth voltage contact pads 622. A second inactive contact pad 623. The connection wiring area B13 may include at least two first connection lines 631 and two second connection lines 632 . The shape of the first connection line 631 and the second connection line 632 may be, for example, a substantially linear shape.
本示例通过在第一信号接入区B11内第一电压接触垫和第二电压接触垫之间设置至少一个第一无效接触垫，可以有助于增加第一连接线和第二连接线之间的距离，有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的速度。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。In this example, by arranging at least one first invalid contact pad between the first voltage contact pad and the second voltage contact pad in the first signal access area B11, it can help to increase the distance between the first connection line and the second connection line. The distance is conducive to reducing the speed of electrochemical corrosion between the first connection line and the adjacent second connection line during the reliability test. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图13为图3中区域S1的另一局部平面示意图。在一些示例中，如图13所示，第一信号接入区B11可以包括：两个第一电压接触垫611、两个第二电压接触垫612、以及位于两个第一电压接触垫611和两个第二电压接触垫612之间的一个第一无效接触垫613。第二无效接触垫613可以与第一电压接触垫611和第二电压接触垫612相邻。第二信号接入区B12可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及位于两个第三电压接触垫621和两个第四电压接触垫622之间的一个第二无效接触垫623。连接走线区B13可以包括：两条第一连接线631、两条第二连接线632、以及一条第二无效连接线634。第二无效连接线634的第一端与第一无效接触垫613电连接，第二端与第二无效接触垫623电连接。第二无效连接线634可以位于第一连接线631和第二连接线632之间。第二无效连接线634可以与第一无效接触垫612的其中一个接触垫金属层为一体结构，还可以与第二无效接触垫623的其中一个接触垫金属层为一体结构。例如，第一连接线631、第二连接线632和第二无效连接线634的形状可以大致为直线形状。FIG. 13 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 13 , the first signal access area B11 may include: two first voltage contact pads 611 , two second voltage contact pads 612 , and two first voltage contact pads 611 and 612 . A first inactive contact pad 613 between the two second voltage contact pads 612 . The second inactive contact pad 613 may be adjacent to the first voltage contact pad 611 and the second voltage contact pad 612 . The second signal access area B12 may include: two third voltage contact pads 621, two fourth voltage contact pads 622, and between the two third voltage contact pads 621 and the two fourth voltage contact pads 622. A second inactive contact pad 623. The connection wiring area B13 may include: two first connection lines 631, two second connection lines 632, and a second invalid connection line 634. The first end of the second inactive connection line 634 is electrically connected to the first inactive contact pad 613 , and the second end is electrically connected to the second inactive contact pad 623 . The second invalid connection line 634 may be located between the first connection line 631 and the second connection line 632 . The second invalid connection line 634 may be an integral structure with one of the contact pad metal layers of the first invalid contact pad 612 , and may also be an integrated structure with one of the contact pad metal layers of the second ineffective contact pad 623 . For example, the shapes of the first connection line 631, the second connection line 632, and the second ineffective connection line 634 may be substantially linear shapes.
本示例通过在第一连接线和第二连接线之间设置第二无效连接线，可以有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的速度。关于本示例的其余结构可以参照前述实施例的描述，故于此不再赘述。In this example, by arranging a second invalid connection line between the first connection line and the second connection line, the risk of electrochemical corrosion occurring between the first connection line and the adjacent second connection line during the reliability test can be reduced. speed. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore the details will not be described again.
图14为图3中区域S1的另一局部平面示意图。在一些示例中，如图14所示，第一信号接入区B11的多个第一接触垫可以包括：两个第一电压接触垫611和两个第二电压接触垫612。两个第一电压接触垫611和两个第二电压接触垫612在第一方向X上相邻。第二信号接入区B12的多个第二接触垫可以包括：两个第三电压接触垫621、两个第四电压接触垫622、以及一个第二无效接触垫623。第二无效接触垫623可以位于两个第三电压接触垫621和两个第四电压接触垫622之间。连接走线区B13的多条连接走线可以包括：两条第一连接线631、两条第二连接线632。第一连接线631可以连接第一电压接触垫611和第三电压接触垫621，第二连接线632可以连接第二电压接触垫612和第四电压接触垫622。例如，第一连接线631和第二连接线632的形状可以大致为直线形状。或者，第一连接线631和第二连接线632可以大致为折线形状。FIG. 14 is another partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 14 , the plurality of first contact pads in the first signal access area B11 may include: two first voltage contact pads 611 and two second voltage contact pads 612 . The two first voltage contact pads 611 and the two second voltage contact pads 612 are adjacent in the first direction X. The plurality of second contact pads in the second signal access area B12 may include: two third voltage contact pads 621, two fourth voltage contact pads 622, and one second invalid contact pad 623. The second inactive contact pad 623 may be located between the two third voltage contact pads 621 and the two fourth voltage contact pads 622 . The multiple connection lines connecting the wiring area B13 may include: two first connection lines 631 and two second connection lines 632 . The first connection line 631 may connect the first voltage contact pad 611 and the third voltage contact pad 621 , and the second connection line 632 may connect the second voltage contact pad 612 and the fourth voltage contact pad 622 . For example, the shapes of the first connection line 631 and the second connection line 632 may be substantially linear shapes. Alternatively, the first connection line 631 and the second connection line 632 may be substantially in a polygonal shape.
图15为图14中沿R-R’方向的局部剖面示意图。在一些示例中，如图15所示，第一连接线631可以包括：叠设的第一子走线6311和第二子走线6312。第二子走线6312可以通过第一平坦层105和钝化层104开设的凹槽或过孔与第一子走线6311电连接。第二连接线632可以包括：叠设的第三子走线6321和第四子走线6322。第四子走线6322可以通过第一平坦层105和钝化层104开设的凹槽或过孔与第三子走线6321电连接。第一子走线6311和第三子走线6321可以为同层结构，第二子走线6312和第四子走线6322可以为同层结构。例如，第一子走线6311和第三子走线6321可以位于第一源漏金属层，第二子走线6312和第四子走线6322可以位于第二源漏金属层。Figure 15 is a partial cross-sectional view along the R-R' direction in Figure 14. In some examples, as shown in FIG. 15 , the first connection line 631 may include: stacked first sub-trace 6311 and second sub-trace 6312 . The second sub-trace 6312 may be electrically connected to the first sub-trace 6311 through grooves or vias opened in the first planarization layer 105 and the passivation layer 104 . The second connection line 632 may include: a stacked third sub-trace 6321 and a fourth sub-trace 6322. The fourth sub-trace 6322 may be electrically connected to the third sub-trace 6321 through grooves or vias opened in the first planarization layer 105 and the passivation layer 104 . The first sub-trace 6311 and the third sub-trace 6321 may have the same layer structure, and the second sub-trace 6312 and the fourth sub-trace 6322 may have the same layer structure. For example, the first sub-trace 6311 and the third sub-trace 6321 may be located on the first source-drain metal layer, and the second sub-trace 6312 and the fourth sub-trace 6322 may be located on the second source-drain metal layer.
本示例的第一连接线和第二连接线可以采用双层走线方式，可以降低单根走线的电阻，从而降低走线发热风险。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。The first connection line and the second connection line in this example can adopt a double-layer wiring method, which can reduce the resistance of a single wiring, thereby reducing the risk of wiring heating. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图16为图14中沿R-R’方向的另一局部剖面示意图。在一些示例中，如图16所示，第一连接线631和第二连接线632可以为单层走线。第一连接线631和第二连接线632可以为同层结构，例如，可以位于第一源漏金属层。连接走线区可以设置第一无机绝缘层104a，第一无机绝缘层104a在衬底10的正投影可以覆盖第一连接线631和第二连接线632在衬底的正投影。第一无机绝缘层104a通过覆盖第一连接线631和第二连接线632，对第一连接线631和第二连接线632进行保护。第一无机绝缘层104a与钝化层104可以为一体结构。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。Fig. 16 is another partial cross-sectional schematic diagram along the R-R' direction in Fig. 14. In some examples, as shown in FIG. 16 , the first connection line 631 and the second connection line 632 may be single-layer traces. The first connection line 631 and the second connection line 632 may have the same layer structure, for example, they may be located on the first source-drain metal layer. The first inorganic insulation layer 104a may be provided in the connection wiring area, and the front projection of the first inorganic insulation layer 104a on the substrate 10 may cover the front projection of the first connection line 631 and the second connection line 632 on the substrate. The first inorganic insulating layer 104a protects the first connection line 631 and the second connection line 632 by covering the first connection line 631 and the second connection line 632. The first inorganic insulation layer 104a and the passivation layer 104 may have an integrated structure. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图17为图14中沿R-R’方向的另一局部剖面示意图。在一些示例中，如图17所示，第一连接线631和第二连接线632可以为单层走线。其中，第一连接线631可以位于第一源漏金属层，第二连接线632可以位于第二源漏金属层。连接走线区可以设置第一无机绝缘层104a，第一无机绝缘层104a可以覆盖第一连接线631。本示例通过设置第一连接线和第二连接线位于不同膜层，可以增加第一连接线和第二连接线之间的距离，从而有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。Fig. 17 is another partial cross-sectional schematic diagram along the R-R' direction in Fig. 14. In some examples, as shown in FIG. 17 , the first connection line 631 and the second connection line 632 may be single-layer traces. The first connection line 631 may be located on the first source-drain metal layer, and the second connection line 632 may be located on the second source-drain metal layer. The first inorganic insulation layer 104a may be provided in the connection wiring area, and the first inorganic insulation layer 104a may cover the first connection line 631. In this example, by setting the first connection line and the second connection line to be located on different film layers, the distance between the first connection line and the second connection line can be increased, thereby helping to reduce the risk of the first connection line and adjacent Risk of electrochemical corrosion between the second connecting wires. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图18为图14中沿R-R’方向的另一局部剖面示意图。在一些示例中，如图18所示，第一连接线631和第二连接线632可以为单层走线。其中，第二连接线632可以位于第一源漏金属层，第一连接线631可以位于第二源漏金属层。连接走线区可以设置第一无机绝缘层104a，第一无机绝缘层104a可以覆盖第二连接线632。本示例通过设置第一连接线和第二连接线位于不同膜层，可以增加第一连接线和第二连接线之间的距离，从而有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。Fig. 18 is another partial cross-sectional schematic diagram along the R-R' direction in Fig. 14. In some examples, as shown in FIG. 18 , the first connection line 631 and the second connection line 632 may be single-layer traces. The second connection line 632 may be located on the first source-drain metal layer, and the first connection line 631 may be located on the second source-drain metal layer. The first inorganic insulation layer 104a may be provided in the connection wiring area, and the first inorganic insulation layer 104a may cover the second connection line 632. In this example, by setting the first connection line and the second connection line to be located on different film layers, the distance between the first connection line and the second connection line can be increased, thereby helping to reduce the risk of the first connection line and adjacent Risk of electrochemical corrosion between the second connecting wires. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图19为图3中区域S1的局部平面示意图。在一些示例中，如图19所示，第一信号接入区B11设置的集成电路可以通过异方性导电胶膜(ACF，Anisotropic Conductive Film)与多个第一接触垫电连接。异方性导电胶膜的边界F1的至少部分可以位于连接走线区B13。例如，异方性导电胶膜的边界F1可以至少沿第一方向X延伸。FIG. 19 is a partial plan view of area S1 in FIG. 3 . In some examples, as shown in FIG. 19 , the integrated circuit provided in the first signal access area B11 may be electrically connected to a plurality of first contact pads through an anisotropic conductive film (ACF). At least part of the boundary F1 of the anisotropic conductive adhesive film may be located in the connection wiring area B13. For example, the boundary F1 of the anisotropic conductive adhesive film may extend at least along the first direction X.
在一些示例中，第二平坦层在第一边框区域可以具有第一区域和第二区域。第二平坦层的第一区域的厚度可以大于第二平坦层的第二区域的厚度。本示例中，厚度可以指膜层远离基底一侧的表面与靠近基底一侧的表面之间的垂直距离。第二平坦层例如可以通过半色调掩模工艺制备。例如，第一边框区域的第二平坦层的制备过程中，可以采用具有半色调掩模(Halftone)设计的掩模版制备形成，使得第二平坦层在第一边框区域可以形成厚度不同的第一区域和第二区域，其中，第二区域可以形成非光滑边缘，从而降低绝缘层的边缘轮廓(profile)，增大工艺边界(margin)。然而，本实施例对此并不限定。例如，第二平坦层还可以采用具有灰阶掩模(Graytone)设计的掩模版制备形成。In some examples, the second flat layer may have a first area and a second area in the first frame area. The thickness of the first region of the second planar layer may be greater than the thickness of the second region of the second planar layer. In this example, the thickness may refer to the vertical distance between the surface on the side of the film layer away from the substrate and the surface on the side close to the substrate. The second flat layer can be prepared, for example, by a half-tone masking process. For example, during the preparation process of the second flat layer in the first frame area, a mask with a halftone design can be used to prepare and form the second flat layer, so that the second flat layer can form first layers with different thicknesses in the first frame area. area and a second area, wherein the second area can form a non-smooth edge, thereby reducing the edge profile of the insulating layer and increasing the process margin. However, this embodiment is not limited to this. For example, the second flat layer can also be prepared and formed using a mask with a Graytone design.
在一些示例中，以采用半色调掩模设计的半色调掩模版为例，半色调掩膜版可以包括透明区域、不透明区域和半透明区域，透明区域可以至少与显示区域的开孔区域和第一边框区域的挖槽区域对应，半透明区域可以至少与第二平坦层在第一边框区域的第二区域对应，不透明区域可以与显示基板的其余区域对应。例如，在制备发光结构层之前，可以在第一平坦层上涂覆光刻胶，利用半色调掩模版对光刻胶进行曝光、显影之后，可以形成光刻胶完全保留区、光刻胶半保留区和光刻胶完全去除区。其中，光刻胶完全保留区与半色调掩膜版的不透明区域对应，光刻胶半保留区与半色调掩模版的半透明区域对应，光刻胶完全去除区与半色调掩模版的透明区域对应。随后，可以在光刻胶完全去除区和光刻胶半保留区依次进行刻蚀工艺。第二平坦层的第二区域的厚度可以小于光刻胶完全保留区(即第一区域)对应的第二平坦层的厚度。其中，第二平坦层在第一边框区域的第一区域和第二区域的交界位置与连接走线区的第一连接线和第二连接线在衬底的正投影可以没有交叠。第二平坦层在第一边框区域的第一区域和第二区域的交界位置和异方性导电胶膜的边界F1可以没有交叠。例如，第二平坦层在第一边框区域的第二区域和第一区域的交界位置可以位于异方性导电胶膜的边界F1在第一方向X的一侧，并与异方性导电胶膜的边界F1没有交叠。第二平坦层在第一边框区域的第二区域在衬底的正投影可以覆盖连接走线区的多条连接布线在衬底的正投影。In some examples, taking a half-tone mask designed using a half-tone mask as an example, the half-tone mask may include a transparent area, an opaque area and a translucent area, and the transparent area may be at least the same as the opening area of the display area and the third The translucent area may correspond to at least the second area of the second flat layer in the first frame area, and the opaque area may correspond to the remaining areas of the display substrate. For example, before preparing the light-emitting structure layer, photoresist can be coated on the first flat layer, and after the photoresist is exposed and developed using a half-tone mask, the photoresist completely retained area and the photoresist half-tone layer can be formed. Retained area and completely removed area of photoresist. Among them, the photoresist completely retained area corresponds to the opaque area of the half-tone mask, the photoresist semi-retained area corresponds to the translucent area of the half-tone mask, and the photoresist completely removed area corresponds to the transparent area of the half-tone mask. correspond. Subsequently, the etching process can be performed sequentially in the photoresist completely removed area and the photoresist semi-retained area. The thickness of the second area of the second flat layer may be smaller than the thickness of the second flat layer corresponding to the completely retained area of the photoresist (ie, the first area). Wherein, the intersection between the first area and the second area of the first frame area of the second flat layer and the orthographic projection of the first connection line and the second connection line connecting the wiring area on the substrate may not overlap. The second flat layer may not overlap with the boundary F1 of the anisotropic conductive adhesive film at the interface between the first area and the second area of the first frame area. For example, the interface between the second area and the first area of the first frame area of the second flat layer may be located on one side of the boundary F1 of the anisotropic conductive adhesive film in the first direction X, and is connected to the anisotropic conductive adhesive film. The boundaries of F1 do not overlap. The orthographic projection of the second flat layer on the substrate in the second area of the first frame region can cover the orthographic projection of the plurality of connection wirings in the connection wiring area on the substrate.
本示例通过对第二平坦层的第一区域和第二区域的交界位置进行优化，使得第二平坦层的第一区域和第二区域的交界位置与第一连接线和第二连接线以及异方性导电胶膜的边界均没有交叠，可以避免第一连接线和第二连接线设置在第二平坦层的膜层段差位置，可以降低连接走线区的连接布线位置的膜层段差，从而有利于降低在信赖性测试中第一连接线和相邻的第二连接线之间发生电化学腐蚀的风险，而且可以改善第二平坦层的膜层段差对集成电路设置的影响。关于本示例的其余结构可以参照前述实施例的说明，故于此不再赘述。In this example, the intersection position of the first area and the second area of the second flat layer is optimized, so that the intersection position of the first area and the second area of the second flat layer is in line with the first connection line, the second connection line and the different The boundaries of the square conductive adhesive films do not overlap, which can prevent the first connection line and the second connection line from being arranged at the film layer step difference of the second flat layer, and can reduce the film layer step difference of the connection wiring position in the connection wiring area. This is beneficial to reducing the risk of electrochemical corrosion between the first connection line and the adjacent second connection line during the reliability test, and can improve the impact of the film layer step difference of the second flat layer on the integrated circuit configuration. For the rest of the structure of this example, reference can be made to the description of the previous embodiment, and therefore no further description is given here.
图20为本实用新型至少一实施例的显示装置的示意图。如图20所示，本实施例提供一种显示装置91，包括前述实施例的显示面板910。在一些示例中，显示面板910可以为OLED显示面板。显示装置91可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框或导航仪等任何具有显示功能的产品或部件。FIG. 20 is a schematic diagram of a display device according to at least one embodiment of the present invention. As shown in FIG. 20 , this embodiment provides a display device 91 including the display panel 910 of the previous embodiment. In some examples, display panel 910 may be an OLED display panel. The display device 91 may be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame or a navigator.
本实用新型中的附图只涉及本实用新型涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本实用新型的实施例即实施例中的特征可以相互组合以得到新的实施例。本领域的普通技术人员应当理解，可以对本实用新型的技术方案进行修改或者等同替换，而不脱离本实用新型技术方案的精神和范围，均应涵盖在本实用新型的权利要求的范围当中。The drawings in the present utility model only refer to the structures involved in the present utility model, and other structures can refer to common designs. In the case of no conflict, the embodiments of the present invention, that is, the features in the embodiments, can be combined with each other to obtain new embodiments. Those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently substituted without departing from the spirit and scope of the technical solutions of the present invention, and they shall be covered by the scope of the claims of the present invention.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320770476.8UCN219679162U (en) | 2023-04-10 | 2023-04-10 | Display substrate and display device |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320770476.8UCN219679162U (en) | 2023-04-10 | 2023-04-10 | Display substrate and display device |
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| CN219679162Utrue CN219679162U (en) | 2023-09-12 |
| Application Number | Title | Priority Date | Filing Date |
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| CN202320770476.8UActiveCN219679162U (en) | 2023-04-10 | 2023-04-10 | Display substrate and display device |
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