CN219019115U - Very little sensor PCB - Google Patents

Abstract

The application discloses very little sensor PCB, including from last chip mounting layer, first ground shield layer, second ground shield layer, the wiring layer that sets gradually down, third ground shield layer and device mounting layer, very little sensor PCB still includes the intercommunication the chip mounting layer extremely the dish mesopore of device mounting layer, intercommunication the chip mounting layer extremely the first back drilling connection of third ground shield layer and intercommunication the chip mounting layer extremely the second back drilling of second ground shield layer. The beneficial effects of the utility model are as follows: the layers are connected through holes in the disc and back drilling holes, so that through holes can be reduced, and the circuit layout is maximized; the first layer is designed to be a chip mounting layer, the second/third layer is designed to be a grounding shielding layer, the fourth layer is designed to be a wiring layer, the fifth layer is designed to be a grounding shielding layer, and the sixth layer is designed to be a device mounting layer, so that the matching requirement of impedance is met.

Description

Very little sensor PCB

Technical Field

The application belongs to the technical field of PCBs, and particularly relates to a very small sensor PCB.

Background

The medical field is applied to many micro devices for detecting and sensing related detection data, and because of the application specificity of the devices, the devices must be very small, and thus the mother PCB of the electronic components therein must be very small. When the PCB is extremely tiny, the wiring density is too high, so that all layers of the PCB are difficult to communicate, and the impedance requirement cannot be met.

Disclosure of Invention

An object of the embodiments of the present application is to provide a very small sensor PCB, which designs holes in a disc, back drilling, etc. to reduce wiring density, so that technical problems involved in the background art can be solved.

In order to solve the technical problems, the application is realized as follows:

the utility model provides a very little sensor PCB, includes from last chip mounting layer, first ground shield layer, second ground shield layer, wiring layer, third ground shield layer and the device mounting layer that sets gradually down, very little sensor PCB still includes the intercommunication the chip mounting layer extremely the dish mesopore of device mounting layer, intercommunication the chip mounting layer extremely the first back drilling connection of third ground shield layer and intercommunication the chip mounting layer extremely the second back drilling of second ground shield layer.

As a preferable improvement of the present utility model, dielectric layers are disposed between the die attach layer and the first ground shield layer, between the second ground shield layer and the trace layer, and between the third ground shield layer and the device attach layer.

As a preferred modification of the present utility model, the size of the very small sensor PCB is 3.5 mm by 4mm.

As a preferred refinement of the utility model, the apertures of the holes in the disk, the first back drilling and the second back drilling are all 0.15mm.

The beneficial effects of the utility model are as follows: the layers are connected through holes in the disc and back drilling holes, so that through holes can be reduced, and the circuit layout is maximized; the first layer is designed to be a chip mounting layer, the second/third layer is designed to be a grounding shielding layer, the fourth layer is designed to be a wiring layer, the fifth layer is designed to be a grounding shielding layer, and the sixth layer is designed to be a device mounting layer, so that the matching requirement of impedance is met.

Drawings

Fig. 1 is a schematic structural view of a very small sensor PCB according to an embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type and not limited to the number of objects, e.g., the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.

The following describes in detail the minimal sensor PCB provided in the embodiments of the present application through a specific embodiment and an application scenario thereof with reference to fig. 1.

Referring to fig. 1, an embodiment of the present application provides a very small sensor PCB, which includes a chip mounting layer 1, a firstgrounding shielding layer 2, a secondgrounding shielding layer 3, arouting layer 4, a thirdgrounding shielding layer 5 and adevice mounting layer 6, which are sequentially disposed from top to bottom.

The very small sensor PCB further comprises adisc middle hole 7 communicating the chip attach layer 1 to thedevice attach layer 6, afirst back drilling 8 communicating the chip attach layer 1 to the thirdground shield layer 5, and asecond back drilling 9 communicating the chip attach layer 1 to the secondground shield layer 3.

Specifically, the diameters of theholes 7 in the disk, the firstback drilling holes 8 and the secondback drilling holes 9 are all 0.15mm.

The layers are connected throughholes 7 in the disk and back drilling holes, so that through holes can be reduced, and the circuit layout is maximized.

And adielectric layer 10 is arranged between the chip mounting layer 1 and the firstgrounding shielding layer 2, between the secondgrounding shielding layer 3 and thewiring layer 4 and between the thirdgrounding shielding layer 5 and thedevice mounting layer 6. Thedielectric layer 10 is fixed to other adjacent layers by prepreg adhesion.

The size of the very small sensor PCB is 3.5 mm by 4mm.

The beneficial effects of the utility model are as follows: the layers are connected through holes in the disc and back drilling holes, so that through holes can be reduced, and the circuit layout is maximized; the first layer is designed to be a chip mounting layer, the second/third layer is designed to be a grounding shielding layer, the fourth layer is designed to be a wiring layer, the fifth layer is designed to be a grounding shielding layer, and the sixth layer is designed to be a device mounting layer, so that the matching requirement of impedance is met.

The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those of ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are also within the protection of the present application.

Claims (4)

1. The utility model provides a very little sensor PCB, its characterized in that, includes from last chip mounting layer, first ground shielding layer, second ground shielding layer, wiring layer, third ground shielding layer and the device dress layer that sets gradually down, very little sensor PCB still includes intercommunication the chip mounting layer extremely the dish mesopore of device mounting layer, intercommunication the first back drilling connection of chip mounting layer to third ground shielding layer and intercommunication the chip mounting layer extremely the second back drilling of second ground shielding layer.

2. The miniature sensor PCB of claim 1 wherein dielectric layers are disposed between said die attach layer and said first ground shield layer, between said second ground shield layer and said trace layer, and between said third ground shield layer and said device attach layer.

3. A miniature sensor PCB according to claim 1, wherein the miniature sensor PCB has a size of 3.5 mm by 4mm.

4. The miniature sensor PCB of claim 1 wherein the apertures of said in-disc hole, said first back-drilled hole and said second back-drilled hole are all 0.15mm.

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