CN210038846U - Digital circuit device for processing demodulation blind area of high-frequency radio frequency identification chip - Google Patents

Abstract

The utility model relates to a digital circuit device that high frequency radio frequency identification chip demodulation blind area was handled contains: the radio frequency data processing circuit is used for sampling the radio frequency output data by using a radio frequency output clock, so that the time sequence relation between the processed data and the clock is relatively fixed; the radio frequency clock processing circuit performs logic operation on the radio frequency output clock by using the output signal of the radio frequency data processing circuit, and the processed output clock signal can effectively avoid burrs; and the combined output circuit performs logic operation on the output data and the output clock according to the logic requirements of the demodulation digital circuit on the clock signal and the data signal, so that the output signal of the combined output circuit meets the logic requirements of the demodulation digital circuit on correct decoding. The output data and the output clock processed by the device have stable time sequence relation, and can effectively avoid burrs on the clock, meet the requirement of stable work of a subsequent demodulation digital circuit, and effectively avoid the blind area phenomenon of a high-frequency radio frequency identification chip.

Description

Digital circuit device for processing demodulation blind area of high-frequency radio frequency identification chip

Technical Field

The invention belongs to the field of high-frequency radio frequency identification chips, in particular to the technical field of non-contact radio frequency chip demodulation circuits specified by a high-frequency radio frequency identification protocol, and comprises but is not limited to ISO14443-A, ISO-15693, MiFare1, ISO18092, NFC and the like.

Background

The high-frequency radio frequency identification chip mainly conforms to protocols such as ISO14443, ISO-15693, MiFare1, ISO18092, NFC and the like, and the carrier frequency of the high-frequency radio frequency identification chip is 13.56MHz, and the subcarrier frequency of the high-frequency radio frequency identification chip is 1/128 of the carrier frequency. The subcarriers may include a pause, each subcarrier period representing 1-bit data, and the position where the pause occurs in 1 subcarrier period defines whether the data represented by the current subcarrier is 0 or 1.

The card reader modulates the subcarrier signal by the carrier frequency and sends the subcarrier signal to the radio frequency identification chip. That is, the modulated signal sent by the reader to the RFID chip represents 1 bit of data every 128 carrier cycles.

The demodulation function circuit can realize the function of correctly decoding the modulated signal sent by the card reader and decoding the data sent by the card reader.

The demodulation function circuit is generally divided into a demodulation analog circuit and a demodulation digital circuit, wherein the demodulation analog circuit has the main functions of:

1. outputting a clock signal recovered from the carrier: the radio frequency output clock, the frequency of the recovered radio frequency output clock is 13.56MHz, the radio frequency output clock is normally output during non-pause, and no radio frequency output clock is output due to no carrier wave during pause;

2. outputting the demodulated data signal: and the radio frequency output data signal shows that the non-pause period value is 1, and the pause period value is 0.

The radio frequency output clock and the radio frequency output data signal output by the demodulation analog circuit are sent to the demodulation digital circuit, and the demodulation digital circuit has the main function of decoding according to the received radio frequency output clock and the received radio frequency output data signal to decode data sent by the card reader.

The correct operation of the demodulation digital circuit requires that the timing relationship between the output clock signal, i.e., the rf output clock, of the demodulation analog circuit and the demodulated data signal, i.e., the rf output data, be relatively stable.

In reality, most of demodulation analog circuits have poor performance, when the field intensity of a card reader changes or the position of a card on the card reader is changed, the time sequence relation between a radio frequency output clock and radio frequency output data is different when each pause comes, the radio frequency output clock output by the card reader may have burrs, decoding failure of a demodulation digital circuit may be caused, and a radio frequency identification chip may show a blind area phenomenon.

Disclosure of Invention

The invention discloses a digital circuit device for processing demodulation blind areas in a high-frequency radio frequency identification chip, which can adapt to the condition that the time sequence relation of two paths of signals of a radio frequency output clock and radio frequency output data output by a demodulation analog circuit under different field strengths is unstable and the condition that the radio frequency output clock possibly carries burrs, and can effectively solve the problem of the blind areas.

In order to achieve the above object, the present invention provides a digital circuit device for processing demodulation blind areas in a high frequency radio frequency identification chip, which processes two paths of signal radio frequency output clocks and radio frequency output data output by a demodulation analog circuit, the two paths of processed signals are the device output clock and the device output data, and the device output clock and the device output data are sent to a demodulation digital circuit for decoding.

The device disclosed by the invention comprises: the radio frequency data processing circuit, the radio frequency clock processing circuit, the combination output circuit.

The radio frequency data processing circuit realizes the function of processing the radio frequency output data, the input of the radio frequency data processing circuit is a radio frequency output clock and radio frequency output data, and the output signal is the output data of the radio frequency data processing circuit and is connected with the radio frequency clock processing circuit and the combined output circuit.

In the radio frequency data processing circuit, a radio frequency output clock performs sampling processing on radio frequency output data, so that the processed output data of the radio frequency data processing circuit and the radio frequency output clock have a fixed time sequence relation.

The radio frequency clock processing circuit realizes the function of processing the radio frequency output clock, the input signals of the radio frequency clock processing circuit are the radio frequency output clock and the radio frequency data processing circuit output data, and the output signals are the radio frequency clock processing circuit output clock.

In the circuit, because the output data of the radio frequency data processing circuit has a fixed time sequence relation with the radio frequency output clock, the radio frequency data processing circuit and the radio frequency output clock can be subjected to logic operation according to an effective edge used in the processing of the radio frequency data processing circuit, so that the condition that the clock after the logic operation generates burrs can be effectively avoided, and the burrs carried by the original radio frequency output clock are also avoided.

The signal after logic processing with the output data of the radio frequency data processing circuit is the output clock of the radio frequency clock processing circuit, which is used as the output signal of the radio frequency clock processing circuit and is connected with the combined output circuit.

The combined output circuit realizes the inversion or other logic operation of the output signal of the radio frequency data processing circuit, the output data of the radio frequency data processing circuit and the output signal of the radio frequency clock processing circuit.

Although the output data of the radio frequency data processing circuit and the output clock of the radio frequency clock processing circuit have a fixed time sequence relationship, the requirement of the demodulation digital circuit on the logic relationship of the radio frequency data processing circuit and the radio frequency clock processing circuit can not be met, and therefore inversion or other logic operation is required. The selection of the inversion or other logical operation depends on the logical relationship required for decoding by the demodulation digital circuit connected thereafter.

The output signal of the combined output circuit is the combined output circuit output data and the combined output circuit output clock, which are used as the input of the demodulation digital circuit.

It can be seen that the output signal through the combined output circuit is: the combination output circuit outputs data and the combination output circuit outputs a clock, the time sequence relation is relatively stable, and the combination output circuit outputs the clock without burrs, so that the condition of decoding errors of the digital demodulation circuit can be effectively avoided, and the blind area phenomenon of the radio frequency identification chip under different card reader field intensities is avoided.

Drawings

Fig. 1 is a schematic diagram of a digital circuit device for processing a dead zone of a high-frequency radio frequency identification chip, a demodulation analog circuit and a demodulation digital circuit in connection.

FIG. 2 is a block diagram and a connection diagram of a digital circuit device for processing a dead zone of a high frequency radio frequency identification chip according to the present invention.

Detailed Description

The following description of the preferred embodiment of the present apparatus is made with reference to fig. 1 and 2.

As shown in fig. 1, for the connection relationship between the digital circuit device for processing the blind area of the high frequency rfid chip and the demodulation analog circuit and the demodulation digital circuit provided by the present invention, the input is the rf output clock and the rf output data, and the output is the combined output circuit output data and the combined output circuit data clock. The radio frequency output clock and the radio frequency output data are both output of the demodulation analog circuit, and the combined output circuit outputs the data and the clock as input of the demodulation digital circuit.

As shown in fig. 2, the structure and connection relationship of the digital circuit device for processing the blind area in the high frequency radio frequency identification chip provided by the invention are shown.

The radio frequency output clock and the radio frequency output data are used as input signals to enter the device, and firstly enter the radio frequency data processing circuit. In the radio frequency data processing circuit, a two-stage register is adopted to sample the radio frequency output data signal by using the rising edge of the radio frequency output clock signal, and the signal output by the second register is the output data of the radio frequency data processing circuit.

The rising edge and the falling edge of the output data of the radio frequency data processing circuit have stable time sequence relation with the rising edge of the radio frequency output clock. The radio frequency data processing circuit outputs data as the output of the radio frequency output data processing circuit, and the data are respectively input into the radio frequency clock processing circuit and the combined output circuit.

As shown in fig. 2, the input of the rf clock processing circuit is the rf output clock and the rf data processing circuit outputs data.

In the radio frequency clock processing circuit, the output data of the radio frequency data processing circuit is inverted and is subjected to OR operation with a radio frequency output clock signal, and the signal after the operation is the output clock of the radio frequency clock processing circuit. Because the rising edge of the radio frequency output clock and the output data of the radio frequency data processing circuit have stable time sequence relation, the processed output clock of the radio frequency clock processing circuit has no burr. The radio frequency clock processing circuit outputs a clock as an output signal of the radio frequency clock processing circuit, and the output signal is input to the combined output circuit.

As shown in fig. 2, the input of the combination output circuit is the rf clock processing circuit output clock and the rf data processing circuit output data, which are respectively from the rf clock processing circuit and the rf data processing circuit.

According to the requirements of the demodulation digital circuit connected behind, in this embodiment, the output clock of the rf clock processing circuit and the output data of the rf data circuit are both subjected to inversion processing, and the processed signals are used as output signals, the output signals are the output clock of the combined output circuit and the output data of the combined output circuit, which are used as input signals of the demodulation digital circuit connected behind.

It can be seen that, the output clock of the combined output circuit and the output data of the combined output circuit are used as the input signals of the demodulation digital circuit, compared with the original signal radio frequency output clock and the radio frequency output data output by the analog demodulation circuit, the relative time sequence relation is stable, burrs on the clock signal are avoided, the demodulation digital circuit can perform stable decoding, the decoding error condition which possibly occurs when the demodulation digital circuit is processed is effectively avoided, and the blind zone phenomenon which is shown under different field intensities in the high-frequency radio frequency identification chip is avoided.

While the present invention has been described in detail with respect to the preferred embodiments thereof, it will be apparent that various modifications and alternatives thereto will become apparent to those skilled in the art upon reading the foregoing description. For example, in the above embodiments, the rising edge sampling is replaced by the falling edge sampling in the rf data processing circuit, or other logic operations are adopted in the rf clock processing circuit and the combinational output circuit. Therefore, those skilled in the art should, by referring to the description of the present invention, make various modifications or extensions of the application principle of the embodiments without departing from the spirit and scope of the present invention, and these should also be construed as the protection scope of the present invention.

Claims (4)

1. A digital circuit device for processing demodulation blind area of high frequency radio frequency identification chip is characterized in that the device comprises:

a radio frequency data processing circuit;

the radio frequency clock processing circuit is connected with the radio frequency data processing circuit;

and the combined output circuit is connected with the radio frequency data processing circuit and the radio frequency clock processing circuit.

2. The digital circuit device for processing the demodulation dead zone of the high frequency radio frequency identification chip as claimed in claim 1, wherein the radio frequency data processing circuit samples the radio frequency output data by the radio frequency output clock, the processed signal is the output data of the radio frequency data processing circuit, the output data of the radio frequency data processing circuit and the radio frequency output clock have a fixed time sequence relationship, and the output signal of the circuit is the output data of the radio frequency data processing circuit.

3. The digital circuit device for demodulation blind area processing of high frequency radio frequency identification chip according to claim 1, wherein the radio frequency clock processing circuit, in the circuit, uses the output signal of the radio frequency data processing circuit, the output data of the radio frequency data processing circuit is used as one of the input signals, since the output data of the radio frequency data processing circuit has a fixed time sequence relation with the radio frequency output clock, the output data of the radio frequency data processing circuit and the radio frequency output clock can be logically processed according to the sampling effective edge in the radio frequency data processing circuit, so that the condition that the clock after the logical processing generates the glitch can be effectively avoided, the signal after the logical processing is the output clock of the radio frequency clock processing circuit, and the output signal of the circuit is the output clock of the radio frequency clock processing circuit.

4. The digital circuit device for demodulation blind area processing of high frequency radio frequency identification chip as claimed in claim 1, characterized by a combination output circuit in which the output signals of said radio frequency data processing circuit and said radio frequency clock processing circuit, the output data of said radio frequency data processing circuit and the output clock of said radio frequency clock processing circuit are processed, and the output signals of said radio frequency data processing circuit and said radio frequency clock processing circuit, which are the output data of said combination output circuit and the output clock of said combination output circuit, are logically operated according to the logical relationship between the output data of said combination output circuit and the output clock of said combination output circuit required for demodulation of the digital circuit.

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