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CN204046647U - A kind of multi-channel optical fibre turns parallel LVDS data communication adapter - Google Patents

A kind of multi-channel optical fibre turns parallel LVDS data communication adapter
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Publication number
CN204046647U
CN204046647UCN201420539496.5UCN201420539496UCN204046647UCN 204046647 UCN204046647 UCN 204046647UCN 201420539496 UCN201420539496 UCN 201420539496UCN 204046647 UCN204046647 UCN 204046647U
Authority
CN
China
Prior art keywords
sdram
fpga
data communication
communication adapter
optical fibre
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201420539496.5U
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Chinese (zh)
Inventor
舒德军
张建华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing Changfeng Space Electronics Technology Co Ltd
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Nanjing Changfeng Space Electronics Technology Co Ltd
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Publication date
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Priority to CN201420539496.5UpriorityCriticalpatent/CN204046647U/en
Application grantedgrantedCritical
Publication of CN204046647UpublicationCriticalpatent/CN204046647U/en
Anticipated expirationlegal-statusCritical
Expired - Fee Relatedlegal-statusCriticalCurrent

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Abstract

The utility model discloses a kind of multi-channel optical fibre and turn parallel LVDS data communication adapter, comprise include BRAM FPGA, voltage stabilizing chip, the first optical fiber interface, the second optical fiber interface, the first photoelectric conversion module, the second photoelectric conversion module, PCI bridging chip, a SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM; First optical fiber interface is connected with FPGA by the first photoelectric conversion module, second optical fiber interface is connected with FPGA by the second photoelectric conversion module, one SDRAM, the 2nd SDRAM, Three S's DRAM are all connected with FPGA with the 4th SDRAM, FPGA is by the external main control computer of PCI bridging chip, and it is that each parts are powered that voltage stabilizing chip connects external power source.The utility model overcomes the shortcoming of existing three kinds of transmission meanss.

Description

A kind of multi-channel optical fibre turns parallel LVDS data communication adapter
Technical field
The utility model relates to a kind of adapter, is specifically related to a kind of multi-channel optical fibre and turns parallel LVDS data communication adapter.
Background technology
At present, data communication technology field is used for Long-range Data Transmission data three kinds of modes, and one is adopt Ethernet transmission data, and two is adopt optical fiber to transmit data, and three is the data that will transmit are transferred to differential signal transmit.The shortcoming of Ethernet, Optical Fiber Transmission two kinds of modes is, the data of transmission are the parallel data information of low speed after serioparallel exchange device, again parallel data is delivered to required receiving system, cause path delay excessive like this, thus can not meet the demand that receiving system needs upgrade data message fast.Although differential transfer can meet the demand of the quick more row data message of receiving system, if the parallel data of transmission is too much, data wire will be caused too many.So differential transfer not only increases cost, make again the workload of the inspection of line strengthen, after working long hours, line transmission unstable properties improves greatly simultaneously.
Utility model content
The utility model provides a kind of multi-channel optical fibre and turns parallel LVDS data communication adapter, overcomes the shortcoming of existing three kinds of transmission meanss.
In order to solve the problems of the technologies described above, the technical solution adopted in the present invention is:
A kind of multi-channel optical fibre turns parallel LVDS data communication adapter, comprise include BRAM FPGA, voltage stabilizing chip, the first optical fiber interface, the second optical fiber interface, the first photoelectric conversion module, the second photoelectric conversion module, PCI bridging chip, a SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM; Described first optical fiber interface is connected with FPGA by the first photoelectric conversion module, described second optical fiber interface is connected with FPGA by the second photoelectric conversion module, a described SDRAM, the 2nd SDRAM, Three S's DRAM are all connected with FPGA with the 4th SDRAM, described FPGA is by the external main control computer of PCI bridging chip, and it is that each parts are powered that voltage stabilizing chip connects external power source.
The model of described FPGA is Virtex5FPGA.
Described BRAM, a SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM all adopt table tennis downloaded stored mode, all adopt the flow work thought.
The model of a described SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM is MT47H64M16HR-37E.
The model of described PCI bridging chip is PCI9056.
The model of described voltage stabilizing chip is LTM4620.
Described multi-channel optical fibre turns the CPCI structure that the design of parallel LVDS data communication adapter adopts 6U height.
The beneficial effect that the utility model reaches: the utility model both can upgrade data message to receiving system fast, connecting line too much when simultaneously additionally reducing long-distance transmissions, greatly reduces the workload checking circuit, also improves transmission performance.
Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.Following examples only for clearly the technical solution of the utility model being described, and can not limit protection range of the present utility model with this.
As shown in Figure 1, a kind of multi-channel optical fibre turns parallel LVDS data communication adapter, design adopts the CPCI structure of 6U height, parts comprise include BRAM FPGA, voltage stabilizing chip, the first optical fiber interface, the second optical fiber interface, the first photoelectric conversion module, the second photoelectric conversion module, PCI bridging chip, a SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM.
Connected mode: the first optical fiber interface is connected with FPGA by the first photoelectric conversion module, second optical fiber interface is connected with FPGA by the second photoelectric conversion module, one SDRAM, the 2nd SDRAM, Three S's DRAM are all connected with FPGA with the 4th SDRAM, FPGA is by the external main control computer of PCI bridging chip, and it is that each parts are powered that voltage stabilizing chip connects external power source.
Above-mentioned FPGA have employed a slice high-speed interface, jumbo Virtex5FPGA (XC5VSX95T), the model of the one SDRAM, the 2nd SDRAM, Three S's DRAM and the 4th SDRAM is MT47H64M16HR-37E, the model of PCI bridging chip is PCI9056, and the model of voltage stabilizing chip is LTM4620.
The data message of long-distance transmissions sends into FPGA through the first optical fiber interface and the first photoelectric conversion module successively, FPGA is sent into through the second optical fiber interface and the second photoelectric conversion module successively in another same road, carry out going here and there and filling in FPGA inside changing, the BRAM of FPGA inside is used when data message is less, a SDRAM is used time larger, 2nd SDRAM, one or more in Three S's DRAM and the 4th SDRAM, BRAM, one SDRAM, 2nd SDRAM, Three S's DRAM and the 4th SDRAM all adopts table tennis downloaded stored mode, all adopt the flow work thought, so just can ensure the real-time performance that data message upgrades, and PCI bridging chip makes main control computer can communicate mutually with FPGA, ensure that various parameter transmission to FPGA, also the parameter needed can be returned to main control computer simultaneously, the power supply of each parts all adopts secondary pressure scheme, not only reduce the direct interference of external power source like this, protect each parts simultaneously.
In sum, above-mentioned multi-channel optical fibre turns parallel LVDS data communication adapter both can upgrade data message to receiving system fast, connecting line too much when simultaneously additionally reducing long-distance transmissions, greatly reduces the workload checking circuit, also improves transmission performance.
The above is only preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite not departing from the utility model know-why; can also make some improvement and distortion, these improve and distortion also should be considered as protection range of the present utility model.

Claims (7)

CN201420539496.5U2014-09-192014-09-19A kind of multi-channel optical fibre turns parallel LVDS data communication adapterExpired - Fee RelatedCN204046647U (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201420539496.5UCN204046647U (en)2014-09-192014-09-19A kind of multi-channel optical fibre turns parallel LVDS data communication adapter

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201420539496.5UCN204046647U (en)2014-09-192014-09-19A kind of multi-channel optical fibre turns parallel LVDS data communication adapter

Publications (1)

Publication NumberPublication Date
CN204046647Utrue CN204046647U (en)2014-12-24

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CN201420539496.5UExpired - Fee RelatedCN204046647U (en)2014-09-192014-09-19A kind of multi-channel optical fibre turns parallel LVDS data communication adapter

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN109493832A (en)*2018-12-292019-03-19小派科技(上海)有限责任公司Support the VR display device and its control method of DSC compression

Cited By (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN109493832A (en)*2018-12-292019-03-19小派科技(上海)有限责任公司Support the VR display device and its control method of DSC compression

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Legal Events

DateCodeTitleDescription
C14Grant of patent or utility model
GR01Patent grant
CF01Termination of patent right due to non-payment of annual fee

Granted publication date:20141224

Termination date:20170919

CF01Termination of patent right due to non-payment of annual fee

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