技术领域technical field
本实用新型涉及电压浪涌抑制技术领域，具体是一种储能电容式高、低压浪涌抑制电路。The utility model relates to the technical field of voltage surge suppression, in particular to an energy storage capacitive high and low voltage surge suppression circuit.
背景技术Background technique
在电源领域的电路设计中必须考虑浪涌抑制，否则当电源输入端输入浪涌电压时，会对整个电源电路产生干扰，使电路出现故障或损坏。传统的储能电容式浪涌抑制电路只能单独抑制高压浪涌或低压浪涌，不利于整个电源电路的稳定性。Surge suppression must be considered in the circuit design of the power supply field, otherwise, when the power supply input terminal inputs a surge voltage, it will interfere with the entire power supply circuit, causing the circuit to malfunction or be damaged. Traditional energy storage capacitive surge suppression circuits can only suppress high-voltage surges or low-voltage surges alone, which is not conducive to the stability of the entire power supply circuit.
实用新型内容Utility model content
本实用新型的目的在于提供一种储能电容式高、低压浪涌抑制电路，能够同时满足抑制高压浪涌和低压浪涌的需求。The purpose of the utility model is to provide an energy storage capacitive high-voltage and low-voltage surge suppression circuit, which can simultaneously meet the requirements of suppressing high-voltage surges and low-voltage surges.
本实用新型的技术方案为：The technical scheme of the utility model is:
一种储能电容式高、低压浪涌抑制电路,包括防回流二极管、DC/DC转换器、储能电容和MOS管；所述防回流二极管的阳极和DC/DC转换器的输入端均通过常闭继电器连接到电源输入电压，所述防回流二极管的阴极直接与电源输出端连接，所述DC/DC转换器的输出端通过常开继电器与电源输出端连接；所述储能电容的一端连接到DC/DC转换器与常开继电器之间的节点，另一端接地；所述MOS管的漏极连接到电源输入电压，其源极通过第一限流电阻接地，MOS管与第一限流电阻之间的节点分别连接到常闭继电器和常开继电器的控制端，An energy storage capacitive high and low voltage surge suppression circuit, comprising an anti-backflow diode, a DC/DC converter, an energy storage capacitor and a MOS tube; the anode of the anti-backflow diode and the input end of the DC/DC converter pass through The normally closed relay is connected to the input voltage of the power supply, the cathode of the anti-backflow diode is directly connected to the output terminal of the power supply, and the output terminal of the DC/DC converter is connected to the output terminal of the power supply through a normally open relay; one end of the energy storage capacitor Connect to the node between the DC/DC converter and the normally open relay, and the other end is grounded; the drain of the MOS tube is connected to the power input voltage, and its source is grounded through the first current limiting resistor, and the MOS tube is connected to the first limiting resistor. The nodes between the flow resistors are respectively connected to the control terminals of the normally closed relay and the normally open relay,
该电路还包括由第一采样电阻和第二采样电阻构成的第一采样电路、由第三采样电阻和第四采样电阻构成的第二采样电路、由稳压二极管和第二限流电阻构成的基准电压电路以及由第一比较器、第一开关元件、第二比较器和第二开关元件构成的控制电路；The circuit also includes a first sampling circuit composed of a first sampling resistor and a second sampling resistor, a second sampling circuit composed of a third sampling resistor and a fourth sampling resistor, a voltage regulator diode and a second current limiting resistor. a reference voltage circuit and a control circuit composed of a first comparator, a first switching element, a second comparator and a second switching element;
所述第一采样电阻与第二采样电阻串联连接，所述第一采样电阻的一端连接到电源输入电压，另一端通过第二采样电阻接地，所述第三采样电阻与第四采样电阻串联连接，所述第三采样电阻的一端连接到电源输入电压，另一端通过第四采样电阻接地；所述稳压二极管的阳极接地，其阴极通过第二限流电阻连接到电源输入电压；The first sampling resistor is connected in series with the second sampling resistor, one end of the first sampling resistor is connected to the power supply input voltage, the other end is grounded through the second sampling resistor, and the third sampling resistor is connected in series with the fourth sampling resistor , one end of the third sampling resistor is connected to the power supply input voltage, and the other end is grounded through the fourth sampling resistor; the anode of the Zener diode is grounded, and its cathode is connected to the power supply input voltage through the second current limiting resistor;
所述第一比较器的反相输入端和第二比较器的同相输入端均连接到稳压二极管与第二限流电阻之间的节点，所述第一比较器的同相输入端连接到第一采样电阻与第二采样电阻之间的节点，所述第二比较器的反相输入端连接到第三采样电阻与第四采样电阻之间的节点，所述第一比较器的输出端通过第一开关元件与MOS管的栅极连接，所述第二比较器的输出端通过第二开关元件与MOS管的栅极连接。The inverting input terminal of the first comparator and the non-inverting input terminal of the second comparator are both connected to the node between the Zener diode and the second current limiting resistor, and the non-inverting input terminal of the first comparator is connected to the first A node between the sampling resistor and the second sampling resistor, the inverting input terminal of the second comparator is connected to the node between the third sampling resistor and the fourth sampling resistor, and the output terminal of the first comparator is passed through The first switch element is connected to the gate of the MOS transistor, and the output terminal of the second comparator is connected to the gate of the MOS transistor through the second switch element.
所述的储能电容式高、低压浪涌抑制电路，所述第一开关元件选用第一二极管，所述第一二极管的阳极与第一比较器的输出端连接，其阴极与MOS管的栅极连接；所述第二开关元件选用第二二极管，所述第二二极管的阳极与第二比较器的输出端连接，其阴极与MOS 管的栅极连接。In the energy storage capacitive high and low voltage surge suppression circuit, the first switch element is selected from the first diode, the anode of the first diode is connected to the output terminal of the first comparator, and its cathode is connected to the output terminal of the first comparator. The gate of the MOS transistor is connected; the second switch element is a second diode, the anode of the second diode is connected to the output terminal of the second comparator, and the cathode thereof is connected to the gate of the MOS transistor.
由上述技术方案可知，本实用新型可以同时满足抑制高压浪涌和低压浪涌的需求，提高了电源电路的工作稳定性。It can be known from the above technical solution that the utility model can meet the demands of suppressing high-voltage surge and low-voltage surge at the same time, and improves the working stability of the power supply circuit.
附图说明Description of drawings
图1是本实用新型具体实施例的电路结构示意图。Fig. 1 is a schematic diagram of the circuit structure of a specific embodiment of the utility model.
具体实施方式Detailed ways
下面结合附图和具体实施例进一步说明本实用新型。Further illustrate the utility model below in conjunction with accompanying drawing and specific embodiment.
如图1所示，一种储能电容式高、低压浪涌抑制电路，包括常闭继电器K1、防回流二极管D0、DC/DC转换器1、储能电容C、常开继电器K2、NMOS管Q、第一限流电阻R5、第一采样电路2、第二采样电路3、基准电压电路4和控制电路5，第一采样电路2由第一采样电阻R1和第二采样电阻R2构成，第二采样电路3由第三采样电阻R4和第四采样电阻R5构成，基准电压电路4由稳压二极管Dz和第二限流电阻R6构成，控制电路5由第一比较器V1、第一二极管D1、第二比较器V2和第二二极管D2构成。As shown in Figure 1, an energy storage capacitive high and low voltage surge suppression circuit includes a normally closed relay K1, an anti-backflow diode D0, a DC/DC converter 1, an energy storage capacitor C, a normally open relay K2, and an NMOS tube Q, the first current limiting resistor R5, the first sampling circuit 2, the second sampling circuit 3, the reference voltage circuit 4 and the control circuit 5, the first sampling circuit 2 is composed of the first sampling resistor R1 and the second sampling resistor R2, the second The second sampling circuit 3 is composed of the third sampling resistor R4 and the fourth sampling resistor R5, the reference voltage circuit 4 is composed of the Zener diode Dz and the second current limiting resistor R6, and the control circuit 5 is composed of the first comparator V1, the first diode Tube D1, the second comparator V2 and the second diode D2 constitute.
防回流二极管D0的阳极和DC/DC转换器1的输入端均通过常闭继电器K1连接到电源输入电压，防回流二极管D0的阴极直接与电源输出端连接，DC/DC转换器1的输出端通过常开继电器K2与电源输出端连接。储能电容C的一端连接到DC/DC转换器1与常开继电器K2之间的节点，另一端接地。NMOS管Q的漏极连接到电源输入电压，其源极通过第一限流电阻R5接地，NMOS管Q与第一限流电阻R5之间的节点分别连接到常闭继电器K1和常开继电器K2的控制端。The anode of the anti-backflow diode D0 and the input terminal of the DC/DC converter 1 are connected to the input voltage of the power supply through the normally closed relay K1, the cathode of the anti-backflow diode D0 is directly connected to the output terminal of the power supply, and the output terminal of the DC/DC converter 1 It is connected to the output terminal of the power supply through the normally open relay K2. One end of the energy storage capacitor C is connected to the node between the DC/DC converter 1 and the normally open relay K2, and the other end is grounded. The drain of the NMOS transistor Q is connected to the power supply input voltage, and its source is grounded through the first current limiting resistor R5, and the nodes between the NMOS transistor Q and the first current limiting resistor R5 are respectively connected to the normally closed relay K1 and the normally open relay K2 the control terminal.
第一采样电阻R1与第二采样电阻R2串联连接，第一采样电阻R1的一端连接到电源输入电压，另一端通过第二采样电阻R2接地。第三采样电阻R3与第四采样电阻R4串联连接，第三采样电阻R3的一端连接到电源输入电压，另一端通过第四采样电阻R4接地。稳压二极管Dz的阳极接地，其阴极通过第二限流电阻R6连接到电源输入电压。The first sampling resistor R1 is connected in series with the second sampling resistor R2, one end of the first sampling resistor R1 is connected to the input voltage of the power supply, and the other end is grounded through the second sampling resistor R2. The third sampling resistor R3 is connected in series with the fourth sampling resistor R4, one end of the third sampling resistor R3 is connected to the power supply input voltage, and the other end is grounded through the fourth sampling resistor R4. The anode of the Zener diode Dz is grounded, and its cathode is connected to the input voltage of the power supply through the second current limiting resistor R6.
第一比较器V1的反相输入端和第二比较器V2的同相输入端均连接到稳压二极管Dz与第二限流电阻R6之间的节点，第一比较器V1的同相输入端连接到第一采样电阻R1与第二采样电阻R2之间的节点，第二比较器V2的反相输入端连接到第三采样电阻R3与第四采样电阻R4之间的节点。第一比较器V1的输出端连接第一二极管D1的阳极，第一二极管D1的阴极与NMOS管Q的栅极连接。第二比较器V2的输出端连接第二二极管D2的阳极，第二二极管D2的阴极与NMOS管Q的栅极连接。Both the inverting input terminal of the first comparator V1 and the non-inverting input terminal of the second comparator V2 are connected to the node between the Zener diode Dz and the second current limiting resistor R6, and the non-inverting input terminal of the first comparator V1 is connected to The node between the first sampling resistor R1 and the second sampling resistor R2, the inverting input terminal of the second comparator V2 is connected to the node between the third sampling resistor R3 and the fourth sampling resistor R4. The output terminal of the first comparator V1 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the gate of the NMOS transistor Q. The output end of the second comparator V2 is connected to the anode of the second diode D2, and the cathode of the second diode D2 is connected to the gate of the NMOS transistor Q.
本实用新型的工作原理：Working principle of the utility model:
在电源稳定工作时，常闭继电器K1的触点处于闭合状态，防回流二极管D0导通，常开继电器K2的触点处于断开状态，DC/DC转换器1为储能电容C充电。在本实施例中，第一采样电路2对电源输入电压进行采样，送至第一比较器V1的同相输入端，与输入其反相输入端的基准电压进行比较；第二采样电路3对电源输入电压进行采样，送至第二比较器V2的反相输入端，与输入其同相输入端的基准电压进行比较。When the power supply works stably, the contacts of the normally closed relay K1 are in the closed state, the anti-backflow diode D0 is turned on, the contacts of the normally open relay K2 are in the open state, and the DC/DC converter 1 charges the energy storage capacitor C. In this embodiment, the first sampling circuit 2 samples the input voltage of the power supply, sends it to the non-inverting input terminal of the first comparator V1, and compares it with the reference voltage input to its inverting input terminal; the second sampling circuit 3 samples the input voltage of the power supply The voltage is sampled, sent to the inverting input terminal of the second comparator V2, and compared with the reference voltage input to its non-inverting input terminal.
当电源输入电压出现高压浪涌时，第一比较器V1的同相输入端电压高于反相输入端电压，第一比较器V1输出高电平，第一二极管D1导通，驱动NMOS管Q导通（此时，第二比较器V2的同相输入端电压低于反相输入端电压，第二比较器V2输出低电平，第二二极管D2截止），常闭继电器K1的触点断开以抑制高压浪涌，常开继电器K2的触点闭合，储能电容C为后级电路供电以防止其掉电，防回流二极管Dz截止以防止输出电压倒灌到DC/DC转换器的输入端，保护电路的稳定工作。When the power supply input voltage has a high-voltage surge, the voltage of the non-inverting input terminal of the first comparator V1 is higher than the voltage of the inverting input terminal, the first comparator V1 outputs a high level, the first diode D1 is turned on, and drives the NMOS transistor Q is turned on (at this time, the voltage of the non-inverting input terminal of the second comparator V2 is lower than the voltage of the inverting input terminal, the output of the second comparator V2 is low, and the second diode D2 is cut off), the contact of the normally closed relay K1 The point is disconnected to suppress the high-voltage surge, the contact of the normally open relay K2 is closed, the energy storage capacitor C supplies power to the subsequent circuit to prevent it from losing power, and the anti-backflow diode Dz is cut off to prevent the output voltage from being poured into the DC/DC converter input, to protect the stable operation of the circuit.
当电源输入电压出现低压浪涌时，第二比较器V2的同相输入端电压高于反相输入端电压，第二比较器V2输出高电平，第二二极管D2导通，驱动NMOS管Q导通（此时，第一比较器V1的同相输入端电压低于反相输入端电压，第一比较器V1输出低电平，第一二极管D1截止），常闭继电器K1的触点断开以抑制低压浪涌，常开继电器K2的触点闭合，储能电容C为后级电路供电以防止其掉电，防回流二极管Dz截止以防止输出电压倒灌到DC/DC转换器的输入端，保护电路的稳定工作。When the power supply input voltage has a low-voltage surge, the voltage of the non-inverting input terminal of the second comparator V2 is higher than the voltage of the inverting input terminal, the second comparator V2 outputs a high level, and the second diode D2 is turned on to drive the NMOS transistor Q is turned on (at this time, the voltage of the non-inverting input terminal of the first comparator V1 is lower than the voltage of the inverting input terminal, the first comparator V1 outputs a low level, and the first diode D1 is cut off), the contact of the normally closed relay K1 The point is disconnected to suppress the low-voltage surge, the contact of the normally open relay K2 is closed, the energy storage capacitor C supplies power to the subsequent circuit to prevent it from losing power, and the anti-backflow diode Dz is cut off to prevent the output voltage from being poured into the DC/DC converter input, to protect the stable operation of the circuit.
以上所述实施方式仅仅是对本实用新型的优选实施方式进行描述，并非对本实用新型的范围进行限定，在不脱离本实用新型设计精神的前提下，本领域普通技术人员对本实用新型的技术方案作出的各种变形和改进，均应落入本实用新型的权利要求书确定的保护范围内。The above-mentioned embodiment is only a description of the preferred embodiment of the present utility model, and is not intended to limit the scope of the present utility model. All variations and improvements should fall within the protection scope determined by the claims of the present utility model.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420352216.XUCN203933373U (en) | 2014-06-30 | 2014-06-30 | A kind of storage capacitor formula high and low pressure surge restraint circuit |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420352216.XUCN203933373U (en) | 2014-06-30 | 2014-06-30 | A kind of storage capacitor formula high and low pressure surge restraint circuit |
| Publication Number | Publication Date |
|---|---|
| CN203933373Utrue CN203933373U (en) | 2014-11-05 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420352216.XUExpired - LifetimeCN203933373U (en) | 2014-06-30 | 2014-06-30 | A kind of storage capacitor formula high and low pressure surge restraint circuit |
| Country | Link |
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| CN (1) | CN203933373U (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104022634A (en)* | 2014-06-30 | 2014-09-03 | 中国电子科技集团公司第四十三研究所 | Energy-storage capacitor type high-voltage and low-voltage surge suppression circuit and suppression method thereof |
| CN104362723A (en)* | 2014-11-27 | 2015-02-18 | 天津天地伟业数码科技有限公司 | Surge energy recycle circuit based on RS485 circuit |
| CN113162008A (en)* | 2020-01-07 | 2021-07-23 | 台达电子工业股份有限公司 | Surge current suppression circuit |
| CN113776887A (en)* | 2021-09-24 | 2021-12-10 | 青岛蓝科海洋仪器设备有限公司 | Double-drive high-frequency micro-vibration sediment sampling device |
| CN115378288A (en)* | 2021-05-20 | 2022-11-22 | 固纬电子实业股份有限公司 | Power converter and its current limiting control circuit |
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104022634A (en)* | 2014-06-30 | 2014-09-03 | 中国电子科技集团公司第四十三研究所 | Energy-storage capacitor type high-voltage and low-voltage surge suppression circuit and suppression method thereof |
| CN104022634B (en)* | 2014-06-30 | 2016-06-29 | 中国电子科技集团公司第四十三研究所 | A kind of storage capacitor formula high and low pressure surge restraint circuit and suppressing method thereof |
| CN104362723A (en)* | 2014-11-27 | 2015-02-18 | 天津天地伟业数码科技有限公司 | Surge energy recycle circuit based on RS485 circuit |
| CN113162008A (en)* | 2020-01-07 | 2021-07-23 | 台达电子工业股份有限公司 | Surge current suppression circuit |
| CN113162008B (en)* | 2020-01-07 | 2024-04-02 | 台达电子工业股份有限公司 | Inrush current suppression circuit |
| CN115378288A (en)* | 2021-05-20 | 2022-11-22 | 固纬电子实业股份有限公司 | Power converter and its current limiting control circuit |
| CN113776887A (en)* | 2021-09-24 | 2021-12-10 | 青岛蓝科海洋仪器设备有限公司 | Double-drive high-frequency micro-vibration sediment sampling device |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | Granted publication date:20141105 Effective date of abandoning:20160629 | |
| C25 | Abandonment of patent right or utility model to avoid double patenting |