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CN203433313U - A power electronic control system high-speed communication apparatus achieved by a FPGA - Google Patents

A power electronic control system high-speed communication apparatus achieved by a FPGA
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Publication number
CN203433313U
CN203433313UCN201320543963.7UCN201320543963UCN203433313UCN 203433313 UCN203433313 UCN 203433313UCN 201320543963 UCN201320543963 UCN 201320543963UCN 203433313 UCN203433313 UCN 203433313U
Authority
CN
China
Prior art keywords
fpga
power electronic
speed communication
control system
electronic control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201320543963.7U
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Chinese (zh)
Inventor
邹毅军
王志鹏
戈华岭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Keliang Information Technology Co ltd
Original Assignee
SHANGHAI KELIANG INFORMATION ENGINEERING Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHANGHAI KELIANG INFORMATION ENGINEERING Co LtdfiledCriticalSHANGHAI KELIANG INFORMATION ENGINEERING Co Ltd
Priority to CN201320543963.7UpriorityCriticalpatent/CN203433313U/en
Application grantedgrantedCritical
Publication of CN203433313UpublicationCriticalpatent/CN203433313U/en
Anticipated expirationlegal-statusCritical
Expired - Lifetimelegal-statusCriticalCurrent

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Abstract

The utility model relates to a power electronic control system high-speed communication apparatus achieved by a FPGA. The power electronic control system high-speed communication apparatus is composed of a FPGA, a monitoring portion, and an optical module, wherein the FPGA is internally formed by two modules including a power electronic device simulating model and a high-speed communication protocol. In order to achieve high-speed communication between an external device and the FPGA, the communication protocol may be an Ethernet or AURORA; communication rate may be 1000Mbps, and communication speed satisfies a requirement of a gigabit Ethernet. Protocols in a physical layer and over are all achieved inside the FPGA. In the case of a transport layer and over, the protocols can be established in accordance with a power electronic control requirement. By means of a conventional device, the monitoring portion may display information inside the FPGA on a personal computer via a CPU, or transmit information in the personal computer to the FPGA via a protocol device.

Description

FPGA realizes power electronics control system high speed communication simulator
Technical field
The utility model patent relates to the simulator of verifying the high-speed communication effect of power electronics control system interface with FPGA.
Background technology
Along with scientific and technical fast development, emulation has become a kind of requisite means of various complication system development work, and emulation technology not only can be reappeared many scientific phenomenas that are difficult to realization, and in present Business Studies, also has very high economic benefit.
Power electronic devices is just along high-power, high frequency, integrated future development, and its control technology, along with the development of Power Electronic Technique, becomes increasingly complex, and for the checking of the control effect of its control system, also becomes especially important.
In recent years, programmed logic device is constantly to high integration, and high-speed and low price direction strides forward, and the also constantly expansion of application in signal output field makes the processing speed of traditional DSP obviously cannot meet the needs of power electronics control system interface high-speed communication.
Summary of the invention
Because the speed with higher design flexibility and Geng Gao is compared in FPGA emulation with traditional Computer Simulation, thereby more meet the requirement of power electronic equipment to high-frequency high-speed, more can well complete the real-time simulation of power electronic devices.
The related FPGA of the utility model realizes power electronics control system high speed communication simulator and consists of monitor portion, FPGA and optical module.
For realizing the high-speed communication of external unit and FPGA, the related simulator of the utility model adopts optical fiber to connect, and FPGA carries light mouth.The communication protocol at two ends can be Ethernet or AURORA etc., take ethernet communication protocol as example, and its communication speed can reach 1000Mbps, and communication speed reaches the requirement of gigabit Ethernet, fully meets the requirement of power electronic equipment to high-frequency high-speed;
Wherein said FPGA inside is comprised of power electronic equipment realistic model and the large module of high speed communication agreement two; Described high speed communication agreement comprises underlying protocol, framing and separates frame and process two parts; Physical layer in underlying protocol and above agreement all complete in FPGA inside, for transport layer and above agreement, can control and require to decide through consultation voluntarily according to power electronics.
Monitor portion can be shown to FPGA internal information in PC by CPU by netting twine or data line, also the information exchange in PC can be crossed to netting twine or data line is passed to FPGA inside.
Power electronic equipment realistic model and communication protocol are all inner at FPGA, and power electronic equipment realistic model consists of ready-made FPGA emulation module, and communication protocol is independent research, in order to verify the high-speed communication effect of power electronics control system.
accompanying drawing explanation:
Fig. 1 is for realizing the high-speed communication theory diagram of controller and power electronic devices with FPGA.
embodiment:
Below in conjunction with embodiment, the utility model will be further described.
The related FPGA of the utility model realizes power electronics control system high speed communication simulator and consists of FPGA, monitor portion and optical module.
As Fig. 1, external unit is power electronics control system to be verified.Logical between itself and FPGA
Crossing optical module uses optical fiber to connect;
Described FPGA is comprised of power electronic equipment realistic model and the large module of high speed communication agreement two.When external power electronic control system interval time definite according to agreement, regularly send frame data, the underlying protocol of FPGA internal power electronic installation realistic model detects light mouth receiving data frames head; According to the agreement of deciding through consultation voluntarily, screen the validity of frame head; For effective frame head, consultation is delivered to these frame data on the upper strata of agreement; For invalid frame head, agreement will can not read this one piece of data.
Described FPGA underlying protocol receives the valid data frame that controller sends, and when the inner framing of FPGA and the processing of solution frame, transport layer will be passed to upper strata after this frame data processing; According between control system and FPGA, the composition of these frame data being had to the agreement of deciding through consultation, FPGA separates Frame Protocol (transport layer) and the switch control data to power electronic devices in these frame data can be analysed out, then passes to " switch " of emulation power electronic devices.
Simultaneously, FPGA can collect the information such as capacitance voltage, circuital current from power electronic equipment realistic model, these treated information enter after FPGA, can process through framing, these data are combined according to the agreement of deciding through consultation between control system and FPGA, then issue FPGA inner bottom agreement, underlying protocol can add suitable frame head and postamble to these frame data, then from FPGA light mouth, is dealt into optical fiber.
Described monitor portion function is from the inner capacitance voltage information of separating frame information and power electronic equipment realistic model that receives by existing CPU equipment of FPGA, by netting twine or data line, be uploaded to personal computer again, or the FPGA framing information exchange of personal computer definition is crossed under netting twine or data line and passed to CPU equipment, then by it, these information are passed to FPGA.
By some information of the given FPGA of personal computer and record the interface communication situation that information that FPGA is uploaded to personal computer can be extrapolated power electronics control system.

Claims (3)

CN201320543963.7U2013-09-032013-09-03A power electronic control system high-speed communication apparatus achieved by a FPGAExpired - LifetimeCN203433313U (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201320543963.7UCN203433313U (en)2013-09-032013-09-03A power electronic control system high-speed communication apparatus achieved by a FPGA

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201320543963.7UCN203433313U (en)2013-09-032013-09-03A power electronic control system high-speed communication apparatus achieved by a FPGA

Publications (1)

Publication NumberPublication Date
CN203433313Utrue CN203433313U (en)2014-02-12

Family

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Family Applications (1)

Application NumberTitlePriority DateFiling Date
CN201320543963.7UExpired - LifetimeCN203433313U (en)2013-09-032013-09-03A power electronic control system high-speed communication apparatus achieved by a FPGA

Country Status (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN105301984A (en)*2015-11-202016-02-03上海科梁信息工程有限公司FPGA-based power electronic simulation system and method
CN106200413A (en)*2015-05-052016-12-07中国电力科学研究院Electro-magnetic transient Real-time Communications method and apparatus based on Aurora agreement

Cited By (4)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN106200413A (en)*2015-05-052016-12-07中国电力科学研究院Electro-magnetic transient Real-time Communications method and apparatus based on Aurora agreement
CN106200413B (en)*2015-05-052019-08-06中国电力科学研究院 Electromagnetic transient real-time simulation communication method and device based on Aurora protocol
CN105301984A (en)*2015-11-202016-02-03上海科梁信息工程有限公司FPGA-based power electronic simulation system and method
CN105301984B (en)*2015-11-202018-05-08上海科梁信息工程股份有限公司A kind of simulation of power electronic system and method based on FPGA

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Legal Events

DateCodeTitleDescription
C14Grant of patent or utility model
GR01Patent grant
C56Change in the name or address of the patentee
CP01Change in the name or title of a patent holder

Address after:200233 Shanghai, Yishan Road, No. 829, building 201, room 6,

Patentee after:SHANGHAI KELIANG INFORMATION ENGINEERING Co.,Ltd.

Address before:200233 Shanghai, Yishan Road, No. 829, building 201, room 6,

Patentee before:SHANGHAI KELIANG INFORMATION ENGINEERING Co.,Ltd.

CP01Change in the name or title of a patent holder
CP01Change in the name or title of a patent holder

Address after:Room 201, building 6, 829 Yishan Road, Xuhui District, Shanghai 200233

Patentee after:Shanghai Keliang Information Technology Co.,Ltd.

Address before:Room 201, building 6, 829 Yishan Road, Xuhui District, Shanghai 200233

Patentee before:SHANGHAI KELIANG INFORMATION ENGINEERING Co.,Ltd.

CX01Expiry of patent term
CX01Expiry of patent term

Granted publication date:20140212


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