CN203397130U - Circuit of on-off switching device applied to electronic equipment - Google Patents

Abstract

The utility model discloses the circuit of an on-off switching device applied to electronic equipment and belongs to the circuit field of on-off switching devices. The circuit of the on-off switching device connected between a power input end and a system power management chip comprises an on/off key SW1, a phase inverter U1, a logic buffer chip U2, a load switch U3, a phase inverter U4, a triode Q1, a diode D3 and a diode D4. The on/off key SW1 is connected with the diode D3 and then connected with the load switch U3. The diode D3 is connected with the system power management chip through the diode D4. The on/off key SW1 is connected with the phase inverter U1, the load switch U3 and the system power management chip successively. The on/off key SW1 is also connected with the phase inverter U4, the triode Q1 and the system power management chip successively. The phase inverter U1 is connected with the logic buffer chip U2 and then connected with the system power management chip. According to the technical scheme of the utility model, the reliability of the circuit of an on-off switching device is improved. Meanwhile, the stand-by power consumption is lowered.

Description

A kind of on/off circuit being applied on electronic equipment

Technical field

The utility model relates to a kind of on/off circuit, specifically a kind of on/off circuit being applied on electronic equipment.

Background technology

At present, the design of the on/off circuit of low-power consumption seems particularly important in electronic apparatus application.Several typical on/off circuits comprise:

1, adopt single-chip microcomputer to carry out switching on and shutting down control, but when singlechip chip crashes, need take outside power-down mode to realize shutdown, and under open state by outside plug power supply, easily cause system power supply to shake, and cause circuit system damage;

2, soft on/off circuit, this on/off circuit is still to CPU power supply when shutdown, and CPU is only in a kind of sleep pattern, although circuit design is simple, but consume battery power requires to run in the opposite direction with low-power consumption.

utility model content

Technical assignment of the present utility model is for above weak point, and a kind of raising circuit reliability is provided, and avoids circuit unstable, realizes a kind of on/off circuit being applied on electronic equipment of lower stand-by power consumption, lower cost.

The utility model solves the technical scheme that its technical matters adopts: be a kind of on/off circuit of building with logical device.

Comprise power input, power supply managing chip, described on/off circuit is connected between power input, power supply managing chip, and on/off circuit comprises switching on and shutting down button SW1, phase inverter U1, logic buffer chip U2, load switch U3, phase inverter U4, triode Q1, diode D3, diode D4;

The power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2;

The switching on and shutting down button SW1 other end is connected with diode D3 one end, and the other end of diode D3 is connected to load switch U3, and the other end of diode D3 is also by diode D4 connected system power management chip;

The switching on and shutting down button SW1 other end connects phase inverter U1, and phase inverter U1 connects load switch U3, the output terminal connected system power management chip of load switch U3;

The other end of switching on and shutting down button SW1 connects phase inverter U4, the emitter of phase inverter U4 connecting triode Q1, and the collector of triode Q1 is connected to power supply managing chip, and the base stage of triode Q1 is connected to power supply managing chip;

The output terminal of phase inverter U1 is connected to logic buffer chip U2 input end, and logic buffer chip U2 output terminal is connected to power supply managing chip.

Described on/off circuit also comprises diode D1, resistance R 3, resistance R 7, capacitor C 4,capacitor C 6, resistance R 13; Specifically be connected to: the power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2; The switching on and shutting down button SW1 other end is connected with diode D3 one end, the other end of diode D3 is connected to the 5th foot switch signal of load switch U3, and the other end of diode D3 is also by the system switching control signal end (SYS_ON_OFF_CTL) of diode D4 connected system power management chip; The 1st pin that connects phase inverter U1 after the parallel circuit that the switching on and shutting down button SW1 other end also forms through diode D1, resistance R 3, the output terminal of phase inverter U1 the 6th pin connects the 4th pin of load switch U3, the output terminal of phase inverter U1 the 6th pin also connects the 6th pin of load switch U3, the switch terminals (MAIN_PWR_ON) of the output terminal connected system power management chip of load switch U3 by a resistance R 7; The other end of switching on and shutting down button SW1 also connects the 1st pin of phase inverter U4 by capacitor C 4, the output terminal of phase inverter U4 the 6th pin connects the 3rd pin of phase inverter U4 by acapacitor C 6, the emitter of the output terminal of phase inverter U4 the 4th pin connecting triode Q1, the collector of triode Q1 is connected to the standby signal end (nONKEY/KEEPACT) of power supply managing chip, and the base stage of triode Q1 is connected to the core cpu feeder ear (VDDCORE) of power supply managing chip by resistance R 13; The output terminal of phase inverter U1 the 4th pin is connected to logic buffer chip U2 input end the 2nd pin, and logic buffer chip U2 output terminal the 5th pin is connected to the CPU switching on and shutting down request signal end (PMIC_ON_OFF_REQ) of power supply managing chip.

The resistance of resistance R 7 is 100K Ω, and the capacity of capacitor C 4 is 1 μ F, and the capacity ofcapacitor C 6 is 1 μ F.

In the situation of external power source or lithium battery existence, power input (LDO_3V3) exists always.

During use, press switching on and shutting down button SW1, the reset circuit forming by diode D1, resistance R 3, the 1st pin of phase inverter U1 is input as low level, phase inverter U1 the 4th pin, the 6th pin output signal are high level, and logic buffer chip U2 send switching on and shutting down request signal PMIC_ON_OFF_REQ to power supply managing chip;

The 4th pin V_IN_R1 and the 6th pin R1_C1 of load switch U3 are high level, the 5th pin ON_OFF is high level by diode D3, and starting load switch U3 carries high level signal MAIN_PWR_ON to the switch terminals of power management chip, start power management chip, realize start;

Long by switching on and shutting down button SW1, the 1st pin of phase inverter U1 is input as high level, logic buffer chip U2 is input as low level, make switching on and shutting down request signal PMIC_ON_OFF_REQ be output as low, the output signal MAIN_PWR_ON of load switch U3 sets low, the managing chip power supply of cutting off the electricity supply, realizes shutdown;

Under open state, press switching on and shutting down button SW1, the output terminal of phase inverter U4 the 4th pin is exported low pulse by triode Q1, send power management chip standby signal nONKEY/KEEPACT, cuts off cpu power, realizes standby; Again press switching on and shutting down button SW1, the output terminal of phase inverter U4 the 4th pin, by triode Q1 output high impulse, send power management chip wake-up signal nONKEY/KEEPACT, realizes a key arousal function.

Of the present utility modelly a kind ofly be applied in on/off circuit on electronic equipment compared to the prior art, have the following advantages:

1, improve circuit reliability, while avoiding taking single-chip microcomputer to carry out switching on and shutting down control, easily because loose contact causes late-class circuit unstable;

2, during system closing, cut off primary power, realize lower stand-by power consumption, lower cost;

3, improve circuit versatility, and can under non-x86 platform product, realize the on-off control method identical with x86 platform product (PC, Notebook), increase new user's experience effect; Thereby, have good value for applications.

Accompanying drawing explanation

Below in conjunction with accompanying drawing, the utility model is further illustrated.

Accompanying drawing 1 is a kind of general structure block diagram that is applied in the on/off circuit on electronic equipment.

Embodiment

Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.

As shown in Figure 1, a kind of on/off circuit being applied on electronic equipment of the present utility model, comprise power input, power supply managing chip, described on/off circuit is connected between power input, power supply managing chip, and on/off circuit comprises switching on and shutting down button SW1, phase inverter U1, logic buffer chip U2, load switch U3, phase inverter U4, triode Q1, diode D3, diode D4;

The power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2;

The switching on and shutting down button SW1 other end is connected with diode D3 one end, and the other end of diode D3 is connected to load switch U3, and the other end of diode D3 is also by diode D4 connected system power management chip;

The switching on and shutting down button SW1 other end connects phase inverter U1, and phase inverter U1 connects load switch U3, the output terminal connected system power management chip of load switch U3;

The other end of switching on and shutting down button SW1 connects phase inverter U4, the emitter of phase inverter U4 connecting triode Q1, and the collector of triode Q1 is connected to power supply managing chip, and the base stage of triode Q1 is connected to power supply managing chip;

The output terminal of phase inverter U1 is connected to logic buffer chip U2 input end, and logic buffer chip U2 output terminal is connected to power supply managing chip.

Described on/off circuit also comprises diode D1, resistance R 3, resistance R 7, capacitor C 4,capacitor C 6, resistance R 13; Specifically be connected to: the power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2; The switching on and shutting down button SW1 other end is connected with diode D3 one end, the other end of diode D3 is connected to the 5th foot switch signal of load switch U3, and the other end of diode D3 is also by the system switching control signal end (SYS_ON_OFF_CTL) of diode D4 connected system power management chip; The 1st pin that connects phase inverter U1 after the parallel circuit that the switching on and shutting down button SW1 other end also forms through diode D1, resistance R 3, the output terminal of phase inverter U1 the 6th pin connects the 4th pin of load switch U3, the output terminal of phase inverter U1 the 6th pin also connects the 6th pin of load switch U3, the switch terminals (MAIN_PWR_ON) of the output terminal connected system power management chip of load switch U3 by a resistance R 7; The other end of switching on and shutting down button SW1 also connects the 1st pin of phase inverter U4 by capacitor C 4, the output terminal of phase inverter U4 the 6th pin connects the 3rd pin of phase inverter U4 by acapacitor C 6, the emitter of the output terminal of phase inverter U4 the 4th pin connecting triode Q1, the collector of triode Q1 is connected to the standby signal end (nONKEY/KEEPACT) of power supply managing chip, and the base stage of triode Q1 is connected to the core cpu feeder ear (VDDCORE) of power supply managing chip by resistance R 13; The output terminal of phase inverter U1 the 4th pin is connected to logic buffer chip U2 input end the 2nd pin, and logic buffer chip U2 output terminal the 5th pin is connected to the CPU switching on and shutting down request signal end (PMIC_ON_OFF_REQ) of power supply managing chip.

The resistance of resistance R 7 is 100K Ω, and the capacity of capacitor C 4 is 1 μ F, and the capacity ofcapacitor C 6 is 1 μ F.

In the situation of external power source or lithium battery existence, power input (LDO_3V3) exists always.

During use, press switching on and shutting down button SW1, the reset circuit forming by diode D1, resistance R 3, the 1st pin of phase inverter U1 is input as low level, phase inverter U1 the 4th pin, the 6th pin output signal are high level, and logic buffer chip U2 send switching on and shutting down request signal PMIC_ON_OFF_REQ to power supply managing chip;

The 4th pin V_IN_R1 and the 6th pin R1_C1 of load switch U3 are high level, the 5th pin ON_OFF is high level by diode D3, and starting load switch U3 carries high level signal MAIN_PWR_ON to the switch terminals of power management chip, start power management chip, realize start;

Long by switching on and shutting down button SW1, the 1st pin of phase inverter U1 is input as high level, logic buffer chip U2 is input as low level, make switching on and shutting down request signal PMIC_ON_OFF_REQ be output as low, the output signal MAIN_PWR_ON of load switch U3 sets low, the managing chip power supply of cutting off the electricity supply, realizes shutdown;

Under open state, press switching on and shutting down button SW1, the output terminal of phase inverter U4 the 4th pin is exported low pulse by triode Q1, send power management chip standby signal nONKEY/KEEPACT, cuts off cpu power, realizes standby; Again press switching on and shutting down button SW1, the output terminal of phase inverter U4 the 4th pin, by triode Q1 output high impulse, send power management chip wake-up signal nONKEY/KEEPACT, realizes a key arousal function.

The utility model, except the technical characterictic described in instructions, is the known technology of those skilled in the art.

Claims (3)

1. the on/off circuit being applied on electronic equipment, comprise power input, power supply managing chip, it is characterized in that described on/off circuit is connected between power input, power supply managing chip, on/off circuit comprises switching on and shutting down button SW1, phase inverter U1, logic buffer chip U2, load switch U3, phase inverter U4, triode Q1, diode D3, diode D4; The power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2;

The switching on and shutting down button SW1 other end is connected with diode D3 one end, and the other end of diode D3 is connected to load switch U3, and the other end of diode D3 is also by diode D4 connected system power management chip;

The switching on and shutting down button SW1 other end connects phase inverter U1, and phase inverter U1 connects load switch U3, the output terminal connected system power management chip of load switch U3;

The other end of switching on and shutting down button SW1 connects phase inverter U4, the emitter of phase inverter U4 connecting triode Q1, and the collector of triode Q1 is connected to power supply managing chip, and the base stage of triode Q1 is connected to power supply managing chip;

The output terminal of phase inverter U1 is connected to logic buffer chip U2 input end, and logic buffer chip U2 output terminal is connected to power supply managing chip.

2. a kind of on/off circuit being applied on electronic equipment according to claim 1, is characterized in that described on/off circuit also comprises diode D1, resistance R 3, resistance R 7, capacitor C 4, capacitor C 6, resistance R 13; Specifically be connected to:

The power input respectively Vcc of connecting valve machine button SW1 one end, phase inverter U1 is held, the Vcc end of logic buffer chip U2;

The switching on and shutting down button SW1 other end is connected with diode D3 one end, the other end of diode D3 is connected to the 5th foot switch signal of load switch U3, and the other end of diode D3 is also by the system switching control signal end of diode D4 connected system power management chip;

The 1st pin that connects phase inverter U1 after the parallel circuit that the switching on and shutting down button SW1 other end also forms through diode D1, resistance R 3, the output terminal of phase inverter U1 the 6th pin connects the 4th pin of load switch U3, the output terminal of phase inverter U1 the 6th pin also connects the 6th pin of load switch U3, the switch terminals of the output terminal connected system power management chip of load switch U3 by a resistance R 7;

The other end of switching on and shutting down button SW1 also connects the 1st pin of phase inverter U4 by capacitor C 4, the output terminal of phase inverter U4 the 6th pin connects the 3rd pin of phase inverter U4 by a capacitor C 6, the emitter of the output terminal of phase inverter U4 the 4th pin connecting triode Q1, the collector of triode Q1 is connected to the standby signal end of power supply managing chip, and the base stage of triode Q1 is connected to the core cpu feeder ear of power supply managing chip by resistance R 13;

The output terminal of phase inverter U1 the 4th pin is connected to logic buffer chip U2 input end the 2nd pin, and logic buffer chip U2 output terminal the 5th pin is connected to the CPU switching on and shutting down request signal end of power supply managing chip.

3. a kind of on/off circuit being applied on electronic equipment according to claim 2, the resistance that it is characterized in that resistance R 7 is 100K Ω, and the capacity of capacitor C 4 is 1 μ F, and the capacity of capacitor C 6 is 1 μ F.

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