CN201233435Y - Residual capacity tester for accumulator - Google Patents

Abstract

The utility model discloses a storage battery surplus capacity test instrument, which comprises a power supply unit, a data collecting and analog/digital conversion unit, a central control calculation unit, an external interface unit and a remote data transmission unit, wherein, the power supply unit is used for supplying power to each unit of the test instrument, and is connected with each unit; the data collecting and analog/digital conversion unit is used for collecting and processing the data, and is connected with the central control calculation unit through a data wire, and is used for delivering the processed data; the central control calculation unit is connected with the external interface unit, and the external interface unit is connected with the remote data transmission unit, so the capacity calculation data is delivered to the background, and all units are actuated under the control of the central control calculation unit. With the surplus capacity online test and remote monitoring technology, the instrument can correctly know the preserved capacity of the battery, so that the capacity measurement of the storage battery is more scientific and correct, thereby ensuring the secure and reliable running of the communication device.

Description

The remaining battery capacity tester

Technical field the utility model relates to a kind of power-source maintenance equipment, belongs to a kind of remaining battery capacity tester.

Background technology accumulator property quality and the quality of safeguarding are directly determining the stability and the security of communication device works.Especially for outdoor communication equipment, work under bad environment, the charge-discharge characteristic of battery and serviceable life and environment temperature are closely related.At present, the reason of battery malfunction mainly is because accumulator overdischarge or undercharge chronically, overdischarge for a long time, even cause certain cell batteries reversal of poles; Repeatedly under the situation of fully not discharging, continue charging again and make accumulator formation " storage effect " etc.Therefore accumulator must move under controlled state, like this battery discharging capacity is promptly and accurately monitored and control just show particularly important.The detection mode of remaining battery capacity mainly contains accumulative total and open-circuit voltage detection dual mode before, wherein bulk billing system length consuming time, cost height, and the open circuit detection mode is to utilize the terminal voltage that detects accumulator, reaches the purpose of calculating residual capacity, and there is error in the result.

The summary of the invention the purpose of this utility model is to overcome the deficiencies in the prior art, and a kind of remaining battery capacity tester of accurately on-line metering battery discharging capacity is provided.

To achieve these goals, the technical scheme taked of the utility model is:

A kind of remaining battery capacity tester, it is characterized in that: it is made up of power supply unit, data acquisition and A/D converter, central control computation unit, external interface unit and remote data transmission unit, wherein: power supply unit is responsible for each the unit power supply of this tester, is connected with each unit; Data acquisition and A/D converter are responsible for data acquisition and processing (DAP), and link to each other with central control computation unit by data line, transmit the data after handling; Central authorities' control computation unit links to each other with external interface unit, links to each other with the remote data transmission unit by external interface unit, and to the backstage, all unit all move under the control of central control computation unit with the calculation of capacity data transfer.

The above-mentioned remaining battery capacity tester that the utility model provides, compared with prior art, its technical advantage is:

1. the residual capacity administrative skill can accurately be held the power supply duration, and O﹠M strength is saved in maximization;

2. Xian Jin remote online measuring technology can be accurate the electrolytic cell retained storage capacity;

3. accurate residual capacity test and monitoring;

4. prospective battery remaining power threshold values effectively prolongs power-on time with the value of cutting off control technology;

5. Xian Jin long distance control system realizes user's remote live grasp on-site supervision data.

The capacity measurement that this remaining battery capacity tester makes accumulator is science, accurately more, for safety, the reliability service of communication facilities provides safeguard.

Description of drawings Fig. 1 is a remaining battery capacity tester circuit block diagram

Fig. 2 is remaining battery capacity tester circuit theory diagrams

Fig. 3 is a remaining battery capacity tester circuit connection diagram

Embodiment as shown in Figure 1, this remaining battery capacity tester is made up of power supply unit, data acquisition and A/D converter, central control computation unit, external interface unit and remote data transmission unit, wherein: power supply unit is responsible for each the unit power supply of this tester, is connected with each unit; Data acquisition and A/D converter are responsible for data acquisition and processing (DAP), and link to each other with central control computation unit by data line, transmit the data after handling; Central authorities' control computation unit links to each other with external interface unit, links to each other with the remote data transmission unit by external interface unit, and to the backstage, all unit all move under the control of central control computation unit with the calculation of capacity data transfer.

The circuit theory of this remaining battery capacity tester as shown in Figure 2, described central control computation unit mainly comprises singlechip CPU, clock-signal generator, the house dog X5054 of system, external data buffer static RAM (SRAM) and address latch 74HC573.Singlechip CPU is the core processing and the control section of native system, is to calculate the residual capacity core devices, finishes to the computing of all image data and to the Control work of peripheral circuit.As shown in Figure 2, the 39th～32 pin P0 mouth of singlechip CPU and the 21st～28 pin P2 mouth are 16 bit address, 8 bit data I/O mouths; 10th, 11 pin are serial data process chip MAX232 transmitting-receiving mouth, connect serial data process chip MAX232, are used for the transmitting-receiving of serial data process chip; 16th, 17 pin are access hole; The 9th pin is a reseting terminal, the 7th pin of connected system house dog X5054; 18th, 19 pin connect the outer clock circuit that is made of capacitor C JT1, capacitor C JT2 and crystal oscillator JT1; The 14th pin connects the clock pin of modulus conversion chip MAX186, is used for clock synchronization; The 15th pin connects the chip select pin of modulus conversion chip MAX186; 12nd, 13 pin connect the digital I/O end of modulus conversion chip MAX186; Rheostat RES2, rheostat RES3 are respectively the pull-up resistor of P3 mouth and P1 mouth; The 1st pin of singlechip CPU connects the 13rd pin sheet choosing end of clock chip DS12887; The 2nd pin connects the 5th pin data input pin of house dog X5054; The 3rd pin connects the 6th pin clock end of house dog X5054; The 4th pin connects the 1st pin sheet choosing end of house dog X5054; The 5th pin connects the 2nd pin data output end of house dog X5054; The 6th pin connects the 3rd pin Enable Pin of house dog X5054; The 7th pin connects the 22nd pin sheet choosing end of external data buffer static RAM (SRAM).Send into master control system through the 13rd pin INT1 of the signal after modulus conversion chip MAX186 mould/number conversion by singlechip CPU and carry out calculation of capacity.Clock-signal generator provides the precision clock signal for system, the electrify restoration circuit that the filter capacitor C5 of the working power Vcc that is connected by clock chip DS12887 and clock chip DS12887 the 24th pin, the resistance R s that clock chip the 18th pin connects and electric capacity Es form constitutes, wherein the 4th～11 pin of clock chip DS12887 is address/data multiplex bus AD0-AD7, the 23rd pin is square wave output SQW, the 1st pin is that MOTO/INTEL selects mouth, the 12nd pin is the place of working, 14th, 15 pin are access hole, and the 13rd pin is a chip select pin.The system house dog provides guarantee for the total system steady operation, forms reset circuit by house dog X5054, resistance R x2 and capacitor C x2 and constitutes, and the 1st pin of house dog X5054 is a sheet choosing end, connects the P13 mouth of singlechip CPU; The 2nd pin is signal output; The 3rd pin is an Enable Pin; The 4th pin is ground; The 8th pin is a working power; The 7th pin is a reset terminal; The 6th pin is a clock; The 5th pin is the signal input, for the singlechip CPU visit.External data buffer static RAM (SRAM), address latch 74HC573 provide enough data buffers for singlechip CPU.Lot of data is sent into singlechip CPU after changing through modulus converter A/D, because the singlechip CPU self EMS memory is limited, therefore increasing external data buffer static RAM (SRAM) is single-chip microcomputer storage data, the 13rd～21 pin of external data buffer static RAM (SRAM) is that the D0-D7 end is the data bus port, and the A8-A16 end is the address bus port.Address latch 74HC573 is 8 bit address latchs, and rheostat RES4, rheostat RES3 are respectively the P0 mouth of singlechip CPU and the pull-up resistor of P2 mouth.

Described data acquisition and A/D converter mainly comprise battery tension thief hatch CDQ, battery current thief hatch HR1 and modulus converter A/D.The voltage signal that collects is passed to 1% potential-divider network that resistance R o1, resistance R o2 form by voltage sampling port CDQ, voltage drop is low to moderate 1% of script amount, be passed to the three rank filtering circuits of forming by capacitor C o1, electric capacity Eo2, resistance R o3, electric capacity Eo4, resistance R o4, capacitor C o2, resistance R o5 and capacitor C o3 behind the voltage signal process potential-divider network (less than 5V), carry out the A/D analog to digital conversion through the 1st pin that is passed to modulus conversion chip MAX186 after the low-pass filtering.The 1st, 2 pin of battery current thief hatch HR1 provide working power for battery current thief hatch HR1; The 3rd pin is a signal end; The 4th pin is ground, the current signal that collects is converted to voltage signal (less than 5V) through the current-dividing network that is made of potentiometer IW, resistance R h1, and the 2nd pin of delivering to modulus conversion chip MAX186 through the low-pass filter of being made up of capacitor C h1, resistance R h3, resistance R h4, resistance R h5, electric capacity Eh1, electric capacity Eh2, electric capacity Eh3, electric capacity Eh4, capacitor C h2 and capacitor C h3 carries out the A/D analog to digital conversion again.Modulus converter A/D is finished the conversion work of the simulating signal of system to digital signal, give singlechip CPU by voltage, the electric current of modulus converter A/D after with digitizing, in addition, temperature parameter directly is passed to singlechip CPU after by the temperature sensor collection, carries out residual capacity by singlechip CPU and calculates.Modulus converter A/D adopts modulus conversion chip MAX186, modulus conversion chip MAX186 the 20th pin connects the filter capacitor Ca of working power VCC, form the fine setting reference circuit by resistance R a1, capacitor C a22, resistance R a2 and potentiometer Wa, form the benchmark filtering circuit by capacitor C a11, electric capacity Ea1.The CH0-CH7 of modulus conversion chip MAX186 is 8 a channel datas sampling pin; The 20th pin is a working power; The 10th pin is that battery saving mode is selected; The 19th pin is a synchronizing clock signals, connects the T0 mouth of singlechip CPU; The 18th pin is a chip select pin, connects the T1 mouth of singlechip CPU; The 15th pin is a data output, connects the INT1 mouth of singlechip CPU, is used for delivering to singlechip CPU through the signal of A/D conversion; 13rd, 14 pin are analog/digital ground; The 12nd pin is fine setting benchmark pin; The 11st pin is a reference signal test pin.

Described external interface unit comprises that mainly serial communication chip MAX232, external interface RS232, required boostrap circuit, the filter capacitor Cr of serial communication chip MAX232, working power indicator light circuit, the data of serial communication chip send indicator light circuit and Data Receiving indicator light circuit.Wherein: the required boostrap circuit of serial communication chip is made of electric capacity Er1, electric capacity Er2, electric capacity Er3 and electric capacity Er4; The working power indicator light circuit is made of resistance R 32 and light emitting diode L3; Data send indicator light circuit and are made of resistance R 21, triode T2, resistance R 22 and light emitting diode L2; The Data Receiving indicator light circuit is made of resistance R 11, triode T1, resistance R 12 and light emitting diode L1.The 11st, 12 pin of serial communication chip MAX232 are single-chip microcomputer signal input/output port; The 13rd pin is an external interface RS232 signal output.Deliver to the 11st pin of serial communication chip MAX232 by the 11st human hair combing waste of singlechip CPU through singlechip CPU system-computed data processed, signal passes through the conversion of transistor logic level TTL to serial communication interface RS232 level in serial communication chip MAX232, the 14th pin through serial communication chip MAX232 is delivered to the remote data transmission unit, be sent to the backstage again, the data that the backstage sends are imported in the chip through the 13rd pin of serial communication chip MAX232, process serial communication interface RS232 level is to the conversion of transistor logic level TTL, the 12nd pin through serial communication chip MAX232 is connected with the 10th pin of singlechip CPU, is passed to singlechip CPU.

Described power supply unit mainly comprises DC/DC module ZXD, three terminal regulator P3 and direct current 48V input port IN48V.Direct current 48V input port IN48V is connected with the 1st, 2 pin of DC/DC module, electric capacity EP5, capacitor C P5 are connected in parallel between the collector and emitter of three terminal regulator P3, electric capacity EP3, capacitor C P3 are connected in parallel between the base stage and emitter of three terminal regulator P3, three terminal regulator P3 grounded emitter, its base stage is connected with the 5th pin of DC/DC module,capacitor C 2, electric capacity E2 are connected in parallel, the one node is connected with the 8th pin of DC/DC module, its another node is connected with the 7th pin of DC/DC module, and ground connection.The 48V direct supply by the DC/DC module converts go out+5V (VCC) ,-12V provides working power for total system,capacitor C 2 and electric capacity E2 are the filtering device of 5V power supply, electric capacity EP3 and capacitor C P3 be-filtering device of 12V power supply,-12V power supply is through three terminal regulator P3 conversion output-5V power supply, and electric capacity EP5 and capacitor C P5 be-filtering device of 5V power supply.

Wireless universal packet oriented protocol GPRS mode inserts the long-range backstage that is passed to of public network in the described remote data transmission unit employing prior art.

As shown in Figure 3, when the remaining battery capacity tester that the utility model provides is specifically used, at first with 2 external power supplys of the power input on the remaining battery capacity tester 1, theoutput line 6 of Hall element 4 is connected with remaining battery capacity tester 1, and theincoming line 5 of Hall element 4 is connected with accumulator 3.After the circuit connection puts in place, carry out parameter and preset, parameter preset comprises nominal capacity, retained storage capacity etc.All controlled variable all can be default by external interface RS232, and the static static RAM (SRAM) of built-in external data buffer is forever preserved parameter preset, and preset data can not disappear because of outage, and only otherwise reset, data keep forever.Its course of work: the remaining battery capacity tester carries out voltage, electric current, the isoparametric collection of temperature, and is changed by modulus converter A/D, by data line digitalized data is passed to singlechip CPU again; This tester adopts 8 passages, 12 computing chip to finish the residual capacity of accumulator is calculated, and adopts monolithic processor controlled pattern, finishes the centralized control to the each several part circuit, and is responsible for the storage of data and the transmission of data; Utilize serial communication chip and external interface RS232 to transmit computational data to outside transmission equipment.By residual capacity histogram, change in voltage curve map, electric current change curve, the temperature changing curve diagram that accumulator is provided, to guarantee the residual capacity and the duty of the present accumulator of long-range understanding that the backstage can be clear and intuitive.

The selection of circuit elements device among the utility model embodiment: the singlechip CPU model among Fig. 2 is AT89S52; Analog to digital converter is the 12 bits serial A/D analog to digital converter of MAXIM company, and its model is MAX186; The clock chip model is DS12887; The house dog model is X5054; External data buffer static RAM (SRAM) model is IS61C1024; DC/DC module model is ZXDG3S4805; The address latch model is 74HC573; Serial communication chip model is MAX232.

Claims (6)

1. remaining battery capacity tester, it is characterized in that: it is made up of power supply unit, data acquisition and A/D converter, central control computation unit, external interface unit and remote data transmission unit, wherein: power supply unit is responsible for each the unit power supply of this tester, is connected with each unit; Data acquisition and A/D converter are responsible for data acquisition and processing (DAP), and link to each other with central control computation unit by data line, transmit the data after handling; Central authorities' control computation unit links to each other with external interface unit, links to each other with the remote data transmission unit by external interface unit, and to the backstage, all unit all move under the control of central control computation unit with the calculation of capacity data transfer.

2. remaining battery capacity tester according to claim 1 is characterized in that: described central control computation unit mainly comprises single-chip microcomputer (CPU), clock-signal generator, system house dog, external data buffer and address latch; The P0 mouth of single-chip microcomputer (CPU) and P2 mouth are 16 bit address, 8 bit data I/O mouths, its the tenth, 11 pin is the transmitting-receiving mouth of serial data process chip, connect the serial data process chip, be used for the transmitting-receiving of serial data process chip, the 16,17 pin are access hole, the 9th pin is a reseting terminal, the 7th pin of connected system house dog, and the 18,19 pin connect the outer clock circuit that is made of electric capacity (CJT1), electric capacity (CJT2) and crystal oscillator (JT1); The 14 pin connects the clock pin of modulus conversion chip, be used for clock synchronization, the 15 pin connects the chip select pin of modulus conversion chip, the 12, ten tripods connect the digital I/O end of modulus conversion chip, rheostat (RES2), rheostat (RES3) is respectively the pull-up resistor of P3 mouth and P1 mouth, first pin of single-chip microcomputer (CPU) connects the sheet choosing end of clock chip, crus secunda connects the data input pin of house dog, tripod connects the clock end of house dog, the 4th pin connects the sheet choosing end of house dog, the 5th pin connects the data output end of house dog, and the 6th pin connects the Enable Pin of house dog, and the 7th pin connects the sheet choosing end of external data buffer; Send into master control system through the signal after modulus conversion chip mould/number conversion by the tenth tripod (INT1) of single-chip microcomputer (CPU) and carry out calculation of capacity; Clock-signal generator is made of filter capacitor (C5), the resistance (Rs) of clock chip the tenth octal connection and the electrify restoration circuit that electric capacity (Es) is formed of the working power (Vcc) that clock chip and the 24 pin thereof connect; Wherein the 4th～11 pin of clock chip is address/data multiplex bus (ADO-AD7), the 20 tripod is square wave output (SQW), and first pin is that MOTO/INTEL selects mouth, and the 12 pin is the place of working, the 14,15 pin are access hole, and the tenth tripod is a chip select pin; The reset circuit that the system house dog is made up of house dog, resistance (Rx2) and electric capacity (Cx2) constitutes; First pin of house dog is a sheet choosing end, connects the P13 mouth of single-chip microcomputer (CPU), and crus secunda is signal output, and tripod is an Enable Pin, the 4th pin is ground, and octal is a working power, and the 7th pin is a reset terminal, the 6th pin is a clock, and the 5th pin is the signal input, for single-chip microcomputer (CPU) visit; The external data buffer is single-chip microcomputer storage data, and the 13 of external data buffer～21 pin are that the D0-D7 end is the data bus port, and the A8-A16 end is the address bus port; Address latch is 8 bit address latchs, and rheostat (RES4), rheostat (RES3) are respectively the P0 mouth of single-chip microcomputer (CPU) and the pull-up resistor of P2 mouth.

3. remaining battery capacity tester according to claim 1, it is characterized in that: described data acquisition and A/D converter mainly comprise battery tension thief hatch (CDQ), battery current thief hatch (HR1) and analog to digital converter (A/D), the voltage signal that collects is passed to by resistance (Ro1) by voltage sampling port (CDQ), 1% potential-divider network that resistance (Ro2) is formed, voltage drop is low to moderate 1% of script amount, voltage signal is passed to by electric capacity (Co1) through behind the potential-divider network, electric capacity (Eo2), resistance (Ro3), electric capacity (Eo4), resistance (Ro4), electric capacity (Co2), the three rank filtering circuits that resistance (Ro5) and electric capacity (Co3) are formed carry out the A/D analog to digital conversion through first pin that is passed to modulus conversion chip after the low-pass filtering; First of battery current thief hatch (HR1), two pin are that battery current thief hatch (HR1) provides working power, tripod is a signal end, the 4th pin is ground, the current signal process that collects is by potentiometer (IW), the current-dividing network that resistance (Rh1) constitutes is converted to voltage signal, passes through by electric capacity (Ch1) again, resistance (Rh3), resistance (Rh4), resistance (Rh5), electric capacity (Eh1), electric capacity (Eh2), electric capacity (Eh3), electric capacity (Eh4), the crus secunda that the low-pass filter that electric capacity (Ch2) and electric capacity (Ch3) are formed is delivered to modulus conversion chip carries out the A/D analog to digital conversion; Analog to digital converter (A/D) is finished the conversion work of the simulating signal of system to digital signal, give single-chip microcomputer (CPU) by analog to digital converter (A/D) with the voltage after the digitizing, electric current, temperature parameter directly is passed to single-chip microcomputer (CPU) after by the temperature sensor collection, carries out residual capacity by single-chip microcomputer (CPU) and calculates; Analog to digital converter (A/D) adopts modulus conversion chip, the 20 pin of modulus conversion chip connects the filter capacitor (Ca) of working power (Vcc), form the fine setting reference circuit by resistance (Ra1), electric capacity (Ca22), resistance (Ra2) and potentiometer (Wa), form the benchmark filtering circuit by electric capacity (Ca11), electric capacity (Ea1); The CH0-CH7 of modulus conversion chip is 8 a channel datas sampling pin, the 20 pin is a working power, the tenth pin is that battery saving mode is selected, the 19 pin is a synchronizing clock signals, the T0 mouth that connects single-chip microcomputer (CPU), the tenth octal is a chip select pin, the T1 mouth that connects single-chip microcomputer (CPU), the 15 pin is a data output, the INT1 mouth that connects single-chip microcomputer (CPU) is used for and will delivers to single-chip microcomputer (CPU) through the signal of A/D conversion, and the 13,14 pin are analog/digital ground, the 12 pin is fine setting benchmark pin, and the 11 pin is a reference signal test pin.

4. remaining battery capacity tester according to claim 1, it is characterized in that: described external interface unit comprises that mainly serial communication chip, external interface, required boostrap circuit, the filter capacitor (Cr) of serial communication chip, working power indicator light circuit, the data of serial communication chip send indicator light circuit and Data Receiving indicator light circuit, and wherein: the required boostrap circuit of serial communication chip is made of electric capacity (Er1), electric capacity (Er2), electric capacity (Er3) and electric capacity (Er4); The working power indicator light circuit is made of resistance (R32) and light emitting diode (L3); Data send indicator light circuit and are made of resistance (R21), triode (T2), resistance (R22) and light emitting diode (L2); The Data Receiving indicator light circuit is made of resistance (R11), triode (T1), resistance (R12) and light emitting diode (L1), and the 11,12 pin of serial communication chip are single-chip microcomputer signal input/output port; The tenth tripod is the signal output of external interface.

5. remaining battery capacity tester according to claim 1 is characterized in that: described power supply unit mainly comprises DC/DC module, three terminal regulator (P3) and direct current 48V input port (IN48V); The 48V direct supply by the DC/DC module converts go out+5V ,-12V provides working power for total system, electric capacity (C2) and electric capacity (E2) are the filtering device of 5V power supply, electric capacity (EP3) and electric capacity (CP3) is-filtering device of 12V power supply,-12V power supply is through three terminal regulator (P3) conversion output-5V power supply, and electric capacity (EP5) and electric capacity (CP5) is-filtering device of 5V power supply.

6. remaining battery capacity tester according to claim 1 is characterized in that: described remote data transmission unit adopts wireless universal packet oriented protocol mode to insert the long-range backstage that is passed to of public network.

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