CN1805128A - Wafer loading chamber and its wafer carrier - Google Patents

Abstract

A wafer loading chamber comprises a loading chamber shell, which is provided with at least one loading port, at least one loading door and at least one wafer carrier, wherein the loading chamber shell is arranged at the outer side of the loading chamber shell, and the wafer carrier is arranged in the loading chamber shell and used for carrying wafers. The wafer carrier also includes at least one wafer seat and several positioning devices, which are set on the wafer seat and protrude out of the surface of the wafer seat. When the wafer is placed on the wafer carrier, the bottom surface of the wafer is only in contact with the positioning devices. The invention also relates to a wafer carrier.

Description

Chip loading chamber and chip carrier thereof

Technical field

The present invention relates to a kind of chip loading chamber and chip carrier thereof, particularly relate to a kind of chip loading chamber and chip carrier thereof that thermal stress causes the wafer fragmentation that reduce.

Background technology

The making of very lagre scale integrated circuit (VLSIC) (VLSI) is substrate with the wafer that is made of semi-conducting material, the semiconductor technology that cooperates tens of roads even roads up to a hundred is to form electronic component and the connection line with default layout designs on wafer, last cutting and the packaging technology utilized again is made into a plurality of chips (chip) for use with the crystal grain (die) that forms.In the semiconductor technology in these tens of roads even roads up to a hundred, several course of processing extreme temperatures is often arranged, dispel the heat to room temperature for making the wafer fast cooling, carry out next technology again, therefore need set up chip loading chamber, be provided as the buffered station of wafer cooling.

Please refer to the schematic diagram of Fig. 1 for prior art chip carrier 10.Chip carrier 10 is arranged at (figure does not show) in the chip loading chamber, and it comprises that awafer holder 12 is formed by twothin plate 12a, 12b, is used for carrying a wafer.Be provided with thechip carrier 10 of a plurality of storehouses layer by layer in the common chip loading chamber, and eachchip carrier 10 can be distinguished a ccontaining wafer.In the wafer process process, there is several course of processing temperature too high, therefore a buffered station that provides wafer to cool off is set, the high temperature wafers of finishing technology is positioned on thewafer holder 12 of chip loading chamber, treat to carry out next technology again after the wafer cooling.To remove photoresist (strip) technology is example, therefore the wafer typical temperature that finishing delusters causes resist technology can't directly descend one technology up to 200 ℃, just high temperature wafers can be back in the chip loading chamber, be seated on thewafer holder 12, wait to be cooled.

Please refer to Fig. 2, Fig. 2 puts the vertical view that a wafer 14 is arranged for chip carrier shown in Figure 1 10 surfaces.When Fig. 2 demonstrates on wafer 14 is seated in existingwafer holder 12, wafer 14 both sides can withthin plate 12a, 12b has large-area contact, because the principle of heat thermal contact conductance, so it is very fast to touch the both sides cooling rate of wafer 14 ofwafer holder 12, and the mid portion cooling rate of the wafer 14 ofcontact wafer seat 12 is not slower, therefore cause wafer 14 mid portions and both sides to have temperature difference and be subjected to thermal stress and influence and cause wafer may split from the centre (as the double-head arrow indication), cause other wafer in fragmentation and the scratch chip loading chamber, form the multi-disc wafer and scrap.

Thechip carrier 10 of prior art belongs to the way of contact of " face " with wafer 14 as from the foregoing, so has the wafer 14 heat radiation cooling rates of wafer holder of touching 12 fast, and the wafer 14 heat radiation cooling rates ofcontact wafer seat 12 are not slow, just have the influence of thermal stress.In view of this, the applicant is according to these shortcomings and according to being engaged in the correlation experience of making this series products for many years, concentrates one's attention on to observe and study it, and then proposes the present invention, not only can reduce the influence of thermal stress and effectively promote wafer productivity, further reduce the cost that wafer is made.

Summary of the invention

Main purpose of the present invention promptly is to provide a kind of thermal stress that can prevent to cause the chip loading chamber and the chip carrier thereof of wafer fragmentation.

The invention provides a kind of chip loading chamber (loadlock chamber), it comprises a load chamber housing, it has at least one load port (loading port), at least one load door (loading door) and at least one chip carrier (wafer holder) that is arranged at the load chamber hull outside, be located within the load chamber housing, in order to carry a wafer.Wherein, chip carrier also comprises at least one wafer holder and a plurality of positioner (locator), is located on the wafer holder and protrudes in the wafer holder surface.In the time of on wafer places chip carrier, the basal surface of wafer only contacts with those positioners.

Because chip loading chamber of the present invention is when bearing wafer, the bottom surface of wafer only with chip carrier on positioner join, therefore adopt the way of contact of " point " between wafer and the chip carrier, therefore wafer is lowered the temperature with the radiation type of cooling, and can effectively avoid full wafer wafer radiating rate difference to cause wafer fragmentation and other wafer of scratch too greatly, can effectively improve rate of finished products, the reduction manufacturing cost of wafer.

In order further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing.Yet accompanying drawing only for reference with aid illustration usefulness, be not to be used for to the present invention's limitr in addition.

Description of drawings

Fig. 1 is the schematic diagram of prior art chip carrier.

Fig. 2 puts the vertical view that a wafer is arranged for chip carrier shown in Figure 1 surface.

Fig. 3 is the schematic diagram of chip loading chamber of the present invention and chip carrier thereof.

Fig. 4 is the enlarged diagram of the chip carrier of Fig. 3.

Fig. 5 is the enlarged diagram of Fig. 4 positioner.

Fig. 6 is the schematic diagram of another embodiment of chip carrier of the present invention.

The simple symbol explanation

10 chip carriers, 12 wafer holder

12athin plate 12b thin plate

14 wafers, 30 chip loading chambers

32 sidewalls, 34 loam cakes

36 bottoms, 38 load chamber housings

39 vacuum extractors, 40 load ports

42 load door, 44 chip carriers

46wafer holder 46a thin plates

46b thin plate 46c center line

48 positioners, 50 positioners

Embodiment

Please refer to Fig. 3, Fig. 3 is the schematic diagram of chip loading chamber of the present invention and chip carrier thereof.As shown in Figure 3, the invention provides a chip loading chamber (loadlock chamber) 30 and comprise that at least one sidewall 32, a loam cake 34 and a bottom 36 formed load chamber housings 38, a plurality of load port (loading port) 40 are arranged at sidewall 32 outsides and a plurality of chip carrier (wafer holder) 44 that the sidewall 32 of load chamber housing 38, at least one load door (loading door) 42 be arranged at load chamber housing 38 and are arranged within the load chamber housing 38.Wherein load 40 is used for being used as the gateway of waferturnover chip carrier 44, load door 42 is used for being used as the valve of isolating exterior, andchip carrier 44 is stacked within the load chamber housing 38 in the storehouse mode, and 46 of the wafer holder of anotherchip carrier 44 of thewafer holder 46 that comprised ofarbitrary chip carrier 44 and side provided thereon or downside have a space, in order to bearing wafer.

In addition, chip loading chamber 30 also comprises a vacuum extractor 39, after wafer is positioned on thechip carrier 44, load door 42 is shut, and can use vacuum extractor 39 that chip loading chamber 30 inside are vacuumized, so that wafer cools off under vacuum state.Chip loading chamber 30 also alternative comprises that a cooling device (figure does not show) is arranged at load chamber housing 38 inside, and it comprises many cooling water pipelines, can make the faster cooling of the wafer that is placed on thechip carrier 44.

As shown in Figure 4, Fig. 4 is the enlarged diagram of thechip carrier 44 of Fig. 3, andchip carrier 44 also comprises at least onewafer holder 46 and a plurality of positioner (locator) 48.Wherein,wafer holder 46 comprises that two do not contact butthin plate 46a, the 46b of common horizontal plane, in order to carrying a wafer, andchip carrier 44 comprises at least threepositioners 48, andpositioner 48 is one to the salient point of upper process and lay respectively onthin plate 46a, the 46b of wafer holder 46.As shown in Figure 4, in the time of onpositioner 48 is arranged atwafer holder 46, eachpositioner 48 protrudes in the upper surface of wafer holder 46.In a preferred embodiment of the invention, eachpositioner 48 has a smooth end face, places for wafer.

When wafer is positioned on thewafer holder 46 ofchip carrier 44, the center of circle of wafer is dropped in the figure thatpositioner 48 surrounded, and the basal surface of wafer only contacts with the last end face ofpositioner 48, and the contact area of wafer andpositioner 48 is less than 30% of chip area, wherein preferred contact area can be decided to be 20% to 30%, 10% to 20% according to circumstances, is more preferred from 1% to 10%.

As shown in Figure 5, Fig. 5 is the enlarged diagram of Fig. 4 positioner, the generation type ofpositioner 48 is locked inpositioner 48 on thewafer holder 46 after can using boring and car tooth mode thatwafer holder 46 is dug a duck eye again, perhaps directly produces integrated positioner 48.Wherein, the material ofpositioner 48 can select to be same as the exotic material ofwafer holder 46, for example aluminium, Teflon (teflon) or above-mentioned combination, and in addition, the height a ofpositioner 48 is preferably less than 7 millimeters, so that wafer can firmly be positioned on thewafer holder 46.

Please refer to Fig. 6, Fig. 6 is the schematic diagram of another embodiment of chip carrier of the present invention.For ease of explanation, the part diagrammatical symbol of Fig. 6 is still continued to use the diagrammatical symbol of Fig. 4.Chip carrier 44 of the present invention comprises awafer holder 46, andwafer holder 46 is made of a thinplate.Chip carrier 44 also comprises a plurality of positioners 50, is located on thewafer holder 46, and protrudes in the upper surface of wafer holder 46.Positioner 50 is one to the strip projection of upper process and lay respectively at center line 46c both sides of wafer holder 46.In the time of on a wafer placeschip carrier 44, the bottom surface of wafer only can contact with positioner 50, and positioner 50 can lay respectively at the both sides of a diameter of wafer.The generation type of positioner 50 is identical with positioner shown in Figure 4 48, can integrally formed mode directly formwafer holder 46 and positioner 50, or at existingwafer holder 46 surface drillings, stationary positioned device 50 is onwafer holder 46 again.The latter can directly improve manufacturer's existing device, need not increase cost to improve the uneven problem of wafer heat radiation and eliminate and change wafer holder.

Wherein merit attention and be, chip loading chamber 30 is that a cooling chamber (cooling chamber) is used for being used as the buffered station of arbitrary technology in the semiconductor technology and uses wafer afterchip carrier 44 carries high-temperature technology, carry out another technology again after making the temperature of wafer reduce to room temperature, for example, semiconductor delusters and causes buffered station (buffer station) after the resist technology, useschip carrier 44 carryings to finish to deluster and causes the high temperature wafers of resist technology.

In sum, because chip carrier of the present invention adopts the way of contact of " point ", and the chip carrier of prior art adopts the way of contact of " face ", the contact area of wafer of the present invention as can be known and positioner is much smaller than the contact area of existing wafer and chip carrier, not only can make full wafer wafer radiating rate close, prevent the too high temperature difference to produce the effects of thermal stress, cause the fragmentation of chip even because fragmentation and situations such as other wafer of scratch, scrap and form the multi-disc wafer, and can keep wafer-level.Hence one can see that, and chip loading chamber of the present invention and chip carrier thereof not only can improve the rate of finished products of wafer manufacture, and further reduce the manufacturing cost of wafer.

The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.

Claims (37)

Translated fromChinese

1.一种晶片装载室(loadlock chamber)，其包括：1. A wafer loading chamber (loadlock chamber), comprising:一装载室壳体，其具有至少一负载口(loading port)；a loading chamber housing having at least one loading port;至少一负载门(loading door)，设置于该装载室壳体的外侧；以及at least one loading door disposed on the outside of the loading compartment housing; and至少一晶片载具(wafer holder)，设于该装载室壳体之内，用以承载一晶片，该晶片载具包括：At least one wafer holder (wafer holder) is arranged in the housing of the loading chamber for carrying a wafer, and the wafer holder includes:至少一晶片座；以及at least one wafer holder; and多个定位装置(locator)，设于该晶片座之上并突出于该晶片座表面；a plurality of positioning devices (locators) arranged on the wafer seat and protruding from the surface of the wafer seat;其中，当该晶片置于该晶片载具之上时，该晶片的底表面仅与该些定位装置相接触。Wherein, when the wafer is placed on the wafer carrier, the bottom surface of the wafer only contacts with the positioning devices.2.如权利要求1所述的晶片装载室，其中当该晶片置于该晶片载具之上时，该晶片与该些定位装置的接触面积小于该晶片面积的30％。2. The wafer loading chamber as claimed in claim 1, wherein when the wafer is placed on the wafer carrier, the contact area between the wafer and the positioning devices is less than 30% of the area of the wafer.3.如权利要求2所述的晶片装载室，其中该晶片与该些定位装置的接触面积范围为该晶片面积的20％至30％。3. The wafer loading chamber as claimed in claim 2, wherein a contact area between the wafer and the positioning devices ranges from 20% to 30% of the area of the wafer.4.如权利要求2所述的晶片装载室，其中该晶片与该些定位装置的接触面积范围为该晶片面积的10％至20％。4. The wafer loading chamber as claimed in claim 2, wherein a contact area between the wafer and the positioning devices ranges from 10% to 20% of the area of the wafer.5.如权利要求2所述的晶片装载室，其中该晶片与该些定位装置的接触面积范围为该晶片面积的1％至10％。5. The wafer loading chamber as claimed in claim 2, wherein a contact area between the wafer and the positioning devices ranges from 1% to 10% of the area of the wafer.6.如权利要求1所述的晶片装载室，其中各该定位装置皆为一向上突起的条状凸块。6. The wafer loading chamber as claimed in claim 1, wherein each of the positioning devices is a strip-shaped protrusion protruding upward.7.如权利要求6所述的晶片装载室，其中该晶片载具包括二该定位装置，且当该晶片置于该晶片载具之上时，该些定位装置分别位于该晶片的一直径的两侧。7. The wafer loading chamber as claimed in claim 6, wherein the wafer carrier includes two positioning devices, and when the wafer is placed on the wafer carrier, the positioning devices are respectively located at a diameter of the wafer sides.8.如权利要求1所述的晶片装载室，其中各该定位装置皆为一向上突起的凸点。8. The wafer loading chamber as claimed in claim 1, wherein each of the positioning devices is an upward protruding bump.9.如权利要求8所述的晶片装载室，其中该晶片载具包括至少三该定位装置。9. The loadlock as claimed in claim 8, wherein the wafer carrier comprises at least three positioning devices.10.如权利要求1所述的晶片装载室，其中该晶片装载室包括多个该晶片载具。10. The wafer load chamber of claim 1, wherein the wafer load chamber comprises a plurality of the wafer carriers.11.如权利要求10所述的晶片装载室，其中该些晶片载具堆栈设置于该装载室壳体内。11. The loadlock as claimed in claim 10, wherein the wafer carriers are stacked in the loadlock housing.12.如权利要求11所述的晶片装载室，其中该些晶片载具的任一该晶片座与设于其上侧或下侧的另一该晶片座之间具有一空隙。12. The wafer loading chamber as claimed in claim 11, wherein there is a gap between any one of the wafer holders of the wafer carriers and another wafer holder disposed on an upper side or a lower side thereof.13.如权利要求1所述的晶片装载室，其中该晶片座包括多个不相接触但共水平面的薄板，用以承载一该晶片。13. The wafer loading chamber as claimed in claim 1, wherein the wafer holder comprises a plurality of non-contact but co-horizontal thin plates for supporting the wafer.14.如权利要求1所述的晶片装载室，其中该定位装置突出于该晶片座的高度小于7毫米。14. The wafer loading chamber as claimed in claim 1, wherein a height of the positioning device protruding from the wafer seat is less than 7 mm.15.如权利要求1所述的晶片装载室，其中该定位装置的材料相同于该晶片座的材料。15. The wafer loading chamber as claimed in claim 1, wherein the material of the positioning device is the same as that of the wafer seat.16.如权利要求1所述的晶片装载室，其中该定位装置的材料为耐高温材料。16. The wafer loading chamber as claimed in claim 1, wherein the positioning device is made of high temperature resistant material.17.如权利要求16所述的晶片装载室，其中该定位装置的材料包括铝、特氟龙(teflon)或上述的组合。17. The wafer loading chamber as claimed in claim 16, wherein the material of the positioning device comprises aluminum, teflon or a combination thereof.18.如权利要求1所述的晶片装载室，其中该晶片装载室为一冷却室(cooling chamber)。18. The wafer loading chamber of claim 1, wherein the wafer loading chamber is a cooling chamber.19.如权利要求1所述的晶片装载室，其中该晶片装载室还包括一抽真空装置。19. The wafer loading chamber of claim 1, wherein the wafer loading chamber further comprises a vacuum device.20.如权利要求1所述的晶片装载室，其中该晶片装载室适用于一半导体去光致抗蚀剂工艺后的缓冲站(buffer station)，且该晶片载具用以承载完成该去光致抗蚀剂工艺的晶片。20. The wafer loading chamber as claimed in claim 1, wherein the wafer loading chamber is suitable for a buffer station (buffer station) after a semiconductor photoresist removal process, and the wafer carrier is used to carry and complete the delighting Resist-processed wafers.21.一种设置于一晶片装载室(loadlock chamber)中的晶片载具，用以承载一高温工艺后的晶片，该晶片载具包括：21. A wafer carrier disposed in a wafer loading chamber (loadlock chamber), used to carry a wafer after a high temperature process, the wafer carrier comprising:一薄板状的晶片座；以及a wafer holder in the form of a thin plate; and至少二定位装置(locator)，设于该晶片座之上并突出于该晶片座表面，当该晶片置于该晶片载具之上时，该晶片仅与该些定位装置相接触，且该晶片与该些定位装置的接触面积小于该晶片面积的30％。At least two locators are provided on the wafer seat and protrude from the surface of the wafer seat. When the wafer is placed on the wafer carrier, the wafer is only in contact with the locators, and the wafer The contact area with the positioning devices is less than 30% of the wafer area.22.如权利要求21所述的晶片载具，其中该晶片与该些定位装置的接触面积范围为该晶片面积的20％至30％。22. The wafer carrier as claimed in claim 21, wherein a contact area between the wafer and the positioning devices ranges from 20% to 30% of the area of the wafer.23.如权利要求21所述的晶片载具，其中该晶片与该些定位装置的接触面积范围为该晶片面积的10％至20％。23. The wafer carrier as claimed in claim 21, wherein a contact area between the wafer and the positioning devices ranges from 10% to 20% of the area of the wafer.24.如权利要求21所述的晶片载具，其中该晶片与该些定位装置的接触面积范围为该晶片面积的1％至10％。24. The wafer carrier as claimed in claim 21, wherein a contact area between the wafer and the positioning devices ranges from 1% to 10% of the area of the wafer.25.如权利要求21所述的晶片载具，其中各该定位装置皆为一向上突起的条状凸块。25. The wafer carrier as claimed in claim 21, wherein each of the positioning devices is an upwardly protruding strip-shaped bump.26.如权利要求25所述的晶片载具，其中当该晶片置于该晶片载具之上时，该些定位装置分别位于该晶片的一直径的两侧。26. The wafer carrier of claim 25, wherein when the wafer is placed on the wafer carrier, the positioning devices are respectively located on two sides of a diameter of the wafer.27.如权利要求21所述的晶片载具，其中各该定位装置皆为一向上突起的凸点。27. The wafer carrier as claimed in claim 21, wherein each of the positioning means is an upwardly protruding bump.28.如权利要求27所述的晶片载具，其中该晶片载具包括至少三该定位装置。28. The wafer carrier of claim 27, wherein the wafer carrier comprises at least three positioning devices.29.如权利要求28所述的晶片载具，其中当该晶片置于该晶片载具之上时，该晶片的圆心落在该些定位装置所围成的图形中。29. The wafer carrier as claimed in claim 28, wherein when the wafer is placed on the wafer carrier, the center of the wafer falls within the figure enclosed by the positioning devices.30.如权利要求21所述的晶片载具，其中各该定位装置包括一平坦的顶面，当该晶片置于该晶片载具之上时，该晶片仅与各该定位装置的该顶面相接触。30. The wafer carrier of claim 21 , wherein each of the positioning devices includes a flat top surface, and when the wafer is placed on the wafer carrier, the wafer is only in contact with the top surface of each of the positioning devices touch.31.如权利要求21所述的晶片载具，其中该晶片座包括二不相接触但共水平面的薄板，用以承载一该晶片。31. The wafer carrier as claimed in claim 21, wherein the wafer holder comprises two non-contact but co-horizontal thin plates for supporting the wafer.32.如权利要求21所述的晶片载具，其中该定位装置突出于该晶片座的高度小于7毫米。32. The wafer carrier of claim 21, wherein the height of the positioning device protruding from the wafer seat is less than 7 mm.33.如权利要求21所述的晶片载具，其中该定位装置的材料相同于该晶片座的材料。33. The wafer carrier of claim 21, wherein the positioning device is made of the same material as the wafer holder.34.如权利要求21所述的晶片载具，其中该定位装置的材料为耐高温材料。34. The wafer carrier as claimed in claim 21, wherein the positioning device is made of a high temperature resistant material.35.如权利要求34所述的晶片载具，其中该定位装置的材料包括铝、特氟龙(teflon)或上述的组合。35. The wafer carrier as claimed in claim 34, wherein the positioning device is made of aluminum, teflon or a combination thereof.36.如权利要求21所述的晶片载具，其中该晶片装载室为一冷却室(cooling chamber)。36. The wafer carrier of claim 21, wherein the wafer loading chamber is a cooling chamber.37.如权利要求21所述的晶片载具，其中该晶片载具适用于一半导体去光致抗蚀剂工艺后的缓冲站(buffer station)中，且该高温工艺为该去光致抗蚀剂工艺。37. The wafer carrier of claim 21, wherein the wafer carrier is suitable for use in a buffer station after a semiconductor photoresist removal process, and the high temperature process is the photoresist removal process agent process.

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