CN1394012A - Phase compensation method and device for uplink burst control of TDM/TDMA system - Google Patents

Abstract

Translated fromChinese

一种用于TOM/TDMA系统的上行突发控制的相位补偿方法及相位补偿装置，其主要特征在于利用速率匹配模块和相位补偿模块直接对数据复接＆并串转换模块输出的上行数据UpData_BC和突发控制模块输出的激光器控制信号On/off_BC进行合适的相位补偿，既降低了硬件系统的实现难度，又降低突发控制的精度，从根本上解决APON系统中的控制精度问题。

A phase compensation method and phase compensation device for uplink burst control of a TOM/TDMA system, which is mainly characterized in that the uplink data UpData_BC and The laser control signal On/off_BC output by the burst control module performs appropriate phase compensation, which not only reduces the difficulty of hardware system implementation, but also reduces the accuracy of burst control, and fundamentally solves the problem of control accuracy in the APON system.

Description

Translated fromChinese

一种用于TDM/TDMA系统的上行突发控制的相位补偿方法及装置A phase compensation method and device for uplink burst control of TDM/TDMA system

本发明涉及一种用于TDM/TDMA(时分复用/时分多址)系统的上行突发控制的相位补偿方法及装置，特别是一种基于并行逻辑的TDM/TDMA系统中的APON(基于ATM的无源光网络的上行突发控制的相位补偿技术。The invention relates to a phase compensation method and device for uplink burst control of a TDM/TDMA (time division multiplexing/time division multiple access) system, in particular to an APON (based on ATM) in a TDM/TDMA system based on parallel logic Phase Compensation Technology for Upstream Burst Control in Passive Optical Networks.

APON(基于ATM的无源光网络)系统，一种基于ATM的PON系统，与其他PON系统一样，是一种TDM/TDMA系统。APON系统，被认为是FTTH的最佳解决方案之一，为此得到了FSAN的高度关注。为了保证不同厂家的APON系统兼容性和互操作性，ITU_T在1998年提出并通过了规范ONT(光网络终端)的协议。APON (ATM-based Passive Optical Network) system, an ATM-based PON system, is a TDM/TDMA system like other PON systems. APON system is considered to be one of the best solutions for FTTH, and has received great attention from FSAN for this reason. In order to ensure the compatibility and interoperability of APON systems from different manufacturers, ITU_T proposed and passed an agreement to standardize ONT (Optical Network Terminal) in 1998.

根据G.983.1，APON系统，下行(OLT到ONU)采用时分复用(TDM)广播技术，而上行(ONU到OLT)则采用突发时分多址(TDMA)技术，是一个典型的TDM/TDMA(时分复用/时分多址)系统。一个OLT(光线路终端)可以最多与64个ONU(光网络单元)相连，而且这些ONU与OLT之间距离可以不相等。为了保证所有ONU能够有效共享上行带宽，相邻时隙的ONU发送数据不会发生冲突，从而造成线路传输质量的下降，G.983.1定义了一种规范了Ranging Protocol(测距协议)。测距技术的基本原理，就是将所有ONU的环路延时(ONU到OLT延时与OLT到ONU的延时之和)，通过延时补偿机制，统一逻辑地拉远到某一固定的逻辑延时，该逻辑延时在G.983.1中称为“等化环路延时Teqd(Equalized round tripdelay)”，补偿延时则称为等化延时Td(Equalized delay)。显然，要进行精确的延时补偿，不仅需要精确  的延时控制电路，而且更重要是需要一个精确的延时基准。该延时基准，就是上行参考时标，该延时基准仅存在于ONU中。According to G.983.1, APON system, downlink (OLT to ONU) adopts time division multiplexing (TDM) broadcast technology, while uplink (ONU to OLT) uses burst time division multiple access (TDMA) technology, which is a typical TDM/TDMA (Time Division Multiplexing/Time Division Multiple Access) system. An OLT (Optical Line Terminal) can be connected to a maximum of 64 ONUs (Optical Network Units), and the distance between these ONUs and the OLT can be unequal. In order to ensure that all ONUs can effectively share the upstream bandwidth, and that ONUs sending data in adjacent time slots will not collide, resulting in a decrease in line transmission quality, G.983.1 defines a standardized Ranging Protocol (ranging protocol). The basic principle of ranging technology is to unify and logically pull the loop delay of all ONUs (the sum of the delay from ONU to OLT and the delay from OLT to ONU) to a certain fixed logic through the delay compensation mechanism. Delay, the logic delay is called "equalized loop delay Teqd (Equalized round tripdelay)" in G.983.1, and the compensation delay is called equalized delay Td (Equalized delay). Obviously, to perform accurate delay compensation, not only an accurate delay control circuit is required, but more importantly, an accurate delay reference is required. The delay reference is the uplink reference time scale, and the delay reference only exists in the ONU.

根据G.983.1，APON系统是一个OLT(光线路终端)为主，ONU(光网络单元)为从的主从系统。在这样的主从系统中，OLT(光线路终端)中存在系统时钟源，并且采用该时钟源产生定时信号统一接收来自不同ONU(光网络单元)数据。ONU需要从下行光路的NRZ(非归零码)光信号中提取时钟，并建立本地定时系统，其中下行帧时标和上行参考时标是定时系统中常用的两个定时时标。由于OLT(光线路终端)采用统一的时钟对来自不同ONU的数据进行同步接收，因此为了保证这些数据的正确接收，需要在每个ONU(光网络单元)中保持一个与OLT(光纯正路终端)的下行帧时标具有固定的相位关系的上行参考时标。According to G.983.1, the APON system is a master-slave system in which OLT (Optical Line Terminal) is the master and ONU (Optical Network Unit) is the slave. In such a master-slave system, there is a system clock source in the OLT (Optical Line Terminal), and the clock source is used to generate timing signals to uniformly receive data from different ONUs (Optical Network Units). The ONU needs to extract the clock from the NRZ (non-return-to-zero) optical signal of the downlink optical path, and establish a local timing system, in which the downlink frame time scale and the uplink reference time scale are two commonly used timing time scales in the timing system. Since the OLT (Optical Line Terminal) uses a unified clock to receive data from different ONUs synchronously, in order to ensure the correct reception of these data, it is necessary to maintain a ) The downlink frame time scale has an uplink reference time scale with a fixed phase relationship.

为了在ONU(光网络单元)中建立本地定时系统——其中包括下行帧时标和上行参考时标，通常需要对接收到的下行数据字节同步、解扰码(为了提高传输质量，需要对数据进行扰码处理)和帧同步，建立下行帧时标，然后再对下行帧时标进行处理，直接产生上行参考时标。SDH等TDM系统，采用在帧固定位置插入帧同步字符方法使得在接收侧很容易获得字节同步和帧同步，因此可以采用市场上的字节匹配类型的芯片进行帧同步，并且能够保证同步精度。APON系统，与SDH不同，虽然在PLOAM的第六字节插入帧同步指示比特，但其字节同步必须通过ATM信元定界方法来获得，而且帧同步只能在解扰之后进行，所以APON的下行帧同步不能通过采用普通的同步芯片获得，而需要采用专用芯片或FPGA实现。显然，在开发阶段，只能通过FPGA芯片来实现APON的ONU(光网络单元)侧的帧同步，从而最终建立ONU(光网络单元)的本地定时系统。In order to establish a local timing system in the ONU (Optical Network Unit), which includes the downlink frame time scale and the uplink reference time scale, it is usually necessary to synchronize and descramble the received downlink data bytes (in order to improve the transmission quality, it is necessary to The data is subjected to scrambling processing) and frame synchronization, and the downlink frame time scale is established, and then the downlink frame time scale is processed to directly generate the uplink reference time scale. TDM systems such as SDH use the method of inserting frame synchronization characters at fixed positions in the frame to make it easy to obtain byte synchronization and frame synchronization on the receiving side. Therefore, byte matching chips on the market can be used for frame synchronization, and synchronization accuracy can be guaranteed. . APON system is different from SDH. Although the frame synchronization indicator bit is inserted in the sixth byte of PLOAM, its byte synchronization must be obtained through the ATM cell delimitation method, and frame synchronization can only be performed after descrambling. Therefore, APON Downlink frame synchronization cannot be obtained by using a common synchronization chip, but needs to be realized by a dedicated chip or FPGA. Obviously, in the development stage, the frame synchronization on the ONU (optical network unit) side of the APON can only be realized through the FPGA chip, so as to finally establish the local timing system of the ONU (optical network unit).

采用FPGA实现帧同步的方法，通常可以归纳为两类：串行帧同步和并行帧同步，其最主要的区别在于参与匹配的数据总线宽度。串行帧同步，即基于串行逻辑的帧同步，其主要特点是：信元定界、解扰和帧同步电路均采用串行数据，即数据总线宽度为1比特。并行帧同步，顾名思义，就是帧同步电路采用总线宽度大于1的数据进行同步匹配的帧同步，通常该数据总线宽度为8。通常，采用串行帧同步产生的下行帧时标信号SOF(Start ofFrame，帧开始)，相位精确，可以直接作为上行参考时标，并且在此基础上突发控制能够保证所需的控制精度。然而，由于APON系统下行速率为155.52Mbps或622.08Mbps，在这么高的数据中采用串行逻辑获得帧同步，将对器件提出很高的要求，而且目前使用FPGA实现622.08Mbps的串行帧同步几乎不可能。因此，为了降低对器件的要求，降低系统的实现难度，几乎都采用并行逻辑获取帧同步。如果采用并行逻辑实现帧同步，由于字节时钟的精度问题，下行帧时标通常不能直接作为上行参考时标。在基于并行逻辑的APON系统系统中，如果以下行帧时标为基础实现突发控制，通常是无法满足控制精度的要求——APON系统要求的控制精度为1比特。The method of using FPGA to realize frame synchronization can usually be classified into two categories: serial frame synchronization and parallel frame synchronization. The main difference lies in the width of the data bus involved in matching. Serial frame synchronization, that is, frame synchronization based on serial logic, its main features are: cell delimitation, descrambling and frame synchronization circuits all use serial data, that is, the data bus width is 1 bit. Parallel frame synchronization, as the name implies, is a frame synchronization in which the frame synchronization circuit uses data whose bus width is greater than 1 for synchronous matching. Usually, the data bus width is 8. Usually, the downlink frame timing signal SOF (Start of Frame) generated by serial frame synchronization is accurate in phase and can be directly used as the uplink reference timing, and on this basis, burst control can guarantee the required control accuracy. However, since the downstream rate of the APON system is 155.52Mbps or 622.08Mbps, using serial logic to obtain frame synchronization in such a high data will put forward high requirements on the device, and currently using FPGA to achieve 622.08Mbps serial frame synchronization is almost impossible. Therefore, in order to reduce the requirements on devices and reduce the difficulty of system realization, almost all parallel logics are used to obtain frame synchronization. If parallel logic is used to implement frame synchronization, the downlink frame time scale cannot usually be directly used as the uplink reference time scale due to the precision of the byte clock. In the APON system based on parallel logic, if the burst control is realized based on the downlink frame time scale, it usually cannot meet the control precision requirements - the control precision required by the APON system is 1 bit.

本发明的目的是提供一种既可有效降低硬件系统的实现难度、实现容易、可靠，又不降低突发控制精度的基于并行逻辑的TDM/TDMA系统的上行突发控制的相位补偿方法。The purpose of the present invention is to provide a phase compensation method for uplink burst control of a TDM/TDMA system based on parallel logic, which can effectively reduce the implementation difficulty of the hardware system, is easy and reliable to implement, and does not reduce the accuracy of burst control.

本发明的另一目的是提供一种配合实现上述相位补偿方法的既可有效降低硬件系统的实现难度、实现容易、可靠，又不降低突发控制精度的基于并行逻辑的TDM/TDMA系统的上行突发控制的相位补偿装置。Another object of the present invention is to provide an uplink TDM/TDMA system based on parallel logic that can effectively reduce the implementation difficulty of the hardware system, is easy and reliable, and does not reduce the accuracy of burst control. Phase compensation device for burst control.

为实现本发明的目的，本发明提出的相位补偿方法主要包括以下步骤：In order to realize the purpose of the present invention, the phase compensation method proposed by the present invention mainly includes the following steps:

1)、在并行帧同步模块接收下行数据向突发控制模块输出下行帧时标SOF的同时从并行帧同步模块中提取相位值P输送到速率匹配模块输入端；1), when the parallel frame synchronization module receives the downlink data and outputs the downlink frame time stamp SOF to the burst control module, the phase value P is extracted from the parallel frame synchronization module and delivered to the input terminal of the rate matching module;

2)、突发控制模块接收并行帧同步模块的下行帧时标SOF作为上行参考时标并根据测距所得的延时值，直接产生激光器开断控制信号On/off_BC和复接控制信号并将激光器开断控制信号On/off_BC输送给相位补偿模块及将复接控制信号输送给数据复接&并串转换模块，数据复接&并串转换模块在复接控制信号的作用下将接收的等待发送的ATM信元、上行PLOAM、POH(PON开销字节)、mini_slot中的微信元转换为上行数据UpData_BC输送给相位补偿模块，此时速率匹配模块结合上行速率和下行速率计算出需要进行补偿的相位补偿值Pc，并将该相位补偿值Pc输送到相位补偿模块；2), the burst control module receives the downlink frame time mark SOF of the parallel frame synchronization module as the uplink reference time mark and according to the delay value obtained from ranging, directly generates the laser on/off control signal On/off_BC and the multiplex control signal and The laser on/off control signal On/off_BC is sent to the phase compensation module and the multiplexing control signal is sent to the data multiplexing & parallel-serial conversion module, and the data multiplexing & parallel-serial conversion module will receive the waiting The sent ATM cells, uplink PLOAM, POH (PON overhead bytes), and micro cells in the mini_slot are converted into uplink data UpData_BC and sent to the phase compensation module. At this time, the rate matching module calculates the data that needs to be compensated based on the uplink rate and downlink rate. Phase compensation value Pc, and the phase compensation value Pc is delivered to the phase compensation module;

3)、相位补偿模块接收突发控制模块产生的激光器开断控制信号On/off_BC和数据复接&并串转换模块输出的上行数据UpData_BC，并根据相位补偿值Pc对这两个信号进行合适处理后输出激光器开断控制信号On/off及上行数据UpData。3) The phase compensation module receives the laser on/off control signal On/off_BC generated by the burst control module and the uplink data UpData_BC output by the data multiplexing & parallel-to-serial conversion module, and properly processes these two signals according to the phase compensation value Pc Afterwards, the laser on/off control signal On/off and the uplink data UpData are output.

为实现本发明的另一目的，本发明还提出一种实现上述相位补偿方法的上行突发控制的相位补偿装置，该相位补偿装置主要包括接收下行数据的并行帧同步模块、产生激光器开断控制信号On/off_BC的突发控制模块、进行数据复接和并串转接的数据复接&并串转换模块，其特征在于还包括速率匹配模块、相位补偿模块，其中速率匹配模块的输入端接并行帧同步模块输出相位值P的输出端口，其输出相位补偿值Pc的输出端连接相位补偿模块的控制端，相位补偿模块的其中一输入端接突发控制模块输出激光器开断控制信号On/off_BC的输出端口，其另一输入端接数据复接&并串转换模块输出上行数据UpData_BC的输出端口，其输出端分别为输出经相位补偿模块进行合适处理后的激光器开断控制信号On/off和上行数据UpData的端口。In order to achieve another purpose of the present invention, the present invention also proposes a phase compensation device for realizing the uplink burst control of the above-mentioned phase compensation method. The burst control module of the signal On/off_BC, the data multiplexing & parallel-serial conversion module for data multiplexing and parallel-serial switching, is characterized in that it also includes a rate matching module and a phase compensation module, wherein the input terminal of the rate matching module is connected to The parallel frame synchronization module outputs the output port of the phase value P, and the output terminal of the output phase compensation value Pc is connected to the control terminal of the phase compensation module, and one of the input terminals of the phase compensation module is connected to the burst control module to output the laser off control signal On/ The output port of off_BC, the other input terminal is connected to the output port of the data multiplexing & parallel-serial conversion module to output the uplink data UpData_BC, and the output terminals are respectively the output of the laser off control signal On/off after proper processing by the phase compensation module And the port of uplink data UpData.

本发明由于采用增加速率匹配模块和相位补偿模块并通过两者的有机结合对上行突发控制进行合适的相位补偿的相位补偿技术，有效解决基于并行逻辑的TDM/TDMA系统特别是APON系统中的时钟精度问题，使其可以方便可靠地利用下行帧时标作为上行参考时标而实现突发控制并保证突发控制具有很高的控制精度，在不增加系统的实现难度的基础上，降低对器件的要求，保证硬件系统实现容易、可靠。The present invention effectively solves the problem in the TDM/TDMA system based on parallel logic, especially the APON system, due to the adoption of the phase compensation technology that increases the rate matching module and the phase compensation module and performs appropriate phase compensation for the uplink burst control through the organic combination of the two. The problem of clock accuracy makes it possible to conveniently and reliably use the downlink frame time scale as the uplink reference time scale to realize burst control and ensure high control accuracy of burst control, and reduce the need for system implementation without increasing the difficulty of system implementation The requirements of the device ensure that the hardware system is easy and reliable to implement.

以下结合实施例及附图详细说明本发明的基本组成与工作过程及原理：Below in conjunction with embodiment and accompanying drawing describe in detail basic composition and working process and principle of the present invention:

图1是本实施例的组成方框图；Fig. 1 is a composition block diagram of the present embodiment;

图2是本实施例的下行帧时标SOF的相位示意图；FIG. 2 is a schematic diagram of the phase of the downlink frame time scale SOF in this embodiment;

图3是本实施例对于155.52/155.52Mbps对称系统的激光器开断控制信号的相位补偿效果示意图；Fig. 3 is a schematic diagram of the phase compensation effect of the laser off control signal for the 155.52/155.52Mbps symmetrical system in this embodiment;

图4是本实施例对于622.08/155.52Mbps不对称系统的激光器开断控制信号的相位补偿效果示意图；Fig. 4 is a schematic diagram of the phase compensation effect of the laser off control signal for the 622.08/155.52Mbps asymmetrical system in this embodiment;

图5是本实施例对于155.52/155.52Mbps对称系统的上行串行数据的相位补偿效果示意图；FIG. 5 is a schematic diagram of the phase compensation effect of the uplink serial data of the 155.52/155.52 Mbps symmetrical system in this embodiment;

图6是本实施例对于622.08/155.52Mbps不对称系统的上行串行数据的相位补偿效果示意图；FIG. 6 is a schematic diagram of the phase compensation effect of the uplink serial data of the 622.08/155.52 Mbps asymmetric system in this embodiment;

图7是本实施例相位补偿模块对于激光器开断控制信号的相位补偿原理示意图；Fig. 7 is a schematic diagram of the phase compensation principle of the phase compensation module of this embodiment for the laser off control signal;

图8是本实施例相位补偿模块对于上行串行数据的相位补偿原理示意图；FIG. 8 is a schematic diagram of the phase compensation principle of the phase compensation module for uplink serial data in this embodiment;

如图1所示，本实施例主要包括接收下行数据的并行帧同步模块、产生激光器开断控制信号On/off_BC的突发控制模块、进行数据复接和并串转接的数据复接&并串转换模块，其特征在于还包括速率匹配模块、相位补偿模块，其中速率匹配模块的输入端接并行帧同步模块输出相位值P的输出端口，其输出相位补偿值Pc的输出端连接相位补偿模块的控制端，相位补偿模块的其中一输入端接突发控制模块输出激光器开断控制信号On/off_BC的输出端口，其另一输入端接数据复接&并串转换模块输出上行数据UpData_BC的输出端口，其输出端分别为输出经相位补偿模块进行合适处理后的激光器开断控制信号On/off和上行数据UpData的端口。其中为有效保证其实现完整可靠，上述并行帧同步模块的输入端接下行数据端口，所述并行帧同步模块输入端接收下行数据，该并行帧同步模块对接收的串行数据进行分接处理将单一数据流变成具有不同相位的n个并行数据流并进行帧同步搜索而选定工作数据流及该工作数据流的帧头指示信号和相位值P，其输出端分别输出下行帧时标SOF给突发控制模块和从该下行帧时标SOF中提取出的相位值P给速率匹配模块。上述突发控制模块的输入端接并行帧同步模块输出下行帧时标SOF的输出端，该突发控制模块接收并行帧同步模块输出的下行帧时标SOF并将其作为上行突发控制的上行参考时标，且该突发控制模块的复接控制信号输出端与数据复接&并串转换模块的控制端连接而保证数据复接&并串转换模块与突发控制模块同步工作，该突发控制摸块的输出端输出激光器开断控制信号On/off_BC到相位补偿模块中进行相位补偿。以保证激光器控制信号On/off与上行数据UpData同步。上述数据复接&并串转换模块的输入端分别接等待发送的ATM信元端口、上行PLOAM端口、POH(PON开销字节)端口、mini_slot中的微信元端口，该数据复接&并串转换模块的输入端分别接收等待发送的ATM信元、上行PLOAM、POH(PON开销字节)、mini_slot中的微信元，并通过接收到的诸信号进行数据复接和并串转换的工作而将诸信号变成上行数据UpData_BC，其输出端输出上行数据UpData_BC到相位补偿模块进行相位补偿。As shown in Figure 1, this embodiment mainly includes a parallel frame synchronization module for receiving downlink data, a burst control module for generating the laser on/off control signal On/off_BC, and a data multiplexing & paralleling module for data multiplexing and parallel-to-serial switching. The serial conversion module is characterized in that it also includes a rate matching module and a phase compensation module, wherein the input terminal of the rate matching module is connected to the output port of the parallel frame synchronization module output phase value P, and the output terminal of the output phase compensation value Pc is connected to the phase compensation module One of the input terminals of the phase compensation module is connected to the output port of the burst control module outputting the laser on/off control signal On/off_BC, and the other input terminal is connected to the output of the data multiplexing & parallel-serial conversion module to output the uplink data UpData_BC port, the output port of which is respectively the port for outputting the On/Off control signal of the laser and the uplink data UpData after being properly processed by the phase compensation module. Wherein in order to effectively ensure its completeness and reliability, the input terminal of the above-mentioned parallel frame synchronization module is connected to the downlink data port, the input terminal of the parallel frame synchronization module receives the downlink data, and the parallel frame synchronization module performs demultiplexing processing on the received serial data A single data stream becomes n parallel data streams with different phases and performs a frame synchronization search to select the working data stream and the frame header indication signal and phase value P of the working data stream, and its output terminals output the downlink frame time stamp SOF respectively To the burst control module and the phase value P extracted from the downlink frame time mark SOF to the rate matching module. The input terminal of the burst control module is connected to the output end of the downlink frame time stamp SOF output by the parallel frame synchronization module, and the burst control module receives the downlink frame time stamp SOF output by the parallel frame synchronization module and uses it as the uplink of the uplink burst control Refer to the time scale, and the multiplexing control signal output terminal of the burst control module is connected to the control terminal of the data multiplexing & parallel-serial conversion module to ensure that the data multiplexing & parallel-serial conversion module and the burst control module work synchronously. The output end of the hair control module outputs the laser on/off control signal On/off_BC to the phase compensation module for phase compensation. To ensure that the laser control signal On/off is synchronized with the uplink data UpData. The input terminals of the above-mentioned data multiplexing & parallel-serial conversion module are respectively connected to the ATM cell port waiting to be sent, the upstream PLOAM port, the POH (PON overhead byte) port, and the micro-cell port in the mini_slot. The data multiplexing & parallel-serial conversion The input terminal of the module respectively receives the ATM cell waiting to be sent, the upstream PLOAM, POH (PON overhead byte), and the micro cell in the mini_slot, and performs data multiplexing and parallel-to-serial conversion through the received signals to convert them The signal becomes the uplink data UpData_BC, and its output terminal outputs the uplink data UpData_BC to the phase compensation module for phase compensation.

如图1-图8所示，本实施例所述的相位补偿方法主要包括以下步骤：As shown in Figures 1-8, the phase compensation method described in this embodiment mainly includes the following steps:

1)、在并行帧同步模块接收下行数据向突发控制模块输出下行帧时标SOF的同时，从并行帧同步模块的下行帧时标SOF中提取相位值P输送到速率匹配模块输入端；1), while the parallel frame synchronization module receives the downlink data and outputs the downlink frame time stamp SOF to the burst control module, the phase value P is extracted from the downlink frame time stamp SOF of the parallel frame synchronization module and delivered to the input terminal of the rate matching module;

2)、突发控制模块接收并行帧同步模块的下行帧时标SOF作为上行参考时标，并根据测距所得的延时值，直接产生激光器开断控制信号On/off_BC和复接控制信号，并将激光器开断控制信号On/off_BC输送给相位补偿模块及将复接控制信号输送给数据复接&并串转换模块，数据复接&并串转换模块在复接控制信号的作用下，将接收的等待发送的ATM信元、上行PLOAM、POH(PON开销字节)、mini_slot中的微信元同步转换为上行数据UpData_BC并将其输送给相位补偿模块，此时针对不同的APON系统，如155.52/155.52Mbps的对称系统或622.08/155.52Mbp的不对称系统等各种APON系统中上行速率和下行速率的情况，速率匹配模块结合本系统的上行速率和下行速率计算出需要进行补偿的相位补偿值Pc，并将该相位补偿值Pc输送到相位补偿模块；2), the burst control module receives the downlink frame time mark SOF of the parallel frame synchronization module as the uplink reference time mark, and according to the delay value obtained from ranging, directly generates the laser on/off control signal On/off_BC and the multiplex control signal, And the laser on/off control signal On/off_BC is sent to the phase compensation module and the multiplexing control signal is sent to the data multiplexing & parallel-serial conversion module. Under the action of the multiplexing control signal, the data multiplexing & parallel-serial conversion module will The received ATM cells waiting to be sent, uplink PLOAM, POH (PON overhead bytes), and micro cells in mini_slot are synchronously converted into uplink data UpData_BC and sent to the phase compensation module. At this time, for different APON systems, such as 155.52 /155.52Mbps symmetric system or 622.08/155.52Mbps asymmetric system and other APON system uplink rate and downlink rate, the rate matching module calculates the phase compensation value that needs to be compensated based on the uplink rate and downlink rate of the system Pc, and the phase compensation value Pc is delivered to the phase compensation module;

3)、相位补偿模块接收突发控制模块产生的激光器开断控制信号On/off_BC和数据复接&并串转换模块输出的上行数据UpData_BC，并根据相位补偿值Pc对这两个信号同时进行合适处理后输出相互同步的激光器开断控制信号On/off及上行数据UpData。3) The phase compensation module receives the laser on/off control signal On/off_BC generated by the burst control module and the uplink data UpData_BC output by the data multiplexing & parallel-to-serial conversion module, and performs appropriate processing on these two signals at the same time according to the phase compensation value Pc After processing, the mutually synchronized laser on/off control signal On/off and uplink data UpData are output.

其中，为保证提取相位值P简单、可靠、实现容易，上述步骤1中从并行帧同步模块中提取相位值P的方法是：Among them, in order to ensure that the extraction of the phase value P is simple, reliable, and easy to implement, the method for extracting the phase value P from the parallel frame synchronization module in theabove step 1 is:

1)、并行帧同步模块对输入的串行数据进行分接处理，将单一数据流变成具有不同相位的n个并行数据流；1), the parallel frame synchronization module demultiplexes the input serial data, and turns a single data stream into n parallel data streams with different phases;

2)、并行帧同步模块对上述具有不同相位的n个并行数据流进行帧同步搜索，并根据帧同步搜索的结果，选定某一个相位的数据流作为帧同步状态机跟踪的对象；2), parallel frame synchronous module carries out frame synchronous search to above-mentioned n parallel data streams with different phases, and according to the result of frame synchronous search, selects the data stream of a certain phase as the object of frame synchronous state machine tracking;

3)、经过帧同步机制后，选定能够满足帧同步所需要的条件的数据流为工作数据流；3), after the frame synchronization mechanism, select the data flow that can meet the conditions required by the frame synchronization as the working data flow;

4)、并行帧同步模块在将上述工作数据流输出的同时输出与该工作数据流同步的帧头指示信号以及被选中的工作数据流的选路信号Path；4), the parallel frame synchronization module outputs the frame header indication signal synchronized with the working data stream and the routing signal Path of the selected working data stream while outputting the above-mentioned working data stream;

5)、将工作数据流的选路信号Path即工作数据流的相位Pd作为SOF的相位值P而提取出并输送到速率匹配模块。5) Extract the routing signal Path of the working data flow, that is, the phase Pd of the working data flow as the phase value P of the SOF, and send it to the rate matching module.

根据上述步骤，我们可以方便地推算出相位值P的取值范围，如果，并行帧同步模块将单一数据流变成具有n个不同相位的n个并行数据流，则P的取值范围应为0～n-1，实际应用中该数值P随不同的处理有不同的数值其主要取决于APON系统的光纤延时效果。如图2所示，本实施例的相位值P为6。According to the above steps, we can easily calculate the value range of the phase value P. If the parallel frame synchronization module converts a single data stream into n parallel data streams with n different phases, then the value range of P should be 0～n-1, in actual application, the value P has different values with different processing, which mainly depends on the fiber delay effect of the APON system. As shown in FIG. 2 , the phase value P of this embodiment is 6.

上述步骤2中速率匹配模块计算相位补偿值Pc的方法是根据公式Pc＝int(P*R1/R2)计算出，其中R1为上行线路速率，R2为下行线路速率。如图2～图6所示，假设APON系统为622.08/155.52Mbps的非对称系统则可以计算到此时相位补偿值为1，如对于APON系统为155.52/155.52Mbps的对称系统，此时可以计算到相位补偿值为6。The method for calculating the phase compensation value Pc by the rate matching module in the above step 2 is calculated according to the formula Pc=int(P*R1/R2), wherein R1 is the uplink rate, and R2 is the downlink rate. As shown in Figures 2 to 6, assuming that the APON system is an asymmetrical system of 622.08/155.52Mbps, the phase compensation value can be calculated to 1 at this time. For example, for a symmetrical system of 155.52/155.52Mbps, the to a phase compensation value of 6.

上述步骤3中相位补偿模块处理激光器开断控制信号On/off_BC(即补偿前的激光器开断控制信号)和上行数据UpData_BC的方法是对该两个信号进行延时补偿，其延时的数值为相位补偿值Pc。In the above step 3, the phase compensation module processes the laser cut-off control signal On/off_BC (that is, the laser cut-off control signal before compensation) and the uplink data UpData_BC by performing delay compensation on the two signals, and the delay value is Phase compensation value Pc.

同时上述延时补偿方法多种多样，本实施例中根据如图3～图6所示相位补偿效果图，很显然，我们可以采用如图7～图8所示的延时抽头电路来实现相位补偿，如图7/～图8所示，“相位补偿模块’’由2i级移位寄存器和选择器SEL组成，移位寄存器在比特时钟的作用下，对输入的上行数据UpData_BC和激光器开断控制信号On/off_BC进行移位，最后在相位补偿值Pc的控制下，对移位寄存器的每级移位输出进行选择，最后输出经相位补偿后的上行数据UpData和激光器开断控制信号On/off。为了进一步清楚说明补偿原理，下面以并行数据宽度为8的对称系统为例。显然，图3中i＝3，而且只需要在相位补偿模块中采用8级带抽头的移位寄存器即可实现相位补偿。又假设速率匹配模块输出相位补偿值Pc＝6，则为了实现对上行数据UpData_BC和激光器开断控制信号On/off_BC进行相位补偿，只需要在选择器SEL中选择第5个抽头(抽头编号为0～7)输出即可得到满足条件的UpData和On/off。显然，对于具有如图3～图6上部分所示的155.52/155.52Mbps的APON对称系统或622.08/155.52Mbps的APON不对称系统的激光器开断控制On/off_BC信号和上行数据UpDaa_BC信号，经过如图7～图8所示的相位补偿模块进行相位补偿后，可以获得如图3～图6下部分所示激光器开断控制On/off和上行数据UpData的补偿效果。At the same time, there are various delay compensation methods. In this embodiment, according to the phase compensation effect diagrams shown in Fig. 3 to Fig. Compensation, as shown in Figure 7/～Figure 8, the "phase compensation module" is composed of a 2i-level shift register and a selector SEL, and the shift register disconnects the input uplink data UpData_BC and the laser under the action of the bit clock The control signal On/off_BC is shifted, and finally under the control of the phase compensation value Pc, the shift output of each stage of the shift register is selected, and finally the phase-compensated uplink data UpData and the laser cut-off control signal On/ off. In order to further clearly illustrate the compensation principle, the following is an example of a symmetrical system with a parallel data width of 8. Obviously, i=3 in Fig. 3, and it is only necessary to use an 8-stage shift register with taps in the phase compensation module Realize phase compensation. Assume that rate matching module output phase compensation value Pc=6 again, then in order to realize phase compensation is carried out to uplink data UpData_BC and laser device off control signal On/off_BC, only need to select the 5th tap in selector SEL ( The tap number is 0～7) output and can obtain UpData and On/off satisfying the condition.Obviously, for the APON symmetrical system of 155.52/155.52Mbps or the APON of 622.08/155.52Mbps shown in the upper part of Fig. 3～Fig. 6 The laser on/off control signal of the asymmetrical system and the uplink data UpDaa_BC signal, after phase compensation by the phase compensation module as shown in Figure 7 to Figure 8, can obtain the laser on/off signal shown in the lower part of Figure 3 to Figure 6. Off to control On/off and the compensation effect of uplink data UpData.

Claims (8)

Translated fromChinese

1、一种用于TDM/TDMA系统的上行突发控制的相位补偿方法，其特征在于主要包括以下步骤：1, a kind of phase compensation method for the uplink burst control of TDM/TDMA system is characterized in that mainly comprising the following steps:1)、在并行帧同步模块接收下行数据向突发控制模块输出下行帧时标SOF的同时，从并行帧同步模块中提取相位值p输送到速率匹配模块输入端；1), while the parallel frame synchronization module receives the downlink data and outputs the downlink frame time stamp SOF to the burst control module, the phase value p is extracted from the parallel frame synchronization module and delivered to the input terminal of the rate matching module;2)、突发控制模块接收并行帧同步模块的下行帧时标SOF作为上行参考时标，并根据测距所得的延时值，直接产生激光器开断控制信号On/off_BC和复接控制信号，并将激光器开断控制信号On/off_BC输送给相位补偿模块，及将复接控制信号输送给数据复接&并串转换模块，数据复接&并串转换模块在复接控制信号的作用下，将接收的等待发送的ATM信元、上行PLOAM、POH(PON开销字节)、mini_slot中的微信元转换为上行数据UpData_BC输送给相位补偿模块，此时速率匹配模块结合上行速率和下行速率，计算出需要进行补偿的相位补偿值Pc，并将该相位补偿值Pc输送到相位补偿模块；2), the burst control module receives the downlink frame time mark SOF of the parallel frame synchronization module as the uplink reference time mark, and according to the delay value obtained from ranging, directly generates the laser on/off control signal On/off_BC and the multiplex control signal, The laser on/off control signal On/off_BC is sent to the phase compensation module, and the multiplexing control signal is sent to the data multiplexing & parallel-serial conversion module. Under the action of the multiplexing control signal, the data multiplexing & parallel-serial conversion module, Convert the received ATM cells waiting to be sent, uplink PLOAM, POH (PON overhead bytes), and micro cells in mini_slot into uplink data UpData_BC and send them to the phase compensation module. At this time, the rate matching module combines the uplink rate and downlink rate to calculate Output the phase compensation value Pc that needs to be compensated, and deliver the phase compensation value Pc to the phase compensation module;3)、相位补偿模块接收突发控制模块产生的激光器开断控制信号On/off_BC和数据复接&并串转换模块输出的上行数据UpData_BC，并根据相位补偿值Pc对这两个信号进行合适处理后输出激光器开断控制信号On/off及上行数据UpData。3) The phase compensation module receives the laser on/off control signal On/off_BC generated by the burst control module and the uplink data UpData_BC output by the data multiplexing & parallel-to-serial conversion module, and properly processes these two signals according to the phase compensation value Pc Afterwards, the laser on/off control signal On/off and the uplink data UpData are output.2、根据权利要求1所述相位补偿方法，其特征在于上述步骤1中从并行帧同步模块中提取相位值P的方法是：2, according to the described phase compensation method of claim 1, it is characterized in that the method for extracting the phase value P from the parallel frame synchronization module in the above-mentioned step 1 is:1)、并行帧同步模块对输入的串行数据进行分接处理，将单一数据流变成具有不同相位的n个并行数据流；1), the parallel frame synchronization module demultiplexes the input serial data, and turns a single data stream into n parallel data streams with different phases;2)、并行帧同步模块对上述具有不同相位的n个并行数据流进行帧同步搜索，并根据帧同步搜索的结果，选定某一个相位的数据流作为帧同步状态机跟踪的对象；2), parallel frame synchronous module carries out frame synchronous search to above-mentioned n parallel data streams with different phases, and according to the result of frame synchronous search, selects the data stream of a certain phase as the object of frame synchronous state machine tracking;3)、经过帧同步机制后，选定能够满足帧同步所需要的条件的数据流为工作数据流；3), after the frame synchronization mechanism, select the data flow that can meet the conditions required by the frame synchronization as the working data flow;4)、并行帧同步模块在将上述工作数据流输出的同时输出与该工作数据流同步的帧头指示信号SOF以及被选中的工作数据流的选路信号Path；4), the parallel frame synchronization module outputs the frame header indication signal SOF synchronized with the working data stream and the routing signal Path of the selected working data stream while outputting the above-mentioned working data stream;5)、将工作数据流的选路信号Path即工作数据流的相位Pd作为并行帧同步模块输出的下行帧时标SOF的相位值P而提取出并将其输送到速率匹配模块。5) Extract the routing signal Path of the working data flow, that is, the phase Pd of the working data flow, as the phase value P of the downlink frame time scale SOF output by the parallel frame synchronization module, and send it to the rate matching module.3、根据权利要求1或2所述相位补偿方法，其特征在于上述步骤2中速率匹配模块计算相位补偿值Pc的方法是根据公式Pc＝int(P^*R1/R2)计算出，其中R1为上行线路速率，R2为下行线路速率。3. The phase compensation method according to claim 1 or 2, wherein the method for calculating the phase compensation value Pc by the rate matching module in the above-mentioned step 2 is calculated according to the formula Pc=int(P^* R1/R2), wherein R1 is The uplink rate, R2 is the downlink rate.4、根据权利要求1或2所述相位补偿方法，其特征在于上述步骤3中相位补偿模块处理激光器开断控制信号On/off_BC和上行数据UpData_BC的方法是对该两个信号进行延时补偿，其延时的数值为相位补偿值Pc。4. The phase compensation method according to claim 1 or 2, characterized in that the phase compensation module in step 3 processes the laser on/off control signal On/off_BC and the uplink data UpData_BC by performing delay compensation on the two signals, The value of the delay is the phase compensation value Pc.5、一种实现权利要求1所述相位补偿方法的相位补偿装置，主要包括接收下行数据的并行帧同步模块、产生激光器开断控制信号On/off_BC的突发控制模块、进行数据复接和并串转接的数据复接&并串转换模块，其特征在于还包括速率匹配模块、相位补偿模块，其中速率匹配模块的输入端接并行帧同步模块输出相位值P的输出端口，其输出相位补偿值Pc的输出端连接相位补偿模块的控制端，相位补偿模块的其中一输入端接突发控制模块输出激光器开断控制信号On/off_BC的输出端口，其另一输入端接数据复接&并串转换模块输出上行数据UpData_BC的输出端口，其输出端分别为输出经相位补偿模块进行合适处理后的激光器开断控制信号On/off和上行数据UpData的端口。5. A phase compensation device for implementing the phase compensation method as claimed in claim 1, mainly comprising a parallel frame synchronization module for receiving downlink data, a burst control module for generating the laser on/off control signal On/off_BC, performing data multiplexing and paralleling The data multiplexing & parallel-to-serial conversion module of serial transfer is characterized in that it also includes a rate matching module and a phase compensation module, wherein the input terminal of the rate matching module is connected to the output port of the output phase value P of the parallel frame synchronization module, and its output phase compensation The output terminal of the value Pc is connected to the control terminal of the phase compensation module, one of the input terminals of the phase compensation module is connected to the output port of the burst control module outputting the laser on/off control signal On/off_BC, and the other input terminal is connected to the data multiplexing & paralleling The serial conversion module outputs the output port of the uplink data UpData_BC, and its output ports are respectively the ports for outputting the laser on/off control signal On/off and the uplink data UpData after being properly processed by the phase compensation module.6、根据权利要求5所述相位补偿装置，其特征在于上述并行帧同步模块的输入端接下行数据端口，所述并行帧同步模块输入端接收下行数据，其输出端分别输出下行帧时标SOF给突发控制模块和从该下行帧时标SOF中，提取出的相位值P给速率匹配模块。6. The phase compensation device according to claim 5, wherein the input terminal of the parallel frame synchronization module is connected to the downlink data port, the input terminal of the parallel frame synchronization module receives the downlink data, and the output terminals of the parallel frame synchronization module respectively output the downlink frame time stamp SOF To the burst control module and the phase value P extracted from the downlink frame time stamp SOF to the rate matching module.7、根据权利要求5或6所述相位补偿装置，其特征在于上述突发控制模块的输入端接并行帧同步模块输出下行帧时标SOF的输出端，所述突发控制模块接收并行帧同步模块输出的下行帧时标SOF并将其作为上行突发控制的上行参考时标，且该突发控制模块的复接控制信号输出端与数据复接&并串转换模块的控制端连接，所述突发控制摸块的输出端输出激光器开断控制信号On/off_BC到相位补偿模块中进行相位补偿。7. The phase compensation device according to claim 5 or 6, characterized in that the input terminal of the burst control module is connected to the output terminal of the parallel frame synchronization module outputting the downlink frame time scale SOF, and the burst control module receives the parallel frame synchronization The downlink frame time stamp SOF output by the module is used as the uplink reference time scale for uplink burst control, and the multiplex control signal output terminal of the burst control module is connected to the control terminal of the data multiplex & parallel-to-serial conversion module. The output end of the burst control module outputs the laser on/off control signal On/off_BC to the phase compensation module for phase compensation.8、根据权利要求5或6所述相位补偿装置，其特征在于上述数据复接&并串转换模块的输入端分别接等待发送的ATM信元端口、上行PLOAM端口、POH(PON开销字节)端口、mini_slot中的微信元端口，所述数据复接&并串转换模块的输入端分别接收等待发送的ATM信元、上行PLOAM、POH(PON开销字节)、mini_slot中的微信元，其输出端输出上行数据UpData_BC到相位补偿模块进行相位补偿。8. The phase compensation device according to claim 5 or 6, characterized in that the input terminals of the above-mentioned data multiplexing & parallel-serial conversion module are respectively connected to the ATM cell port waiting to be sent, the upstream PLOAM port, and the POH (PON overhead byte) port, the micro-cell port in the mini_slot, the input end of the data multiplexing & parallel-to-serial conversion module receives respectively the ATM cell waiting to be sent, the upstream PLOAM, POH (PON overhead byte), the micro-cell in the mini_slot, and its output Output the uplink data UpData_BC to the phase compensation module for phase compensation.

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