Disclosure of Invention
According to a first example, circuitry is provided for detecting a type of accessory connected to a first jack plug inserted into a first jack port, the circuitry configured to determine whether an audio signal is present at a tip or ring of the first jack plug and, in the event that an audio signal is present at the tip or ring of the first jack plug, determine that the type of accessory is a stereo line input accessory connected to a 3-pole jack plug.
The circuitry may be further configured to enable a microphone bias to be applied to the tip of the first jack plug and the ring if no audio signal is present at the tip of the first jack plug or the ring, and determine whether audio signals are present at the tip of the first jack plug or the ring in response to the microphone bias, and determine that the type of accessory is a stereo microphone if audio signals are present in response to the microphone bias.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load in the absence of an audio signal in response to the microphone bias.
The circuitry may be further configured to disable the microphone bias and check whether the type of accessory is a stereo microphone, wherein to perform the check, the circuitry is configured to re-enable the microphone bias to the tip of the first jack plug and the ring, determine whether an audio signal is present at the tip of the first jack plug or the ring in response to the re-enabled microphone bias.
The circuitry may be further configured to confirm that the type of accessory is a stereo microphone if an audio signal is present at the tip or the ring of the first jack plug in response to the re-enabled microphone bias. The circuitry is further configured to disable the re-enabled microphone bias.
The circuitry may be configured to determine if an audio signal is present at the tip or the ring of the first jack plug in the absence of an audio signal in response to the re-enabled microphone bias (which may indicate that the process returns to the beginning).
The circuitry may be further configured to enable microphone bias to the tip of the first jack plug and the ring if no audio signal is present at the tip or the ring of the first jack plug, and determine whether audio signal is present at the tip of the first jack plug or the ring in response to the microphone bias, and disable microphone bias applied to the ring of the first jack plug if audio signal is present in response to the microphone bias, determine whether audio input is present on the tip of the first jack plug, and determine that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug if audio input is present on the tip of the first jack plug, and determine that the type of accessory is a stereo microphone if audio input is not present on the tip of the first jack plug.
The circuitry may be further configured to disable the microphone bias and determine whether an audio signal is present at the tip or the ring of the first jack plug and, if so, reclassify the type of accessory as a stereo line-in accessory.
The circuitry may be further configured to disable the microphone bias, determine whether playback is enabled on an accessory connected to the first jack plug, compare an output of one or more digital-to-analog converters with an output of one or more analog-to-digital converters, determine whether the digital-to-analog converter output matches the analog-to-digital converter output, and, if the outputs do not match, reclassify the type of accessory as a stereo line input accessory.
The circuitry may be further configured to enable an ultrasonic tone if there is no audio signal at the tip or the ring of the first jack plug, and determine whether there is an ultrasonic signal at the tip or the ring of the first jack plug in response to the ultrasonic tone, and determine that the type of accessory is a stereo microphone if there is the ultrasonic signal at the tip or the ring of the first jack plug.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load if an ultrasonic signal is not present at the tip or the ring of the first jack plug in response to the ultrasonic tone.
To enable the ultrasonic tone, the circuitry may be configured to cause the ultrasonic tone to be output from one or more speakers and/or to cause a transducer to transmit the ultrasonic tone.
The circuitry may be further configured to determine a delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone over an electrical path and receiving the ultrasonic tone over an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone.
The circuitry may further include a first jack plug detection module configured to detect whether the first jack plug is received in the first jack port.
The circuitry may include a first circuitry module including at least one of left audio output circuitry, right audio output circuitry, impedance measurement circuitry, microphone bias circuitry, microphone and ground switching circuitry, and microphone input circuitry.
The circuitry may include a second circuitry module including at least one of first stereo input circuitry, second stereo input circuitry, impedance measurement circuitry, microphone bias circuitry, and ground circuitry.
The circuitry may further include at least one of a first voltage bias source, a first headset bias line connected to the bias and connectable to a sleeve of a 4-pole jack plug, a second headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, a first stereo input line for left audio input connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug, and a second stereo input line for right audio input connected to the bias and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry may further include at least one of a first digital-to-analog converter and a first headset line for left headset output, the first headset line connected to the first digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug.
The circuitry may further include at least one of a second digital-to-analog converter and a second headset line for right headset output, the second headset line connected to the second digital-to-analog converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs.
The circuitry may further include at least one of a first analog-to-digital converter, a first headset line connected to the first analog-to-digital converter and connectable to a ferrule of a 4-pole jack plug, a second headset line connected to the first analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a ferrule of a 3-pole jack plug, a first stereo input line for right stereo audio connected to the first analog-to-digital converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug, and a first stereo input ground line connectable to a second ring of a 4-pole jack plug or a ferrule of a 3-pole jack plug.
The circuitry may further include at least one of a second analog-to-digital converter, a second stereo input line for left stereo audio, the second stereo input line connected to the second analog-to-digital converter and connectable to a tip of a 3-pole or 4-pole jack plug, and a second stereo input ground line connected to the second analog-to-digital converter and connectable to a sleeve of a second ring of a 4-pole jack plug or a 3-pole jack plug.
The circuitry may further comprise at least one of a third digital-to-analog converter configured to output an audio signal to a speaker.
According to another example, a carrier (e.g., a printed circuit board "PCB" or motherboard (e.g., a ceramic motherboard)) is provided that includes circuitry as described above. The carrier may include a first audio jack port. In another example, an apparatus (e.g., a host apparatus) may include circuitry and/or a carrier as described above.
The circuitry may be further configured to detect a type of accessory connected to a second jack plug inserted into a second jack port, the circuitry being configured to determine whether an audio signal is present at a tip or ring of the second jack plug and, if an audio signal is present at the tip or ring of the second jack plug, determine that the type of accessory is a stereo line input accessory connected to a 3-pole jack plug.
The circuitry may be further configured to enable microphone bias to the tip of the second jack plug and the ring if no audio signal is present at the tip of the second jack plug or the ring, and determine whether audio signal is present at the tip of the second jack plug or the ring in response to the microphone bias, and determine that the type of accessory is a stereo microphone if audio signal is present in response to the microphone bias.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load in the absence of an audio signal in response to the microphone bias.
The circuitry may be further configured to disable the microphone bias and check whether the type of accessory is a stereo microphone, wherein to perform the check, the circuitry is configured to re-enable the microphone bias to the tip of the second jack plug and the ring, and determine whether an audio signal is present at the tip of the second jack plug or the ring in response to the re-enabled microphone bias.
The circuitry may be further configured to confirm that the type of accessory is a stereo microphone if an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias. The circuitry may be further configured to disable the re-enabled microphone bias.
The circuitry may be further configured to determine whether an audio signal is present at the tip or the ring of the second jack plug if an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias.
The circuitry may be further configured to enable microphone bias to the tip of the second jack plug and the ring if no audio signal is present at the tip or the ring of the second jack plug, and determine whether audio signal is present at the tip of the second jack plug or the ring in response to the microphone bias, and disable microphone bias applied to the ring of the second jack plug if audio signal is present in response to the microphone bias, determine whether audio input is present on the tip of the second jack plug, and determine that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug if audio input is present on the tip of the second jack plug, and determine that the type of accessory is a stereo microphone if audio input is not present on the tip of the second jack plug.
The circuitry may be further configured to disable the microphone bias and determine whether an audio signal is present at the tip or the ring of the second jack plug and, if so, reclassify the type of accessory as a stereo line-in accessory.
The circuitry may be configured to disable the microphone bias, determine whether playback is enabled on an accessory connected to the second jack plug, compare an output of one or more digital-to-analog converters with an output of one or more analog-to-digital converters, determine whether the digital-to-analog converter output matches the analog-to-digital converter output, and reclassify the type of accessory as a stereo line-in accessory if the outputs do not match.
The circuitry may be further configured to enable an ultrasonic tone if there is no audio signal at the tip or the ring of the second jack plug and determine whether there is an ultrasonic signal at the tip or the ring of the second jack plug in response to the ultrasonic tone and determine that the type of accessory is a stereo microphone if there is the ultrasonic signal at the tip or the ring of the second jack plug.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load if an ultrasonic signal is not present at the tip or the ring of the second jack plug in response to the ultrasonic tone.
To enable the ultrasonic tone, the circuitry may be configured to cause the ultrasonic tone to be output from one or more speakers and/or to cause a transducer to transmit the ultrasonic tone.
The circuitry may be further configured to determine a delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone over an electrical path and receiving the ultrasonic tone over an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone.
The circuitry may further include a second jack plug detection module configured to detect whether the second jack plug is received in the first jack port.
The circuitry may further comprise a third circuitry module comprising at least one of left audio output circuitry, right audio output circuitry, impedance measurement circuitry, microphone bias circuitry, microphone and ground switching circuitry, and microphone input circuitry.
The circuitry may further comprise a fourth circuitry module comprising at least one of first stereo input circuitry, second stereo input circuitry, impedance measurement circuitry, microphone bias circuitry, and ground circuitry.
The circuitry may further include at least one of a first voltage bias source, a third headset bias line connected to the bias and connectable to a sleeve of a 4-pole jack plug, a fourth headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, a third stereo input line for left audio input connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug, and a fourth stereo input line for right audio input connected to the bias and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry may further include at least one of a third digital-to-analog converter and a third headset line for left headset output, the third headset line connected to the third digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug.
The circuitry may further include at least one of a fourth digital-to-analog converter and a fourth headset line for right headset output, the fourth headset line connected to the fourth digital-to-analog converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs.
The circuitry may further include at least one of a third analog-to-digital converter, a third headset line connected to the third analog-to-digital converter and connectable to the ferrule of the 4-pole jack plug, a fourth headset line connected to the third analog-to-digital converter and connectable to the second ring of the 4-pole jack plug or the ferrule of the 3-pole jack plug, a third stereo input line for right stereo audio connected to the third analog-to-digital converter and connectable to the ring of the 3-pole jack plug or the first ring of the 4-pole jack plug, and a third stereo input ground line connectable to the second ring of the 4-pole jack plug or the ferrule of the 3-pole jack plug.
The circuitry may further include at least one of a fourth analog-to-digital converter, a fourth stereo input line for left stereo audio, the fourth stereo input line connected to the fourth analog-to-digital converter and connectable to a tip of a 3-pole or 4-pole jack plug, and a fourth stereo input ground line connected to the fourth analog-to-digital converter and connectable to a sleeve of a second ring of a 4-pole jack plug or a 3-pole jack plug.
The circuitry may further comprise at least one of a fifth digital-to-analog converter configured to output an audio signal to a speaker.
The carrier may include a first conductive path configured to connect the circuitry to a first audio jack port and a second conductive path configured to connect the circuitry to a second audio jack port. The carrier may include the first receptacle port and the second receptacle port. A device (e.g., a host device) may include circuitry and/or a carrier as described above.
According to an example, a carrier is provided that includes a first conductive path and a second conductive path, wherein the first conductive path is configured to electrically connect circuitry with a first jack port, and wherein the second conductive path is configured to electrically connect the circuitry with a second jack port.
The carrier may include a first module configured to detect insertion of a first audio jack in the first jack port, and a second module configured to detect insertion of a second jack plug in the second jack port, wherein the first conductive path is configured to electrically connect the first module with the first jack port, and wherein the second conductive path is configured to electrically connect the second module with the second jack port.
The carrier may include tip detection circuitry and ring detection circuitry, wherein the first conductive path is configured to electrically connect the tip detection circuitry with the first jack port, and wherein the second conductive path is configured to electrically connect the ring detection circuitry with the second jack port.
The tip detection circuitry may be configured to detect full insertion of the first audio jack plug in the first jack port, and wherein the ring detection circuitry may be configured to detect full insertion of the second audio jack plug in the second jack port.
The carrier may include first tip detection circuitry and second tip detection circuitry, wherein the first conductive path is configured to electrically connect the first tip detection circuitry with the first jack port, and wherein the second conductive path is configured to electrically connect the second tip detection circuitry with the second jack port.
The first tip detection circuitry may be configured to detect full insertion of the first audio jack plug in the first jack port, and wherein the second tip detection circuitry may be configured to detect full insertion of the second audio jack plug in the second jack port.
The carrier may include the first audio jack port and the second audio jack port. The carrier may comprise circuitry as described above.
In particular, the carrier may include circuitry configured to detect a type of accessory connected to the first jack plug inserted into the first jack port, the circuitry configured to determine whether an audio signal is present at a tip or ring of the first jack plug, and in the event that an audio signal is present at the tip or ring of the first jack plug, determine that the type of accessory is a stereo line input accessory.
The circuitry may be further configured to enable a microphone bias to be applied to the tip of the first jack plug and the ring if no audio signal is present at the tip of the first jack plug or the ring, and determine whether audio signals are present at the tip of the first jack plug or the ring in response to the microphone bias, and determine that the type of accessory is a stereo microphone if audio signals are present in response to the microphone bias.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load in the absence of an audio signal in response to the microphone bias.
The circuitry may be further configured to disable the microphone bias and check whether the type of accessory is a stereo microphone, wherein to perform the check, the circuitry is configured to re-enable the microphone bias to the tip of the first jack plug and the ring, determine whether an audio signal is present at the tip of the first jack plug or the ring in response to the re-enabled microphone bias.
The circuitry may be further configured to confirm that the type of accessory is a stereo microphone if an audio signal is present at the tip or the ring of the first jack plug in response to the re-enabled microphone bias. The circuitry may be further configured to disable the re-enabled microphone bias.
The circuitry may be configured to determine whether an audio signal is present at the tip or the ring of the first jack plug in the absence of an audio signal in response to the re-enabled microphone bias.
The circuitry may be further configured to enable microphone bias to the tip of the first jack plug and the ring if no audio signal is present at the tip or the ring of the first jack plug, and determine whether audio signal is present at the tip of the first jack plug or the ring in response to the microphone bias, and disable the microphone bias applied to the ring of the first jack plug if audio signal is present in response to the microphone bias, determine whether audio input is present on the tip of the first jack plug, and determine that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug if audio input is present on the tip of the first jack plug, and determine that the type of accessory is a stereo microphone if audio input is not present on the tip of the first jack plug.
The circuitry may be further configured to disable the microphone bias and determine whether an audio signal is present at the tip or the ring of the first jack plug and, if so, reclassify the type of accessory as a stereo line-in accessory.
The circuitry is configured to disable the microphone bias, determine whether playback is enabled on an accessory connected to the first jack plug, compare an output of one or more digital-to-analog converters with an output of one or more analog-to-digital converters, determine whether the digital-to-analog converter output matches the analog-to-digital converter output, and reclassify a type of the accessory as a stereo line input accessory if the outputs do not match.
The circuitry may be further configured to enable an ultrasonic tone if there is no audio signal at the tip or the ring of the first jack plug, and determine whether there is an ultrasonic signal at the tip or the ring of the first jack plug in response to the ultrasonic tone, and determine that the type of accessory is a stereo microphone if there is the ultrasonic signal at the tip or the ring of the first jack plug.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load if an ultrasonic signal is not present at the tip or the ring of the first jack plug in response to the ultrasonic tone.
To enable the ultrasonic tone, the circuitry may be configured to cause the ultrasonic tone to be output from one or more speakers and/or to cause a transducer to transmit the ultrasonic tone.
The circuitry may be further configured to determine a delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone over an electrical path and receiving the ultrasonic tone over an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone.
The circuitry may further include a first jack plug detection module configured to detect whether the first jack plug is received in the first jack port.
The circuitry may further comprise a first circuitry module comprising at least one of left audio output circuitry, right audio output circuitry, impedance measurement circuitry, microphone bias circuitry, microphone and ground switching circuitry, and microphone input circuitry.
The circuitry may include a second circuitry module including at least one of first stereo input circuitry, second stereo input circuitry, impedance measurement circuitry, microphone bias circuitry, and ground circuitry.
The circuitry may include at least one of a first voltage bias source, a first headset bias line connected to the bias and connectable to a sleeve of a 4-pole jack plug, a second headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, a first stereo left line connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug, and a second stereo right line connected to the bias and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry may include at least one of a first digital-to-analog converter and a first left headset output line connected to the first digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug.
The circuitry may include at least one of a second digital-to-analog converter and a first right headset output line connected to the second digital-to-analog converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry may include at least one of a first analog-to-digital converter, a first headset line connected to the first analog-to-digital converter and connectable to a ferrule of a 4-pole jack plug, a second headset line connected to the first analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a ferrule of a 3-pole jack plug, a first right stereo input line connected to the first analog-to-digital converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug, and a first stereo input ground line connectable to a second ring of a 4-pole jack plug or a ferrule of a 3-pole jack plug.
The circuitry may include at least one of a second analog-to-digital converter, a first left stereo input line connected to the second analog-to-digital converter and connectable to a tip of a 3-pole or 4-pole jack plug, and a second stereo input ground line connected to the second analog-to-digital converter and connectable to a sleeve of a second ring of a 4-pole jack plug or a 3-pole jack plug.
The circuitry includes at least one of a third digital-to-analog converter configured to output an audio signal to a speaker.
The circuitry may be further configured to detect a type of accessory connected to the second jack plug inserted into the second jack port, the integrated circuit configured to determine whether an audio signal is present at a tip or a ring of the second jack plug, and in the event that an audio signal is present at the tip or the ring of the second jack plug, determine that the type of accessory is a stereo line input accessory and determine that the second jack plug is a 3-pole jack plug.
The circuitry may be further configured to enable microphone bias to the tip and the ring of the second jack plug if no audio signal is present at the tip or the ring of the second jack plug, and determine whether audio signal is present at the tip or the ring of the second jack plug in response to the microphone bias, and determine that the type of accessory is a stereo microphone and determine that the second jack plug is a 3-pole jack plug if audio signal is present in response to the microphone bias.
The circuitry may be further configured to determine that the type of accessory is a headset and/or line load and determine that the second jack plug is a 3-pole jack plug in the absence of an audio signal in response to the microphone bias.
The circuitry may be further configured to disable the microphone bias and check whether the type of accessory is a stereo microphone, wherein to perform the check, the circuitry is configured to re-enable a subsequent microphone bias to the tip and the ring of the second jack plug, determine whether an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias.
The circuitry may be further configured to confirm that the type of accessory is a stereo microphone if an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias. The circuitry may be further configured to disable the subsequent microphone bias.
The circuitry may be further configured to determine whether an audio signal is present at the tip or the ring of the second jack plug if an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias.
The circuitry may be further configured to enable microphone bias to the tip of the second jack plug and the ring if no audio signal is present at the tip or the ring of the second jack plug, and determine whether audio signal is present at the tip of the second jack plug or the ring in response to the microphone bias, and disable the microphone bias applied to the ring of the second jack plug if audio signal is present in response to the microphone bias, determine whether audio input is present on the tip of the second jack plug, and determine that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug if audio input is present on the tip of the second jack plug, and determine that the type of accessory is a stereo microphone if audio input is not present on the tip of the second jack plug.
The circuitry may be further configured to disable the microphone bias and determine whether an audio signal is present at the tip or the ring of the second jack plug and, if an audio signal is present, reclassify the type of accessory as a stereo line-in accessory.
The circuitry may be configured to disable the microphone bias, determine whether playback is enabled on an accessory connected to the second jack plug, compare an output of one or more digital-to-analog converters with an output of one or more analog-to-digital converters, determine whether the digital-to-analog converter output matches the analog-to-digital converter output, and reclassify the type of accessory as a stereo line-in accessory if the outputs do not match.
The circuitry may be further configured to enable an ultrasonic tone if there is no audio signal at the tip or the ring of the second jack plug and determine whether there is an ultrasonic signal at the tip or the ring of the second jack plug in response to the ultrasonic tone and determine that the type of accessory is a stereo microphone and determine that the second jack plug is a 3-pole jack plug if there is the ultrasonic signal at the tip or the ring of the second jack plug.
May be further configured to determine that the type of accessory is a headset and/or line load if no ultrasonic signal is present at the tip or the ring of the second jack plug in response to the ultrasonic tone.
To enable the ultrasonic tone, the circuitry may be configured to cause the ultrasonic tone to be output from one or more speakers and/or to cause a transducer to transmit the ultrasonic tone.
The circuitry may be further configured to determine a delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone over an electrical path and receiving the ultrasonic tone over an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone.
The circuitry may include a second jack plug detection module configured to detect whether the second jack plug is received in the first jack port.
The circuitry may include a third circuitry module including at least one of left audio output circuitry, right audio output circuitry, impedance measurement circuitry, microphone bias circuitry, microphone and ground switching circuitry, and microphone input circuitry.
The circuitry includes a fourth circuitry module including at least one of first stereo input circuitry, second stereo input circuitry, impedance measurement circuitry, microphone bias circuitry, and ground circuitry.
The circuitry may further include at least one of a third voltage bias source, a third headset bias line connected to the bias and connectable to a ferrule of a 4-pole jack plug, a fourth headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a ferrule of a 3-pole jack plug, a third stereo left line connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug, and a fourth stereo right line connected to the bias and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry may further include at least one of a third digital-to-analog converter and a third left headset output line connected to the third digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug.
The circuitry may further include at least one of a fourth digital-to-analog converter and a third right headset output line connected to the fourth digital-to-analog converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug.
The circuitry further includes at least one of a third analog-to-digital converter, a third headset line connected to the third analog-to-digital converter and connectable to the ferrule of the 4-pole jack plug, a fourth headset line connected to the third analog-to-digital converter and connectable to the second ring of the 4-pole jack plug or the ferrule of the 3-pole jack plug, a third right stereo input line connected to the third analog-to-digital converter and connectable to the ring of the 3-pole jack plug or the first ring of the 4-pole jack plug, and a third stereo input ground line connectable to the second ring of the 4-pole jack plug or the ferrule of the 3-pole jack plug.
The circuitry may further include at least one of a fourth analog-to-digital converter, a third left stereo input line connected to the fourth analog-to-digital converter and connectable to a tip of a 3-pole or 4-pole jack plug, and a fourth stereo input ground line connected to the fourth analog-to-digital converter and connectable to a sleeve of a second ring of a 4-pole jack plug or a 3-pole jack plug.
The circuitry may further comprise at least one of a fifth digital-to-analog converter configured to output an audio signal to a speaker.
An apparatus may comprise a carrier as described above.
Thus, in accordance with the present disclosure, a method is provided that may be implemented by circuitry (e.g., in a host device and/or mounted to a carrier, etc.). The method is for detecting a type of accessory connected to a jack plug inserted into a jack port and includes determining whether an audio signal is present at a tip or ring of the jack plug and, in the presence of the audio signal, determining that the type of accessory is a stereo line input accessory connected to a 3-pole jack plug.
In the absence of an audio signal, the method may include enabling microphone biasing on the tip and the ring of the jack plug, and determining whether an audio signal is present at the tip or the ring in response to the microphone biasing, and in the presence of an audio signal in response to the microphone biasing, determining that the type of accessory is a stereo microphone.
In the absence of an audio signal in response to the microphone bias, the method may include determining that the type of accessory is a headset and/or line load.
The method may include disabling the microphone bias, and re-enabling the microphone bias, determining whether an audio signal is present at the tip or the ring in response to the subsequent microphone bias.
In the event that an audio signal is present in response to the re-enabled microphone bias, the method may include confirming that the type of accessory is a stereo microphone. The method may include disabling the re-enabled microphone bias.
In the absence of an audio signal in response to the re-enabled microphone bias, the method may include determining whether an audio signal is present at the tip or the ring of the jack plug.
In the event that there is no audio signal at the tip or ring of the first jack plug, the method may include enabling microphone bias to the tip and ring of the first jack plug, determining whether there is an audio signal at the tip or ring of the first jack plug in response to the microphone bias, and disabling the microphone bias applied to the ring of the first jack plug in response to the microphone bias, determining whether there is audio input on the tip of the first jack plug, and determining that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug in the event that there is audio input on the tip of the first jack plug, and determining that the type of accessory is a stereo microphone in the event that there is no audio input on the tip of the first jack plug.
The method may further include disabling the microphone bias, and determining whether an audio signal is present at the tip or the ring of the jack plug, and, if an audio signal is present, reclassifying the type of the fitting as a stereo line-in fitting.
The method may include disabling the microphone bias, determining whether playback is enabled on an accessory connected to the first jack plug, comparing an output of one or more digital-to-analog converters with an output of one or more analog-to-digital converters, determining whether the digital-to-analog converter output matches the analog-to-digital converter output, and reclassifying a type of the accessory as a stereo line input accessory if the outputs do not match.
In the absence of an audio signal, the method may include enabling an ultrasonic tone, and determining whether an ultrasonic signal is present at the tip or the ring in response to the ultrasonic tone, and determining that the type of accessory is a stereo microphone in the presence of the ultrasonic signal at the tip or the ring.
In the absence of an ultrasonic signal at the tip or the ring in response to the ultrasonic tone, the method may include determining that the type of accessory is a headset and/or line load.
The method may include disabling the ultrasonic tone, and determining whether an audio signal is present at the tip or the ring of the jack plug, and in the absence of an audio signal. In the presence of an audio signal, the method may include reclassifying the type of accessory as a stereo line input accessory.
Enabling an ultrasonic tone may include causing the ultrasonic tone to be output from one or more speakers and/or causing a transducer to transmit the ultrasonic tone.
The method may include determining a delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone over an electrical path and receiving the ultrasonic tone over an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone.
An example method may include determining whether a jack plug inserted into a jack port is a 4-pole jack plug and performing the method as described above in response to determining that the jack plug is not a 4-pole jack plug. The method may include determining whether a first jack plug inserted into a first jack port is a 4-pole jack plug and, in response to determining that the first jack plug is not a 4-pole jack plug, performing the method as described above. Alternatively or additionally, the method may include determining whether a second jack plug inserted into a second jack port is a 4-pole jack plug and performing the method as described above in response to determining that the second jack plug is not a 4-pole jack plug.
An example method may include determining whether a jack plug is received within a jack port and performing the method as described above when it is determined that the jack plug is received within the jack port. The method may include determining whether a first jack plug is received within a first jack port and performing the method as described above when it is determined that the first jack plug is received within the first jack port. Alternatively or additionally, the method may include determining whether a second jack plug is received within a second jack port and performing the method as described above upon determining that the second jack plug is received within the second jack port.
As stated above, examples of the present disclosure provide circuitry configured to perform the above-described methods. Thus, the circuitry may be configured to perform this method to detect a type of accessory connected to a first jack plug inserted into a first jack port and to detect a type of accessory connected to a second jack plug inserted into a second jack port.
According to an example of the present disclosure, there is provided circuitry coupled to a receptacle for receiving a plug coupled to an accessory, the circuitry comprising:
plug-in detection circuitry;
Stereo accessory detection circuitry and
Monaural accessory detection circuitry.
According to an example of the present disclosure, there is provided a receptacle for receiving a plug coupled to an accessory, the receptacle coupled to circuitry, the circuitry comprising:
plug-in detection circuitry;
Stereo accessory detection circuitry and
Monaural accessory detection circuitry.
According to an example of the present disclosure, a plurality of receptacles are provided, each receptacle for receiving a respective plug coupled to an accessory, each receptacle of the plurality of receptacles coupled to circuitry, the circuitry comprising:
plug-in detection circuitry;
Stereo accessory detection circuitry and
Monaural accessory detection circuitry.
According to an example, an apparatus (e.g., a host apparatus) is provided that includes circuitry (e.g., plug-in detection circuitry; stereo accessory detection circuitry; and monaural accessory detection circuitry) as described above and/or includes one or more receptacles coupled to the circuitry.
According to another example, a host device is provided that includes at least two receptacles. In an example, the first receptacle is a dedicated stereo accessory receptacle and the second receptacle is a dedicated monaural accessory receptacle. These may be part of a device (e.g., a host device).
The devices or host devices herein may include any one or more of a personal computer, a laptop computer, a tablet computer, a gaming device, a communication device, a mobile phone, a portable device, and/or a battery powered device.
Detailed Description
Fig. 1 and 2 illustrate two types of electromechanical connectors, each type of electromechanical connector being depicted as an audio jack plug. Fig. 1 depicts a 4-pole jack plug 1 having four electrical contacts (or conductors or poles) a tip T, a first ring R1, a second ring R2, and a sleeve S. Fig. 2 depicts a 3-pole jack plug 2 having three electrical contacts (or conductors or poles) a tip T, a ring R and a sleeve S. The jack plug 1 of fig. 1 may be referred to as a "TRRS" jack plug and the jack plug 2 of fig. 2 may be referred to as a "TRS" jack plug due to the presence of the tip and the number of the sleeve contacts.
In an example, the TRRS jack plug 1 may be used to connect an accessory device having both a speaker and a microphone to a host device, as the quadrupole structure of the TRRS jack plug 1 may enable both output audio (e.g., audio output to the speaker of the accessory device) and input audio (e.g., received by the microphone of the accessory device) to be transmitted/transmitted from/to the host device. For example, tip T of TRRS plug 1 may carry a left audio channel signal (e.g., to a left speaker of an accessory device connected to TRRS plug 1), first ring R1 may carry a right audio channel signal (e.g., to a right speaker of the accessory device), and second ring R2 and sleeve S may each carry a microphone input audio signal (e.g., from a microphone of the accessory device), or provide a ground connection. Accordingly, the TRRS jack plug 1 can be used for an accessory device that supports stereo audio and has a microphone.
In an example, the TRS jack plug 2 can be used to connect an accessory device having a speaker to a host device. For example, tip T of TRS plug 2 may carry a left audio channel signal (e.g., to a left speaker of an accessory device connected to TRS plug 2), ring R may carry a right audio channel signal (e.g., to a right speaker of the accessory device), and sleeve S provides a ground connection. Accordingly, the TRS jack plug 2 can be used for an accessory device supporting stereo audio.
Fig. 3 schematically illustrates four examples of accessory types that may be used with a host electronic device, the type of jack plug to which these accessory types are connected, and how the jack plug utilizes a tip/ring/sleeve structure.
At 3a, it is indicated how accessories including microphones and headsets can be connected to a 4-pole jack plug according to the cellular telecommunications and internet institute ("CTIA") standard/configuration. According to this configuration, the left and right speakers of the headset are connected to the tip T of the 4-pole jack plug and the ring 1R1, respectively, with the ring 2R2 being the ground connection and the sleeve S being connected to the microphone of the headset.
At 3b, it is indicated how accessories including microphone and headset can be connected to a 4-pole jack plug according to the Open Mobile Terminal Platform (OMTP) standard. According to this configuration, the left and right speakers of the headset are connected to the tip T of the 4-pole jack plug and the ring 1R1, respectively, with the ring 2R2 connected to the microphone of the headset and the sleeve S being the ground connection.
At 3c, it is indicated how a stereo headset accessory comprising a headset ("HP") load (e.g., left and right headset speakers) can be connected to a 3-pole jack plug, with the left speaker connected to tip T and the right speaker connected to ring R, and sleeve S being a ground connection.
At 3d, indicate how a stereo line load ("LL") accessory (e.g., an accessory comprising two line loads) can be connected to a 3-pole jack plug, with the left line load connected to tip T, the right line load connected to ring R, and sleeve S being the ground connection.
The host device includes a port configured to receive a jack plug, and may not know in advance what type of accessory it is to receive (and thus what kind of 'connector structure' the accessory and jack plug have). The user can manually select the kind of accessory connected to the device, but their selection may be wrong, and in any case the user himself makes the selection both time consuming and cumbersome.
The present disclosure provides circuitry configured to determine a type of stereo accessory configured to drive stereo audio into and/or out of a host device through an electromechanical connection between a jack plug to which the stereo accessory is connected and a corresponding jack port (also referred to as a "socket") of the host device. In this way, the host device may support stereo input/output signals from/to a stereo transducer connected through a jack plug. Such stereo input/output accessories may include stereo microphones ("SMICs"), such as passive stereo microphones, stereo line input devices ("SLIs"), and stereo line output devices ("SLOs").
Fig. 4a illustrates at 400 how an SLI accessory device may be connected to a 3-pole jack plug and at 410 how a SMIC accessory device may be connected to a 3-pole jack plug. At 400, left and right stereo drivers are shown connected to the tip T and ring R of a 3-pole jack plug. At 410, left and right stereo input microphone lines are shown connected to tip T and ring R of a 3-pole jack plug. In both examples, the sleeve S is a ground connection.
The load impedance may sometimes determine the type of accessory device, but fig. 4b shows that typical impedance ranges for the type of accessory device illustrated in fig. 4a may overlap (and may vary depending on the state of the load; e.g., a line driver may have different impedances depending on whether the line driver is 'on' or 'off'). Thus, the use of impedance values alone may not result in reliable detection of accessory devices of the type shown in fig. 4 a.
In accordance with the present disclosure, circuitry is provided to automatically detect a stereo accessory type such as SLI 4a or SMIC 4b (or indeed a monaural accessory, including a Headset (HP), line In (LI) or Line Out (LO) accessory). In addition to being able to detect accessories such as the CTIA/OMTP headset and HP and LL accessory types 3 a-3 d depicted in FIG. 3, circuitry according to the present disclosure may also detect these accessory types.
Fig. 5 shows a flowchart of a process 500 configured to be performed by circuitry to detect a type of accessory connected to a first jack plug inserted into a first jack port using "jack detection" or "sensing circuitry. At 501, the process includes detecting whether a first jack plug has been inserted into a first jack port. At 502, the process includes determining whether an audio signal is present or detected at the tip T or ring R of the first jack plug. For example, step 502 may include determining whether an audio signal is detected at an analog-to-digital converter ("ADC") that is connected to the tip of the jack port and to the ring R, respectively (as will be described later). If such an audio signal is present, at 503, the process includes identifying the type of accessory as a SLI accessory.
This process recognizes that in normal operation, a device including a line input and an active microphone generates an audio signal such as may be detected by an ADC. Thus, the presence of an audio signal on tip T or ring R can be used to distinguish between stereo accessory types 400 and 410 having a "passive load" (which typically does not generate an audio signal). Active loads, such as, for example, active stereo microphones, have their own power supply and do not require a microphone bias ("MBias") voltage to generate audio, and such types of active loads may appear to the host device as SLI type loads. In other words, detection of an audio signal at the tip T or ring R of the jack plug may provide a reliable indication of the presence of a SLI or SMIC device.
Fig. 5a shows a flow 500a that includes optional step 501a in the process of fig. 5. According to fig. 5a, after detecting that a first jack plug is plugged into a corresponding first jack, the process includes determining whether the type of jack plug is a 3-pole jack plug at 501a. The process then proceeds to determine whether audio input is present at the tip T or ring R, etc. of the 3-pole jack plug, as described above.
Fig. 5b shows a process 500b that illustrates one example method of determining that the first jack plug is a 3-pole jack plug at 501b through 510 d. At 501b, the process includes determining whether a contact in the first jack port corresponding to the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is grounded. If this contact is grounded, at 501c the process includes determining if the contact corresponding to the ferrule S of the 4-pole jack plug is grounded. If this contact is also grounded, the process may determine that the jack plug is a 3-pole jack plug (e.g., a Headset (HP) or Line Load (LL) 3-pole jack plug), as at 501a above.
It is to be appreciated that the present disclosure provides circuitry configured to perform the processes described herein, and that the circuitry is configured to determine whether a signal (e.g., audio or ground) is present at an electrical contact corresponding to a tip/ring/cannula, etc., in a jack port (or receptacle) of, for example, a host device (e.g., including circuitry).
Fig. 6 illustrates a flow chart of a process 600, which may include any of the processes described above. According to the process of fig. 6, the circuitry is configured to also determine whether a first jack plug inserted into a corresponding first jack port is a 4-pole jack plug, and if so, determine the type of 4-pole jack plug. Upon determining that the jack plug is not a 4-pole jack plug, the process may be as described above with respect to fig. 5-5 b.
At 601, it is determined that a first jack plug has been plugged into a corresponding first jack port. At 602, it is determined whether a contact in the first jack port corresponding to the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is grounded, and if this contact is grounded, then at 603 the process includes determining whether the contact corresponding to the sleeve S of the 4-pole jack plug is grounded. If this contact is also grounded, the process may determine that the jack plug is a 3-pole jack plug (e.g., HP or LL 3-pole jack plug) at 604, then determine if audio input is present at tip T or ring R, and if so, the device is classified as a 3-pole SLI (at steps 605 and 606), as described above for FIGS. 5-5 b.
If it is determined at 602 that the contact in the first jack port corresponding to the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is not grounded, then at 606 it is determined whether the contact corresponding to the sleeve S of the 4-pole jack plug is grounded. In other words, the process determines whether two contacts in the first jack port corresponding to S/R2 or S of a3 or 4 pole jack plug, respectively, are grounded. The order of steps depicted in the flow chart of fig. 6 is for purposes of illustrating the process only and is exemplary. It should be appreciated that the determination of whether the contacts are grounded may be made in any order, or even simultaneously, etc.
As described above, if both are grounded, the process classifies the fitting as 3-pole HP or LL at 604.
If it is determined that the contact in the first jack port corresponding to either the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is not grounded, but the contact corresponding to the sleeve S of the 4-pole jack plug is grounded, then at 607, the fitting and jack plug types are classified as 4-pole OMTP devices (e.g., headsets).
If it is determined that the contact in the first jack port corresponding to either the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is grounded, but the contact corresponding to the sleeve of the 4-pole jack plug is not grounded, then at 608, the accessory and jack plug types are classified as 4-pole CTIA devices (e.g., headsets).
If it is determined that the contact in the first jack port corresponding to either the sleeve S of the 3-pole jack plug or the ring 2R2 of the 4-pole jack plug is not grounded, nor is the contact corresponding to the sleeve S of the 4-pole jack plug, the process is complete (in this example, the jack plug may be another type).
After classifying the accessory type and jack plug as 3 pole OMTO or CTIA headset at 607 and 608, the impedance is measured at 610, and the accessory and jack plug type is determined based on the impedance measurement at 611. For example, a low impedance load may indicate that the accessory is a headphone accessory and a high impedance load may indicate that the accessory is a line load or a high impedance headphone accessory.
In other words, as indicated by blocks 602, 603, and 606, the location of the ground line (e.g., which contacts in the jack port are grounded) may determine whether the jack plug (within the jack socket) is a 3-pole, 4-pole CTIA, or 4-pole OMTP.
While the presence of an audio signal at the tip T or ring R of an audio jack plug may provide a strong indication of the presence of SLI or SMIC, if no audio signal is present, the present disclosure is still able to classify the type of accessory connected to a jack plug inserted into a jack port when no such audio signal is present (resulting from the "no" option of steps 502 and 605 in the process described above). This will now be described.
Fig. 7 illustrates a process 700 that incorporates the process described above (like blocks of the process are labeled with like reference numerals, thus e.g., 701 corresponds to 601 of fig. 6, etc. as described above). Specifically, fig. 7 illustrates the process after no audio is detected at the tip T or ring R of the first jack plug (e.g., at steps 502, 605, and 705). If audio is not detected, at 711 microphone biasing is enabled on tip T and ring R. In an example, this may be achieved by MBias circuitry. MBias circuitry may be configured to increase the voltage across tip T and ring R, and may be gradually increased (e.g., using a "soft ramp" technique) in order to reduce or prevent the presence of audible signal artifacts (i.e., pops or clicks) on the headset or line load.
In response to MBias, at 712, it is determined whether an audio signal is present on tip T or ring R (more specifically, whether an audio signal is detected at an ADC connected to contacts of the jack port corresponding to tip T and ring R (or ring 1R 1) of the audio jack plug, respectively). Regardless of whether audio is present or not, and in either case MBias is disabled, as indicated at 713 and 714. If audio is present on tip T or ring R in response to MBias, then at 715, the fitting and jack ports are classified as 3-pole SMIC.
If no audio is present, disabling MBias may include gradually reducing the voltage across the tip and ring (e.g., using a "soft ramp down" technique) at 714 in order to reduce the presence of a pop or click (i.e., audible signal artifact) on the headset or line load.
Using soft ramp up/down techniques may include gradually changing the voltage according to the S-curve slew rate, thereby reducing or eliminating audible components that might otherwise be superimposed on the MBias voltage.
If audio is not present, then at 716 the accessory and audio jack plug are classified as 3-pole HP/LL (this can be considered a "default" regarding the accessory type as a headset or line load).
After 716, at 717 the ADCs connected to the tip T and ring R (or R1) contacts on the jack port may continue to monitor for the presence of audio, and if they later detect audio (on either ADC), at 718 the accessory may be reclassified as SLI. In other words, steps 717 and 718 effectively monitor whether audio is subsequently present (after 714) at the tip T or ring R of the audio jack plug.
At 719, the process may include an optional step of causing an ultrasonic tone (e.g., an ultrasonic pilot tone) to be enabled. This step in the process may be used to determine whether an audio signal is received at a contact connected to tip T and ring R of the audio jack. In other words, MBias enabled at 711 may allow for the accessory device to be determined as SMIC if an audio tone is detected at the contact in the jack port that connects to tip T and ring R of the audio jack, but in addition (or instead) using an ultrasonic tone enables the reliable detection of SMIC in a quiet environment and in the event that the process is inaudible to the user. Another benefit of using ultrasonic tones instead of or in addition to the enabled MBias is that predetermined parameters and/or characteristics of the signal (e.g., frequency, amplitude, phase, etc.) may be applied to the accessory type, and in some examples, this may simplify the detection process. In the example of enabling ultrasonic tones at 711, this may be disabled at a later stage in the process (e.g., at 713 or 714).
As will be described later, the ultrasonic tones may be transmitted from one or more speakers of the main electronic device through an "acoustic" path, received through the SMIC of the accessory device, and then subsequently received by ADCs (e.g., respective ADCs connected to the left and right audio lines).
As stated above, the ultrasonic pilot tone may be generated upon determining that the accessory device and/or host device are in a quiet environment, or the ultrasonic tone may be generated by the host device exclusively for purposes of gesture detection (e.g., detecting user presence and/or hand gesture), and thus the use of the ultrasonic tone and/or changing the ultrasonic tone may be simply reused as part of the accessory type detection process.
Ultrasonic tones may be applied to one of the stereo microphones (the transmit or "Tx" microphone) in order to cause the microphone to operate like a speaker, and then the other of the stereo microphones (the receive or "Rx" microphone) may be used to detect the resulting ultrasonic output, with the Rx microphone biased by a microphone bias voltage.
The use of stereo microphones (Tx microphone and Rx microphone) for accessory type detection relies on receiving a portion of the transmitted ultrasonic signal at an ADC connected to the Rx microphone. However, due to the electrical feedback through the common ground impedance of the Tx and Rx microphones, a return signal may also occur. In other words, the ultrasonic tones may be transmitted through the acoustic path and also through the electrical path through components of the circuitry. To prevent false detection due to common ground impedance when using a stereo microphone, the delay between sending and receiving ultrasonic tones through the electrical path may be measured (e.g., during fabrication of the circuitry). Deviations from this electrical path delay during a field detection scenario (e.g., performing the process described above) using a jack plug may indicate the presence of an acoustic feedback path, i.e., a microphone. Thus, the process may include determining a delay (e.g., a "round trip delay") from a digital-to-analog converter (DAC) to an ADC (e.g., calibrated at manufacture), and comparing this delay to the actual delay during the 'live' jack detection and classification process illustrated in FIG. 7 to determine whether feedback may be due to electrical and/or acoustic paths. This will be described again later.
At 715, the accessory device may be classified as a 3-pole SMIC, but as indicated at 720, an optional process of checking or confirming that the device is a SMIC may be performed. According to this optional inspection process, MBias is enabled at 721 on the contacts of the jack port corresponding to the tip T and ring R of the jack plug, and at 722, a determination is made as to whether audio input is present. If audio is present, MBias is disabled, 723, and the device is classified as SMIC, 715. If there is no audio input in response to MBias (or "subsequent MBias") being subsequently enabled, the process returns to block 705. As previously stated, performing optional steps 721-723 may ensure that the accessory device is SMIC. An optional inspection step 720 may be performed for another ultrasonic tone (e.g., block 721 may include block 719 as described above).
It should be appreciated that at any time during the process, the user may manually override any step and thus may manually override the process.
Circuitry for performing the above-described processes will now be described.
Fig. 8 schematically illustrates circuitry 800 implemented as part of a Host Device (HD) 890, the circuitry 800 being connected to electrical contacts of a jack port in the host device and configured to perform any of the processes described above. Circuitry 800 may include one or more integrated circuits, an audio processor, and/or an audio codec.
Broadly, circuitry 800 includes an ADC, a DAC, circuitry for detecting insertion and/or removal of jack plug tip T in a jack socket, circuitry for detecting a headset button (and user manipulation thereof), circuitry for detecting the type of jack plug (e.g., 4-pole CTIA or OMTP, or 3-pole SMIC or SLI), circuitry that allows for input/output of stereo data signals on tip T and ring R (or ring 1R 1), and circuitry that enables application of MBias voltages on tip T and ring R (or ring 1R 1) of the jack plug.
The components of circuitry 800 will now be described in more detail. These components are shown connected to the jack plug 880 by solid lines. The jack plug 880 is shown as a 4-pole TRRS jack plug, but it should be understood that it may be a 3-pole TRS jack plug because circuitry 800 is configured to identify which accessory and what type of accessory the jack plug 880 is connected to. Thus, while solid lines indicate that various components of the circuitry are connected to one of the four contacts of the depicted TRRS plug, it should be understood that this is a schematic diagram only and is for illustration purposes only. It should be appreciated that these components are connected to contacts in the jack port of the host device 890 that are configured to electrically connect to corresponding contacts (T, R, R2, S, or T, R, S) of the jack plug when inserted into the jack port. Thus, it should also be appreciated that a first contact in the jack port is configured to electrically connect to the tip T of a 3-pole or 4-pole jack plug when inserted into the jack port, a second contact in the jack port is configured to electrically connect to the ring R of a 3-pole jack plug or the ring 1R1 of a 4-pole jack plug when inserted into the jack port, a third contact in the jack port is configured to electrically connect to the sleeve S of a 3-pole jack plug or the ring 2R2 of a 4-pole jack plug when inserted into the jack port, and a fourth contact in the jack port is configured to electrically connect to the sleeve S of a 4-pole jack plug when inserted into the jack port.
Circuitry 800 includes a voltage bias source such as MBias 801,801. The first headset bias line 802 is connected to the bias 801 through a resistor and switch and is connectable to the sleeve S of a 4-pole jack plug. The second headset bias line 803 is connected to the bias 801 through a resistor and switch and is connectable to the second ring R2 of the 4-pole jack plug or the sleeve S of the 3-pole jack plug. A first stereo line 804 for left audio is connected to bias 801 through a resistor and switch and may be connected to tip T of a 3-pole or 4-pole jack plug. The second stereo line 805 for right audio is connected to the bias 801 through a resistor and a switch and is connectable to the ring R of the 3-pole jack plug or the first ring R1 of the 4-pole jack plug.
Circuitry 800 includes a first digital-to-analog converter DAC 806 and a second digital-to-analog converter DAC 808. A first headphone connection 807 for left headphone output is connected to the first DAC 806 and is connectable to the tip T of a 3-pole or 4-pole jack plug. A second headphone connection 809 for the right headphone output is connected to the second DAC converter 808 and is connectable to the ring R of 3-pole jack plugs or the first ring R1 of 4-pole jack plugs.
Circuitry 800 includes a first digital-to-Analog (ADC) converter 810 and a second digital-to-Analog (ADC) converter 815. The first headset connector 811 is connected to the first ADC 810 and is connectable to the sleeve S of a 4-pole jack plug. The second headset connection 812 is connected to the first ADC 810 and may be connected to the second ring R2 of the 4-pole jack plug or the sleeve S of the 3-pole jack plug. The first stereo input line 813 for right stereo audio is connected to the first ADC 810 and may be connected to the ring R of 3-pole jack plugs or the first ring R1 of 4-pole jack plugs. The first stereo input ground 814 may be connected to the second ring R2 of the 4-pole jack plug or the sleeve S of the 3-pole jack plug. A second stereo input line 816 for left stereo audio is connected to the second ADC 815 and may be connected to the tip T of a 3-pole or 4-pole jack plug. The second stereo input ground 817 is connected to the second ADC 815 and is connectable to the second ring R2 of the 4-pole jack plug or the sleeve S of the 3-pole jack plug.
Finally, as indicated at 818, the circuitry includes jack plug detection (or "sense") circuitry. This may be tip T detection circuitry, ring R detection circuitry, or a combination of both.
The circuitry 800 of fig. 8 is configured to perform the process described above with respect to fig. 7 to enable automatic detection of SMICs and SLIs connected to jack plugs plugged into jack ports connected to the circuitry. Referring to process 700, upon detection of a 3-pole jack plug, ADCs 810, 815 are enabled and if a relatively large audio signal is detected at the ADC, the accessory type is identified as a stereo line-in (SLI) type accessory (see step 706). If no audio signal is detected, the microphone bias voltage (MBias) is soft ramped (e.g., to prevent audio artifacts as discussed above) over tip T and ring 1R1 (e.g., contacts/pins 1 and 2 in the jack port), see stereo lines 803 and 804 connected to tip T and ring 1R1 contacts and MBias 801 (when their corresponding switches are closed). If a relatively large audio signal is then received at the ADC (once the bias is stable), the accessory type is identified as SMIC (see step 715).
The voltage is then soft ramped down (MBias). As stated above, soft ramp up and ramp down are used to prevent slamming or ticking, etc., where the accessory is a headset or line output load.
If none of these steps detects audio through the ADC, then the accessory type is classified by default as line/headphone type load (see step 716).
The detection process may continue indefinitely while the ADC output is continuously monitored, then if an audio signal is detected at the ADC, the accessory type is reclassified as Line In (LI) (see step 718), and the detection process ends.
In the event of user intervention (e.g., override accessory type detection or enabling headphone playback), the detection process ends.
As explained above with respect to step 720, once MBias ramp down (i.e., disable) is complete, the output of the ADC 810, 815 can be controlled to perform a 'check' procedure (see steps 721-723) to verify that no audio signal is present at the ADC anymore, thereby reducing the likelihood of false detection occurring if a line-in (LI) signal is enabled during the type detection process and ensuring that the accessory device is SMIC.
Fig. 9 a-9 c illustrate circuitry 900, which may be (or include) the same circuitry as 800 to illustrate circuitry that emits, generates, or transmits, etc. ultrasonic tones.
Fig. 9a shows circuitry 900 and an audio jack plug 980 connected to a SMIC 970. In this example, the host device (not specifically indicated in fig. 9 a) comprises a speaker 960, and the circuitry 900 comprises a third DAC 919, a speaker output line 920, the DAC 919 being configured to output an audio signal to the speaker 960.
As described above with reference to step 719, the ultrasonic tone may be enabled by causing DAC 919 to cause speaker 960 to emit an ultrasonic tone. This is then received at the microphone of the SMIC and, through the connections described above with respect to fig. 8, at the ADCs 910, 915. As described above, this allows for such identification of SMICs in a quiet environment without causing the host device to emit an audible signal.
Fig. 9b shows circuitry 900 without the third DAC 919 and the speaker output line 920. In this example, the circuitry is still able to identify the stereo accessory 970 as SMIC by emitting an ultrasonic tone. In this example, DAC 906, which is connected to headphone output line 907 (in this example, for the output of the left headphone), causes the (left) headphone transducer in SMIC to send an ultrasonic tone, which is then received at the other (right) headphone transducer, and thus received at ADC 910 through stereo (right) input line 913.
It should be understood that references to "left" and "right" in all circuitry diagrams are purely for illustrative purposes and should not be construed as limiting. For example, the description of FIG. 9b above may be read as disclosing that a DAC connected to one headphone output line (left or right) may cause one headphone transducer in the SMIC to transmit an ultrasonic tone that is received at the other headphone transducer, and thus at a corresponding ADC in the circuitry, etc.
In other words, one of the stereo microphones may be caused to operate as a "Tx" microphone, operating like a speaker, to output ultrasonic tones received at the other "Rx" microphone (biased by MBias).
Fig. 9c schematically illustrates the time delay as discussed above with respect to fig. 7. Indicated at 954 is the acoustic path over which the emitted ultrasonic tone travels from the Tx transducer to the Rx transducer, while 955 indicates the electrical path over which a return signal may also be sent back to the ADC 910 due to electrical feedback through the common ground impedance of the Tx and Rx microphones. The delay may be predetermined. The circuitry may be configured to compare the actual delays (detected during live detection) to determine the cause of the feedback, as a deviation from this circuitry path delay during field use jack plug detection scenarios may indicate the presence of an acoustic feedback path, i.e. a microphone.
Fig. 12 illustrates a process 1200 that incorporates the process described above (like blocks of the process are labeled with like reference numerals, thus e.g., 1201 corresponds to 601 and 701 of fig. 6 and 7, etc., as described above). In particular, fig. 12 illustrates two parts of the process, the first part relating to the ability of the process of the present disclosure to continuously detect Stereo Line In (SLI) accessories during playback. The second part involves the detection of a mono microphone (mono MIC) accessory (e.g., connected to a 2-pole or 3-pole jack plug).
For block 717 of fig. 7, at block 1217, a determination is made as to whether audio input is present at the ADC connected to the tip T and ring (R or R1) contacts of the jack port having the jack plug therein.
If no audio is present, block 1217 and later may represent re-evaluating the type of accessory. At block 1241, the process includes determining whether playback is enabled (e.g., whether a headphone amplifier is enabled). This may include determining whether a DAC associated with a headset is outputting data (or at least one DAC is each associated with a respective headset, e.g., for left/right headphones). If not enabled, the accessory is classified as a 3-pole SLI accessory (at 1218) (see also blocks 716 and 717 of process 700). If it is determined that playback is enabled, at 1242 the process includes comparing playback to the ADC output (e.g., output data). This may include comparing the ADC output data with the DAC output data. It is then determined (at 1243) whether they match. If the playback and ADC output data do not match, the accessory is classified as a 3-pole SLI accessory (at 1218). If the playback and ADC output data match, the method returns to block 1217 where it is determined whether there is audio input on either of the ADCs connected to pins 1 and 2 (it will be appreciated that pin 1 is fingertip T, pin 2 is ring R or ring 1R1 (depending on the accessory type, etc.)).
Fig. 13 illustrates circuitry 1300 (which may include circuitry 800, 900 as described above with reference to fig. 8 and 9). Fig. 13 shows circuitry 1300 configured to perform blocks 1241-1243 as described above. During playback, the digital ADC 1310, 1315 output data is compared (e.g., continually compared) by comparators 1361, 1362 to digital headphone playback data (received at DACs 1306, 1308). For example, each comparator 1361, 1362 is connected to one of the DACs and one of the ADCs and is configured to receive signals from one of the DACs and one of the ADCs. Thus, each comparator 1361, 1362 may be configured to correlate signals received from the ADC and DAC to which it is connected. When the ADC output is a mix of audio data output by the headphone amplifier and the external line driver, there will be a mismatch between the two signals that will be reported to the host system as a change in accessory type (replace the default assumed HP/LL with SLI (see 1216)). At 1370, the enablement (or unmutes) of the external stereo line driver is schematically indicated, and at 1360 the stereo headset output is schematically indicated.
The above-described blocks 1241-1243 and circuitry 1300 solve the following potential problems. If a stereo LI accessory is plugged into the host device, but the external line driver is silent, the device may report the accessory type as HP/LL (see default classification at 1216) because there is no signal. Then, if the device enables the headphone amplifier (e.g., to play music or output an alarm tone, etc.), such as after user input, the external line driver is unmuted while the internal headphone amplifier is active. In this case, both the external line driver and the internal headphone amplifier will attempt to drive the same line. This may lead to two problems. First, the audio output of the device may be delivered through the headphone amplifier rather than to its loudspeaker (thus, the user may not hear tones and other content intended to be audible to the user because the headphone amplifier is not actually driving the headphone). Second, the external line driver may still not be recognized as a line input accessory. Steps 1241-1243 of process 1200 solve this potential problem.
Fig. 14 illustrates at 14a mono accessory connected to a 3 pole jack plug and at 14b a mono accessory connected to a 2 pole jack plug. In each example, the mono accessory is illustrated as a mono microphone.
Referring again to fig. 12, process 1200 can distinguish between mono and stereo microphones (e.g., mono and stereo microphone inputs) as follows. These parts of the process use the fact that a mono microphone only needs to enable one MICBias channel and one ADC channel.
Referring to block 1212 (and see also block 712), it is determined whether audio input is present at any of the ADCs connected to pins 1 and 2 (corresponding to tip T or ring R or R1, respectively). If audio is present, process 1200 includes disabling MBias on pin 2 (e.g., applied to MBias of the ring) and disabling only MBias on pin 2, e.g., such that MBias remains on pin 1 (e.g., remains applied to the tip), at 1231. At 1232, the process determines whether there is an audio input at the ADC connected to pin 1. In one example, this may be an ADC connected to the right stereo input line (see fig. 8). If no audio is detected at this ADC, then at 1234 the accessory is classified as a 3-pole stereo microphone (see also block 715). On the other hand, if there is an audio input at the ADC, then at 1233 the accessory is classified as a mono MIC (2-pole or 3-pole mono MIC).
According to blocks 1231-1234 of the process, when an audio input is detected after two MicBias are enabled, the presence of a mono MIC is detected by disabling MicBias on pin 2, and if an audio signal is still received at the ADC corresponding to pin 2, then pins 1 and 2 are presumed to be shorted (thus, the MIC on pin 2 is biased by MicBias on pin 1), and if no audio is detected on the ADC corresponding to pin 2, then a stereo MIC is presumed.
Fig. 10a and 10b illustrate circuitry 1000 that is part of a Host Device (HD). Circuitry 1000 may include circuitry 800, 900, or 1300 as described above. Fig. 10a illustrates the circuitry more schematically, while fig. 10b illustrates the circuitry in more detail. Individual blocks, or units, or modules of circuitry are schematically shown, but it should be understood that they are depicted as separate entities schematically and purely for illustration purposes. Indeed, these blocks are depicted as separate and are merely intended to convey the functionality that circuitry is configured to perform, and are not intended to depict that components of the circuitry for performing one function are distinct from components of another function, etc.
Circuitry 1000 includes an accessory detection ("AD") module 1010 and a stereo accessory detection ("SAD") module 1020, meaning that circuitry 1000 has (is configured to) functionality to detect the type of 4-pole jack plug/accessory (e.g., CTIA or OMTP) (via AD module 1010) and to detect the type of 3-pole jack plug/accessory (e.g., SLI or SMIC) (via SAD module 1020). Fig. 10a shows a jack port 1091 of the host device receiving a jack plug 1080 connected to a fitting 1070, while fig. 10b schematically shows various connections of circuitry modules to the illustrative jack plug 1080, but it is understood that these modules are electrically connected to corresponding contacts on the jack port of the host device configured to receive a jack plug (e.g., a first contact corresponding to tip T of a 3-pole or 4-pole jack plug, a second contact corresponding to ring R of a 3-pole jack plug or ring 1R1 of a 4-pole jack plug, a third contact corresponding to sleeve S of a 3-pole jack plug or ring 2R2 of a 4-pole jack plug, and a fourth contact corresponding to sleeve S of a 4-pole jack plug) when inserted in the jack port.
AD circuitry 1010 includes left audio output circuitry 1011 (e.g., circuitry for processing left audio output-see DAC 806 and headset left output line 807 in fig. 8), right audio output circuitry 1012 (e.g., circuitry for processing right audio output-see DAC 808 and headset right output line 809), impedance measurement circuitry 1011 configured to measure the impedance of any of the electrical connections, microphone bias circuitry 1013 (see 801, 802, and 803), microphone and ground switching circuitry 1014 (see ADC 810 and lines 811 and 812), and microphone input circuitry 1015 (see ADC 810 and lines 811 and 812).
SAD circuitry 1020 includes first stereo input circuitry 1021 for processing a first stereo input signal, second stereo input circuitry 1022 for processing a second stereo input signal (see 810 and 815, lines 813 and 816), impedance measurement circuitry 1025 configured to measure the impedance of any of the electrical connections, microphone bias circuitry 1023 (see 801, 804 and 805), and ground circuitry 1024 (see ADCs 810 and 815 and lines 814 and 817).
Fig. 10a and 10b show one jack port connected to circuitry 1000 for determining what kind of accessory is connected to a jack plug received in the jack port. However, the principles disclosed above are applicable to any number of jack ports. In other words, the host device may include more than one jack port, and the host device may include one "copy" or "version" of circuitry 1000 (e.g., each module and/or component thereof) for each jack port to determine the type of accessory connected to the jack received in each jack port. If circuitry 1000 is part of an integrated circuit ("IC"), then the host device may include one IC for each jack port to identify the type of each accessory connected to the host device through the jack port of the host device, or indeed a single IC may include multiple "copies" of circuitry 1000.
Fig. 10c schematically shows an arrangement of circuitry 1000c having N circuitry modules 1001-1, i.e., 1001-N, each configured to detect insertion of a jack plug in a corresponding jack port and to detect whether the jack plug is connected to an accessory (such as a 4 pole CITA or OMTP accessory) or a stereo accessory (SMIC or SLI), as described above. In other words, each of the modules 1001 may include the three modules 1010, 1020, and 1030 of fig. 10a, each of which is associated with a respective jack port (e.g., in a host device).
Circuitry 1000 advantageously allows a host device to accept multiple stereo and monaural accessories, allowing a game user who wishes to play with other players, for example, on a network or online, and simultaneously streaming over the internet, to use the host device. In fact, if the host device has an additional jack port, any other user (such as family/friends, etc.) may join the game/stream.
In one example, circuitry 1000 may be configured in a manner such that circuitry may detect and classify a first type of fitting connected to a 4-pole jack plug and a second type of fitting connected to a 3-pole jack plug. This is particularly advantageous for host devices that include one jack port for a headset and another jack port for an SLI accessory. This will now be described.
Fig. 11a schematically shows circuitry 1100 comprising the modules as described above with respect to fig. 10a, but the circuitry 1100 is implemented in a host device 1190 comprising two jack ports 1191, 1192, which are dedicated inputs for stereo and monaural fittings, respectively. Thus, the host device 1190 is configured to connect to two accessory devices 1170, 1171 through respective electrical connections between its jack ports 1191, 1192 and respective jack plugs 1180, 1181. Like the circuitry 1000 of fig. 10, the circuitry 1100 has an AD module 1110 and a SAD module 1120, but unlike fig. 10, each of the AD module 1110 and the SAD module 1120 are routed to a different jack port. In this way, by performing the process as set forth in fig. 7, circuitry 1100 is able to detect the type of accessory connected to the 3-pole jack plug received in first jack port 1191 and the type of accessory connected to the 4-pole jack plug received in second jack port 1192. In other words, circuitry 1100 (e.g., AD module 1110 thereof) may determine that accessory 1171 is a CTIA headset or OMTP headset by performing steps 701-711, and circuitry 1100 (e.g., SAD module 1120 thereof) may determine that accessory 1170 is a SMIC or SLI accessory by performing steps 705-718 (including any of steps 719 or 720, etc.).
Connected to each respective port are jack detection modules 1130 and 1131. The first jack detection module 1130 is configured to detect insertion and/or removal of a tip of the first jack plug 1180 in the first jack port 1191, and the second jack detection module 1131 is configured to detect insertion and/or removal of a tip of the second jack plug 1181 in the second jack port 1192.
The jack detection modules of some circuitry include tip tstart (or tip tsensing) and ring rstensing (or ring rstensing). Tip T detection circuitry is used to detect insertion and/or removal of a jack plug tip T in a jack port, and ring R detection circuitry is used to detect insertion and/or removal of a jack plug ring (e.g., R or R1) in the (same) jack port. However, in accordance with the present disclosure, a printed circuit board arrangement is provided that routes tip T detection circuitry to a first jack port and routes ring R detection circuitry to a second jack port, thereby enabling the same circuitry to detect the presence of two jack plugs in the respective jack ports.
Fig. 11b schematically illustrates a carrier 1150, such as a printed circuit board ("PCB") or ceramic motherboard. According to this arrangement, the carrier or carrier 1150 includes first and second conductive paths 1151 and 1152 that electrically couple the circuitry 1100 with respective first and second jack ports, indicated by 1191 and 1192, respectively (although indicated by jack plugs, it should be understood that this is schematic and is intended to indicate which contacts on the respective jack ports the circuitry is connected to). This configuration of the PCB takes advantage of the fact that within the circuitry, the ring R detection/sensing circuitry can be effectively re-used as tip T detection circuitry, so that insertion and/or removal of two jack plugs in respective jack ports can be detected with circuitry that can already be employed to detect insertion and/or removal of (tip T and ring R of) jack plugs in the jack ports.
In this manner, the circuitry may be considered to include first and second tip detection circuitry each configured to detect insertion and/or removal of a corresponding jack plug in a jack port. Likewise, circuitry may be considered to include tip T detection circuitry configured to detect insertion and/or removal of a first jack plug in a first jack port, and ring R detection circuitry configured to detect insertion and/or removal of a second jack plug in a second jack port. Thus, the ring R detection circuitry may be configured to detect insertion and/or removal of a corresponding jack plug in the jack port. Thus, the terms "ring rdetection/sensing" and "tip tstart detection/sensing" may be considered interchangeable in some cases, as will be apparent to those skilled in the art from the examples.
According to the arrangement shown in fig. 11a and 11b, carrier 1150 may thus be considered to support a first module 1110 (see "RING SENSE" in fig. 11 b) and a second module 1130 (see "TIP SENSE" in fig. 11 b) configured to detect at least partial receipt of a corresponding jack plug in a corresponding jack port, respectively, wherein conductive paths 1151 and 1152 connect these modules with the corresponding jack port (see lines connecting modules 1130 and 1131 and "sockets" 1191 and 1192 of fig. 11 a).
The carrier 1150 may include circuitry 1100 and/or may include at least one of the receptacle ports 1191, 1192. It should be appreciated that in an example, any or all of the components of the arrangement of fig. 11b may be provided on a monolithic structure (e.g., a monolithic PCB).
Fig. 11c shows circuitry 1100 in more detail in an example where circuitry is used for a dedicated jack port (one dedicated jack port for a stereo accessory and one dedicated jack port for a monaural accessory). Like reference numerals refer to figure 10 b. Like fig. 10b, the circuitry 1100 includes a Tip Detection (TD) module, an Audio Detection (AD) module 1110, and a Stereo Audio Detection (SAD) module 1120, but unlike fig. 10b, the circuitry 1100 is electrically connected (e.g., by a PCB, i.e., carrier, which is the arrangement described above with reference to fig. 11 a) to two jack ports (indicated schematically by jack plugs 1180, 1181). In other words, by virtue of the carrier including conductive paths to electrically connect TIP SENSE to a first jack port and RING SENSE to a second jack port (where RING SENSE may be configured to detect the presence of TIP T of a second jack plug in the second jack port), circuitry 1100 may be configured to detect the presence of two jack plugs, and thus be compatible with a device that includes two jack ports. In this example, for the purposes of illustrating the application of the circuitry 1100 with respect to fig. 11a and 11b, the device is shown as receiving a 4-pole jack plug 1181 and a 3-pole jack plug 1180, but again with reference to fig. 10c, the principles of the present disclosure are applicable to host devices having any number of jack ports.
Fig. 11d shows a generic carrier 1150 to illustrate the general principles of the present disclosure, with fig. 11 a-11 c depicting one example. Fig. 11d shows a carrier 1150 implemented in a host device 1190 that includes two receptacle ports 1191 and 1192. In the example of fig. 11 a-11 c, these jack ports are dedicated stereo and monaural accessory ports, but fig. 11d shows that they may be non-dedicated ports. In the example of fig. 11d, the two ports 1191, 1192 remain connected to the circuitry 1100. More specifically, the carrier 1150 includes a first conductive path 1151 and a second conductive path 1152 that each electrically connect a respective port 1191, 1192 to the circuitry 1000.
Of course, in examples where ports 1191, 1192 are dedicated to stereo and monaural accessories, respectively, the arrangement of circuitry 1000 may be as depicted in fig. 11 a-11 c, but the principles of the present disclosure are equally applicable to devices having two "universal" jack ports (e.g., not "dedicated" jack ports and capable of accepting stereo and monaural accessories). This will now be described. The circuitry 1100 of FIG. 11d may include the arrangement of FIG. 10c above, but using the principles described above with reference to FIGS. 11 a-11 c, the jack detection circuitry or module "JD2"1031c may include a "RING_SENSE" module of circuitry as described above. In other words, TIP SENSE and RIG SENSE of circuitry 1000 may be connected to ports 1091c, 1092c, and each of these ports may be connected to both a stereo accessory module (SAD) and an accessory detection module (AD), in this way circuitry 1000 may perform the processes described above with reference to fig. 5-7 for each port 1901, 1092, and the insertion of a jack plug in each port may be described above with reference to fig. 11 a-11 c (where the TIP detection module of circuitry 1000 detects the insertion of one jack plug in one jack port and the ring detection module of circuitry 1000 detects the insertion of another jack plug in another jack port).
In other words, depending on the intended design of the host device, circuitry may be used in conjunction with two jack ports and may include two SAD modules (if the device is known in advance to support two stereo accessories), two AD modules (if the device is known in advance to support two headset/microphone type accessories), or one SAD and one AD (if the device is known in advance to support one of each type of accessory), and in each example, circuitry 1100 has the functionality to detect the insertion of two jack plugs by means of its two "jack detection" modules. Of course, for other arrangements, such as the circuitry of the circuitry depicted in fig. 10 a-10 c without prior knowledge of the type of accessory, the advantage of the arrangement of fig. 11 a-11 e is that, by means of the PCB arrangement disclosed in fig. 11b, the insertion of two jack plugs can be detected using, for example, one IC.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions.
Accordingly, those skilled in the art will recognize that some aspects of the above described circuitry, apparatus and methods may be embodied as processor control code, for example on a non-volatile carrier medium such as a magnetic disk, CD-ROM or DVD-ROM, a programmed memory such as read-only memory (firmware), or on a data carrier such as an optical or electrical signal carrier. For many applications, the embodiments as described herein may be implemented on a DSP (digital signal processor), an ASIC (application specific integrated circuit), and/or an FPGA (field programmable gate array). Thus, any code may comprise conventional program code or microcode, or code for setting up or controlling an ASIC or FPGA, for example. The code may also include code for dynamically configuring reconfigurable circuitry and/or devices, such as a reprogrammable array of logic gates. Similarly, the code may include code for a hardware description language such as Verilog TM or VHDL (very high speed integrated circuit hardware description language). As the skilled person will appreciate, the code may be distributed among a plurality of coupling components in communication with each other. The embodiments described herein may also be implemented using code running on a field (re) programmable analog array or similar device to configure analog hardware, where appropriate.
It should be noted that the above-mentioned embodiments illustrate rather than limit any invention contained herein, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims and/or the accompanying feature statements. The word "comprising" does not exclude the presence of elements or steps other than those listed in a feature statement and/or claim, "a/an" does not exclude a plurality, and a single feature or other unit may fulfill the functions of several units recited in the feature statement and/or claim. Any reference signs or labels in the feature set and/or claims should not be construed as limiting the scope.
Examples of the present disclosure may be provided according to any of the following numbered statements:
1. circuitry for detecting a type of accessory connected to a first jack plug inserted into a first jack port, the circuitry configured to:
determining whether an audio signal is present at a tip or a ring of the first jack plug and in the event that an audio signal is present at the tip or the ring of the first jack plug,
The type of fitting is determined to be a stereo line input fitting connected to a 3-pole jack plug.
2. The circuitry of statement 1, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
Enabling microphone bias to be applied to the tip and the ring of the first jack plug, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug in response to the microphone bias and in the event that an audio signal is present in response to the microphone bias,
The type of accessory is determined to be a stereo microphone.
3. The circuitry of statement 2, wherein the circuitry is further configured to, in the absence of an audio signal in response to the microphone bias:
the type of accessory is determined to be a headset and/or a line load.
4. The circuitry of statement 2, wherein the circuitry is further configured to:
And checking whether the type of accessory is a stereo microphone, wherein to perform the checking, the circuitry is configured to:
restarting the microphone bias to the tip and the ring of the first jack plug;
a determination is made as to whether an audio signal is present at the tip or the ring of the first jack plug in response to the re-enabled microphone bias.
5. The circuitry of statement 4, wherein the circuitry is further configured to, in the presence of an audio signal at the tip or the ring of the first jack plug in response to the re-enabled microphone bias:
The type of accessory is confirmed to be a stereo microphone.
6. The circuitry of statement 1, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
enabling microphone bias to the tip and the ring of the first jack plug, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug in response to the microphone bias, and if an audio signal is present in response to the microphone bias:
disabling the microphone bias applied to the ring of the first jack plug
Determining whether audio input is present on the tip of the first jack plug and in the event that audio input is present on the tip of the first jack plug,
Determining that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug and in the absence of audio input on the tip of the first jack plug,
The type of accessory is determined to be a stereo microphone.
7. The circuitry of statement 3, wherein the circuitry is further configured to:
disabling the microphone bias, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug, and in the presence of an audio signal:
The type of fitting is reclassified as a stereo line input fitting.
8. The circuitry of statement 3 or 7, wherein the circuitry is configured to:
Disabling the microphone bias;
determining whether playback is enabled on a fitting connected to the first jack plug;
Comparing the output of the one or more digital-to-analog converters with the output of the one or more analog-to-digital converters;
determining if the digital to analog converter output matches the analog to digital converter output and in the event the outputs do not match,
The type of fitting is reclassified as a stereo line input fitting.
9. The circuitry of any preceding statement, the circuitry further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
Enabling ultrasonic tone, and
Determining whether an ultrasonic signal is present at the tip or the ring of the first jack plug in response to the ultrasonic tone, and in the event that the ultrasonic signal is present at the tip or the ring of the first jack plug,
The type of accessory is determined to be a stereo microphone.
10. The circuitry of statement 9, wherein the circuitry is further configured to, in the absence of an ultrasonic signal at the tip or the ring of the first jack plug in response to the ultrasonic tone:
the type of accessory is determined to be a headset and/or a line load.
11. The circuitry of statement 9 or 10, wherein to enable the ultrasonic tone, the circuitry is configured to:
causing the ultrasonic tone to be output from one or more speakers and/or causing a transducer to transmit the ultrasonic tone.
12. The circuitry of statement 11, wherein the circuitry is further configured to:
A delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone through an electrical path and receiving the ultrasonic tone through an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone is determined.
13. The circuitry of any one of the preceding statements, further comprising:
A first jack plug detection module configured to detect whether the first jack plug is received in the first jack port.
14. The circuitry of any preceding statement, comprising a first circuitry module and a second circuitry module, wherein the first circuitry module comprises at least one of:
Left audio output circuitry;
Right audio output circuitry;
impedance measurement circuitry;
Microphone bias circuitry;
Microphone and ground switching circuitry, and
Microphone input circuitry;
and wherein the second circuitry module comprises at least one of:
First stereo input circuitry;
Second stereo input circuitry;
impedance measurement circuitry;
Microphone bias circuitry, and
And a ground circuit system.
15. The circuitry of any preceding statement, wherein the circuitry further comprises at least one of:
A first voltage bias source;
A first headset bias line connected to the bias and connectable to a sleeve of a 4-pole jack plug;
a second headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
a first stereo input line for left audio input, the first stereo input line connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug;
A second stereo input line for right audio input, the second stereo input line connected to the offset and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug;
a first digital-to-analog converter;
a first headset line for left headset output, the first headset line connected to the first digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug;
a second digital-to-analog converter;
A second headset line for right headset output, the second headset line connected to the second digital-to-analog converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
a first analog-to-digital converter;
A first headset wire connected to the first analog-to-digital converter and connectable to a sleeve of a 4-pole jack plug;
a second headset line connected to the first analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
A first stereo input line for right stereo audio, the first stereo input line being connected to the first analog to digital converter and being connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug, and
A first stereo input ground line connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
a second analog-to-digital converter;
A second stereo input line for left stereo audio, the second stereo input line connected to the second analog to digital converter and connectable to a tip of a 3-pole or 4-pole jack plug;
A second stereo input ground line connected to the second analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, and
A third digital-to-analog converter configured to output an audio signal to a speaker.
16. The circuitry of any preceding statement, wherein the circuitry is further configured to detect a type of accessory connected to a second jack plug inserted into a second jack port, the circuitry configured to:
Determining whether an audio signal is present at a tip or a ring of the second jack plug and in the event that an audio signal is present at the tip or the ring of the second jack plug,
The type of fitting is determined to be a stereo line input fitting connected to a 3-pole jack plug.
17. The circuitry of statement 16, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
enabling microphone bias to the tip and the ring of the second jack plug, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug in response to the microphone bias and in the event that an audio signal is present in response to the microphone bias,
The type of accessory is determined to be a stereo microphone.
18. The circuitry of statement 17, wherein the circuitry is further configured to, in the absence of an audio signal in response to the microphone bias:
the type of accessory is determined to be a headset and/or a line load.
19. The circuitry of statement 17, wherein the circuitry is further configured to:
And checking whether the type of accessory is a stereo microphone, wherein to perform the checking, the circuitry is configured to:
restarting the microphone bias to the tip and the ring of the second jack plug;
it is determined whether an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias.
20. The circuitry of statement 19, wherein the circuitry is further configured to, in the presence of an audio signal at the tip or the ring of the second jack plug in response to the re-enabled microphone bias:
The type of accessory is confirmed to be a stereo microphone.
21. The circuitry of statement 16, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
enabling microphone bias to the tip and the ring of the second jack plug, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug in response to the microphone bias, and if an audio signal is present in response to the microphone bias:
disabling the microphone bias applied to the ring of the second jack plug
Determining whether audio input is present on the tip of the second jack plug and in the event that audio input is present on the tip of the second jack plug,
Determining that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug and in the absence of audio input on the tip of the second jack plug,
The type of accessory is determined to be a stereo microphone.
22. The circuitry of statement 17, wherein the circuitry is further configured to:
disabling the microphone bias, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug, and in the presence of an audio signal:
The type of fitting is reclassified as a stereo line input fitting.
23. The circuitry of any of statement 18, wherein the circuitry is configured to:
Disabling the microphone bias;
Determining whether playback is enabled on a fitting connected to the second jack plug;
Comparing the output of the one or more digital-to-analog converters with the output of the one or more analog-to-digital converters;
determining if the digital to analog converter output matches the analog to digital converter output and in the event the outputs do not match,
The type of fitting is reclassified as a stereo line input fitting.
24. The circuitry of any one of statements 16-23, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
Enabling ultrasonic tone, and
Determining whether an ultrasonic signal is present at the tip or the ring of the second jack plug in response to the ultrasonic tone, and if the ultrasonic signal is present at the tip or the ring of the second jack plug;
The type of accessory is determined to be a stereo microphone.
25. The circuitry of statement 24, wherein the circuitry is further configured to, in the absence of an ultrasonic signal at the tip or the ring of the second jack plug in response to the ultrasonic tone:
the type of accessory is determined to be a headset and/or a line load.
26. The circuitry of statement 24 or 25, wherein to enable the ultrasonic tone, the circuitry is configured to:
causing the ultrasonic tone to be output from one or more speakers and/or causing a transducer to transmit the ultrasonic tone.
27. The circuitry of statement 26, wherein the circuitry is further configured to:
A delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone through an electrical path and receiving the ultrasonic tone through an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone is determined.
28. The circuitry of any one of statements 16-27, further comprising:
A second jack plug detection module configured to detect whether the second jack plug is received in the first jack port.
29. The circuitry of any one of statements 16-28, comprising a third circuitry module and a fourth circuitry module, wherein the third circuitry module comprises at least one of:
Left audio output circuitry;
Right audio output circuitry;
impedance measurement circuitry;
Microphone bias circuitry;
Microphone and ground switching circuitry, and
Microphone input circuitry;
and wherein the fourth circuitry module comprises at least one of:
First stereo input circuitry;
Second stereo input circuitry;
impedance measurement circuitry;
Microphone bias circuitry, and
And a ground circuit system.
30. The circuitry of any one of statements 16-29, wherein the circuitry further comprises at least one of:
a third voltage bias source;
A third headset bias line connected to the bias and connectable to the sleeve of the 4-pole jack plug;
a fourth headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
a third stereo input line for left audio input, the third stereo input line connected to the offset and connectable to a tip of a 3-pole or 4-pole jack plug;
a fourth stereo input line for right audio input, the fourth stereo input line connected to the offset and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
a third digital-to-analog converter;
a third headphone line for left headphone output, the third headphone line connected to the third digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug;
A fourth digital-to-analog converter;
a fourth headset line for right headset output, the fourth headset line connected to the fourth digital-to-analog converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
Third analog-to-digital converter
A third headset wire connected to the third analog-to-digital converter and connectable to a sleeve of a 4-pole jack plug;
A fourth headset wire connected to the fourth analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
A third stereo input line for right stereo audio, the third stereo input line connected to the third analog to digital converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
A third stereo input ground line connectable to the second ring of the 4-pole jack plug or the sleeve of the 3-pole jack plug;
A fourth analog-to-digital converter;
A fourth stereo input line for left stereo audio, the fourth stereo input line connected to the fourth analog to digital converter and connectable to a tip of a 3-pole or 4-pole jack plug;
a fourth stereo input ground line connected to the fourth analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, and
A fifth digital-to-analog converter configured to output an audio signal to a speaker.
31. A carrier comprising the circuitry of any one of statements 1-30, wherein the carrier comprises a first conductive path configured to connect the circuitry to a first audio jack port, and a second conductive path configured to connect the circuitry to a second audio jack port.
32. The carrier of claim 31, comprising the first audio jack port and the second audio jack port.
33. An apparatus comprising circuitry as claimed in any one of statements 1 to 30 or a carrier as claimed in statement 31 or 32.
34. A carrier includes a first conductive path and a second conductive path, wherein the first conductive path is configured to electrically connect circuitry with a first jack port, and wherein the second conductive path is configured to electrically connect the circuitry with a second jack port.
35. The carrier of statement 34, wherein the circuitry comprises a first module configured to detect insertion of a first audio jack in the first jack port, and a second module configured to detect insertion of a second jack plug in the second jack port, wherein the first conductive path is configured to electrically connect the first module with the first jack port, and wherein the second conductive path is configured to electrically connect the second module with the second jack port.
36. The carrier of statement 34 or 35, wherein the circuitry comprises tip detection circuitry and ring detection circuitry, wherein the first conductive path is configured to electrically connect the tip detection circuitry with the first jack port, and wherein the second conductive path is configured to electrically connect the ring detection circuitry with the second jack port.
37. The carrier of statement 36, wherein the tip detection circuitry is configured to detect full insertion of the first audio jack plug in the first jack port, and wherein the ring detection circuitry is configured to detect full insertion of the second audio jack plug in the second jack port.
38. The carrier of statement 34 or 35, wherein the circuitry comprises first tip detection circuitry and second tip detection circuitry, wherein the first conductive path is configured to electrically connect the first tip detection circuitry with the first jack port, and wherein the second conductive path is configured to electrically connect the second tip detection circuitry with the second jack port.
39. The carrier of statement 38, wherein the first tip detection circuitry is configured to detect full insertion of the first audio jack plug in the first jack port, and wherein the second tip detection circuitry is configured to detect full insertion of the second audio jack plug in the second jack port.
40. The carrier of any one of statements 34-39, comprising the first audio jack port and the second audio jack port.
41. The carrier of any one of statements 34-40, comprising the circuitry.
42. The carrier of statement 41, wherein the circuitry is configured to detect a type of accessory connected to the first jack plug inserted into the first jack port, the circuitry configured to:
determining whether an audio signal is present at a tip or a ring of the first jack plug and in the event that an audio signal is present at the tip or the ring of the first jack plug,
The type of accessory is determined to be a stereo line input accessory.
43. The carrier of statement 42, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
Enabling microphone bias to be applied to the tip and the ring of the first jack plug, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug in response to the microphone bias and in the event that an audio signal is present in response to the microphone bias,
The type of accessory is determined to be a stereo microphone.
44. The carrier of statement 43, wherein the circuitry is further configured to, in the absence of an audio signal in response to the microphone bias:
the type of accessory is determined to be a headset and/or a line load.
45. The carrier of statement 43, wherein the circuitry is further configured to:
Disabling the microphone bias and checking whether the type of accessory is a stereo microphone, wherein to perform the checking the circuitry is configured to:
restarting the microphone bias to the tip and the ring of the first jack plug;
a determination is made as to whether an audio signal is present at the tip or the ring of the first jack plug in response to the re-enabled microphone bias.
46. The carrier of statement 45, wherein the circuitry is further configured to, in the presence of an audio signal at the tip or the ring of the first jack plug in response to the re-enabled microphone bias:
The type of accessory is confirmed to be a stereo microphone.
47. The carrier of statement 42, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
enabling microphone bias to the tip and the ring of the first jack plug, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug in response to the microphone bias, and if an audio signal is present in response to the microphone bias:
disabling the microphone bias applied to the ring of the first jack plug;
Determining whether audio input is present on the tip of the first jack plug and in the event that audio input is present on the tip of the first jack plug,
Determining that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug and in the absence of audio input on the tip of the first jack plug,
The type of accessory is determined to be a stereo microphone.
48. The carrier of statement 44, wherein the circuitry is further configured to:
disabling the microphone bias, and
Determining whether an audio signal is present at the tip or the ring of the first jack plug, and in the presence of an audio signal:
The type of fitting is reclassified as a stereo line input fitting.
49. The carrier of statement 44, wherein the circuitry is configured to:
Disabling the microphone bias;
determining whether playback is enabled on a fitting connected to the first jack plug;
Comparing the output of the one or more digital-to-analog converters with the output of the one or more analog-to-digital converters;
determining if the digital to analog converter output matches the analog to digital converter output and in the event the outputs do not match,
The type of fitting is reclassified as a stereo line input fitting.
50. The carrier of any one of statements 42-49, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the first jack plug:
Enabling ultrasonic tone, and
Determining whether an ultrasonic signal is present at the tip or the ring of the first jack plug in response to the ultrasonic tone, and if the ultrasonic signal is present at the tip or the ring of the first jack plug;
The type of accessory is determined to be a stereo microphone.
51. The carrier of statement 50, wherein the circuitry is further configured to, in the absence of an ultrasonic signal at the tip or the ring of the first jack plug in response to the ultrasonic tone:
the type of accessory is determined to be a headset and/or a line load.
52. The carrier of statement 50 or 51, wherein to enable the ultrasonic tone, the circuitry is configured to:
causing the ultrasonic tone to be output from one or more speakers and/or causing a transducer to transmit the ultrasonic tone.
53. The carrier of statement 52, wherein the circuitry is further configured to:
A delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone through an electrical path and receiving the ultrasonic tone through an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone is determined.
54. The carrier of any one of statements 42-53, wherein the circuitry further comprises:
A first jack plug detection module configured to detect whether the first jack plug is received in the first jack port.
55. The carrier of any one of statements 42-54, wherein the circuitry further comprises a first circuitry module and a second circuitry module, the first circuitry module comprising at least one of:
Left audio output circuitry;
Right audio output circuitry;
impedance measurement circuitry;
Microphone bias circuitry;
Microphone and ground switching circuitry, and
Microphone input circuitry;
and wherein the second circuitry module comprises at least one of:
First stereo input circuitry;
Second stereo input circuitry;
impedance measurement circuitry;
Microphone bias circuitry, and
And a ground circuit system.
56. The carrier of any one of statements 42-55, wherein the circuitry comprises at least one of:
A first voltage bias source;
A first headset bias line connected to the bias and connectable to a sleeve of a 4-pole jack plug;
a second headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
A first stereo left line connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug;
A second stereo right line connected to the offset and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug;
a first digital-to-analog converter;
A first left headphone output line connected to the first digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug;
a second digital-to-analog converter;
a first right headset output line connected to the second digital-to-analog converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug;
First analog-to-digital converter
A first headset wire connected to the first analog-to-digital converter and connectable to a sleeve of a 4-pole jack plug;
a second headset line connected to the first analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
a first right stereo input line connected to the first analog to digital converter and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug;
A first stereo input ground line connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
a second analog-to-digital converter;
A first left stereo input line connected to the second analog to digital converter and connectable to a tip of a 3-pole or 4-pole jack plug;
A second stereo input ground line connected to the second analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, and
A third digital-to-analog converter configured to output an audio signal to a speaker.
57. The carrier of any one of statements 42-56, wherein the circuitry is configured to detect a type of accessory connected to the second jack plug plugged into the second jack port, the integrated circuit being configured to:
Determining whether an audio signal is present at a tip or a ring of the second jack plug and in the event that an audio signal is present at the tip or the ring of the second jack plug,
Determining that the type of fitting is a stereo line input fitting and determining that the second jack plug is a 3-pole jack plug.
58. The carrier of statement 57, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
enabling microphone bias to the tip and the ring of the second jack plug, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug in response to the microphone bias and in the event that an audio signal is present in response to the microphone bias,
Determining that the type of accessory is a stereo microphone and determining that the second jack plug is a 3-pole jack plug.
59. The carrier of statement 58, wherein the circuitry is further configured to, in the absence of an audio signal in response to the microphone bias:
Determining that the type of accessory is a headset and/or line load and determining that the second jack plug is a 3-pole jack plug.
60. The carrier of statement 58, wherein the circuitry is further configured to:
And checking whether the type of accessory is a stereo microphone, wherein to perform the checking, the circuitry is configured to:
restarting subsequent microphone biasing to the tip and the ring of the second jack plug;
it is determined whether an audio signal is present at the tip or the ring of the second jack plug in response to the re-enabled microphone bias.
61. The carrier of statement 60, wherein the circuitry is further configured to, in the presence of an audio signal at the tip or the ring of the second jack plug in response to the re-enabled microphone bias:
The type of accessory is confirmed to be a stereo microphone.
62. The carrier of statement 57, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
enabling microphone bias to the tip and the ring of the second jack plug, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug in response to the microphone bias, and if an audio signal is present in response to the microphone bias:
disabling the microphone bias applied to the ring of the second jack plug
Determining whether audio input is present on the tip of the second jack plug and in the event that audio input is present on the tip of the second jack plug,
Determining that the type of accessory is a mono microphone connected to a 2-pole or 3-pole jack plug and in the absence of audio input on the tip of the second jack plug,
The type of accessory is determined to be a stereo microphone.
63. The carrier of statement 59, wherein the circuitry is further configured to:
disabling the microphone bias, and
Determining whether an audio signal is present at the tip or the ring of the second jack plug, and in the presence of an audio signal:
The type of fitting is reclassified as a stereo line input fitting.
64. The carrier of any one of statement 59, wherein the circuitry is configured to:
Disabling the microphone bias;
Determining whether playback is enabled on a fitting connected to the second jack plug;
Comparing the output of the one or more digital-to-analog converters with the output of the one or more analog-to-digital converters;
determining if the digital to analog converter output matches the analog to digital converter output and in the event the outputs do not match,
The type of fitting is reclassified as a stereo line input fitting.
65. The carrier of any one of statements 57-64, wherein the circuitry is further configured to, in the absence of an audio signal at the tip or the ring of the second jack plug:
Enabling ultrasonic tone, and
Determining whether an ultrasonic signal is present at the tip or the ring of the second jack plug in response to the ultrasonic tone, and in the event that the ultrasonic signal is present at the tip or the ring of the second jack plug,
Determining that the type of accessory is a stereo microphone and determining that the second jack plug is a 3-pole jack plug.
66. The carrier of statement 65, wherein the circuitry is further configured to, in the absence of an ultrasonic signal at the tip or the ring of the second jack plug in response to the ultrasonic tone:
the type of accessory is determined to be a headset and/or a line load.
67. The carrier of statement 65 or 66, wherein to enable the ultrasonic tone, the circuitry is configured to:
causing the ultrasonic tone to be output from one or more speakers and/or causing a transducer to transmit the ultrasonic tone.
68. The carrier of statement 67, wherein the circuitry is further configured to:
A delay between receiving the ultrasonic tone from the transducer and/or the speaker outputting the ultrasonic tone through an electrical path and receiving the ultrasonic tone through an acoustic path between the transducer and/or the speaker outputting the ultrasonic tone and a transducer receiving the ultrasonic tone is determined.
69. The vector of any one of statements 57-68, further comprising:
A second jack plug detection module configured to detect whether the second jack plug is received in the first jack port.
70. The carrier of any one of statements 57-69, wherein the circuitry further comprises a third and fourth circuitry module, the third circuitry module comprising at least one of:
Left audio output circuitry;
Right audio output circuitry;
impedance measurement circuitry;
Microphone bias circuitry;
Microphone and ground switching circuitry, and
Microphone input circuitry;
And the fourth circuitry module includes at least one of:
First stereo input circuitry;
Second stereo input circuitry;
impedance measurement circuitry;
Microphone bias circuitry, and
And a ground circuit system.
71. The carrier of any one of statements 57-70, wherein the circuitry further comprises at least one of:
a third voltage bias source;
A third headset bias line connected to the bias and connectable to the sleeve of the 4-pole jack plug;
a fourth headset bias line connected to the bias and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
A third stereo left line connected to the bias and connectable to a tip of a 3-pole or 4-pole jack plug;
A fourth stereo right line connected to the offset and connectable to a ring of a 3-pole jack plug or a first ring of a 4-pole jack plug;
a third digital-to-analog converter;
A third left headphone output line connected to the third digital-to-analog converter and connectable to a tip of a 3-pole or 4-pole jack plug;
A fourth digital-to-analog converter;
A third right headphone output line connected to the fourth digital-to-analog converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
Third analog-to-digital converter
A third headset wire connected to the third analog-to-digital converter and connectable to a sleeve of a 4-pole jack plug;
A fourth headset wire connected to the fourth analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug;
A third right stereo input line connected to the third analog to digital converter and connectable to a ring of 3-pole jack plugs or a first ring of 4-pole jack plugs;
A third stereo input ground line connectable to the second ring of the 4-pole jack plug or the sleeve of the 3-pole jack plug;
A fourth analog-to-digital converter;
A third left stereo input line connected to the fourth analog to digital converter and connectable to a tip of a 3-pole or 4-pole jack plug;
a fourth stereo input ground line connected to the fourth analog-to-digital converter and connectable to a second ring of a 4-pole jack plug or a sleeve of a 3-pole jack plug, and
A fifth digital-to-analog converter configured to output an audio signal to a speaker.
72. An apparatus comprising a carrier as claimed in any one of statements 34 to 71.
As will be appreciated by one of ordinary skill in the art, as used herein, the term "circuitry" may include any and all combinations of analog and/or digital hardware circuitry, firmware, and/or software, including any and all blocks, modules, programs, flowcharts, etc. that may produce the same desired output, functionality, and/or result. Furthermore, "circuitry" may also be implemented as and/or in an Integrated Circuit (IC) that may be incorporated in a host device.
The term "host device" is used in this specification to refer to any electronic or electrical device that is removably connected to an external accessory device. The host device may be in particular a portable and/or battery powered host device such as, for example, a mobile phone, an audio player, a video player, a PDA, a mobile computing platform such as a Personal Computer (PC), a laptop or tablet computer and/or a gaming device.
A removable accessory device is any device that can be connected to and used with a host apparatus. The accessory device may be, for example, a set of headphones, an earphone, or the like, possibly including a microphone or a headset. The accessory device may also be, for example, a line-in and/or line-out apparatus such as an audio/video mixing station and/or speakers, etc.
Any feature of any given aspect or example as described herein may be combined with any other feature of any other aspect or example, and various features described herein may be implemented in any combination in the given example.
As will be appreciated by one of ordinary skill in the art, as used herein, the term "circuitry" or "circuitry" may include any and all combinations of analog and/or digital hardware circuitry, firmware, and/or software, including any and all blocks, modules, programs, and/or flowcharts, etc. that may produce the same desired output, functionality, and/or results. Furthermore, "circuitry" or "circuitry" may also be implemented as and/or in an Integrated Circuit (IC) that may be incorporated in a host device.
Although exemplary embodiments are shown in the drawings and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should in no way be limited to the exemplary embodiments and techniques illustrated in the accompanying drawings and described above. The articles depicted in the drawings are not necessarily drawn to scale unless specifically indicated otherwise.