Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the present application.
It should be noted that in the description of the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The terms "first," "second," and the like in this specification are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
In recent years, with the rapid development of semiconductor industry and integrated circuit technology, processors have become core computing units in the fields of cloud computing, artificial intelligence, big data and the like. In order to realize sharing of hardware computing resources and improve the utilization rate of the multi-core processor, virtualization technology is widely introduced. By virtualizing a plurality of virtual machines on a processor hardware platform, each virtual machine runs an independent operating system, thereby realizing efficient allocation and management of resources. However, since the operating system based on the virtual machine introduces additional overhead such as virtual machine management, it is generally difficult to meet the strict requirement of the business on real-time performance. Therefore, in a scenario with high real-time requirements, an operating system is usually operated in a manner of exclusive physical machine, i.e. in a "bare metal" mode. The use mode of the processor can obviously reduce the time delay of service processing, thereby better meeting the requirement of high-performance calculation.
In the server industry, with the increasing demand for flexible allocation of resources, hardware partitioning techniques for general-purpose host systems have evolved. By partitioning a server into two or even more physical host systems, each partition can independently carry traffic and provide services. The traditional hardware partition system generally needs to have complete key components such as calculation, storage, network, heat dissipation and the like, and each hardware partition is configured with a BMC management unit, namely a multi-BMC management mode is adopted, and the hardware partition system architecture under the multi-BMC management generally has the defects of excessive BMC resources, low resource utilization and high system cost. The hardware partition system architecture under the management of multiple BMCs can realize the out-of-band upgrading function of the BIOS only by connecting each BMC with one BIOS in the hardware partition through the SPI interface, so that the condition of insufficient interfaces does not exist. However, the management of a single BMC chip on multiple hardware partition systems is generally performed by only one hardware partition BIOS connection due to limited SPI interface of the existing BMC chip.
In order to solve the technical problems, the embodiment of the application provides a firmware upgrading system, a method, a computing device and an electronic device, wherein a baseboard management controller is divided into a plurality of management units corresponding to hardware partitions one by one, any one management unit is selected from the plurality of management units as a core unit, a target firmware file of each hardware partition is obtained and cached in a preset buffer, the control module reads the target firmware file of each hardware partition from the preset buffer, and the target firmware file of each hardware partition is parallelly sent to the corresponding hardware partition through a plurality of peripheral expansion ports arranged on the control module.
The present application will be further described in detail below with reference to the drawings and detailed description for the purpose of enabling those skilled in the art to better understand the aspects of the present application.
The embodiment of the application provides a firmware upgrading system which is used for efficiently upgrading firmware of a plurality of hardware partitions.
Referring to fig. 1, an interactive flow diagram of a firmware upgrade system according to an embodiment of the present application includes a baseboard management controller and a control module, where the baseboard management controller includes a plurality of management units, and the management units are in one-to-one correspondence with hardware partitions.
The control module is used for acquiring the target firmware files of the hardware partitions from the preset buffer, and transmitting the target firmware files of the hardware partitions to the corresponding hardware partitions in parallel based on a plurality of preset peripheral extension ports so as to enable the hardware partitions to carry out firmware upgrading on the core component based on the target firmware files;
the control module is provided with a plurality of peripheral extension ports, and the peripheral extension ports have the same port attribute as the peripheral ports on the baseboard management controller.
It should be noted that, the control module may specifically be a complex programmable logic device (Complex Programmable Logic Device, abbreviated as CPLD), and the control module has the function of expanding the peripheral port in the embodiment of the present application. The peripheral ports include serial peripheral interface (SERIAL PERIPHERAL INTERFACE, abbreviated as SPI) ports, the BMC is generally provided with only one SPI port, and the core component of the hardware partition specifically refers to a basic input/output system (Basic Input Output System, abbreviated as BIOS) which is used for carrying out core operations such as hardware initialization and hardware detection on the hardware partition.
Specifically, firstly, a BMC management unit (baseboard management controller) with a multi-Core processor is divided into a plurality of independent partitions, including a Core1 partition and a Core2 partition, wherein one partition is a management unit, and each partition independently operates a respective management system and is respectively responsible for monitoring and managing one hardware partition. Any partition is selected from the Core1 partition and the Core2 partition to serve as a Core unit, and the Core unit has a firmware upgrading function relative to other management units if the Core1 partition is taken as the Core unit. The core unit may obtain a target firmware file, such as a BIOS firmware image, of each hardware partition, and cache the firmware file to a preset buffer (such as an external EEPROM) through an external port (such as an SPI interface). The control module integrates a plurality of peripheral extension ports (such as SPI interfaces) inside, the peripheral extension ports are in one-to-one correspondence with the hardware partitions, and after the main control module reads the target firmware file from the preset buffer, the main control module sends the target firmware file to the corresponding hardware partition through the peripheral extension port corresponding to each hardware partition.
Specifically, the embodiment of the application realizes the upgrading operation of the hardware partition BIOS corresponding to all other Core partitions through the Core unit of one BMC, does not need to configure an extra out-of-band BIOS upgrading management chip for the system, saves the cost of the server system, and greatly simplifies the BIOS upgrading work of the hardware partition system under single BMC management, namely, does not need to execute the related operation of out-of-band BIOS upgrading for each Core partition. Meanwhile, the embodiment of the application fully utilizes the logic of the CPLD unit which is easy to execute in parallel, and allows all BIOS of the whole hardware partition system to update in parallel by realizing a plurality of independent SPI main control (peripheral expansion ports) in the CPLD unit, thereby greatly improving the upgrading efficiency. In addition, the BMC management unit and the CPLD related to the embodiment of the application are both inherent hardware units of the server system, and the embodiment of the application does not need to upgrade the chip specification of the BMC management unit, so that the design cost of the server hardware partition system can be obviously reduced. The method not only improves the economy of the system, but also provides important practical value for the rapid application and popularization of the related technology of the server hardware partition system.
On the basis of the above embodiment, as shown in fig. 2, a schematic structural diagram of a firmware upgrade system according to an embodiment of the present application is provided, as an implementation manner, in an embodiment, a core unit is provided with a network device.
The core unit receives the target firmware files of all the hardware partitions sent by the operation and maintenance interaction terminal based on the network equipment.
It should be noted that, the network device includes a network card device, etc., and the network device of the core unit is used as a communication hub with an external operation and maintenance interaction module, where the external operation and maintenance interaction module includes an operation and maintenance interaction terminal.
Specifically, in an implementation, the firmware upgrading system further includes an operation and maintenance interaction terminal, configured to determine, for any hardware partition, a target firmware file corresponding to the hardware partition according to a firmware upgrading requirement of a user on a core component of the hardware partition, and send the target firmware file corresponding to the hardware partition to the network device.
Specifically, the main function of the external operation and maintenance interaction module is to provide a UI interface for a user to remotely upgrade firmware corresponding to each BIOS in the hardware partition system, and the UI interface consists of an operation and maintenance interaction terminal and an Internet link. The operation and maintenance interaction terminal mainly realizes the system login access of the BMC management unit, and further uploads a BIOS firmware (or image) file (target firmware file) to be upgraded based on the BMC management system, and the Internet link is connected to network equipment corresponding to a core unit in the BMC management unit so as to construct a file transmission channel from the operation and maintenance exchange terminal to the BMC management unit. The type of the BIOS firmware to be uploaded configured by the BMC management system is determined according to the actual requirement of the user, and may be one firmware file (at this time, the BIOS of all the hardware partition systems is upgraded to the same firmware version), or may be different firmware files (at this time, the BIOS of different hardware partition systems corresponds to different firmware files).
Specifically, the operation and maintenance interaction terminal extracts a corresponding target firmware file from the local firmware library according to firmware upgrading requirements (firmware versions) of each hardware partition issued by a user, and sends the target firmware file to the network device through an Internet link, so that the core unit obtains the target firmware file of each hardware partition based on the network device.
Specifically, in one embodiment, a network device includes:
The network interface is used for establishing network connection with the operation and maintenance interaction terminal, receiving target firmware files in the form of analog signals of all hardware partitions sent by the operation and maintenance interaction terminal through the network connection, and sending the target firmware files to the transceiver;
the transceiver is used for converting the target firmware file in the form of an analog signal into the target firmware file in the form of a digital signal and forwarding the target firmware file in the form of the digital signal to the network controller;
and the network controller is used for packaging the obtained target firmware file into an upper layer data packet so that the core unit can obtain the target firmware file of each hardware partition.
Specifically, the network interface may specifically use an RJ45 network connector, where the network interface receives the target firmware file in the form of analog signals of each hardware partition sent by the operation and maintenance sophisticated terminal through a network connection (Internet link). The transceiver (PHY chip) is configured to convert an analog electrical signal (an analog signal form of a target firmware file) into a digital bit stream, so as to obtain the digital signal form of the target firmware file, and extract a synchronous clock from the data stream, thereby ensuring data sampling accuracy. The network controller (MAC controller) is configured to encapsulate the digital bit stream (the destination firmware file in the form of a digital signal) into standard ethernet frames (adding a frame header (source/destination MAC address and type field) and a frame trailer (FCS check), while also verifying the frame integrity by the CRC-32 algorithm, discarding the error frames.
The network equipment converts the bottom layer physical signal into an upper layer data packet through a layering processing mechanism, and a safe and reliable data transmission channel is provided for the firmware upgrading system.
Accordingly, in one embodiment, the core unit comprises:
The firmware receiving subunit is used for receiving the upper layer data packet sent by the network controller, analyzing the obtained upper layer data packet to extract the target firmware file of each hardware partition in the upper layer data packet, and sending the extracted target firmware file of each hardware partition to the firmware storage module to store the target firmware file of each hardware partition in the firmware storage module.
Specifically, after receiving an upper layer data packet sent by a network controller, the firmware receiving subunit performs decapsulation processing on the upper layer data packet, so as to parse the upper layer data packet, extract effective data (target firmware file) from the upper layer data packet, obtain target firmware files of each hardware partition, and send the obtained target firmware files of each hardware partition to a firmware storage module, where the firmware storage module is used for providing a storage function in the core unit.
Specifically, in one embodiment, the core unit includes:
and the firmware storage module is used for caching the target firmware files of the hardware partitions into the preset buffer according to the data writing requirements of the preset buffer.
It should be noted that, in the preset buffer, each hardware partition is divided into separate storage areas, when the firmware storage module caches the target firmware file of each hardware partition into the preset buffer, the firmware storage module writes the target firmware file of each hardware partition into the corresponding storage area, for example, writes the target firmware file of the hardware partition 1 into the storage area 1 corresponding to the hardware partition 1, and so on.
Specifically, in an embodiment, the firmware storage module is further configured to perform file integrity verification on a target firmware file of any hardware partition, and cache the target firmware file to a preset buffer when it is determined that the target firmware file passes the integrity verification.
Specifically, a preset verification algorithm may be used to perform integrity verification on the target firmware file, where the preset verification algorithm includes a hash algorithm, a cyclic redundancy verification algorithm, and the like. By caching the target firmware file into the preset buffer and carrying out integrity check on the target firmware file, error codes in the firmware file caused by network fluctuation or hardware faults can be effectively intercepted, the reliability of the target firmware file is improved, and the safety of firmware upgrading is also improved.
Specifically, in an embodiment, the firmware storage module is further configured to perform repeatability verification on a target firmware file of each hardware partition, to screen two or more hardware partitions with the same target firmware file, and to use the two or more hardware partitions with the same target firmware file as firmware repetitive hardware partitions, to perform single transmission on the target firmware file of each hardware partition in a process of caching the target firmware file of each hardware partition to a preset cache through a peripheral port, and to repeatedly write the target firmware file of each firmware repetitive hardware partition into a cache space corresponding to each firmware repetitive hardware partition in the preset cache.
Specifically, a unique feature identifier may be calculated for the target firmware file of each hardware partition, and the target firmware file of each hardware partition may be repeatedly verified according to the unique feature identifier of the target firmware file of each hardware partition. And if the unique characteristic identifiers of the target firmware files of the two hardware partitions are the same, determining that the two hardware partitions are firmware repeated hardware partitions. In practical application, firmware duplicate hardware partitions can be screened based on a preset filter.
Further, the several firmware duplicate hardware partitions with unique feature identifiers are grouped into a group, for example, if the unique feature identifiers of the hardware partitions 1,3 and 5 are the same, the hardware partitions 1,3 and 5 form a duplicate group a, and the target firmware files a of the hardware partitions 1,3 and 5 are regarded as the target firmware files a of the duplicate group a. In the process of caching the target firmware files of each hardware partition to a preset buffer through a peripheral port, the target firmware file a is only transmitted once to the preset buffer, and in the preset buffer, the same target firmware file is written into the cache spaces of a plurality of hardware partitions through an address mapping mechanism of an SPI bus, namely, the target firmware file a is respectively written into the cache space 1 corresponding to the hardware partition 1, the cache space 3 corresponding to the hardware partition 3 and the storage space 5 corresponding to the hardware partition 5. The same target firmware file can be written into the cache spaces of a plurality of hardware partitions through an address mapping mechanism of the SPI bus.
The repeatability verification mechanism of the firmware storage module reduces the transmission quantity between the core unit and the preset buffer, and lays a foundation for improving the firmware upgrading efficiency of the hardware partition.
Further, in an embodiment, the firmware storage module is further configured to:
After the target firmware files of the hardware partitions are successfully cached in the preset buffer through the peripheral port, a first state signal is sent to the control module through the state interaction interface so as to represent that the preset buffer has cached the target firmware files of the hardware partitions.
The state interaction interface may specifically be a General-purpose input/output (GPIO) port. The firmware storage module firstly verifies whether the target firmware files of all the hardware partitions are successfully written into the preset buffer, namely, checks whether the storage space of each hardware partition contains a complete and verified target firmware file. If yes, determining that the target firmware files of the hardware partitions are successfully cached to a preset buffer through the peripheral ports, and sending a first state signal to the control module through the GPIO pins (such as high level indicating success) so as to trigger the subsequent flow of the control module.
By sending the first state signal to the control module, the access resource of the control module to the preset buffer is avoided from being wasted under the condition that the target firmware file of a certain hardware partition does not exist when the control module accesses the preset buffer.
On the basis of the above embodiment, as a practical manner, in an embodiment, the control module is specifically configured to:
the method comprises the steps of receiving a first state signal, wherein a core unit sends the first state signal to a control module under the condition that a preset buffer is determined to buffer a target firmware file of each hardware partition;
And responding to the first state signal, and acquiring the target firmware file of each hardware partition from the preset buffer.
Specifically, when the control module receives the first state signal through the GPIO, the control module sends a read command to the preset buffer memory to obtain the target firmware file of each hardware partition from the preset buffer memory.
Specifically, in one embodiment, the control module includes:
The firmware reading module is used for responding to the first state signal, accessing the preset buffer through the basic peripheral expansion port so as to acquire the target firmware files of the hardware partitions from the preset buffer, and caching the acquired target firmware files of the hardware partitions into the internal buffer of the control module.
The basic peripheral expansion port is a special access port for the control module to a preset buffer, and the internal buffer comprises a memory of the control module and the like.
Specifically, the firmware reading module responds to the first state signal and accesses the preset buffer through a basic peripheral expansion port (SPI 0), the basic peripheral expansion port on the control module is a special path for transmitting firmware files from the preset buffer to the control module, the basic peripheral expansion port is independently arranged, and in the process that the control module sends target firmware files to the hardware partition through the peripheral expansion port, the basic peripheral expansion port can normally access the preset buffer, namely, the control module does not influence the parallel updating of the firmware of a plurality of hardware partitions when reading the target firmware files.
Specifically, in one embodiment, the control module includes:
the firmware writing control module is used for reading the target firmware file of any hardware partition in the internal buffer, and calling the peripheral expansion port corresponding to the hardware partition so as to send the target firmware file to the hardware partition through the peripheral expansion port.
It should be noted that, the hardware partition system at the Host side is composed of N independent hardware partitions, each of which runs an independent operating system and integrates basic components such as CPU, network, storage, power supply, sensor, and the like, and also includes a core component BIOS chip, i.e., each hardware partition includes a BIOS chip. Each BIOS is responsible for hardware initialization and operating system boot operation of the hardware partition system, and the target firmware file in the embodiment of the present application is a firmware upgrade file of the BIOS.
Specifically, the firmware writing control module is used as an execution unit of the control module and is responsible for writing the target firmware file cached by the internal buffer into the corresponding hardware partition, for example, by calling the SPI master 1 (the peripheral expansion port 1), sending the target firmware file 1 to the hardware partition 1, and so on.
The firmware writing control module maintains a memory space address mapping table therein, for example, the memory space 1 corresponds to the hardware partition 1, and the memory space 2 corresponds to the hardware partition 2, so that according to the read memory space address information of the target firmware file, which hardware partition corresponds to the read memory space address information can be determined, and further which peripheral expansion port is called to send the target firmware file to the hardware partition can be determined.
Because the control module CPLD has flexible hardware programmability and is easy to realize SPI master control logic, the embodiment of the application realizes a plurality of SPI master controls through the CPLD, and further greatly improves the upgrading efficiency of BIOS firmware of a Host side hardware partition system in a mode of executing the SPI master controls in parallel.
Specifically, in an embodiment, the control module is further configured to return the second status signal to the core unit after sending, based on the preset plurality of peripheral extension ports, the target firmware file of each hardware partition to the corresponding hardware partition in parallel.
Specifically, after writing of the target firmware files of all the hardware partitions is completed, the control module sends a second status signal to the core unit through a status interaction interface (GPIO) to inform the core unit that the control module has completed the corresponding firmware upgrading operation.
Specifically, in an embodiment, the core unit is further configured to time a time of sending the first status signal to the control module as a start time, stop timing when the core unit receives the second status signal, and generate firmware upgrade alarm information when a timing result exceeds a preset timing threshold.
The preset time threshold may be dynamically adjusted according to the complexity of firmware upgrade, for example, the preset time threshold may be determined according to the product of the number of partitions, the average writing time of the target firmware file, and the security factor (e.g., 1.5).
Specifically, the core unit records the current value of the system clock as the starting time while sending the first state signal, and triggers a timer through the GPIO edge to ensure that the error between the signal sending time and the timing starting time is small enough, and when the timer value (timing result) is larger than the preset time threshold, alarm information is generated. The alarm information includes a time stamp, a time-out hardware partition ID, executed steps, a system load, and the like.
The embodiment can prevent firmware upgrading process of the hardware partition from being trapped into dead loop, such as the hardware partition does not respond, and avoid long-time unavailability of the hardware system.
Specifically, in one embodiment, each management unit is provided with a plurality of basic ports.
And the management unit is used for transmitting the basic firmware file of the basic component to the hardware partition through the basic port when any basic component is to be subjected to firmware upgrading in the corresponding hardware partition.
Specifically, the basic ports include an I2C port, a UART, and the like, and the components in the hardware partition except the BIOS are basic components, which include a temperature sensor, a fan controller, and the like.
Specifically, when the basic component in the hardware partition needs firmware upgrade, each management unit can independently send the basic firmware file of the basic component to the hardware partition through the basic port, so that the firmware upgrade efficiency of the basic component is improved.
As shown in fig. 3, an interaction flow diagram of an exemplary firmware upgrade system provided by an embodiment of the present application is shown, and the specific flow is as follows:
the operation and maintenance interaction terminal logs in a BMC Web management page, and uploads BIOS firmware images (target firmware files) of all hardware partitions to a BMC management unit (baseboard management controller) through a network interface, specifically a core unit sent to the BMC management unit;
step 2, the BMC management unit receives a BIOS image file from the operation and maintenance terminal through a network interface by a firmware receiving module;
step 3, the BMC management unit writes the received BIOS image file into an external EEPROM (preset buffer) through the SPI controller by the firmware storage module;
Step 4, after the writing operation is completed, the BMC management unit informs the CPLD unit (control module) of the writing completion state (first state signal) through the GPIO;
Step5, a firmware reading module of the CPLD unit receives a GPIO notification signal from the BMC management unit, and then reads an image file in the EEPROM through the SPI master control 0;
step 6, the firmware writing control module of the CPLD unit controls the SPI main control 1, the SPI main control 2, the SPI main control N and the like in parallel, and the read image files are written into chips such as the BIOS 1, the BIOS 2, the BIOS N and the like in the hardware partition system respectively;
step 7, after the writing operation is completed, the firmware writing control module of the CPLD unit informs the BMC unit that the firmware writing operation is completed through the GPIO;
and step 8, after the BMC management unit receives a write operation completion signal (second state signal) sent by the CPLD unit through the GPIO, the BMC management unit sends a successful BIOS firmware upgrading state to the operation and maintenance interaction terminal through the network interface so as to characterize the end of the whole BIOS firmware upgrading process.
The firmware upgrading system comprises a baseboard management controller and a control module, wherein the baseboard management controller comprises a plurality of management units, the management units are in one-to-one correspondence with hardware partitions, any one of the management units in the baseboard management controller is used as a core unit for acquiring target firmware files of each hardware partition and caching the target firmware files of each hardware partition to a preset buffer through peripheral ports, the control module is used for acquiring the target firmware files of each hardware partition from the preset buffer, and the target firmware files of each hardware partition are sent to corresponding hardware partitions in parallel based on a plurality of preset peripheral expansion ports so that each hardware partition can conduct firmware upgrading on a core component based on the target firmware files, and the control module is provided with a plurality of peripheral expansion ports, wherein the peripheral expansion ports are identical to the peripheral ports on the baseboard management controller in terms of port attributes. According to the system provided by the scheme, the baseboard management controller is divided into the plurality of management units corresponding to the hardware partitions one by one, any management unit is selected from the plurality of management units to serve as a core unit, the target firmware files of the hardware partitions are obtained and cached in the preset buffer, the control module reads the target firmware files of the hardware partitions from the preset buffer, and the target firmware files of the hardware partitions are sent to the corresponding hardware partitions in parallel through the plurality of peripheral expansion ports arranged on the control module.
Moreover, the system provided by the embodiment realizes the efficient and rapid upgrading of the BIOS firmware of the system with multiple hardware partitions by a single BMC. Firstly, the scheme solves the problem of limited SPI interface of the traditional single BMC chip by dividing the BMC into a plurality of independent partitions and utilizing parallel SPI master control logic of the CPLD unit, realizes parallel upgrading of BIOS of a plurality of hardware partitions, remarkably improves upgrading efficiency and shortens upgrading time. And secondly, the scheme does not need to configure an independent BMC management unit for each hardware partition, reduces redundancy of hardware resources, reduces system cost, and simultaneously avoids the problem of low resource utilization rate in a multi-BMC management mode. In addition, the embodiment of the application fully utilizes the inherent BMC management and CPLD units in the server system, does not need an extra out-of-band BIOS upgrade management chip, and further reduces the hardware design cost. By simplifying the upgrade process, the operation complexity is reduced, and the maintainability and reliability of the system are improved. Not only improves the economy of the system, but also provides important practical value for the rapid application and popularization of the related technology of the server hardware partition system.
From the description of the above embodiments, it will be clear to a person skilled in the art that the system according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment.
The embodiment of the application provides a firmware upgrading method which is applied to a firmware upgrading system provided by the embodiment. The execution body of the embodiment of the application is electronic equipment, such as a server, a desktop computer, a notebook computer, a tablet computer and other electronic equipment which can be used for firmware upgrade.
Fig. 4 is a flow chart of a firmware upgrading method according to an embodiment of the present application, where the method includes:
Step 401, obtaining a target firmware file of each hardware partition.
Step 402, the target firmware file of each hardware partition is cached to a preset buffer through the peripheral port.
Step 403, obtaining, based on the control module, the target firmware file of each hardware partition from the preset buffer, so that the control module sends, based on the preset plurality of peripheral expansion ports, the target firmware file of each hardware partition to the corresponding hardware partition in parallel, so that each hardware partition performs firmware upgrade on the core component based on the target firmware file.
The description of the features in the embodiment corresponding to the firmware upgrading method can be referred to the related description of the embodiment corresponding to the firmware upgrading system, which is not described in detail herein.
The embodiment of the application also provides a firmware upgrading device which is used for executing the firmware upgrading method provided by the embodiment.
Fig. 5 is a schematic structural diagram of a firmware upgrade apparatus according to an embodiment of the present application. The firmware upgrading device 50 comprises an acquisition module 501, a cache module 502 and an upgrading module 503.
The device comprises a hardware partition, an acquisition module, a cache module and an upgrading module, wherein the acquisition module is used for acquiring target firmware files of all hardware partitions, the cache module is used for caching the target firmware files of all hardware partitions to a preset buffer through peripheral ports, the upgrading module is used for acquiring the target firmware files of all hardware partitions from the preset buffer based on the control module, so that the control module parallelly transmits the target firmware files of all hardware partitions to corresponding hardware partitions based on a plurality of preset peripheral expansion ports, and all hardware partitions conduct firmware upgrading on core components based on the target firmware files.
The description of the features in the embodiment corresponding to the firmware upgrading device may refer to the related description of the embodiment corresponding to the firmware upgrading system, which is not described in detail herein.
The embodiment of the application also provides a computing device for deploying the firmware upgrading system provided by the embodiment.
Fig. 6 is a schematic structural diagram of a computing device according to an embodiment of the present application. The computing device comprises a hardware partition system formed by a plurality of hardware partitions and the firmware upgrading system provided by the embodiment.
Wherein each hardware partition integrates a core component and a base component.
The description of the features in the embodiments corresponding to the computing device may refer to the related description of the embodiments corresponding to the firmware upgrade system, which is not described herein in detail.
An electronic device according to an embodiment of the present application is shown in fig. 7, and is a schematic structural diagram of the electronic device according to the embodiment of the present application, and includes a processor 10 and a memory 20, where the memory 20 stores a computer program, and the processor 10 is configured to execute the computer program to perform the steps in any of the firmware upgrading method embodiments described above.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is configured to perform the steps of any of the firmware upgrade method embodiments described above when run.
In an exemplary embodiment, the computer readable storage medium may include, but is not limited to, a U disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, etc. various media in which a computer program may be stored.
Embodiments of the present application also provide a computer program product comprising a computer program which, when executed by a processor, implements the steps of any of the firmware upgrade method embodiments described above.
Embodiments of the present application also provide another computer program product comprising a non-volatile computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of any of the firmware upgrade method embodiments described above.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The firmware upgrading system, the firmware upgrading method, the computing equipment and the electronic equipment provided by the application are described in detail. The principles and embodiments of the present application have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present application and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.