Disclosure of Invention
Aiming at least one defect or improvement requirement of the prior art, the invention provides a high-sensitivity large-dynamic anti-interference low-frequency receiving device, which is used for solving the problems that the whole volume of the receiving device is large, the circuit structure is complex and the high-sensitivity large-dynamic anti-interference low-frequency receiving device is inconvenient to maintain when a frequency conversion superheterodyne device or a circuit receives a low-frequency electromagnetic signal in the prior art.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a high-sensitivity and large-dynamic anti-interference low-frequency receiving device, which comprises a tuning amplification module, a frequency conversion amplification module, a signal processing module and a main control module, wherein the tuning amplification module, the frequency conversion amplification module, the signal processing module and the main control module are sequentially connected;
the tuning amplification module is used for denoising and amplifying the low-frequency electromagnetic input signal in response to the first control signal of the main control module to obtain a low-frequency electromagnetic transition signal;
the frequency conversion amplifying module is used for responding to the second control signal of the main control module, carrying out narrowband filtering processing and differential amplifying processing on the low-frequency electromagnetic transition signal after frequency conversion processing, and obtaining an intermediate-frequency electromagnetic signal;
the signal processing module is used for responding to a third control signal of the main control module to perform synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signal to obtain a target transmission signal;
The main control module is used for generating a first control signal, a second control signal and a third control signal and receiving a target transmission signal.
In one possible implementation, the first control signal comprises an attenuation control signal and a tuning control signal, and the tuning amplification module further comprises a passive filtering unit, a multi-stage pre-attenuator, a tuning circuit and a tuning amplifier, wherein the passive filtering unit, the multi-stage pre-attenuator, the tuning circuit and the tuning amplifier are connected in sequence;
The passive filtering unit is used for filtering interference signals out of a preset bandwidth range in the low-frequency electromagnetic input signals;
The multi-gear pre-attenuator is used for selecting an attenuation gear according to the attenuation control signal to attenuate the passively filtered low-frequency electromagnetic input signal;
the tuning circuit is used for performing tuning processing on the attenuated low-frequency electromagnetic input signal in a preset frequency range according to the tuning control signal;
The tuning amplifier is used for amplifying the tuned low-frequency electromagnetic input signal to obtain a low-frequency electromagnetic transition signal.
In one possible implementation, the tuning circuit includes a number of inductors in series and a number of capacitors in parallel.
In one possible implementation, the tuning amplifier further comprises a matching transformer, a low noise amplifier and a first effective value detection circuit, wherein the matching transformer, the low noise amplifier and the first effective value detection circuit are connected in sequence;
the matching transformer is used for amplifying the tuned low-frequency electromagnetic input signal according to a preset multiplying power;
The low-noise amplifier is used for carrying out low-noise amplification treatment on the low-frequency electromagnetic input signal amplified by the preset multiplying power to obtain a low-frequency electromagnetic transition signal;
The first effective value detection circuit is used for inputting the low-frequency electromagnetic transition signal to the main control module to judge whether the signal is saturated or not.
In one possible implementation manner, the frequency conversion amplifying module further comprises a mixing circuit, a first narrow-band crystal filter, a first automatic gain control circuit, a second narrow-band crystal filter, a second automatic gain control circuit, a differential amplifier and a second effective value detection circuit, wherein the mixing circuit, the first narrow-band crystal filter, the first automatic gain control circuit, the second narrow-band crystal filter, the second automatic gain control circuit, the differential amplifier and the second effective value detection circuit are sequentially connected;
The frequency mixing circuit is used for mixing the local oscillation signal sent by the signal processing module with the low-frequency electromagnetic transition signal to obtain a frequency mixing signal;
The first narrow-band crystal filter and the second narrow-band crystal filter are used for carrying out narrow-band filtering processing on the mixed signal;
the first automatic gain control circuit and the second automatic gain control circuit are used for adjusting the amplification gain to amplify the mixed signal;
The differential amplifier is used for carrying out differential amplification processing on the amplified mixed signal to obtain an intermediate frequency electromagnetic signal;
the second effective value detection circuit is used for inputting the intermediate frequency electromagnetic signal to the main control module to judge whether the signal is saturated or not.
In one possible implementation, the first automatic gain control circuit and the second automatic gain control circuit are also connected with the main control module, the first automatic gain control circuit transmits the first gain to the main control module, and the second automatic gain control circuit transmits the second gain to the main control module.
In one possible implementation, the signal processing module further comprises an analog-to-digital converter, a local oscillator generating unit, a digital signal processor and a field programmable gate array, wherein the analog-to-digital converter, the field programmable gate array, the digital signal processor and the local oscillator generating unit are sequentially connected;
The analog-to-digital converter is used for converting the intermediate frequency electromagnetic signals into intermediate frequency digital signals according to a preset clock signal and sending the intermediate frequency digital signals to the field programmable gate array;
the field programmable gate array is used for performing down-conversion processing on the intermediate frequency digital signal, converting the intermediate frequency digital signal into a baseband signal, performing digital filtering on the baseband signal, transmitting the baseband signal to the digital signal processor, and performing decoding processing on the baseband signal demodulated by the digital signal processor to obtain a target transmission signal;
the digital signal processor is used for synchronizing and demodulating the filtered baseband signals and transmitting the signals to the field programmable gate array;
the local oscillation generating unit is used for generating local oscillation signals.
In one possible implementation, the signal processing module further comprises a crystal oscillator, wherein the crystal oscillator is connected with the analog-to-digital converter, and the crystal oscillator is used for generating a preset clock signal according to an external clock signal.
In one possible implementation, the signal processing module includes a static random access memory and a dynamic random access memory, the static random access memory storing data and programs in the field programmable gate array and the digital signal processor by being connected to the field programmable gate array and the digital signal processor, and the dynamic random access memory storing data and programs in the field programmable gate array and the digital signal processor by being connected to the field programmable gate array and the digital signal processor.
In one possible implementation, the main control module comprises a central processing unit, wherein the central processing unit is used for generating various control signals and controlling the tuning amplification module, the variable frequency amplification module and the signal processing module through an I/O bus.
In general, the above technical solutions conceived by the present invention, compared with the prior art, enable the following beneficial effects to be obtained:
According to the high-sensitivity large-dynamic anti-interference low-frequency receiving device provided by the invention, the tuning amplification module can respond to the control signal of the main control module to perform denoising and amplification treatment on the low-frequency electromagnetic input signal, so that noise components in the signal can be effectively removed, the strength of the signal is enhanced, and high-quality input is provided for subsequent signal processing. The frequency conversion amplifying module carries out narrowband filtering treatment and differential amplifying treatment after carrying out frequency conversion treatment on the low-frequency electromagnetic transition signal to obtain an intermediate-frequency electromagnetic signal, so that the signal frequency is converted to a frequency band which is more suitable for treatment, noise and interference are further removed through narrowband filtering, and the purity and stability of the signal are improved. The signal processing module performs synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signals to obtain target transmission signals, so that accurate receiving and analysis of the signals are ensured, and a reliable basis is provided for subsequent data processing and analysis. The modularized design is adopted, and the functional modules such as tuning amplification, variable frequency amplification, signal processing and main control are separated, so that each module can work independently, is not affected mutually, and is convenient to maintain.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
The terms first, second, third and the like in the description and in the claims and in the above drawings, are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a high-sensitivity and large-dynamic anti-interference low-frequency receiving device provided by the present invention, in a specific embodiment of the present invention, a high-sensitivity and large-dynamic anti-interference low-frequency receiving device is disclosed, which includes a tuning amplification module 100, a frequency conversion amplification module 200, a signal processing module 300 and a main control module 400, wherein the tuning amplification module 100, the frequency conversion amplification module 200, the signal processing module 300 and the main control module 400 are sequentially connected;
the tuning amplification module 100 is configured to perform denoising and amplification processing on the low-frequency electromagnetic input signal in response to the first control signal of the main control module 400, so as to obtain a low-frequency electromagnetic transition signal;
the frequency conversion amplifying module 200 is configured to respond to the second control signal of the main control module 400, and perform narrowband filtering and differential amplifying after performing frequency conversion processing on the low-frequency electromagnetic transition signal, so as to obtain an intermediate-frequency electromagnetic signal;
the signal processing module 300 is configured to perform synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signal in response to the third control signal of the main control module 400, so as to obtain a target transmission signal;
The main control module 400 is configured to generate a first control signal, a second control signal, and a third control signal, and receive a target transmission signal.
In the above embodiment, the tuning amplifying module 100 is that after the device receives the first control signal sent by the main control module 400, the tuning amplifying module 100 can quickly respond to perform accurate denoising and amplifying treatment on the low-frequency electromagnetic input signal, so that not only interference components in the signal, such as background noise and electromagnetic interference, are effectively eliminated, but also the amplitude of the signal is obviously enhanced, and a clear and strong low-frequency electromagnetic transition signal is provided for subsequent signal processing.
The frequency conversion amplifying module 200 is responsible for performing frequency conversion processing on the low-frequency electromagnetic transition signal output by the tuning amplifying module 100, and after receiving the second control signal of the main control module 400, the frequency conversion amplifying module 200 starts the frequency conversion function thereof to convert the frequency of the signal to a frequency band more suitable for subsequent processing. The narrowband filter within the module then performs further filtering of the converted signal to remove any residual noise and interference. The differential amplifying circuit ensures the stability and anti-interference capability of the signal in the transmission process, and finally outputs clear and stable intermediate frequency electromagnetic signals.
After receiving the third control signal of the main control module 400, the signal processing module 300 performs synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signal. The synchronization process ensures the timing accuracy of the signal, the demodulation process is responsible for extracting useful information from the signal, and the decoding process converts the information into a readable format, and finally the target transmission signal is obtained. This process requires not only high accuracy and efficiency, but also powerful algorithm support to ensure accurate reception and resolution of the signal.
The main control module 400 is responsible for generating and sending control signals to each module and receiving target transmission signals output by the signal processing module 300, and the main control module 400 can monitor the working state of the whole receiving device in real time through a built-in processor and a control system and adjust parameters of the control signals according to requirements so as to ensure stable operation and optimal performance of the whole system. In addition, the main control module 400 also has fault diagnosis and self-protection functions, and can take measures in time when an abnormality is detected, so that the whole receiving device is protected from damage.
In a specific embodiment of the present invention, the minimum gain of the present invention is 16dB, the maximum gain is 142dB, and the 10nV signal can be amplified to 100mV. The input noise of the invention is not more than 1.3nV/Hz1/2. The bandwidths of the first narrow-band crystal filter and the second narrow-band crystal filter are 480H,400Hz bandwidth communication signals can smoothly pass through, out-of-band signals deviating from 600Hz signals of the working frequency are filtered, the tuning amplification filter has no inhibition capability on the signals deviating from 600Hz of the working frequency, the tuning amplification filter is used for inhibiting far-end interference of the working frequency, and the problem that the narrow-band crystal filter has insufficient inhibition at the far end of the working frequency is solved.
Compared with the prior art, the high-sensitivity large-dynamic anti-interference low-frequency receiving device provided by the embodiment can respond to the control signal of the main control module 400 through the tuning amplification module 100 to perform denoising and amplification treatment on the low-frequency electromagnetic input signal, so that noise components in the signal can be effectively removed, the strength of the signal is enhanced, and high-quality input is provided for subsequent signal processing. The frequency conversion amplifying module 200 carries out narrowband filtering processing and differential amplifying processing after carrying out frequency conversion processing on the low-frequency electromagnetic transition signal to obtain an intermediate-frequency electromagnetic signal, so that the signal frequency is converted to a frequency band which is more suitable for processing, noise and interference are further removed through narrowband filtering, and the purity and stability of the signal are improved. The signal processing module 300 performs synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signals to obtain target transmission signals, ensures accurate receiving and analysis of the signals, and provides a reliable basis for subsequent data processing and analysis. The modularized design is adopted, and the functional modules such as tuning amplification, variable frequency amplification, signal processing and main control are separated, so that each module can work independently, is not affected mutually, and is convenient to maintain.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an embodiment of a tuning amplifying module provided by the present invention, in some embodiments of the present invention, a first control signal includes an attenuation control signal and a tuning control signal, the tuning amplifying module 100 further includes a passive filtering unit 110, a multi-stage pre-attenuator 120, a tuning circuit 130 and a tuning amplifier 140, wherein the passive filtering unit 110, the multi-stage pre-attenuator 120, the tuning circuit 130 and the tuning amplifier 140 are sequentially connected;
the passive filtering unit 110 is configured to filter interference signals outside a preset bandwidth range in the low-frequency electromagnetic input signal;
The multi-gear pre-attenuator 120 is used for selecting an attenuation gear according to the attenuation control signal to attenuate the passively filtered low-frequency electromagnetic input signal;
the tuning circuit 130 is configured to perform tuning processing on the attenuated low-frequency electromagnetic input signal in the preset frequency range according to the tuning control signal;
The tuned amplifier 140 is configured to amplify the tuned low-frequency electromagnetic input signal to obtain a low-frequency electromagnetic transition signal.
In the above embodiment, the tuning amplification module 100 may include a plurality of subunits, such as the passive filtering unit 110, the multi-stage pre-attenuator 120, the tuning circuit 130, and the tuning amplifier 140, inside, which achieve accurate preprocessing of the low-frequency electromagnetic input signal through fine connection and matching.
The passive filtering unit 110 is responsible for filtering out interference signals outside a preset bandwidth range in the low-frequency electromagnetic input signal, wherein the interference signals may be from environmental noise, electromagnetic interference and the like, and the quality and stability of the signals are seriously affected. The passive filter unit 110 can effectively remove the interference components through the filter circuit inside the passive filter unit, and provides a clear and pure signal source for subsequent signal processing.
The multi-stage pre-attenuator 120 is responsible for selecting a suitable attenuation stage to attenuate the passively filtered low-frequency electromagnetic input signal according to the attenuation control signal sent by the main control module 400, so as to adjust the amplitude of the signal, so that the signal can adapt to the processing requirements of the subsequent tuning circuit 130 and the tuning amplifier 140. The multi-stage pre-attenuator 120 provides a plurality of attenuation stages that can be selected based on the strength of the signal to ensure that the signal is neither too large in amplitude to damage the circuit nor too small in amplitude to detect during processing.
The tuning circuit 130 is a core part of the tuning amplifying module 100, and is responsible for performing tuning processing on the attenuated low-frequency electromagnetic input signal in a preset frequency range according to a tuning control signal sent by the main control module 400. The tuning circuit 130 can change the frequency characteristic of the signal by adjusting the parameters of the inductance, capacitance and other elements in the tuning circuit, so that the frequency characteristic is matched with the processing requirements of the subsequent circuit, and the stability and the accuracy of the signal in the transmission and processing processes are ensured.
The tuned amplifier 140 is responsible for amplifying the tuned low-frequency electromagnetic input signal to obtain a low-frequency electromagnetic transition signal, and the tuned amplifier 140 can remarkably enhance the amplitude of the signal through an amplification circuit in the tuned amplifier, so that sufficient signal strength is provided for subsequent signal processing. Meanwhile, the tuning amplifier 140 has good linearity and stability, and can ensure that signals cannot be distorted or deformed in the amplifying process.
In a specific embodiment of the invention, the passive filtering bandwidth is 10kHz-100kHz, and consists of a 10kHz high-pass filter and a 100kHz low-pass filter, and mainly filters out industrial interference below 10kHz and radio interference above 100 kHz.
The multi-gear pre-attenuator 120 is composed of 0dB, 10dB, 20dB attenuators and switching relays, can form four-gear attenuation values of 0dB, 10dB, 20dB and 30dB under the control of the main control module 400, and has the main function of providing attenuation under the condition of strong signals and preventing pre-amplification and subsequent amplification from being saturated. The pre-amplification 40dB amplification gain reduces the noise floor requirements of the variable frequency amplification module 200.
Referring to fig. 3, fig. 3 is a circuit schematic of an embodiment of a tuning circuit provided by the present invention, and in some embodiments of the present invention, the tuning circuit 130 includes a plurality of inductors connected in series and a plurality of capacitors connected in parallel.
In the above embodiment, the tuning circuit 130 is composed of a tuning inductor divided into n-th order and a tuning capacitor divided into m-th order, the tuning inductor and the tuning capacitor are in series LC tuning, different tuning frequencies are formed by selecting an untuned inductor and a tuning capacitor to cover 10kHz-100kHz, for a frequency of 10kHz-100kHz, the tuning frequency is divided into 5 segments, so that the tuning inductor is divided into 5 steps, the n-th value of the tuning inductor is taken to be 5, the span of each step is not more than 1.6 times, the 5 steps of tuning frequency ranges are respectively 10kHz-16kHz, 16kHz-25kHz,25kHz-40kHz, 40kHz-64kHz and 64kHz-102, the Q value of the tuning circuit 130 is about 6, the tuning bandwidth is about 1.5kHz at the lowest frequency, the tuning bandwidth of the highest frequency of 100kHz is about 15kHz, the out-of-band interference is primarily filtered, the tuning amplification filter has no substantial suppression capability on the deviation from the 600Hz of the working frequency, the problem of suppressing the far-end interference of the working frequency is overcome, and the narrow-band crystal filter has insufficient suppression at the far end of the working frequency.
The stepped capacitor is a 2-system capacitor, when m is 8, the parallel capacitance values of the basic capacitor C0 are 8 types of C, 2C, 4C, 8C, 16C, 32C, 64C, 128C and the like, 256 capacitance values can be formed according to binary combination, so that the frequency range of each step of tuning can be subdivided into 256 types under the stepped tuning capacitor, and the frequency of 5 steps of tuning is totally 256 times 5, and is totally 1280 tuning frequency points. The highest frequency band tuning frequency is about 125Hz apart, the lowest tuning frequency band tuning frequency is about 25Hz apart, the smallest tuning step is about 1/80 of the tuning bandwidth, and the tuning steps are fine enough.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of a tuning amplifier provided by the present invention, in some embodiments of the present invention, the tuning amplifier 140 further includes a matching transformer 141, a low noise amplifier 142, and a first effective value detection circuit 143, wherein the matching transformer 141, the low noise amplifier 142, and the first effective value detection circuit 143 are sequentially connected;
the matching transformer 141 is used for amplifying the tuned low-frequency electromagnetic input signal according to a preset multiplying power;
the low-noise amplifier 142 is configured to perform low-noise amplification on the low-frequency electromagnetic input signal after the amplification of the preset multiplying power, so as to obtain a low-frequency electromagnetic transition signal;
The first effective value detection circuit 143 is configured to input a low-frequency electromagnetic transition signal to the main control module 400 to determine whether the signal is saturated.
In the above embodiment, the tuning amplifier 140 is composed of the matching transformer 141, the two-stage low noise amplifier 142, the effective value detection circuit, and the like, the gain of the tuning amplifier 140 is 40dB, the transformation ratio of the matching transformer 141 is 2-3, the output signal of the tuning circuit 130 is amplified by 2-3 times, and the noise floor requirement of the tuning amplifier 140 is reduced. The low noise amplifier 142 is designed by adopting an OPA2211 low noise amplifier 142, 1.1nV/Hz1/2 input noise is provided at 1kHz-100kHz, and the input ends are connected with diodes D1 and D2 in parallel, so that a bleeder circuit is provided for a large signal, and the OPA2211 low noise amplifier 142 is prevented from being damaged. The effective value detection circuit outputs the tuned amplifier 140 to the main control module 400 for judging whether the signal is saturated, and when the tuned amplifier 140 is saturated, the main control module 400 controls the controllable pre-attenuation to increase the attenuation until the tuned amplifier 140 is unsaturated.
OPA2211 low noise amplifier 142 index:
1) Noise voltage 1.1nV/Hz1/2 (1 kHz-100 kHz);
2) Noise current 1.7pA/Hz1/2 (1 kHz-100 kHz);
3) Gain bandwidth 80MHz;
4) Input impedance is 20kΩ (differential), 1gΩ (common mode).
Referring to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of a variable frequency amplifying module provided by the present invention, in some embodiments of the present invention, the variable frequency amplifying module 200 further includes a mixing circuit 210, a first narrowband crystal filter 220, a first automatic gain control circuit 230, a second narrowband crystal filter 240, a second automatic gain control circuit 250, a differential amplifier 260, and a second effective value detection circuit 270, wherein the mixing circuit 210, the first narrowband crystal filter 220, the first automatic gain control circuit 230, the second narrowband crystal filter 240, the second automatic gain control circuit 250, the differential amplifier 260, and the second effective value detection circuit 270 are sequentially connected, the mixing circuit 210 is further connected with the signal processing module 300, and the second effective value detection circuit 270 is further connected with the master control module 400;
The mixing circuit 210 is configured to mix the local oscillation signal sent by the signal processing module 300 with the low-frequency electromagnetic transition signal to obtain a mixed signal;
The first narrowband crystal filter 220 and the second narrowband crystal filter 240 are used for narrowband filtering the mixed signal;
the first automatic gain control circuit 230 and the second automatic gain control circuit 250 are used for adjusting the amplification gain to amplify the mixed signal;
the differential amplifier 260 is configured to perform differential amplification processing on the amplified mixed signal to obtain an intermediate frequency electromagnetic signal;
the second effective value detection circuit 270 is configured to input the intermediate frequency electromagnetic signal to the main control module 400 to determine whether the signal is saturated.
In the above embodiment, the mixing circuit 210 is responsible for mixing the local oscillation signal sent by the signal processing module 300 with the low-frequency electromagnetic transition signal output by the tuning amplifying module 100, so as to convert the frequency of the low-frequency electromagnetic transition signal into a frequency band more suitable for subsequent processing, i.e. an intermediate frequency band. The mixing circuit 210 performs frequency conversion of a signal by a nonlinear element such as a diode or a transistor inside thereof, and outputs a mixed signal including a desired intermediate frequency signal.
The first narrowband crystal filter 220 and the second narrowband crystal filter 240 are responsible for narrowband filtering processing on the mixed signal, and the two filters can selectively pass signals in a specific frequency range through the crystal resonator inside the filters, and inhibit signals of other frequencies, so that interference components in the mixed signal are further removed, and the purity and stability of the signals are improved. Meanwhile, the first and second narrowband crystal filters 220 and 240 may be cascaded as needed to provide deeper filtering effects and narrower bandwidths.
The first automatic gain control circuit 230 and the second automatic gain control circuit 250 are used for adjusting the amplification gain to amplify the mixed signal, and the two automatic gain control circuits monitor the amplitude of the input signal in real time and adjust the gain of the amplifier according to the requirement, so as to ensure that the amplitude of the output signal is kept within a certain range, thereby not only avoiding the damage of the circuit caused by the overlarge amplitude of the signal, but also ensuring the stability and accuracy of the signal in the subsequent processing process.
The differential amplifier 260 is responsible for carrying out differential amplification processing on the amplified mixed signals to obtain intermediate frequency electromagnetic signals, and the differential amplifier 260 can remarkably improve the anti-interference capability and stability of the signals through an internal differential amplification circuit thereof, thereby providing a clearer and more stable signal source for subsequent signal processing.
The second effective value detection circuit 270 is configured to input the intermediate frequency electromagnetic signal to the main control module 400 to determine whether the signal is saturated, by monitoring the amplitude of the intermediate frequency electromagnetic signal in real time, when the signal amplitude exceeds a certain threshold value, the second effective value detection circuit 270 sends a saturated signal to the main control module 400, and prompts the system to take corresponding protection measures to avoid circuit damage or performance degradation caused by signal saturation.
In a specific embodiment of the present invention, the second narrow band crystal filter 240 is interposed between the first automatic gain control circuit 230 and the second automatic gain control circuit 250 to provide a total of 96dB amplification gain, so that the first automatic gain control circuit 230 and the second automatic gain control circuit 25096dB gain are divided into two separate 48dB gains, and the amplification is stable and free-running.
The mixer circuit 210 mixes the input signal of the tuning amplification module 100 with the local oscillator Lo, filters out-of-band interference through the narrow-band crystal filter 1 and the narrow-band crystal filter 2, and extracts the 198kHz intermediate frequency signal IF. The 198kHz intermediate frequency is selected mainly by comprehensively considering the bandwidth and the size of a narrow-band crystal filter, and is 60mm (length) by 30mm (width) by 26mm (height).
The mixer circuit 210 is designed to use an active double balanced mixer, the working frequency is 10kHz to 100kHz, the dynamic range is large, the mixing distortion is small (even harmonic of the signal is counteracted, especially the second harmonic, so the interference of the output combination frequency is greatly reduced). Meanwhile, the impedance of the active mixing circuit 210 is easy to match, and each port has high isolation.
The 3dB bandwidths of the first narrow-band crystal filter 220 and the second narrow-band crystal filter 240 are 480Hz, and the 3dB bandwidths of the first narrow-band crystal filter 220 and the second narrow-band crystal filter 240 after cascading are 400Hz. Each narrow-band crystal filter has a suppression capability of 30dB away from 600Hz, and the cascade of two narrow-band crystal filters has a suppression capability of more than 60dB for signals away from the center frequency of 600Hz, and the steepness system of the narrow-band filter is not more than 3, so that out-of-band interference can be suppressed under the condition of strong electromagnetic interference, and communication signals can be effectively received.
The main technical indexes of the narrow-band crystal filter are as follows:
1) Center frequency: 198kHz;
2) 3dB passband bandwidth 480Hz;
3) 30dB stop band bandwidth +/600 Hz;
4) Insertion loss of 3dB;
5) Input/output impedance 1kΩ.
The first automatic gain control circuit 230 and the second automatic gain control circuit 250 are low-noise dual-channel variable gain amplifiers by adopting AD604, the dual channels have 0-48dB automatic adjustable gains, the differential amplification has 6dB gains, and the first automatic gain control circuit 230, the second automatic gain control circuit 250 and the differential amplification have 6dB-102dB adjustable gains.
The differential output increases the single-ended output of the second automatic gain control circuit 250 to a differential output, thereby increasing the anti-interference capability of the signal processing module 300. The effective value detection converts the ac signal output by the second automatic gain control circuit 250 into a dc signal, and the dc signal is used by the main control module 400AD for sampling to determine the output amplitude of the variable frequency amplifying module 200.
The AD604 dual-channel variable gain amplifier mainly comprises the following indexes:
1) Voltage noise is 0.8nV/Hz1/2;
2) Current noise 3.0PA/Hz1/2;
3) Gain range 0-48dB (per channel);
4) The bandwidth is 40MHz;
5) Input impedance 300kΩ.
In some embodiments of the present invention, the first automatic gain control circuit 230 and the second automatic gain control circuit 250 are further connected to the main control module 400, the first automatic gain control circuit 230 transmits the first gain to the main control module 400, and the second automatic gain control circuit 250 transmits the second gain to the main control module 400.
In the above embodiment, after the first automatic gain control circuit 230 completes the preliminary amplification of the mixed signal, the current gain value (first gain) is transmitted to the main control module 400, and the main control module 400 can know the gain condition of the mixed signal after the first-stage amplification by receiving and processing the information, so as to fine tune or optimize the gain of the whole system according to the requirement.
Similarly, after the second automatic gain control circuit 250 finishes further amplifying the signal, the current gain value (second gain) is also transmitted to the main control module 400, which not only provides the gain information of the mixed signal after the second-stage amplifying, but also provides the main control module 400 with overall monitoring of the gain state of the whole system.
Through the real-time monitoring and recording of the gain values of the two automatic gain control circuits, the main control module 400 can control the gain state of the whole receiving device more accurately, so that stability and accuracy of signals in the processing process are ensured, reliability and stability of the system are improved, and a clearer and stable signal source is provided for subsequent signal processing.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an embodiment of a signal processing module according to the present invention, in some embodiments of the present invention, the signal processing module 300 further includes an analog-to-digital converter 310, a local oscillator generating unit 320, a digital signal processor 330 and a field programmable gate array 340, where the analog-to-digital converter 310, the field programmable gate array 340, the digital signal processor 330 and the local oscillator generating unit 320 are sequentially connected;
the analog-to-digital converter 310 is configured to convert the intermediate frequency electromagnetic signal into an intermediate frequency digital signal according to a preset clock signal, and send the intermediate frequency digital signal to the field programmable gate array 340;
The field programmable gate array 340 is configured to perform down-conversion processing on the intermediate frequency digital signal, convert the intermediate frequency digital signal into a baseband signal, digitally filter the baseband signal, transmit the baseband signal to the digital signal processor 330, and perform decoding processing on the baseband signal demodulated by the digital signal processor 330 to obtain a target transmission signal;
the digital signal processor 330 is configured to synchronize, demodulate, and transmit the filtered baseband signal to the field programmable gate array 340;
The local oscillation generating unit 320 is configured to generate a local oscillation signal.
In the above embodiment, the analog-to-digital converter 310 (ADC) is responsible for converting the intermediate frequency electromagnetic signal output by the frequency conversion amplifying module 200 into a digital signal by sampling and quantizing the intermediate frequency electromagnetic signal according to a preset clock signal. The digital signal output by the analog-to-digital converter 310 has high accuracy and stability, providing a reliable basis for subsequent digital signal processing.
The field programmable gate array 340 (FPGA) is responsible for performing down-conversion processing on the intermediate frequency digital signal output by the analog-to-digital converter 310, and converting the intermediate frequency digital signal into a baseband signal, where the down-conversion processing is implemented by mixing the intermediate frequency digital signal with a local oscillator signal generated inside the FPGA, so as to obtain a baseband signal with a low frequency. The FPGA also has strong digital signal processing capability, and can carry out digital filtering on the baseband signal so as to remove noise and interference components and improve the purity and stability of the signal. The filtered baseband signal is transmitted to digital signal processor 330 for further synchronization and demodulation processing.
The digital signal processor 330 (DSP) is responsible for synchronizing and demodulating the filtered baseband signal transmitted from the FPGA, where the synchronization process is to ensure that the phase and frequency of the signal are consistent with those of the transmitting end, and the demodulation process is to restore the modulated information in the baseband signal to the original information data. And the demodulated baseband signal is retransmitted to the FPGA for decoding processing so as to obtain a final target transmission signal.
The local oscillator generating unit 320 (DDS) is responsible for generating a local oscillator signal, which is one of the key signals essential in the signal processing process, and is used for mixing with an input signal to realize frequency conversion of the signal. The local oscillation generating unit 320 can generate a stable and accurate local oscillation signal through an internal oscillation circuit and a frequency synthesis technology, and provides a reliable frequency reference for the whole signal processing module 300.
In a specific embodiment of the present invention, the signal processing module 300 is based on an open hardware architecture of dds+dsp+fpga, and is a main body for implementing functions of a complete machine, and is also a main carrier for waveform operation, and can provide digital intermediate frequency capability and baseband signal processing capability, and mainly complete functions of a waveform physical layer.
The ADC main chip selects the Hua micro AD7762,24 bit ADC, the sampling rate is 512kHz in the design, a small module is made by using a stamp hole form and welded on a signal processing bottom plate, so that the isolation between the digital and analog ground is convenient, and the control, clock and data of the ADC main chip are connected to the FPGA. The DDS selects AD9851 and 32-bit frequency control words for generating local oscillation Lo required by frequency conversion.
In some embodiments of the present invention, the signal processing module 300 further includes a crystal oscillator 350, the crystal oscillator 350 is connected to the analog-to-digital converter 310, and the crystal oscillator 350 is configured to generate a preset clock signal according to an external clock signal.
In the above embodiment, the crystal oscillator 350 is responsible for generating a preset clock signal according to an external clock signal, and this preset clock signal is the basis for sampling and quantization by the analog-to-digital converter 310, so as to ensure that the intermediate frequency electromagnetic signal can be accurately converted into a digital signal. The crystal oscillator 350 is capable of generating a stable and accurate clock signal through an internal crystal resonator, providing a reliable timing reference for the entire signal processing module 300.
In some embodiments of the present invention, the signal processing module 300 includes a static random access memory 360 and a dynamic random access memory, the static random access memory 360 stores data and programs in the field programmable gate array 340 and the digital signal processor 330 by being connected to the field programmable gate array 340 and the digital signal processor 330, and the dynamic random access memory 370 stores data and programs in the field programmable gate array 340 and the digital signal processor 330 by being connected to the field programmable gate array 340 and the digital signal processor 330.
In the above embodiment, the static random access memory 360 (SRAM) realizes the storage of data and programs in the two components through the connection with the field programmable gate array 340 (FPGA) and the digital signal processor 330 (DSP). SRAM has the characteristics of high-speed reading and writing and keeping data stable, and even after power failure, stored data is not lost (but attention is paid to long-term power failure or data protection is still considered under extreme conditions). This makes SRAM an ideal choice for storing critical data and programs required for FPGA and DSP operation, ensuring the stability and reliability of the signal processing module 300.
Dynamic random access memory 370 (DRAM) also serves as a memory component in signal processing module 300, and also enables the storage of data and programs in the two components through connections to the FPGA and DSP. DRAM, although losing data after power failure, has a large storage capacity and a relatively low cost, and is thus commonly used to store large amounts of temporary data and programs. In the signal processing process, the DRAM can be used as a data buffer area and a temporary storage space when a program is executed, so that the processing speed and the processing efficiency of the system are improved.
In some embodiments of the present invention, the main control module 400 includes a central processing unit, and the central processing unit is configured to generate various control signals and control the tuning amplification module 100, the frequency conversion amplification module 200, and the signal processing module 300 through the I/O bus.
In the above embodiment, the Central Processing Unit (CPU) can efficiently perform various complex calculation and control tasks through the built-in instruction set and operation unit, and in the high-sensitivity and large-dynamic anti-interference low-frequency receiving device, the CPU is not only responsible for receiving and processing signals or instructions from the outside, but also dynamically adjusts the working parameters and modes of each module according to the running state and requirements of the system.
The I/O bus is responsible for transmitting control signals generated by the CPU and data and information among the modules, has the characteristics of high speed, reliability and flexibility, and can ensure real-time communication and data exchange between the CPU and other modules. The CPU can precisely control the operating states of the tuning amplification module 100, the frequency conversion amplification module 200, and the signal processing module 300, such as adjusting gain, changing frequency, starting or stopping processing, etc., through the I/O bus.
In a specific embodiment of the present invention, the indexes of the master control module 400 are as follows:
1) A ZYNQ7020 processor is adopted;
2) On-board 1-chip 32GB EMMC;
3) Providing a 5-path 10M/100M/1000Mbps adaptive Ethernet interface;
4) Providing a 6-path RS232 interface and a 1-path RS422 interface;
5) Providing 40 paths of GPIO interfaces;
6) Providing a 2-path AD sampling interface and a 2-path DA interface;
7) A 3-way clock output interface is provided.
The main functions are as follows:
1) The tuning amplification module 100 is responsible for tuning amplification to perform effective value detection AD sampling, controls controllable front-end attenuation, and ensures that a tuning amplification output signal is unsaturated and is in a linear range;
2) The tuning amplification module 100 is responsible for tuning frequency control and controlling the signal processing module 300 to generate a proper local oscillation signal;
3) AD sampling is carried out on effective value detection of the variable frequency amplifying module 200, the controllable attenuation value of the tuning amplifying module 100 is adjusted according to the gain of the variable frequency amplifying module and the AD sampling, and the gain of the whole machine is controlled to enable the tuning amplifying module 100 to be unsaturated;
4) And receiving information of the signal processing module 300 and performing information interaction with the outside through a network.
In summary, according to the high-sensitivity and large-dynamic anti-interference low-frequency receiving device provided by the invention, the tuning amplification module 100 can respond to the control signal of the main control module 400 to perform denoising and amplification processing on the low-frequency electromagnetic input signal, so that noise components in the signal can be effectively removed, the strength of the signal is enhanced, and high-quality input is provided for subsequent signal processing. The frequency conversion amplifying module 200 carries out narrowband filtering processing and differential amplifying processing after carrying out frequency conversion processing on the low-frequency electromagnetic transition signal to obtain an intermediate-frequency electromagnetic signal, so that the signal frequency is converted to a frequency band which is more suitable for processing, noise and interference are further removed through narrowband filtering, and the purity and stability of the signal are improved. The signal processing module 300 performs synchronization, demodulation and decoding processing on the intermediate frequency electromagnetic signals to obtain target transmission signals, ensures accurate receiving and analysis of the signals, and provides a reliable basis for subsequent data processing and analysis. The modularized design is adopted, and the functional modules such as tuning amplification, variable frequency amplification, signal processing and main control are separated, so that each module can work independently, is not affected mutually, and is convenient to maintain.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, such as the division of the units, merely a logical function division, and there may be additional manners of dividing the actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some service interface, device or unit indirect coupling or communication connection, electrical or otherwise.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable memory. Based on this understanding, the technical solution of the present application may be embodied essentially or partly in the form of a software product, or all or part of the technical solution, which is stored in a memory, and includes several instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like) to perform all or part of the steps of the method according to the embodiments of the present application. The Memory includes a U disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, etc. which can store the program codes.
Those of ordinary skill in the art will appreciate that all or part of the steps of the various methods of the above embodiments may be implemented by a program to instruct related hardware, where the program may be stored in a computer readable Memory, where the Memory may include a flash disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, etc.
The foregoing is merely exemplary embodiments of the present disclosure and is not intended to limit the scope of the present disclosure. That is, equivalent changes and modifications are contemplated by the teachings of this disclosure, which fall within the scope of the present disclosure. Embodiments of the present disclosure will be readily apparent to those skilled in the art from consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a scope and spirit of the disclosure being indicated by the claims.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
It will be readily appreciated by those skilled in the art that the foregoing description is merely a preferred embodiment of the invention and is not intended to limit the invention, but any modifications, equivalents, improvements or alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.