CN1185698C

Movatterモバイル変換

Info

Publication number: CN1185698C
Application number: CNB011432926A
Authority: CN
Inventors: 樱井和德
Original assignee: Seiko Epson Corp
Current assignee: Seiko Epson Corp
Priority date: 2000-12-26
Filing date: 2001-12-26
Publication date: 2005-01-19
Anticipated expiration: 2021-12-26
Also published as: US6846699B2; CN1362733A; US20020079594A1; JP2002198395A

Abstract

Translated fromChinese

提供可以用少数工序安装半导体芯片的半导体装置及其制造方法，电路板以及电子设备。一种半导体装置的制造方法，包括在布线24形成于基本衬底22所构成的布线衬底20上搭载半导体芯片10的工序，在熔化基本衬底22的同时压入半导体芯片10上设有的凸缘14，并使凸缘14与布线24形成电连接。

To provide a semiconductor device capable of mounting a semiconductor chip in a few steps, a manufacturing method thereof, a circuit board, and electronic equipment. A method of manufacturing a semiconductor device, including the step of mounting a semiconductor chip 10 on a wiring substrate 20 formed by forming a wiring 24 on a base substrate 22, and press-fitting the semiconductor chip 10 provided on the semiconductor chip 10 while melting the base substrate 22. The flange 14 is connected electrically to the wiring 24 .

Description

Translated fromChinese

半导体装置及其制造方法、电路板以及电子设备Semiconductor device, manufacturing method thereof, circuit board, and electronic equipment

技术领域technical field

本发明涉及半导体装置及其制造方法、电路板及电子设备。The present invention relates to a semiconductor device, a manufacturing method thereof, a circuit board, and electronic equipment.

现有技术current technology

作为CSP(Chip Scale/Size Package)型半导体装置的一种形态，公知的有在衬底上面朝下安装(倒装片连接)了的构造。As one form of a CSP (Chip Scale/Size Package) type semiconductor device, there is known a structure in which a substrate is mounted face down (flip-chip connection).

此种情况下，在半导体芯片和衬底之间作为底层充填材料多是预备树脂。树脂或是注入到安装后的半导体芯片与衬底之间，或是安装前预先涂布于衬底上。可是，单是准备树脂的过程就要浪费一个工序，所以会增加半导体装置的制造工序。In this case, a preliminary resin is often used as an underfill material between the semiconductor chip and the substrate. The resin is either injected between the mounted semiconductor chip and the substrate, or pre-coated on the substrate before mounting. However, one process is wasted just in the process of preparing the resin, which increases the manufacturing process of the semiconductor device.

另外，随着近年来多片组件的开发，在布线衬底的两面安装半导体芯片的形式被开发出来。可是，为此需要在衬底的两面形成布线，进而还需要导电通两面的布线用的导孔，所以在成本的增加和制造工序方面处于劣势。Also, with the development of multi-chip modules in recent years, a form in which semiconductor chips are mounted on both sides of a wiring substrate has been developed. However, it is necessary to form wirings on both sides of the substrate, and furthermore, via holes for conducting the wirings on both sides are required, so there are disadvantages in terms of cost increase and manufacturing steps.

本发明就是为了解决这一问题点而提出的，其目的在于提供由少的工序就可实装半导体芯片的半导体装置及其制造方法、电路板以及电子设备。The present invention was made to solve this problem, and an object of the present invention is to provide a semiconductor device, a manufacturing method thereof, a circuit board, and an electronic device in which a semiconductor chip can be mounted with a small number of steps.

发明内容Contents of the invention

(1)本发明所涉及的半导体装置的制造方法，包括在布线衬底上搭载半导体芯片的工序，此布线衬底是在基本衬底上形成布线而构成的，其中边熔化所述基本衬底边压入设置在所述半导体芯片上的凸缘，并使所述凸缘与所述布线电连接。(1) The method of manufacturing a semiconductor device according to the present invention includes the step of mounting a semiconductor chip on a wiring substrate formed by forming wiring on a base substrate, wherein the base substrate is melted The edge is pressed into a bump provided on the semiconductor chip, and the bump is electrically connected to the wiring.

根据本发明，可在熔化基本衬底的同时压入半导体芯片上设置的凸缘，并使凸缘与布线电连接。因此，例如在具有在基本衬底的一面形成了的布线的布线衬底上，可以简单地在其两面搭载半导体芯片。而且，例如，由于用熔化了的基本衬底材料可以对凸缘等形成密封，所以可以用少量的工序制造出可靠性高的半导体装置。According to the present invention, the bump provided on the semiconductor chip can be press-fitted while the base substrate is melted, and the bump can be electrically connected to the wiring. Therefore, for example, semiconductor chips can be easily mounted on both surfaces of a wiring substrate having wiring formed on one surface of the base substrate. Furthermore, for example, since the flange and the like can be sealed with the melted base substrate material, a highly reliable semiconductor device can be manufactured with a small number of steps.

(2)在此半导体装置的制造方法中，所述布线具有与所述凸缘的电连接部，在所述电连接工序中，可以熔化所述基本衬底而用其材料密封所述凸缘和所述连接部。(2) In the manufacturing method of this semiconductor device, the wiring has an electrical connection with the bump, and in the electrical connection step, the base substrate may be melted to seal the bump with its material. and the connection part.

据此，可以在一个工序中进行凸缘和布线的连接部的电连接，并对其进行密封。Accordingly, it is possible to perform electrical connection and sealing of the connection portion between the flange and the wiring in one step.

(3)在此半导体装置的制造方法中，可以在所述电连接工序中，熔化所述基本衬底而使其材料与所述半导体芯片的表面紧密结合。(3) In the method of manufacturing a semiconductor device, in the electrical connection step, the base substrate may be melted so that its material is closely bonded to the surface of the semiconductor chip.

据此，由于熔化了的基本衬底材料紧密结合在半导体芯片的表面上，所以可以吸收基本衬底对半导体芯片附加的应力。According to this, since the melted base substrate material is closely bonded to the surface of the semiconductor chip, the stress added by the base substrate to the semiconductor chip can be absorbed.

(4)在此半导体装置的制造方法中，可以在所述电连接工序中，对所述基本衬底加热使其熔化。(4) In this method of manufacturing a semiconductor device, in the electrical connection step, the base substrate may be heated and melted.

据此，例如可以用使凸缘与布线电连接用的热量熔化基本衬底，所以可以简单地熔化基本衬底。According to this, for example, the base substrate can be melted with the heat for electrically connecting the bump and the wiring, so that the base substrate can be easily melted.

(5)在此半导体装置的制造方法中，作为所述基本衬底可以使用热塑性树脂。(5) In this method of manufacturing a semiconductor device, a thermoplastic resin may be used as the base substrate.

据此，通过加热就容易进行再加工。Accordingly, reprocessing can be easily performed by heating.

(6)在此半导体装置的制造方法中，可以在所述电连接工序中，用夹具固定所述半导体芯片，并对所述夹具进行加热而使所述半导体芯片的至少是所述凸缘部位被加热，并通过向所述基本衬底压靠所述夹具将所述凸缘埋入所述基本衬底中。(6) In the manufacturing method of this semiconductor device, in the electrical connection step, the semiconductor chip may be fixed with a jig, and the jig may be heated so that at least the flange portion of the semiconductor chip is heated, and the flange is embedded in the base substrate by pressing the jig against the base substrate.

(7)在此半导体装置的制造方法中，还可以包括在所述布线衬底上搭载其他半导体芯片的工序。(7) The method of manufacturing a semiconductor device may further include a step of mounting another semiconductor chip on the wiring substrate.

(8)本发明所涉及的半导体装置可以通过所述制造方法来制造。(8) The semiconductor device according to the present invention can be manufactured by the above manufacturing method.

(9)本发明所涉及的半导体装置，含有(9) The semiconductor device according to the present invention, comprising

半导体芯片，具有电极，并在所述电极上形成凸缘；a semiconductor chip having electrodes on which bumps are formed;

布线衬底，搭载所述半导体芯片，并在基本衬底上形成具有与所述凸缘的电连接部的布线，a wiring substrate on which the semiconductor chip is mounted, and a wiring having an electrical connection with the bump is formed on the base substrate,

所述凸缘埋入所述基本衬底并与所述布线电连接，the bump is embedded in the base substrate and electrically connected to the wiring,

所述凸缘和所述连接部被所述基本衬底密封。The flange and the connection are sealed by the base substrate.

根据本发明，由基本衬底对凸缘和连接部形成密封，所以与布线衬底不同，不一定需要填充密封用树脂，因而可以减少装置的零件数量。另外，由于凸缘埋入在基本衬底中从而可以使半导体装置变得更薄。According to the present invention, since the flange and the connection portion are sealed by the base substrate, it is not necessarily necessary to fill the sealing resin unlike the wiring substrate, and the number of parts of the device can be reduced. In addition, since the bumps are buried in the base substrate, the semiconductor device can be made thinner.

(10)在此半导体装置中，可以使所述基本衬底与所述半导体芯片的面紧密结合。(10) In this semiconductor device, the base substrate can be closely bonded to the surface of the semiconductor chip.

据此，可以吸收基本衬底对所述半导体芯片产生的应力。According to this, the stress exerted by the base substrate on the semiconductor chip can be absorbed.

(11)在此半导体装置中，所述基本衬底可以是热塑性树脂。(11) In this semiconductor device, the base substrate may be a thermoplastic resin.

(12)在此半导体装置中，还可以含有搭载于所述布线衬底上的其他半导体芯片。(12) This semiconductor device may further include another semiconductor chip mounted on the wiring substrate.

(13)本发明所涉及的电路板搭载有所述半导体装置。(13) The circuit board according to the present invention mounts the above semiconductor device.

(14)本发明所涉及的电子设备具有所述半导体装置。(14) An electronic device according to the present invention includes the semiconductor device.

附图说明Description of drawings

图1A～图1C为应用了本发明的第1实施方式所涉及的半导体装置及其制造方法的示意图。1A to 1C are schematic diagrams of a semiconductor device and a manufacturing method thereof according to a first embodiment to which the present invention is applied.

图2为应用了本发明的第2实施方式所涉及的半导体装置的示意图。FIG. 2 is a schematic diagram of a semiconductor device according to a second embodiment to which the present invention is applied.

图3为应用了本发明的第2实施方式所涉及的半导体装置的制造方法示意图。3 is a schematic diagram of a method of manufacturing a semiconductor device according to a second embodiment to which the present invention is applied.

图4为应用了本发明的第3实施方式所涉及的半导体装置第1例的示意图。4 is a schematic diagram of a first example of a semiconductor device to which a third embodiment of the present invention is applied.

图5为应用了本发明的第3实施方式所涉及的半导体装置第2例的示意图。5 is a schematic diagram of a second example of a semiconductor device to which the third embodiment of the present invention is applied.

图7为应用了本发明的第3实施方式所涉及的半导体装置第3例的示意图。7 is a schematic diagram of a third example of a semiconductor device to which the third embodiment of the present invention is applied.

图8为应用了本发明的第3实施方式所涉及的半导体装置第4例的示意图。8 is a schematic diagram of a fourth example of a semiconductor device to which the third embodiment of the present invention is applied.

图9为搭载应用了本发明的实施方式所涉及的半导体装置的电路板的示意图。9 is a schematic diagram of a circuit board on which the semiconductor device according to the embodiment of the present invention is applied.

图10为具有应用了本发明的实施方式所涉及的半导体装置的电子设备的示意图。10 is a schematic diagram of an electronic device including a semiconductor device according to an embodiment of the present invention to which it is applied.

图11为具有应用了本发明的实施方式所涉及的半导体装置的电子设备的示意图。11 is a schematic diagram of an electronic device including a semiconductor device according to an embodiment of the present invention to which it is applied.

符号说明Symbol Description

10 半导体芯片10 semiconductor chips

12 电极12 electrodes

14 凸缘14 flange

20 布线衬底20 wiring substrate

22 基本衬底22 basic substrate

24 布线24 Wiring

26 连接部26 connection part

30 夹具30 Fixtures

实施方式Implementation

下面就本发明的最佳实施方式参照附图加以说明。但是，本发明并不局限于以下的实施方式。The best mode of the present invention will be described below with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

(第一实施方式)(first embodiment)

图1A～图1C为应用了本发明的第1实施方式所涉及的半导体装置的制造方法示意图。本实施方式使用半导体芯片10和布线衬底20。1A to 1C are schematic views of a method of manufacturing a semiconductor device according to a first embodiment to which the present invention is applied. This embodiment mode uses asemiconductor chip 10 and awiring substrate 20 .

半导体芯片10的形状可以是长方体(包含立方体)，也可以是球状。半导体芯片10具有多个电极12。电极12是在半导体芯片10上所形成的电路元件的外部电极，是用铝或铜等形成的既平又薄的嵌片。电极12多形成在半导体芯片10的任意一面上。电极12，可以形成在半导体芯片10的面上形成电路元件的工作区的内侧，也可以形成于其外侧。The shape of thesemiconductor chip 10 may be a rectangular parallelepiped (including a cube) or a spherical shape. Thesemiconductor chip 10 has a plurality ofelectrodes 12 . Theelectrodes 12 are external electrodes of circuit elements formed on thesemiconductor chip 10, and are flat and thin slugs formed of aluminum or copper. Theelectrodes 12 are often formed on either side of thesemiconductor chip 10 . Theelectrode 12 may be formed on the inside of the active region where the circuit element is formed on the surface of thesemiconductor chip 10, or may be formed on the outside thereof.

电极12可以形成在半导体芯片10的面的端部。电极12也可以形成于半导体芯片10的平行的两边或四边。避开电极12的至少一部分而在半导本芯片10上形成着钝化膜(图中未示)。钝化膜可以由例如SiO2、SiN、聚酰亚胺树脂等形成。Theelectrode 12 may be formed at the end of the face of thesemiconductor chip 10 . Theelectrodes 12 may also be formed on two parallel sides or four sides of thesemiconductor chip 10 . A passivation film (not shown) is formed on thesemiconductor chip 10 avoiding at least a part of theelectrode 12 . The passivation film may be formed of, for example, SiO2, SiN, polyimide resin, or the like.

各电极12上设置有凸缘14。凸缘14可以由金、镍、铜、银、锡等至少其中一种材料形成。凸缘14的表面可以电镀。凸缘14可以焊剂电镀。凸缘14的形状不特别限定，可以压成扁平状，可以形成突起，或者是球状也行。凸缘14的高度不特别限定。凸缘14可以通过电电镀或者化学电镀形成，也可以用焊丝熔化成球状而形成。附图示例中凸缘14是1段结构，也可以不同于此而是多段结构。Aflange 14 is provided on eachelectrode 12 . Theflange 14 may be formed of at least one of gold, nickel, copper, silver, tin and the like. The surface of theflange 14 may be electroplated. Theflange 14 may be flux plated. The shape of theflange 14 is not particularly limited, it can be pressed into a flat shape, a protrusion can be formed, or a spherical shape is also acceptable. The height of theflange 14 is not particularly limited. Theflange 14 can be formed by electroplating or electroless plating, and can also be formed by melting a welding wire into a spherical shape. In the example of the drawings, theflange 14 has a single-stage structure, but it may be a multi-stage structure other than this.

布线衬底20包括基本衬底和形成于基本衬底22上的复数布线24。复数布线24固定在基本衬底22上，例如可以形成于基本衬底22的某一面。布线衬底20可以是布线24依靠粘接剂(图中未示)形成在基本衬底22上构成三层衬底，也可以是布线24不用粘接剂直接形成在基本衬底22上构成二层衬底。Thewiring substrate 20 includes a base substrate and a plurality ofwirings 24 formed on thebase substrate 22 . The plurality ofwirings 24 are fixed on thebase substrate 22 , and may be formed on one side of thebase substrate 22 , for example. Thewiring substrate 20 may be that thewiring 24 is formed on thebase substrate 22 by means of an adhesive (not shown) to form a three-layer substrate, or thewiring 24 may be formed directly on thebase substrate 22 without an adhesive to form a two-layer substrate. layer substrate.

布线24是指至少实现两处的电连接的部分，独立形成的复数布线24可以称为布线图形。布线24可以是铜(Cu)、铬(Cr)、钛(Ti)、镍(Ni)、钛钨合金(Ti-W)的其中一种材料迭层或者单层形成。这时，布线24最好用焊剂、锡、金、镍等进行电镀。布线24可以通过蚀刻、电镀处理或者喷镀等形成。例如，可以通过加热和加压使铜箔贴在基本衬底22上，再通过光学蚀刻法形成铜图形，然后用锡或金等电镀而形成布线24。Thewiring 24 refers to a portion that realizes electrical connection at least two places, and the plurality ofwirings 24 formed independently can be called a wiring pattern. Thewiring 24 may be formed of one of copper (Cu), chromium (Cr), titanium (Ti), nickel (Ni), and titanium-tungsten alloy (Ti-W) laminated layers or a single layer. At this time, thewiring 24 is preferably plated with flux, tin, gold, nickel or the like. Thewiring 24 can be formed by etching, plating, thermal spraying, or the like. For example, copper foil can be attached to thebase substrate 22 by heating and pressing, a copper pattern can be formed by optical etching, and then thewiring 24 can be formed by electroplating with tin or gold.

布线24具有复数的连接部26。连接部26是用于与半导体芯片10进行电连接的布线24的一部分。连接部26与凸缘14形成电连接。连接部26可以是焊接区。连接部26可以用焊剂等电镀以形成良好的连接。Thewiring 24 has a plurality ofconnection portions 26 . Theconnection portion 26 is a part of thewiring 24 for electrically connecting to thesemiconductor chip 10 . The connectingportion 26 forms an electrical connection with theflange 14 . Theconnection portion 26 may be a solder pad. Theconnection portion 26 may be plated with flux or the like to make a good connection.

基本衬底22最好是以有机材料形成。基本衬底22最好以含有树脂的材料形成。基本衬底22也可以是热塑性树脂。依靠热塑性树脂，一旦加工成布线衬底20之后可以容易地进行再次加工。或者，基本衬底22也可以是热硬化性树脂。热硬化性树脂可以在半硬化状态时固定布线24，进行再次加工。Base substrate 22 is preferably formed of an organic material. Thebase substrate 22 is preferably formed of a material containing resin. Thebase substrate 22 may also be a thermoplastic resin. By virtue of the thermoplastic resin, reprocessing can be easily performed once processed into thewiring substrate 20 . Alternatively,base substrate 22 may also be a thermosetting resin. The thermosetting resin can fix thewiring 24 in a semi-cured state, and can be reprocessed.

基本衬底22也可以在树脂中含有导电粒子(图中未示)。基本衬底22还可以是各向异性导电薄膜(ACF)。凸缘14通过导电粒子与连接部26形成电连接。使用各向异性导电薄膜，导电粒子只在受挤压的方向上导通电流，其他方向上则不导通。因此，即使在各向异性导电薄膜上固定复数布线24，各布线24之间也不会形成电流导通。Thebase substrate 22 may also contain conductive particles (not shown) in the resin. Thebase substrate 22 may also be an anisotropic conductive film (ACF). Theflange 14 is electrically connected to the connectingportion 26 through conductive particles. Using anisotropic conductive film, the conductive particles conduct current only in the squeezed direction, but not in other directions. Therefore, even if a plurality ofwirings 24 are fixed on the anisotropic conductive film, current conduction is not established between the wirings 24 .

基本衬底22也可以使用液晶聚合物(LCP)。液晶聚合物在熔化时呈现液晶状态。与其他聚合物相比，其具有尺寸变化不易受温度和湿度影响的特征。Liquid crystal polymer (LCP) may also be used for thebase substrate 22 . Liquid crystal polymers assume a liquid crystal state when melted. Compared with other polymers, it has the characteristic that the dimensional change is less susceptible to temperature and humidity.

例如，布线衬底20可以采用在液晶聚合物薄膜BIAC(注册商标)上形成铜箔(布线24)的软铜箔迭层板。这样，其吸水率很低，即使在高湿度的环境下也可以保持其尺寸的高度稳定性。另外，其热膨胀系数被设定为与铜箔(布线24)大致相同的数值，所以不会由于温度变化而发生翘曲。For example, as thewiring substrate 20, a soft copper foil laminate in which copper foil (wiring 24) is formed on a liquid crystal polymer film BIAC (registered trademark) can be used. In this way, its water absorption rate is very low, and it can maintain its high dimensional stability even in an environment of high humidity. In addition, the coefficient of thermal expansion is set to approximately the same value as that of the copper foil (wiring 24 ), so warpage does not occur due to temperature changes.

如图1A所示，半导体芯片10与基本衬底20相对。如图所示，在使用一侧表面具有布线24的布线衬底20时，使布线衬底20的另一侧表面与半导体芯片10相对。半导体芯片10上形成电极12的面朝向布线衬底20。半导体芯片10采用所谓的面朝下安装。As shown in FIG. 1A , asemiconductor chip 10 is opposed to abase substrate 20 . As shown in the figure, when using thewiring substrate 20 having thewiring 24 on one side surface, the other side surface of thewiring substrate 20 is made to face thesemiconductor chip 10 . The surface of thesemiconductor chip 10 on which theelectrodes 12 are formed faces thewiring substrate 20 . Thesemiconductor chip 10 employs so-called face-down mounting.

半导体芯片10的各凸缘14与布线24的各连接部26对准位置。例如可使布线衬底20置于图中未示的平台上，用夹具30固定半导体芯片10对准位置。夹具30也可以吸附于半导体芯片10的形成了电极12的一侧相对的面上加以固定。本图示例中夹具30内部具有通过热源进行供热的加热器32。Eachbump 14 of thesemiconductor chip 10 is aligned with eachconnection portion 26 of thewiring 24 . For example, thewiring substrate 20 may be placed on a platform not shown in the figure, and thesemiconductor chip 10 may be fixed in alignment with thejig 30 . Thejig 30 may also be adsorbed and fixed on the surface of thesemiconductor chip 10 opposite to the side on which theelectrodes 12 are formed. In the example of this figure, thefixture 30 has aheater 32 inside which is supplied with heat by a heat source.

接下来，如图1B所示，在使基本衬底22熔化的同时将半导体芯片10的凸缘14压入到基本衬底22中。换言之，就是在将半导体芯片10的凸缘14压入基本衬底22的同时熔化基本衬底22。Next, as shown in FIG. 1B , thebump 14 of thesemiconductor chip 10 is pressed into thebase substrate 22 while thebase substrate 22 is melted. In other words, thebase substrate 22 is melted while pressing thebump 14 of thesemiconductor chip 10 into thebase substrate 22 .

熔化基本衬底22所施加的能量可以与基本衬底22发生熔化的机械特性相对应。该能量可以是放射线(包括可见光、紫外线、电子束、X射线等)和热能等。图中示例是依靠热能使基本衬底20熔化的，这时可以通过夹具30的加热器32加热基本衬底22使其熔化。加热器32至少要加热半导体芯片10的凸缘14。The energy applied to meltbase substrate 22 may correspond to the mechanical properties ofbase substrate 22 where melting occurs. The energy may be radiation (including visible light, ultraviolet rays, electron beams, X-rays, etc.), thermal energy, and the like. The example in the figure is to rely on thermal energy to melt thebasic substrate 20 , and at this time, thebasic substrate 22 can be heated by theheater 32 of theclamp 30 to make it melt. Theheater 32 heats at least thebump 14 of thesemiconductor chip 10 .

为了压入半导体芯片10的凸缘14，至少要使半导体芯片10或基本衬底22的其中一方向另一方进行挤压。例如，可以使夹具30压靠于半导体芯片10并向基本衬底22进行挤压。如使用夹具30，可以同时进行熔化基本衬底22和压入半导体芯片10的凸缘14。In order to press thebump 14 of thesemiconductor chip 10, at least one of thesemiconductor chip 10 or thebase substrate 22 is pressed against the other. For example, thejig 30 may be pressed against thesemiconductor chip 10 and pressed against thebase substrate 22 . If thejig 30 is used, the melting of thebase substrate 22 and the pressing in of thebump 14 of thesemiconductor chip 10 can be carried out simultaneously.

这样，如图1C所示，凸缘14被埋入到熔化的基本衬底22中并与布线24形成电连接。据此，与不熔化基本衬底22而机械性地将凸缘14压入到基本衬底22中相比，仅用较小的压力就可使凸缘14与布线24形成电连接。另外，由于熔化了基本衬底22，凸缘14可以推挤基本衬底22的熔化材料而更确实地抵达连接部26。Thus, as shown in FIG. 1C , thebump 14 is buried in themolten base substrate 22 and electrically connected to thewiring 24 . Accordingly, theflange 14 can be electrically connected to thewiring 24 with only a small pressure compared to mechanically pressing theflange 14 into thebase substrate 22 without melting thebase substrate 22 . In addition, since thebase substrate 22 is melted, theflange 14 can push the molten material of thebase substrate 22 to more reliably reach theconnection portion 26 .

凸缘14和连接部26可以被基本衬底密封。具体说就是基本衬底22的熔化材料紧密结合于凸缘14和连接部26的周围。基本衬底22的熔化材料在凸缘1 4与连接部26形成电连接时，在其周围的缝隙间流动以填满其缝隙。据此，可以防止电短路，也可提高装置的防潮性能。Flange 14 andconnection 26 may be sealed by the base substrate. Specifically, the molten material of thebase substrate 22 is tightly bonded around theflange 14 and theconnection portion 26 . The molten material of thebase substrate 22 flows between the gaps around theflange 14 to fill the gaps when theflange 14 is electrically connected to theconnection portion 26. Accordingly, electrical short circuit can be prevented, and the moisture-proof performance of the device can also be improved.

另外，半导体芯片10的面可以与基本衬底22紧密结合。也就是说，半导体芯片10可以被压入基本衬底22，基本衬底22的熔化材料与半导体芯片10的面紧密结合。本图示例中，基本衬底22紧密结合于半导体芯片10形成电极12的面。另外，半导体芯片10的一部分可以被埋入于基本衬底22中，也可以不埋入。In addition, the face of thesemiconductor chip 10 may be closely bonded to thebase substrate 22 . That is, thesemiconductor chip 10 can be pressed into thebase substrate 22 , the molten material of thebase substrate 22 tightly bonding with the face of thesemiconductor chip 10 . In the example shown in the figure, thebase substrate 22 is closely bonded to the surface of thesemiconductor chip 10 where theelectrodes 12 are formed. In addition, a part of thesemiconductor chip 10 may or may not be embedded in thebase substrate 22 .

据此，半导体芯片10和布线26之间能够形成被树指等的基本衬底22的材料紧密充填的状态。因此，集中于各凸缘14(或者是布线24的各连接部26)的应力能够通过基本衬底22被分散于半导体芯片10的整个面上。就是说半导体芯片10受到的应力可以被基本衬底22所吸收。Accordingly, the space between thesemiconductor chip 10 and thewiring 26 can be tightly filled with the material of thebase substrate 22 such as a tree finger. Therefore, the stress concentrated on each bump 14 (or eachconnection portion 26 of the wiring 24 ) can be dispersed over the entire surface of thesemiconductor chip 10 through thebase substrate 22 . That is to say, the stress experienced by thesemiconductor chip 10 can be absorbed by thebase substrate 22 .

另外，基本衬底22的厚度可以大于凸缘14从半导体芯片10具有电极12的面上所突出的厚度。据此，便于使半导体芯片10的一部分埋入基本衬底22中而使半导体芯片10与基本衬底22紧密结合。Furthermore, the thickness of thebase substrate 22 may be greater than the thickness of thebump 14 projecting from the side of thesemiconductor chip 10 having theelectrode 12 . According to this, it is convenient to embed a part of thesemiconductor chip 10 in thebase substrate 22 so that thesemiconductor chip 10 and thebase substrate 22 are closely bonded.

下面就本实施方式所涉及的半导体装置进行说明。不过，在以下说明中省略与制造方法中所作的说明内容相重复的记载。Next, the semiconductor device according to this embodiment will be described. However, descriptions that overlap with those described in the production method will be omitted in the following description.

如图1C所示，半导体装置中1包括具有复数电极12并在各电极12上形成凸缘14的半导体芯片10以及在基本衬底22上形成具有与凸缘14的电连接部26的复数布线24所构成的布线衬底20。本图示例中，基本衬底22的一面形成布线24。换言之，布线衬底20具有基本衬底22侧的面和布线24侧的面。As shown in FIG. 1C, a semiconductor device 1 includes asemiconductor chip 10 having a plurality ofelectrodes 12 and abump 14 formed on eachelectrode 12, and a plurality of wirings having anelectrical connection portion 26 with thebump 14 formed on abase substrate 22. 24 constitutes thewiring substrate 20. In the example of this figure, thewiring 24 is formed on one side of thebase substrate 22 . In other words, wiringsubstrate 20 has a surface on thebase substrate 22 side and a surface on thewiring 24 side.

本图示例中，半导体芯片10被搭载于布线衬底20的基本衬底22侧的面上。而且，凸缘14埋入于基本衬底22中与布线24形成电连接。凸缘14在位于与基本衬底22上具有半导体芯片10的面相反一侧面的位置与连接部26形成连接。也就是说，凸缘14贯穿基本衬底22。半导体芯片10以所谓的面朝下方式被安装于布线24上。In the illustrated example, thesemiconductor chip 10 is mounted on the surface of thewiring substrate 20 on thebase substrate 22 side. Furthermore, thebump 14 is embedded in thebase substrate 22 to be electrically connected to thewiring 24 . Theflange 14 is connected to theconnection portion 26 at a position on the side opposite to the side having thesemiconductor chip 10 on thebase substrate 22 . That is, theflange 14 penetrates through thebase substrate 22 . Thesemiconductor chip 10 is mounted on thewiring 24 in a so-called face-down manner.

凸缘14和连接部26被基本衬底22所密封。也就是说，基本衬底22的固化材料与二者紧密结合。另外，基本衬底22可以紧密结合于半导体芯片10具有电极12的面上。本图示例中，基本衬底22的面在半导体芯片10的外侧成为平面，但也可以不同于此使其覆盖半导体芯片10的端部的至少一部分而形成隆起。Theflange 14 and theconnection 26 are sealed by thebase substrate 22 . That is, the cured material of thebase substrate 22 is intimately bonded to both. In addition, thebasic substrate 22 can be closely bonded to the surface of thesemiconductor chip 10 having theelectrodes 12 . In the example of this figure, the surface of thebase substrate 22 is flat on the outside of thesemiconductor chip 10 , but instead of this, it may cover at least part of the end of thesemiconductor chip 10 to form a bump.

据此，凸缘14和连接部26被基本衬底22密封，所以与布线衬底20不同，不一定需要填充密封用的树脂，因而可以减少装置的零件数量。另外，由于凸缘14埋入在基本衬底22中，因而可以使半导体装置变得更薄。According to this, since theflange 14 and theconnection portion 26 are sealed by thebase substrate 22, unlike thewiring substrate 20, it is not necessarily necessary to fill the sealing resin, and the number of parts of the device can be reduced. In addition, since thebump 14 is buried in thebase substrate 22, the semiconductor device can be made thinner.

本实施方式所涉及的半导体装置的封装形式可以称之为BGA(BallGrid Array)或CSP(Chip Size/Scale Package)。并且，布线衬底20可以采用COF(Chip On Flex/Film)用板和COB(Chip On Board)用板。The packaging form of the semiconductor device according to this embodiment can be called BGA (Ball Grid Array) or CSP (Chip Size/Scale Package). Furthermore, as thewiring substrate 20, a board for COF (Chip On Flex/Film) or a board for COB (Chip On Board) can be used.

(第2实施方式)(second embodiment)

图2和图3是应用了本发明的第2实施方式所涉及的半导体装置的示意图。在本实施方式中对把所述半导体芯片的安装方式应用于多片组件形成所得到的半导体装置及其制造方法的一例进行说明。并且，在以下说明中可以尽可能地应用第一实施方式的说明内容。2 and 3 are schematic diagrams of a semiconductor device according to a second embodiment to which the present invention is applied. In this embodiment mode, an example of a semiconductor device obtained by applying the above semiconductor chip mounting method to multi-chip module formation and its manufacturing method will be described. In addition, in the following description, the content of the description of the first embodiment can be applied as much as possible.

半导体装置2包括第1个和第2个半导体芯片10、40以及布线衬底20。第1个半导体芯片10与已经说明过的内容相同，第2个半导体芯片40具有复数的电极42，各电极12上形成凸缘44。另外，本图示例中布线衬底20是在基本衬底22的一面形成布线24。Thesemiconductor device 2 includes first andsecond semiconductor chips 10 and 40 and awiring substrate 20 . Thefirst semiconductor chip 10 is the same as already described, and thesecond semiconductor chip 40 has a plurality ofelectrodes 42 , and bumps 44 are formed on therespective electrodes 12 . In addition, in thewiring substrate 20 in the example of the figure, thewiring 24 is formed on one side of thebase substrate 22 .

第2个半导体芯片40被面朝下安装于布线衬底20的布线24侧的面上。如图2所示，第2个半导体芯片40可以通过含有导电粒子52的各向异性导电材料50结合于布线衬底20上。这时，凸缘44通过导电粒子52与布线24形成电连接。Thesecond semiconductor chip 40 is mounted face down on the surface of thewiring substrate 20 on thewiring 24 side. As shown in FIG. 2 , thesecond semiconductor chip 40 can be bonded to thewiring substrate 20 through an anisotropicconductive material 50 containingconductive particles 52 . At this time, thebump 44 is electrically connected to thewiring 24 via theconductive particles 52 .

第2个半导体芯片40可以是与第1个半导体芯片相对应的镜像芯片。而且，各凸缘44可以连接于与第一个半导体芯片10的各凸缘14形成电连接的连接部26的位置。Thesecond semiconductor chip 40 may be a mirror image chip corresponding to the first semiconductor chip. Also, eachbump 44 may be connected to the position of theconnection portion 26 that is electrically connected to eachbump 14 of thefirst semiconductor chip 10 .

据此，例如当第1个和第2个半导体芯片10、40为存储器的时候，可以通过同一排列的外部端子(图中未示)在各自存储器的相同地址的存储单元上进行信息的读出和写入。另外，仅通过芯片选择端子的连接就可以分开第1个和第2个半导体芯片10、40，据此能够利用同一外部端子的排列分别控制至少两个(可以是多数)半导体芯片。Accordingly, for example, when the first and second semiconductor chips 10, 40 are memories, information can be read out on memory cells of the same address in the respective memories through external terminals (not shown) in the same arrangement. and write. In addition, the first and second semiconductor chips 10, 40 can be separated only by connecting the chip select terminals, and at least two (maybe a plurality of) semiconductor chips can be respectively controlled by the same arrangement of external terminals.

本实施方式所涉及的半导体装置中，第2个半导体芯片40可以搭载于布线24所形成的面，所以可以简单地在两面安装半导体芯片10，40。而且，由于第1个半导体芯片10的凸缘14埋入到基本衬底22中，所以可以使半导体装置2变得更薄。因此可以提供低成本的且是小型的多片组件。In the semiconductor device according to this embodiment, since thesecond semiconductor chip 40 can be mounted on the surface where thewiring 24 is formed, the semiconductor chips 10 and 40 can be easily mounted on both surfaces. Furthermore, since thebump 14 of thefirst semiconductor chip 10 is buried in thebase substrate 22, thesemiconductor device 2 can be made thinner. A low-cost and compact multi-chip module can thus be provided.

图3是本实施方式所涉及的半导体装置制造方法的示意图。第1个和第2个半导体芯片10，40可以分别搭载于布线衬底20上，也可以大致同时搭载。FIG. 3 is a schematic diagram of a method of manufacturing a semiconductor device according to this embodiment. The first and second semiconductor chips 10, 40 may be mounted separately on thewiring substrate 20, or may be mounted substantially simultaneously.

当第1个和第2个半导体芯片10，40在大致同是搭载时，可以从布线24的连接部26的两侧施加压力，所以不必对布线24施加格外的压力。而且，同时搭载可以减少搭载时间，因而可以提高生产效率。When the first andsecond semiconductor chips 10 and 40 are mounted on substantially the same side, pressure can be applied from both sides of theconnection portion 26 of thewiring 24 , so it is not necessary to apply extra pressure to thewiring 24 . Moreover, simultaneous loading can reduce the loading time, thereby improving production efficiency.

当第1个和第2个半导体芯片10，40分别搭载时，可以先搭载第1个半导体芯片10。这样可以在确认凸缘14与连接部26连接良好之后，搭载第2个半导体芯片40，从而可以减少连接不良的发生。When the first and second semiconductor chips 10, 40 are mounted separately, thefirst semiconductor chip 10 may be mounted first. In this way, thesecond semiconductor chip 40 can be mounted after confirming that theflange 14 and theconnection portion 26 are well connected, thereby reducing the occurrence of poor connection.

(第3实施方式)(third embodiment)

图4-图8为应用了本发明的第3实施方式所涉及的半导体装置的示意图。本实施方式中将说明把第1实施方式所阐述的半导体芯片的安装方式应用于多片组件形式所得到的半导体装置。并且，在以下说明中可以尽可能应用所述实施方式中的说明内容。4 to 8 are schematic diagrams of a semiconductor device according to a third embodiment to which the present invention is applied. In this embodiment mode, a description will be given of a semiconductor device obtained by applying the semiconductor chip mounting method described in the first embodiment mode to a multi-chip package format. In addition, in the following description, the description content in the said embodiment can be applied as much as possible.

(第1例)(1st case)

图4为本实施方式所涉及的半导体装置的第1例的示意图。半导体装置3包括第1个和第2个半导体芯片10，60以及布线衬底20。本第1例与第2实施方式的示例的区别在于第1个和第2个半导体芯片10，6(的外形互不相同。FIG. 4 is a schematic diagram of a first example of the semiconductor device according to the present embodiment. The semiconductor device 3 includes first and second semiconductor chips 10 , 60 and awiring substrate 20 . The difference between the first example and the example of the second embodiment lies in that the outer shapes of the first and second semiconductor chips 10, 6' are different from each other.

第2个半导体芯片60可以比第1个半导体芯片10的外形大也可以比其小。各电极62上的凸缘64在与第1个半导体芯片10的凸缘14所连接的连接部26不同的位置的连接部28与布线24形成电连接。The external shape of the second semiconductor chip 60 may be larger or smaller than that of thefirst semiconductor chip 10 . The bump 64 on each electrode 62 is electrically connected to thewiring 24 at a connection portion 28 at a position different from theconnection portion 26 to which thebump 14 of thefirst semiconductor chip 10 is connected.

本图示例中省略了布线衬底20的外部端子。外部端子连接于图中未示的电路部件(例如液晶面板和主插件板)。例如可以延伸布线衬底的一部分设法进行外部连接。也就是说，可以把固定在基本衬底22上的布线24的一部份作为插接件的引线。The external terminals of thewiring substrate 20 are omitted in the example of this figure. The external terminals are connected to circuit components not shown in the figure (for example, a liquid crystal panel and a motherboard). For example, a part of the wiring substrate can be extended for external connection. That is, a part of thewiring 24 fixed on thebase substrate 22 can be used as a lead of the connector.

(第2例)(case 2)

图5为本实施方式所涉及的半导体装置第2例的示意图。半导体装置4包括第1个和第2个半导体芯片10，70，第2个半导体芯片70以树脂76密封。FIG. 5 is a schematic diagram of a second example of the semiconductor device according to the present embodiment. The semiconductor device 4 includes first and second semiconductor chips 10 , 70 , and the second semiconductor chip 70 is sealed with a resin 76 .

第2个半导体芯片70面朝上安装于布线衬底20上。电极72通过导线74与连接部28相连接。树脂76可以采用使用模具制造的模压树脂。另外，本图示例中也省略了布线衬底20的外部端子。The second semiconductor chip 70 is mounted on thewiring substrate 20 face up. The electrode 72 is connected to the connection part 28 via a wire 74 . As the resin 76, a molding resin produced using a mold can be used. In addition, the external terminals of thewiring substrate 20 are also omitted in the example of the figure.

(第3例)(3rd case)

图6和图7为本实施方式所涉及的半导体装置第3例的示意图。半导体装置5包括第1个和第2个半导体芯片10，40以及布线衬底20。作为外部端子，在布线衬底20上设有复数的焊剂球80。6 and 7 are schematic diagrams of a third example of the semiconductor device according to this embodiment. The semiconductor device 5 includes first and second semiconductor chips 10 , 40 and awiring substrate 20 . A plurality of solder balls 80 are provided onwiring board 20 as external terminals.

布线衬底20具有搭载第1个和第2个半导体芯片10，40的区域和设置复数的焊剂球80的区域。因为各区域分别设置，所以在制造工序中可以控制对半导体芯片等施压的压力。各半导体芯片的搭载区域的大小可以与焊剂球80的搭载区域大致相同。这样可以使两区域重叠。Thewiring board 20 has a region where the first andsecond semiconductor chips 10 and 40 are mounted, and a region where a plurality of solder balls 80 are provided. Since each area is provided separately, the pressure applied to the semiconductor chip etc. can be controlled during the manufacturing process. The size of the mounting area of each semiconductor chip may be substantially the same as the mounting area of the solder ball 80 . This allows the two regions to overlap.

另外，相对于设置焊剂球80的一个区域，搭载半导体芯片的区域可以设为两个以上。搭载了半导体芯片的各区域可以从复数方向褶积，因而可以制造出平面面积与设置焊剂球80的区域面积大致相同的半导体装置。In addition, there may be two or more regions where semiconductor chips are mounted relative to one region where solder balls 80 are provided. Since each region on which the semiconductor chip is mounted can be convoluted from multiple directions, it is possible to manufacture a semiconductor device having a planar area substantially the same as that of the region where the solder balls 80 are provided.

焊剂球80可以如图所示突出于布线衬底20的基本衬底22侧，也可以突出于布线衬底20的布线22侧。突出于基本衬底22侧时，焊剂球80通过基本衬底22的贯穿孔23突出。贯穿孔23形成于与布线24相重的部分。焊剂球80可以将预先形成的焊剂置于布线24的一部分即焊接区25上通过回流工序形成。The solder balls 80 may protrude from thebase substrate 22 side of thewiring substrate 20 as shown in the figure, or may protrude from thewiring 22 side of thewiring substrate 20 . When protruding from thebase substrate 22 side, the solder balls 80 protrude through the through holes 23 of thebase substrate 22 . The through hole 23 is formed in a portion overlapping thewiring 24 . The solder balls 80 may be formed through a reflow process by placing preformed solder on the pads 25 , which are a part of thewires 24 .

或者不积极地设置焊剂球，可以通过在电路部件上涂布焊剂而结果性地形成焊剂球80。另外，在焊剂球80的设置区域也可以搭载半导体芯片(图中未示)。Alternatively, the solder balls 80 can be formed as a result by applying flux to the circuit component without actively providing the solder balls. In addition, a semiconductor chip (not shown) may be mounted on the area where the solder ball 80 is provided.

图7所示的半导体装置6是由半导体装置5弯曲而成的。具体说是将各半导体芯片10，40所搭载的区域与焊剂球80的设置区域重叠并使该焊剂球80向外侧突出。据此，可以提供小型且高密度的半导体装置。The semiconductor device 6 shown in FIG. 7 is formed by bending the semiconductor device 5 . Specifically, the area where the semiconductor chips 10 and 40 are mounted overlaps with the area where the solder balls 80 are installed so that the solder balls 80 protrude outward. Accordingly, a small and high-density semiconductor device can be provided.

(第4例)(Case 4)

图8为本实施方式所涉及的半导体装置第4例的示意图。半导体装置7的布线24的一部分形成弯曲部90而构成复数的外部端子。FIG. 8 is a schematic diagram of a fourth example of a semiconductor device according to this embodiment. A part of thewiring 24 of thesemiconductor device 7 forms a bent portion 90 to form a plurality of external terminals.

弯曲部90从基本衬底22的面突出。具体说是布线24在从基本衬底22突出方向的前端部位形成弯曲。基本衬底22上弯曲部90所在的位置可以形成贯穿孔92。这样，可以使具有凸状部位的夹具穿过贯穿孔92在布线24上形成凸状的弯曲部90。The bend 90 protrudes from the surface of thebase substrate 22 . Specifically, thewiring 24 is bent at the tip portion in the direction in which it protrudes from thebase substrate 22 . A through hole 92 may be formed at the position of the bent portion 90 on thebase substrate 22 . In this way, the convex bent portion 90 can be formed on thewiring 24 by passing the jig having a convex portion through the through hole 92 .

图8中，弯曲部90向布线衬底20的布线24侧突出，但也可以通过贯穿孔92向基本衬底22侧突出。由于利用布线24的一部分构成外部端子，所以可以减少半导体装置的零件数量。In FIG. 8 , bent portion 90 protrudes towardwiring 24 ofwiring substrate 20 , but may protrude towardbase substrate 22 through through hole 92 . Since the external terminals are constituted by a part of thewiring 24, the number of components of the semiconductor device can be reduced.

弯曲部90可以在布线24的一部分(例如焊接区)使中央部位突起而形成。此时弯曲部90的内侧可以充填导电膏等。由于外部端子是利用比焊剂硬的布线24(例如铜)形成的，从而可以提高装置的温度周期可靠性能。The bent portion 90 may be formed by protruding a central part of a part of the wiring 24 (for example, a land). At this time, the inner side of the curved portion 90 may be filled with conductive paste or the like. Since the external terminals are formed using wiring 24 (such as copper) that is harder than solder, the temperature cycle reliability performance of the device can be improved.

另外，本例可以应用到所述具有焊剂球80的所有的实施方式中以替换焊剂球80。In addition, this example can be applied to all the embodiments described with solder balls 80 instead of solder balls 80 .

根据所述多片组件的形式，由于第1个半导体芯片10搭载于布线衬底20的基本衬底22侧，所以在形成布线24侧可以以各种方式简单地安装其他半导体芯片(第2个半导体芯片60，70)。而且，由于半导体芯片10的凸缘14埋入在基本衬底22中而可以使半导体装置更趋小型化。其他效果如同在所述实施方式中所阐述的一样。According to the form of the multi-chip module, since thefirst semiconductor chip 10 is mounted on thebase substrate 22 side of thewiring substrate 20, other semiconductor chips (the second semiconductor chip 10) can be easily mounted in various ways on the side where thewiring 24 is formed. semiconductor chips 60, 70). Furthermore, since thebump 14 of thesemiconductor chip 10 is buried in thebase substrate 22, the semiconductor device can be further miniaturized. Other effects are the same as those described in the embodiment.

图9为应用了本发明的实施方式所涉及的电路板的示意图。如图9所示，所述的半导体装置与电路板形成电连接。电路板可以是液晶面板100。半导体装置1制成将带状半导体装置的基本衬底22按围绕复数布线24的轮廓切割成的形状。FIG. 9 is a schematic diagram of a circuit board to which the embodiment of the present invention is applied. As shown in FIG. 9, the semiconductor device is electrically connected to the circuit board. The circuit board may be theliquid crystal panel 100 . The semiconductor device 1 is made into a shape in which abase substrate 22 of a tape-shaped semiconductor device is cut out in an outline surrounding a plurality ofwirings 24 .

作为具有应用了本发明的半导体装置的电子设备，图10示出笔记本式个人电脑200。图11示出移动电话300。该移动电话300也具有应用了本发明的电路板(液晶面板100)。FIG. 10 shows a notebook type personal computer 200 as an electronic device including a semiconductor device to which the present invention is applied. FIG. 11 shows a mobile phone 300 . This mobile phone 300 also has a circuit board (liquid crystal panel 100 ) to which the present invention is applied.