Disclosure of Invention
Therefore, the invention provides a circuit board with an antenna structure and a manufacturing method thereof, which are beneficial to reducing signal interference.
The circuit board provided by at least one embodiment of the invention comprises a circuit substrate; the core substrate is positioned on the circuit substrate; the antenna lamination comprises an antenna layer, wherein the circuit substrate and the antenna lamination are respectively positioned at two opposite sides of the core substrate; and a sealed cavity located inside the antenna stack, wherein the antenna layer overlaps the sealed cavity.
In at least one embodiment of the present invention, the core substrate includes an insulating layer, and the circuit substrate and the antenna stack are respectively located at two opposite sides of the insulating layer; and a via hole in the insulating layer and extending from the antenna stack to the wiring substrate.
In at least one embodiment of the present invention, the antenna further comprises two protective layers respectively disposed on the circuit substrate and the antenna stack, wherein the circuit substrate, the antenna stack and the core substrate are disposed between the two protective layers.
In at least one embodiment of the present invention, a sealing plate is further included on a surface of the sealing cavity.
In at least one embodiment of the present invention, a metal layer is further included, wherein the sealed cavity is located on the metal layer and is in direct contact with the metal layer.
In at least one embodiment of the present invention, the sealed cavity contains a gas therein.
The invention also provides a manufacturing method of the circuit board, which comprises the steps of providing an initial substrate, wherein the initial substrate comprises a core substrate, a first circuit substrate and a second circuit substrate, and the first circuit substrate and the second circuit substrate are respectively positioned at two opposite sides of the core substrate; manufacturing a first circuit substrate into a first antenna structure; removing part of the first antenna structure to form an opening, and exposing the metal layer in the first antenna structure to the opening; covering a sealing sheet above the opening to form a sealing cavity; and disposing a second antenna structure on the first antenna structure, wherein the second antenna structure overlaps the sealed cavity.
In at least one embodiment of the present invention, wherein covering the sealing sheet over the opening to form the sealed cavity includes disposing a plurality of bonding materials by dispensing on the first antenna structure around the opening; covering the sealing sheet over the opening, wherein the sealing sheet completely covers the opening; and bonding the sealing sheet to the first antenna structure by using a bonding material to form a sealing cavity.
In at least one embodiment of the present invention, before the sealing sheet covers the opening to form the sealing cavity, the second circuit substrate is manufactured into a circuit structure, wherein the core substrate is located between the first antenna structure and the circuit structure.
In at least one embodiment of the present invention, the method further includes depositing a protective layer on the circuit structure and the second antenna structure, respectively, such that the circuit structure and the second antenna structure are located between the protective layers.
Based on the above, the interference signal transmitted from the circuit substrate to the antenna stack can be absorbed by the sealing cavity, so as to reduce the interference signal transmitted to the antenna stack, or prevent the interference signal from being transmitted to the antenna stack, thereby reducing the influence of the interference signal or achieving the effect of blocking the interference signal.
Detailed Description
The present invention will be described in detail with reference to the following examples. It should be noted that the following descriptions of the embodiments of the present invention are provided for illustration only, and are not intended to be exhaustive or to limit the invention to the precise forms disclosed. For example, the description "a first feature is formed on a second feature" encompasses embodiments in which it is contemplated that the first feature is in direct contact with the second feature, and that additional features are formed between the first feature and the second feature so that they are not in direct contact. Furthermore, the same reference numbers will be used throughout the drawings and the description to refer to the same or like elements as much as possible.
Spatially relative terms, such as "lower," "below," "lower," "above," "upper" and the like Guan Cihui, may be used herein to describe briefly the relationship of an element or feature to another element or feature as illustrated. These spatially relative terms encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. In addition, spatially relative terms may be construed accordingly as such when the elements are rotated (90 degrees or other angles).
In the following text, the dimensions (e.g. length, width, thickness and depth) of elements (e.g. layers, films, substrates and regions, etc.) in the drawings are exaggerated in an unequal manner for clarity of presentation of the technical features of the present disclosure. Accordingly, the description and illustrations of the embodiments below are not limited to the dimensions and shapes presented by the elements of the drawings, but are intended to cover deviations in the dimensions, shapes, and both, as a result of actual processes and/or tolerances. For example, the planar surface shown in the figures may have rough and/or non-linear features, while the acute angles shown in the figures may be rounded. Therefore, the elements presented in the drawings are mainly for illustration, and are not intended to precisely describe the actual shapes of the elements, nor to limit the scope of the claims.
Furthermore, the terms "about," "approximately" or "substantially" as used herein are not only inclusive of the values and ranges of values explicitly recited, but also are inclusive of the permissible deviations as understood by those skilled in the art, wherein the deviations may be determined by errors occurring during measurement, e.g., due to limitations in both the measurement system and process conditions. Further, "about" may mean within one or more standard deviations of the above values, for example within ±30%, ±20%, ±10% or ±5%. The terms "about," "approximately" or "substantially" as used herein may be used to select an acceptable range of deviations or standard deviations based on optical, etching, mechanical or other properties, and not to cover all of these with a single standard deviation.
The present invention discloses a circuit board 100 with an antenna structure, as shown in an embodiment of fig. 1, the circuit board 100 includes a circuit substrate 120, a core substrate 140, an antenna stack 160, and a sealing cavity 180. The core substrate 140 is disposed on the circuit substrate 120, and the antenna stack 160 is disposed on the core substrate 140. In other words, the antenna stack 160 and the circuit substrate 120 are respectively located on two opposite sides of the core substrate 140.
Referring to fig. 1, a sealed cavity 180 is located inside the antenna stack 160. In the present embodiment, the antenna stack 160 includes two antenna layers 161, wherein the sealed cavity 180 is located between the antenna layers 161 and the circuit substrate 120, and the antenna layers 161 overlap with the sealed cavity 180 inside the antenna stack 160. It should be noted that in other embodiments of the present invention, the number of antenna layers 161 is not limited to two, and may be more than one.
As shown in fig. 1, the antenna stack 160 of the present embodiment further includes a plurality of antenna layers 163 and a dielectric material 165, and the antenna layers 163 may be separated from each other by the dielectric material 165. The antenna layers 163 and the dielectric material 165 surround the periphery of the sealed cavity 180, and the antenna layers 163 are electrically connected by a plurality of conductive blind holes 167. In addition, the conductive blind holes 167 can be electrically connected to two antenna layers 161, and the antenna layers 161 and 163 are electrically connected by a plurality of conductive blind holes 167.
The antenna stack 160 also includes a metal layer 169. In this embodiment, the sealing cavity 180 is located on the metal layer 169 and is in direct contact with the metal layer 169, i.e. the outer surface of the metal layer 169 corresponds to one of the walls, such as the bottom surface, of the sealing cavity 180, as shown in fig. 1. It should be noted that, although the metal layer 169 of the present embodiment is separated from the antenna layer 163, the metal layer 169 of the present invention may be substantially a part of the antenna layer 163.
In the present embodiment, the core substrate 140 includes an insulating layer 142, and the circuit substrate 120 and the antenna stack 160 are respectively located on opposite sides of the insulating layer 142. In addition, the core substrate 140 further includes a through hole 144. Although fig. 1 fills the inside of the via 144 in a dot pattern to facilitate clear presentation of the via 144, the inside of the via 144 may contain a gas, wherein the gas may be a mixed gas (e.g., air) or a single composition gas such as pure nitrogen (N2), pure argon (Ar), or the like. As shown in fig. 1, a via 144 is located in the insulating layer 142 and extends from the antenna stack 160 to the wiring substrate 120, i.e., the via 144 may connect the wiring substrate 120 with the antenna stack 160.
The number of the through holes 144 in the present invention is not limited to one, and the insulating layer 142 may include a plurality of through holes 144, or may not include any through holes 144. It should be noted that in other embodiments, the at least one via 144 may not be in direct contact with the circuit substrate 120 or the antenna stack 160. For example, the insulating layer 142 may completely encapsulate the via 144, such that the via 144 is isolated from the circuit substrate 120 and the antenna stack 160.
With continued reference to fig. 1, the circuit board 100 of the present embodiment further includes a sealing plate 170, and the sealing plate 170 is located on one surface 180s of the sealing cavity 180. In other embodiments of the present invention, the position of the sealing plate 170 is not limited thereto and may be located on the sidewall 180w of the sealing cavity 180. The material of the sealing sheet 170 may comprise a highly dense material through which gas molecules are difficult to pass, such as glass, a high density ceramic (e.g., al2O3), or the like.
In this embodiment, although fig. 1 fills the interior of the sealed cavity 180 in a dot pattern to facilitate the clear presentation of the sealed cavity 180, the interior of the sealed cavity 180 contains a gas, wherein the gas may be a mixed gas (e.g., air) or a single composition gas such as pure nitrogen (N2), pure argon (Ar), or the like. In addition, in other embodiments of the present invention, the interior of the sealed cavity 180 may further comprise a mixture selected from the group consisting of a gas, a liquid and a solid. It should be noted that, in various embodiments of the present invention, the dielectric constant of the material contained inside the sealed cavity 180 may be smaller than the dielectric constant of the insulating layer 142 and the dielectric material 165.
With continued reference to fig. 1, the circuit substrate 120 in the circuit board 100 is electrically connected to the antenna stack 160. In the present embodiment, the circuit substrate 120 may include a plurality of circuit layers 121 and a plurality of conductive vias 127, and the circuit layers 121 are electrically connected by the conductive vias 127. It should be noted that, in other embodiments of the present invention, at least one electronic component may be further connected to the circuit substrate 120. These electronic components may be, for example, radio frequency chips (RFICs), connectors (connectors), passive components, etc., but the electronic components in the present invention are not limited thereto.
As shown in fig. 1, the circuit board 100 of the present embodiment further includes two protective layers 110 disposed on the circuit substrate 120 and the antenna stack 160, respectively, and the circuit substrate 120 and the antenna stack 160 are disposed between the two protective layers 110. It should be noted that each of the passivation layers 110 in the present embodiment further includes an oxidation resistant layer 112 and an insulating layer 114. As shown in fig. 1, the outermost antenna layer 161 is located on the surface 160s of the antenna stack 160, and the oxidation-resistant layer 112 completely covers the outermost antenna layer 161, so as to prevent the outermost antenna layer 161 from being oxidized due to exposure to the outside.
Similarly, the outermost circuit layer 121 is located on the surface 120s of the circuit substrate 120, and the oxidation-resistant layer 112 covers the outermost circuit layer 121, so as to prevent the outermost circuit layer 121 from being oxidized due to exposure to the outside. Specifically, the oxidation-resistant layer 112 is formed by depositing a low-activity metal such as gold (Au) or nickel (Ni) on the wiring layer 121 (and the antenna layer 161) by electroplating or electroless plating, for example.
On the other hand, the insulating layer 114 may cover the surface 120s of the circuit substrate 120 and the surface 160s of the antenna stack 160. In this embodiment, the insulating layer 114 may not overlap the outermost antenna layer 161, and also not overlap the oxidation resistant layer 112. In other embodiments of the present invention, the insulating layer 114 may partially overlap the circuit layer 121 and the antenna layer 161, or may partially overlap the oxidation resistant layer 112.
The present invention also discloses a method for manufacturing a circuit board with an antenna structure, which may include several steps as shown in fig. 2A to 2F, wherein the method disclosed in fig. 2A to 2F is exemplified by the circuit board 100 in fig. 1. First, an initial substrate 201 shown in fig. 2A is provided, where the initial substrate 201 includes a first circuit substrate 220, a core substrate 240, and a second circuit substrate 260. The core substrate 240 may be the same as the core substrate 140 in fig. 1, and the first circuit substrate 220 and the second circuit substrate 260 are respectively located on opposite sides of the core substrate 240.
In this embodiment, the first circuit substrate 220 and the second circuit substrate 260 may each include multiple metal layers. For example, the first circuit substrate 220 may include a metal layer 222. The core substrate 240 may include an insulating layer 242 and a via 244 within the insulating layer 242. In other embodiments of the present invention, the structure of the core substrate 240 is not limited thereto, and for example, the core substrate 240 may not include the through hole 244.
Referring to fig. 2B, the first circuit board 220 is fabricated into a first antenna structure 230, and the first antenna structure 230 includes an antenna layer 231a, an antenna layer 231B and a plurality of conductive vias 233, wherein the method for fabricating the first circuit board 220 into the first antenna structure 230 may include at least one of a subtractive method, an additive method and a semi-additive method. For example, in the present embodiment, a plurality of blind holes (not shown in fig. 2B) may be formed on the first circuit substrate 220 by, for example, laser drilling. Next, a metal material is deposited in the blind via and on the surface of the first circuit substrate 220 (e.g., surface 220s in fig. 2A) by processes such as physical vapor deposition and electroplating deposition to form a conductive blind via 233 and an initial metal layer (not shown in fig. 2B). Thereafter, the initial metal layer may be patterned by a process such as photolithography etching, etc., to form the antenna layer 231a.
The present embodiment may further provide a dielectric material 235 on the antenna layer 231a after forming the antenna layer 231a, and perform processes such as laser drilling, deposition and patterning on the dielectric material 235 to form another antenna layer 231b. Although the embodiment includes only the antenna layer 231a and the antenna layer 231b, the number of antenna layers of the present invention is not limited thereto, and may be any number of more than one layer.
On the other hand, in the present embodiment, the second wiring substrate 260 of the initial substrate 201 may be fabricated as the wiring structure 270. The core substrate 240 is disposed between the first antenna structure 230 and the circuit structure 270, wherein the circuit structure 270 includes a circuit layer 271a, a circuit layer 271b and a plurality of conductive vias 273. The manner of forming the circuit layer 271a, the circuit layer 271b and the conductive blind holes 273 is the same as that of forming the antenna layer 231a, the antenna layer 231b and the conductive blind holes 233, and will not be described herein. In addition, although the present embodiment includes only the circuit layer 271a and the circuit layer 271b, the number of circuit layers of the present invention is not limited thereto, and may be any number of one or more layers.
It should be noted that, in other embodiments of the present invention, the line structure 270 is not limited to be formed at the same time when the first antenna structure 230 is formed, but may be formed at any time point. Furthermore, in other embodiments, the second circuit substrate 260 may be the circuit structure 270, so no additional process is required to form the circuit structure 270. In other words, the line structure 270 may be made before the first antenna structure 230 is formed.
Next, as shown in fig. 2C, a portion of the first antenna structure 230 may be removed to form an opening 250, and the metal layer 222 within the first antenna structure 230 may be exposed to the opening 250, wherein the metal layer 222 may already be present in the first circuit substrate 220 of the initial substrate 201, as shown in fig. 2A, and the manner of forming the opening 250 may be, for example, laser ablation. In other embodiments of the present invention, the number of openings 250 formed is not limited to one, and may be more than one.
Referring to fig. 2D and fig. 2E together, after forming the opening 250, a sealing plate 251 is covered over the opening 250 to form a sealed cavity 280. As shown in fig. 2D, in the present embodiment, a plurality of bonding materials 252 may be disposed on the first antenna structure 230 around the opening 250 by dispensing. After the bonding material 252 is provided, the sealing sheet 251 is covered over the opening 250 such that the sealing sheet 251 completely covers the opening 250. In addition, since the sealing sheet 251 must contact the bonding material 252 around the opening 250, the area of the sealing sheet 251 must be larger than the cross-sectional area of the opening 250.
As shown in fig. 2D and 2E, the sealing piece 251 is bonded to the first antenna structure 230 by using the bonding material 252 to form a sealed cavity 280. Specifically, in this embodiment, the bonding material 252 may be heated to completely seal the gap between the sealing sheet 251 and the first antenna structure 230, so as to seal the gas (e.g., air) inside the sealing cavity 280. However, the method of forming the sealing cavity 280 is not limited thereto, and the sealing sheet 251 and the first antenna structure 230 may be bonded without using the bonding material 252.
After the sealing sheet 251 is disposed, as shown in fig. 2F, a second antenna structure 290 is disposed on the first antenna structure 230, and this second antenna structure 290 overlaps the sealing cavity 280. In other words, the sealed cavity 280 is located between the first antenna structure 230 and the second antenna structure 290, and in the present embodiment, both the first antenna structure 230 and the second antenna structure 290 may completely enclose the sealed cavity 280. In addition, the bonding material 252 may be malleable such that the bonding material 252 can be compressed into a thin film. Therefore, fig. 2F and fig. 1 omit the bonding material 252.
With continued reference to fig. 2F, the second antenna structure 290 includes an antenna layer 291a, an antenna layer 291b, and a plurality of conductive vias 293. The antenna layer 291a, the antenna layer 291b, and the plurality of conductive vias 293 may be formed in the same manner as the antenna layer 231a, the antenna layer 231b, and the plurality of conductive vias 233, and thus are not described herein. In addition, although the embodiment includes only the antenna layer 291a and the antenna layer 291b, the number of antenna layers of the second antenna structure 290 is not limited thereto, and may be any number of more than one layer.
In addition, the present invention may further include depositing the protective layer 110 on the circuit structure 270 and the second antenna structure 290, respectively. The line structure 270 and the second antenna structure 290 are located between the two protection layers 110. Since the protective layer 110 may include the anti-oxidation layer 112 and the insulating layer 114, the protective layer 110 is formed by forming the anti-oxidation layer 112 on the antenna layer 291b (and the wiring layer 271 b). Specifically, the oxidation preventing layer 112 may be formed by depositing a low-activity metal such as gold (Au) or nickel (Ni) on the antenna layer 291b (and the wiring layer 271 b) by plating or electroless plating. In this embodiment, the anti-oxidation layer 112 may cover the circuit layer 271b and the antenna layer 291b to prevent the circuit layer 271b and the antenna layer 291b from being oxidized due to contact with the outside.
On the other hand, the method of forming the protection layer 110 further includes forming an insulating layer 114 on the line structure 270 and the second antenna structure 290. The insulating layer 114 may be directly attached to the circuit structure 270 and the second antenna structure 290, and does not cover the outermost part of the circuit layer 271b and the antenna layer 291b, thereby protecting the internal structure of the circuit board 100 from corrosion caused by external environmental influence (such as moisture and high temperature).
In summary, compared with the insulating layer in the core substrate and the dielectric material in the antenna stack, the sealed cavity has better signal absorption effect. Therefore, the interference signals transmitted from the circuit substrate to the antenna stack through the core substrate can be absorbed by the sealing cavity, so as to reduce the interference signals transmitted to the antenna stack, or prevent the interference signals from being transmitted to the antenna stack, thereby reducing the influence of the interference signals or achieving the effect of blocking the interference signals.
Although the embodiments of the present invention have been described above, it should be understood that the present invention is not limited thereto, and that modifications and variations may be made thereto by those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
[ Symbolic description ]
100 Circuit board
110 Protective layer
112 Oxidation-resistant layer
114. 142, 242 Insulating layer
120 Circuit substrate
120S, 160s, 180s, 220s surface
121. 271A, 271b line layers
127. 167, 233, 273, 293 Conductive blind holes
140. 240 Core substrate
144. 244 Through hole
160 Antenna laminate
161. 163, 231A, 231b, 291a, 291b antenna layer
165 Dielectric material
169. 222 Metal layer
180. 280 Sealing cavity
180W side wall
170. 251 Sealing sheet
201 Initial substrate
220 First circuit board
230 First antenna structure
235 Dielectric material
250 Opening
252 Joining material
260 Second circuit substrate
270 Line structure
290 A second antenna structure.