CN1180239A - Silicon-doped chip - Google Patents

Abstract

Translated fromChinese

本发明建议在硅基片1和聚硅层4之间设置一层用于阻止掺杂物质扩散的氧化硅层3。因此,无需增加为避免自动扩散作用而提供的附加措施,同时保持了硅基片背面上的聚硅层4吸气作用。

The present invention proposes to arrange a silicon oxide layer 3 between the silicon substrate 1 and the polysilicon layer 4 to prevent the diffusion of dopant substances. Therefore, there is no need to add additional measures for avoiding auto-diffusion, while maintaining the gettering effect of the polysilicon layer 4 on the backside of the silicon substrate.

Description

Translated fromChinese

掺杂硅基片doped silicon substrate

本发明涉及掺杂硅基片，尤其是高掺杂的硅基片。高掺杂的硅基片在被加工前具有一层取向生长层，在其基片背面具有一层由聚硅组成的吸气层，并且为避免众所周知的自动掺杂作用，在该吸气层上有一层氧化硅层。术语“自动掺杂作用”是指掺杂物质从基片背面向外扩散，并进入基片正面。The present invention relates to doped silicon substrates, especially highly doped silicon substrates. The highly doped silicon substrate has an orientation growth layer before being processed, and a getter layer composed of polysilicon on the back of the substrate, and in order to avoid the well-known autodoping effect, the getter layer There is a layer of silicon oxide on it. The term "autodoping" refers to the outdiffusion of dopant species from the rear side of the substrate and into the front side of the substrate.

由聚硅组成的吸气层的作用是捕集金属污染，否则致使在完成加工的标准组件上沉积电键电路(Gate)氧化物。但是，在高温加工阶段，掺杂物质也从硅基片中扩散到聚硅层中。根据溶解度，聚硅层上富集了各种浓度的掺杂物质，从而使聚硅层达到饱和，这样将不能通过吸气来充分地排除产生的金属污染。其结果产生了电键电路氧化物沉淀。The function of the getter layer composed of polysilicon is to trap metal contamination that would otherwise result in the deposition of gate oxides on the finished module. However, dopant species also diffuse from the silicon substrate into the polysilicon layer during the high temperature processing stage. According to the solubility, the polysilicon layer is enriched with various concentrations of dopant substances, so that the polysilicon layer is saturated, so that the generated metal contamination cannot be sufficiently removed by gettering. As a result, key circuit oxide deposits occur.

此外，在加工取向生长的硅基片的过程中，硅氧化物层被腐蚀掉，由此出现掺杂物质从富集的聚硅层上向外扩散，因此造成欲加工的硅基片彼此自动掺杂和横向污染。Furthermore, during the processing of the epitaxially grown silicon substrates, the silicon oxide layer is etched away, whereby outdiffusion of dopant species from the enriched polysilicon layer occurs, thus causing the silicon substrates to be processed to be automatically separated from each other. doping and lateral contamination.

迄今为止，是通过以下途径来克服这些问题的，由于从无氧化硅的基片背面的向外扩散，在高温加工过程中采用分开的炉通道，从而减少了欲加工产品彼此横向污染的危险。这种措施导致了生产能力的负荷不必要的增加。Hitherto, these problems have been overcome by using separate furnace channels during high temperature processing due to outdiffusion from the silicon oxide-free substrate backside, thereby reducing the risk of lateral contamination of the products to be processed with each other. This measure leads to an unnecessary increase in the load on the production capacity.

克服这些问题的另一种尝试是使硅基片的背面具有附加的氮化硅保护层。当然，由于额外的处理步骤，这个措施一方面致使电键电路氧化物沉淀，另一方面使费用提高。Another attempt to overcome these problems has been to have an additional protective layer of silicon nitride on the backside of the silicon substrate. Of course, this measure, on the one hand, leads to oxide precipitation of the key circuit and, on the other hand, increases the expense due to the additional processing steps.

本发明的任务是提供一种掺杂的硅基片，其基片背面经过了处理，从而解决了上面遇到的问题。The object of the present invention is to provide a doped silicon substrate whose rear side has been treated so that the problems encountered above are solved.

按照本发明，这个任务是通过掺杂硅基片解决的，其中在硅基片的背面涂上了一层氧化硅层，在该氧化硅层上涂有一层聚硅层。According to the invention, this object is solved by doping the silicon substrate, a silicon oxide layer being applied to the rear side of the silicon substrate, and a polysilicon layer being applied to the silicon oxide layer.

这种掺杂硅基片的优点在于掺杂物质不再通过氧化硅并扩散到聚硅层中，即掺杂物质不会从聚硅中蒸发出来。因此，聚硅层有足够的“游离缺陷处”来吸气所产生的金属污染。The advantage of this doped silicon substrate is that the dopant no longer passes through the silicon oxide and diffuses into the polysilicon layer, ie the dopant does not evaporate out of the polysilicon. Therefore, the polysilicon layer has enough "free defects" to getter the metal contamination generated.

这样可以取消上面提及的加工过程中所采取的措施，即抗蒸发(自动掺杂作用，横向污染)。This makes it possible to dispense with the above-mentioned measures taken during the processing, ie anti-evaporation (autodoping, lateral contamination).

在一个优选的实施方案中，氧化硅层的厚度约为50纳米，其上涂覆的聚硅层的厚度约为1.2微米。In a preferred embodiment, the silicon oxide layer has a thickness of about 50 nanometers and the overlying polysilicon layer has a thickness of about 1.2 microns.

在附图中，举例说明了本发明，下面借助于附图进行详细地描述。In the drawings, the invention is illustrated by way of example and described in detail below with the aid of the drawings.

如图所示，按照本发明，在硅基片1的硅基片背面2上直接涂有一层氧化硅层3，在该氧化硅层上涂有一层聚硅层4。氧化硅层3的作用是阻止掺杂物质在硅基片背面2和聚硅层4之间扩散。因此，为避免欲加工硅基片彼此间的自动掺杂作用和横向污染而采取的其它措施不再是必须的，并且保持了在硅基片背面2上的聚硅层4的吸气作用。As shown in the figure, according to the present invention, a layer ofsilicon oxide layer 3 is directly coated on theback surface 2 of thesilicon substrate 1 of thesilicon substrate 1, and a layer ofpolysilicon layer 4 is coated on the silicon oxide layer. The function of thesilicon oxide layer 3 is to prevent dopant substances from diffusing between theback side 2 of the silicon substrate and thepolysilicon layer 4 . As a result, further measures to avoid autodoping and lateral contamination of the silicon substrates to be processed are no longer necessary, and the gettering effect of thepolysilicon layer 4 on therear side 2 of the silicon substrates is maintained.

在这种情况下，硅基片1中含有的掺杂物质砷的浓度为＞10¹⁸/厘米³。氧化硅层3具有的厚度为约50纳米，聚硅层4具有的厚度为约1.2微米。In this case, thesilicon substrate 1 contains the dopant arsenic in a concentration >10¹⁸ /cm³ . Thesilicon oxide layer 3 has a thickness of about 50 nanometers and thepolysilicon layer 4 has a thickness of about 1.2 microns.

本发明所涉及的高掺杂硅基片1用作制备大功率(Leistung)半导体的基本原料。The highly dopedsilicon substrate 1 according to the invention is used as a basic raw material for the production of high-power semiconductors.

Claims (4)

1. silicon-doped chip (1) is characterized in that: scribble one deck silicon oxide layer (3) on the silicon chip back side (2), and scribble one deck poly silicon layer (4) on silicon oxide layer (3).

2. according to the silicon chip of claim 1, it is characterized in that: the thickness that silicon oxide layer (3) has is that the thickness that about 50 nanometers and/or poly silicon layer (4) have is about 1.2 microns.

3. according to the silicon chip of claim 1 or 2, it is characterized in that: the concentration of dopant arsenic is 〉=10 in the silicon chip (1)¹⁸Foreign atom/centimetre³

4. the purposes of highly doped silicon substrate (1) is used as the raw material for preparing high power semi-conductor, wherein scribbles one deck silicon oxide layer (3) on the silicon chip back side (2), and scribble one deck poly silicon layer (4) on silicon oxide layer (3).

Images