技术领域Technical field
本文涉及但不限于显示技术领域，具体涉及一种显示基板及其制备方法、显示装置。This article relates to but is not limited to the field of display technology, and specifically relates to a display substrate, a preparation method thereof, and a display device.
背景技术Background technique
有机发光二极管(Organic Light Emitting Diode，简称OLED)和量子点发光二极管(Quantum-dot Light Emitting Diodes，简称QLED)为主动发光显示器件，具有自发光、广视角、高对比度、低耗电、极高反应速度、轻薄、可弯曲和成本低等优点。随着显示技术的不断发展，以OLED或QLED为发光器件、由薄膜晶体管(Thin Film Transistor，简称TFT)进行信号控制的柔性显示装置(Flexible Display)已成为目前显示领域的主流产品。Organic Light Emitting Diode (OLED for short) and Quantum-dot Light Emitting Diodes (QLED for short) are active light-emitting display devices with self-illumination, wide viewing angle, high contrast, low power consumption, and extremely high Response speed, thinness, bendability and low cost. With the continuous development of display technology, flexible display devices (Flexible Display) using OLED or QLED as light-emitting devices and signal control by thin film transistors (TFT) have become the mainstream products in the current display field.
发明内容Contents of the invention
本申请提供了一种显示基板，其特征在于，包括：This application provides a display substrate, which is characterized in that it includes:
隔断结构，设置在基底上；Partition structure, set on the base;
阳极，设置在所述基底上，所述阳极与所述隔断结构在所述基底上的正投影不交叠；An anode is arranged on the base, and the orthographic projection of the anode and the partition structure on the base does not overlap;
发光层，设置在所述阳极远离所述基底一侧，所述发光层与所述阳极连接，所述发光层在所述隔断结构处阻断；A luminescent layer, arranged on the side of the anode away from the substrate, the luminescent layer is connected to the anode, and the luminescent layer is blocked at the partition structure;
阴极，设置在所述发光层远离所述基底一侧，所述阴极与所述发光层连接，所述阴极在所述隔断结构处阻断；a cathode, arranged on the side of the luminescent layer away from the substrate, the cathode is connected to the luminescent layer, and the cathode is blocked at the partition structure;
辅助阴极，与所述阳极位于同一膜层，且互相绝缘，所述辅助阴极与所述阴极电连接。The auxiliary cathode is located on the same film layer as the anode and is insulated from each other. The auxiliary cathode is electrically connected to the cathode.
在示例性实施方式中，还包括设置在所述辅助阴极与所述阴极之间的连接过孔，所述阴极通过所述连接过孔与所述辅助阴极连接，所述连接过孔均与所述阳极和所述隔断结构在所述基底上的正投影不交叠。In an exemplary embodiment, a connection via hole is provided between the auxiliary cathode and the cathode, the cathode is connected to the auxiliary cathode through the connection via hole, and the connection via holes are all connected to the auxiliary cathode. The orthographic projections of the anode and the partition structure on the substrate do not overlap.
在示例性实施方式中，所述发光层中设置有连接避让孔，所述连接避让孔在所述基底上的正投影覆盖所述连接过孔在所述基底上的正投影。In an exemplary embodiment, a connection avoidance hole is provided in the light emitting layer, and an orthographic projection of the connection avoidance hole on the substrate covers an orthographic projection of the connection via hole on the substrate.
在示例性实施方式中，所述辅助阴极与所述阳极包括同一种导电材料。In an exemplary embodiment, the auxiliary cathode and the anode include the same conductive material.
在示例性实施方式中，所述辅助阴极的形状呈网格状。In an exemplary embodiment, the auxiliary cathode is shaped like a grid.
在示例性实施方式中，所述辅助阴极上设置有凸块，所述凸块凸出所述辅助阴极的边缘，所述凸块与所述阴极电连接。In an exemplary embodiment, a bump is provided on the auxiliary cathode, the bump protrudes from an edge of the auxiliary cathode, and the bump is electrically connected to the cathode.
在示例性实施方式中，所述辅助阴极在所述基底上的正投影位于所述阴极在所述基底上的正投影中。In an exemplary embodiment, an orthographic projection of the auxiliary cathode on the substrate is located within an orthographic projection of the cathode on the substrate.
在示例性实施方式中，所述隔断结构包括设置在所述基底上的第一隔离墙，所述第一隔离墙包括第一隔离层以及设置在所述第一隔离层远离所述基底一侧的第二隔离层，所述第二隔离层的至少部分沿着平行于所述基底的方向伸出所述第一隔离层的侧壁，形成凸台，所述发光层和所述阴极在所述凸台处阻断。In an exemplary embodiment, the partition structure includes a first isolation wall disposed on the base, the first isolation wall includes a first isolation layer and a side of the first isolation layer away from the base. A second isolation layer, at least part of the second isolation layer extends out of the sidewall of the first isolation layer in a direction parallel to the substrate, forming a boss, where the light-emitting layer and the cathode are The boss is blocked.
在示例性实施方式中，所述隔断结构还包括第二隔离墙，所述第二隔离墙与所述第一隔离墙之间形成隔离槽，所述第二隔离墙包括第三隔离层以及设置在所述第三隔离层远离所述基底一侧的第四隔离层，至少部分所述发光层和所述阴极形成的堆叠结构覆盖所述第三隔离层和所述第四隔离层的侧壁，至少部分所述发光层和所述阴极形成的堆叠结构覆盖所述隔离槽的槽底。In an exemplary embodiment, the partition structure further includes a second isolation wall, an isolation groove is formed between the second isolation wall and the first isolation wall, the second isolation wall includes a third isolation layer and a On the fourth isolation layer on the side of the third isolation layer away from the substrate, at least part of the stack structure formed by the light-emitting layer and the cathode covers the side walls of the third isolation layer and the fourth isolation layer. , at least part of the stacked structure formed by the light-emitting layer and the cathode covers the bottom of the isolation trench.
在示例性实施方式中，还包括有机介质层以及无机介质层，所述有机介质层设置在所述基底上，所述无机介质层设置在所述有机介质层远离基底一侧，所述阳极设置在所述无机介质层远离基底一侧，所述第一隔离层与相邻的有机介质层连接成一体，所述第三隔离层与相邻的有机介质层连接成一体，所述第二隔离层与相邻的无机介质层连接成一体，所述第四隔离层与相邻的无机介质层连接成一体，所述隔离槽的槽底为所述有机介质层。In an exemplary embodiment, an organic dielectric layer and an inorganic dielectric layer are further included. The organic dielectric layer is disposed on the substrate, the inorganic dielectric layer is disposed on a side of the organic dielectric layer away from the substrate, and the anode is disposed On the side of the inorganic dielectric layer away from the substrate, the first isolation layer is connected to the adjacent organic dielectric layer to be integrated, the third isolation layer is connected to the adjacent organic dielectric layer to be integrated, and the second isolation layer is connected to the adjacent organic dielectric layer to be integrated. The fourth isolation layer is connected to the adjacent inorganic dielectric layer to be integrated, the fourth isolation layer is connected to the adjacent inorganic dielectric layer to be integrated, and the bottom of the isolation groove is the organic dielectric layer.
在示例性实施方式中，包括第一子像素区、第二子像素区和第三子像素区，所述第一子像素区域包括第一阳极、发光层和阴极，所述第二子像素区域包括第二阳极、发光层和阴极，所述第三子像素区域包括第三阳极、发光层和阴极，所述第一子像素区和所述第二子像素区沿着第二方向排布形成子像素列，所述第三子像素区位于所述子像素列在第一方向的一侧，所述隔断结构设置在所述第一子像素区、所述第二子像素区和所述第三子像素区的至少一侧，所述第一方向与所述第二方向交叉。In an exemplary embodiment, it includes a first sub-pixel area, a second sub-pixel area and a third sub-pixel area. The first sub-pixel area includes a first anode, a light-emitting layer and a cathode. The second sub-pixel area It includes a second anode, a light-emitting layer and a cathode, the third sub-pixel area includes a third anode, a light-emitting layer and a cathode, the first sub-pixel area and the second sub-pixel area are arranged along the second direction to form Sub-pixel column, the third sub-pixel area is located on one side of the sub-pixel column in the first direction, and the partition structure is provided in the first sub-pixel area, the second sub-pixel area and the third sub-pixel area. On at least one side of the three sub-pixel areas, the first direction intersects the second direction.
在示例性实施方式中，所述辅助阴极围绕所述第一子像素区域的四周设置，围绕所述第二子像素区域的四周设置，以及围绕所述第三子像素区域的四周设置。In an exemplary embodiment, the auxiliary cathode is disposed around the first sub-pixel area, around the second sub-pixel area, and around the third sub-pixel area.
在示例性实施方式中，还包括设置在所述辅助阴极与所述阴极之间的连接过孔，所述阴极通过所述连接过孔与所述辅助阴极连接，所述连接过孔均与所述阳极和所述隔断结构在所述基底上的正投影不交叠，所述连接过孔位于所述第三子像素区域在所述第二方向的至少一侧。In an exemplary embodiment, a connection via hole is provided between the auxiliary cathode and the cathode, the cathode is connected to the auxiliary cathode through the connection via hole, and the connection via holes are all connected to the auxiliary cathode. The orthographic projections of the anode and the partition structure on the substrate do not overlap, and the connection via hole is located on at least one side of the third sub-pixel region in the second direction.
在示例性实施方式中，包括第一隔断结构、第二隔断结构、第三隔断结构、第四隔断结构、第五隔断结构和第六隔断结构，所述第一隔断结构的形状包括沿着所述第一方向延伸的线状，所述第一隔断结构设置在所述第一子像素区域和所述第二子像素区域之间；所述第二隔断结构的形状包括沿着所述第二方向延伸的线状，所述第二隔断结构设置在所述第一子像素区域远离所述第三子像素区域的一侧；所述第三隔断结构的形状包括沿着所述第一方向延伸的线状，所述第三隔断结构设置在所述第二子像素区域远离所述第一子像素区域的一侧；所述第四隔断结构的形状包括沿着所述第二方向延伸的线状，所述第四隔断结构设置在所述第二子像素区域远离所述第三子像素区域的一侧；所述第五隔断结构的形状包括沿着所述第二方向延伸的线状，所述第五隔断结构设置在所述第三子像素区域与所述第一子像素区域之间；所述第六隔断结构的形状包括沿着所述第二方向延伸的线状，所述第六隔断结构设置在所述第三子像素区域与所述第二子像素区域之间。In an exemplary embodiment, a first partition structure, a second partition structure, a third partition structure, a fourth partition structure, a fifth partition structure and a sixth partition structure are included, and the shape of the first partition structure includes: The first partition structure is a line extending in the first direction, and the first partition structure is disposed between the first sub-pixel area and the second sub-pixel area; the shape of the second partition structure includes a shape along the second The second partition structure is arranged on the side of the first sub-pixel area away from the third sub-pixel area; the shape of the third partition structure includes extending along the first direction. The third partition structure is arranged on a side of the second sub-pixel area away from the first sub-pixel area; the shape of the fourth partition structure includes a line extending along the second direction. shape, the fourth partition structure is disposed on a side of the second sub-pixel area away from the third sub-pixel area; the shape of the fifth partition structure includes a line extending along the second direction, The fifth partition structure is disposed between the third sub-pixel area and the first sub-pixel area; the shape of the sixth partition structure includes a line extending along the second direction, and the A six-partition structure is provided between the third sub-pixel area and the second sub-pixel area.
在示例性实施方式中，还包括像素定义层，所述像素定义层设置在所述阳极远离所述基底一侧，所述像素定义层设置有像素开口，所述像素开口将至少部分所述阳极暴露，所述发光层覆盖所述像素开口，与所述阳极连接，所述像素定义层还设置有连接过孔，所述阴极通过所述连接过孔与所述辅助阴极连接，所述连接过孔均与所述阳极和所述隔断结构在所述基底上的正投影不交叠。In an exemplary embodiment, a pixel definition layer is further included. The pixel definition layer is provided on a side of the anode away from the substrate. The pixel definition layer is provided with a pixel opening, and the pixel opening connects at least part of the anode. Exposed, the light-emitting layer covers the pixel opening and is connected to the anode. The pixel definition layer is also provided with a connection via hole. The cathode is connected to the auxiliary cathode through the connection via hole. The connection via None of the holes overlaps with the orthographic projection of the anode and the partition structure on the substrate.
在示例性实施方式中，所述像素定义层还设置有隔断避让孔，所述隔断避让孔与所述隔断结构在所述基底上的正投影存在交叠。In an exemplary embodiment, the pixel definition layer is further provided with a partition avoidance hole, and the partition avoidance hole overlaps with the orthographic projection of the partition structure on the substrate.
本申请还提供了一种显示装置，包括前述的显示基板。The present application also provides a display device, comprising the aforementioned display substrate.
本申请还提供了一种显示基板的制备方法包括：This application also provides a method for preparing a display substrate, including:
在基底上形成隔断结构；Form a partition structure on the substrate;
在所述基底上形成导电薄膜，使所述导电薄膜形成互相绝缘的阳极和辅助阴极，所述阳极与所述隔断结构在所述基底上的正投影不交叠，所述辅助阴极与所述隔断结构在所述基底上的正投影不交叠；A conductive film is formed on the base, so that the conductive film forms an anode and an auxiliary cathode that are insulated from each other. The orthographic projections of the anode and the partition structure on the base do not overlap, and the auxiliary cathode and the auxiliary cathode do not overlap. The orthographic projections of the partition structures on the base do not overlap;
在所述阳极远离所述基底一侧形成发光层，所述发光层与所述阳极连接，所述发光层在所述隔断结构处阻断；A luminescent layer is formed on the side of the anode away from the substrate, the luminescent layer is connected to the anode, and the luminescent layer is blocked at the partition structure;
在所述发光层远离所述基底一侧形成阴极，所述阴极与所述发光层连接，所述阴极在所述隔断结构处阻断，所述阴极与所述辅助阴极电连接。A cathode is formed on the side of the light-emitting layer away from the substrate, the cathode is connected to the light-emitting layer, the cathode is blocked at the partition structure, and the cathode is electrically connected to the auxiliary cathode.
本申请的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本申请而了解。本申请的其他优点可通过在说明书以及附图中所描述的方案来实现和获得。Additional features and advantages of the application will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the application. Other advantages of the application can be realized and obtained by the solutions described in the specification and drawings.
附图说明Description of the drawings
附图用来提供对本申请技术方案的理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本申请的技术方案，并不构成对本申请技术方案的限制。The drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. They are used to explain the technical solution of the present application together with the embodiments of the present application and do not constitute a limitation of the technical solution of the present application.
图1为一种显示装置的结构示意图；Figure 1 is a schematic structural diagram of a display device;
图2为一种显示装置中显示区域的平面结构示意图；Figure 2 is a schematic plan view of a display area in a display device;
图3为一种显示装置中显示区域的剖面结构示意图；Figure 3 is a schematic cross-sectional structural diagram of a display area in a display device;
图4a为本公开实施例一种显示基板的平面结构示意图；Figure 4a is a schematic plan view of a display substrate according to an embodiment of the present disclosure;
图4b为本公开实施例一种显示基板的剖面结构示意图；Figure 4b is a schematic cross-sectional structural diagram of a display substrate according to an embodiment of the present disclosure;
图5为本公开实施例一种显示基板的剖面结构示意图；Figure 5 is a schematic cross-sectional structural diagram of a display substrate according to an embodiment of the present disclosure;
图6为本公开实施例一种显示基板形成无机介质层和隔断结构后的示意图；Figure 6 is a schematic diagram of a display substrate after forming an inorganic dielectric layer and a partition structure according to an embodiment of the present disclosure;
图7a和7b为本公开实施例一种显示基板形成第一阳极、第二阳极、第三阳极和辅助阴极后的示意图；7a and 7b are schematic diagrams of a display substrate after forming a first anode, a second anode, a third anode and an auxiliary cathode according to an embodiment of the present disclosure;
图8a和图8b为本公开实施例一种显示基板形成像素定义层后的示意图；8a and 8b are schematic diagrams of a display substrate after forming a pixel definition layer according to an embodiment of the present disclosure;
图9为本公开实施例一种显示基板形成阴极后的示意图。FIG. 9 is a schematic diagram of a display substrate after a cathode is formed according to an embodiment of the present disclosure.
具体实施方式Detailed ways
本申请描述了多个实施例，但是该描述是示例性的，而不是限制性的，并且对于本领域的普通技术人员来说显而易见的是，在本申请所描述的实施例包含的范围内可以有更多的实施例和实现方案。尽管在附图中示出了许多可能的特征组合，并在具体实施方式中进行了讨论，但是所公开的特征的许多其它组合方式也是可能的。除非特意加以限制的情况以外，任何实施例的任何特征或元件可以与任何其它实施例中的任何其他特征或元件结合使用，或可以替代任何其它实施例中的任何其他特征或元件。This application describes multiple embodiments, but the description is illustrative rather than restrictive, and it is obvious to those of ordinary skill in the art that within the scope of the embodiments described in this application, There are many more examples and implementations. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Unless expressly limited, any feature or element of any embodiment may be used in combination with, or may be substituted for, any other feature or element of any other embodiment.
本申请包括并设想了与本领域普通技术人员已知的特征和元件的组合。本申请已经公开的实施例、特征和元件也可以与任何常规特征或元件组合，以形成由权利要求限定的独特的发明方案。任何实施例的任何特征或元件也可以与来自其它发明方案的特征或元件组合，以形成另一个由权利要求限定的独特的发明方案。因此，应当理解，在本申请中示出和/或讨论的任何特征可以单独地或以任何适当的组合来实现。因此，除了根据所附权利要求及其等同替换所做的限制以外，实施例不受其它限制。此外，可以在所附权利要求的保护范围内进行各种修改和改变。This application includes and contemplates combinations with features and elements known to those of ordinary skill in the art. The embodiments, features and elements that have been disclosed in this application may also be combined with any conventional features or elements to form unique inventive solutions as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive solutions to form another unique inventive solution as defined by the claims. Therefore, it should be understood that any feature shown and/or discussed in this application may be implemented individually or in any suitable combination. Accordingly, the embodiments are not to be limited except by those appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
此外，在描述具有代表性的实施例时，说明书可能已经将方法和/或过程呈现为特定的步骤序列。然而，在该方法或过程不依赖于本文所述步骤的特定顺序的程度上，该方法或过程不应限于所述的特定顺序的步骤。如本领域普通技术人员将理解的，其它的步骤顺序也是可能的。因此，说明书中阐述的步骤的特定顺序不应被解释为对权利要求的限制。此外，针对该方法和/或过程的权利要求不应限于按照所写顺序执行它们的步骤，本领域技术人员可以容易地理解，这些顺序可以变化，并且仍然保持在本申请实施例的精神和范围内。In addition, when describing representative embodiments, the specification may have presented the method and/or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and/or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.
经本申请发明人的研究发现，串联(Tandem)OLED显示基板是通过连接层将多个层叠设置的发光层连接在一起形成的堆叠器件。该连接层一般包括p型半导体材料和n型半导体材料，串联(Tandem)OLED显示基板的阴极注入电子，阳极注入空穴，电子和空穴在连接层分开后，可以对发光层供电，实现发光。在不同画面下，R子像素、G子像素、B子像素的发光亮度不同，导致点亮R子像素、G子像素、B子像素的电流不同。由于串联(Tandem)OLED显示基板需要较大的跨压驱动，就会在点亮电流大的子像素时，电流向相邻子像素流动，使点亮电流小的子像素被点亮，使处于低灰阶的子像素被点亮，从而影响画质。高亮度的串联(Tandem)OLED显示基板所需要的跨压更大，更大的跨压就会导致低灰阶子像素启亮的问题更加严重。为了解决串联(Tandem)OLED显示基板中低灰阶子像素启亮的问题，可以在串联(Tandem)OLED显示基板中相邻子像素之间设置隔断结构，隔断结构可以将相邻子像素的阴极隔断，降低相邻子像素的电流串扰。然而，隔断结构会增加阴极的面电阻，降低了电源压降和亮度均匀性，减小了显示画面的均一性。According to the research of the inventors of the present application, a tandem OLED display substrate is a stacked device formed by connecting a plurality of stacked light-emitting layers together through a connecting layer. The connecting layer generally includes a p-type semiconductor material and an n-type semiconductor material. The cathode of the tandem OLED display substrate injects electrons, and the anode injects holes. After the electrons and holes are separated in the connecting layer, they can supply power to the light-emitting layer to achieve light emission. Under different screens, the luminous brightness of the R sub-pixel, the G sub-pixel, and the B sub-pixel is different, resulting in different currents for lighting up the R sub-pixel, the G sub-pixel, and the B sub-pixel. Since the tandem OLED display substrate requires a larger cross-voltage drive, when lighting up a sub-pixel with a large current, the current will flow to the adjacent sub-pixel, so that the sub-pixel with a small lighting current is lit, and the sub-pixel in a low grayscale is lit, thereby affecting the image quality. The high-brightness tandem OLED display substrate requires a larger cross-voltage, and a larger cross-voltage will cause the problem of lighting up the low grayscale sub-pixel to be more serious. In order to solve the problem of low grayscale sub-pixel lighting in the tandem OLED display substrate, a partition structure can be set between adjacent sub-pixels in the tandem OLED display substrate. The partition structure can isolate the cathodes of adjacent sub-pixels and reduce the current crosstalk of adjacent sub-pixels. However, the partition structure will increase the surface resistance of the cathode, reduce the power supply voltage drop and brightness uniformity, and reduce the uniformity of the display image.
本公开提供了一种显示基板，包括：The present disclosure provides a display substrate, including:
隔断结构，设置在基底上；Partition structure, set on the base;
阳极，设置在所述基底上，所述阳极与所述隔断结构在所述基底上的正投影不交叠；An anode is arranged on the base, and the orthographic projection of the anode and the partition structure on the base does not overlap;
发光层，设置在所述阳极远离所述基底一侧，所述发光层与所述阳极连接，所述发光层在所述隔断结构处阻断；A luminescent layer, arranged on the side of the anode away from the substrate, the luminescent layer is connected to the anode, and the luminescent layer is blocked at the partition structure;
阴极，设置在所述发光层远离所述基底一侧，所述阴极与所述发光层连接，所述阴极在所述隔断结构处阻断；a cathode, arranged on the side of the luminescent layer away from the substrate, the cathode is connected to the luminescent layer, and the cathode is blocked at the partition structure;
辅助阴极，与所述阳极位于同一膜层，且互相绝缘，所述辅助阴极与所述隔断结构在所述基底上的正投影不交叠，所述辅助阴极与所述阴极电连接。The auxiliary cathode and the anode are located in the same film layer and are insulated from each other. The orthographic projections of the auxiliary cathode and the partition structure on the substrate do not overlap, and the auxiliary cathode is electrically connected to the cathode.
下面通过具体实施例详细说明本发明实施例的技术方案。The technical solutions of the embodiments of the present invention are described in detail below through specific examples.
图1为一种显示装置的结构示意图。如图1所示，显示装置可以包括时序控制器、数据信号驱动器、扫描信号驱动器和像素阵列，像素阵列可以包括多个扫描信号线(S1到Sm)、多个数据信号线(D1到Dn)和多个子像素Pxij。Figure 1 is a schematic structural diagram of a display device. As shown in FIG. 1 , the display device may include a timing controller, a data signal driver, a scanning signal driver, and a pixel array. The pixel array may include a plurality of scanning signal lines (S1 to Sm) and a plurality of data signal lines (D1 to Dn). and multiple sub-pixels Pxij.
在示例性实施方式中，时序控制器可以将适合于数据信号驱动器的规格的灰度值和控制信号提供到数据信号驱动器，可以将适合于扫描信号驱动器的规格的时钟信号、扫描起始信号等提供到扫描信号驱动器。数据信号驱动器可以利用从时序控制器接收的灰度值和控制信号来产生将提供到数据信号线D1、D2、D3、……和Dn的数据电压。例如，数据信号驱动器可以利用时钟信号对灰度值进行采样，并且以子像素行为单位将与灰度值对应的数据电压施加到数据信号线D1至Dn，n可以是自然数。扫描信号驱动器可以通过从时序控制器接收时钟信号、扫描起始信号等来产生将提供到扫描信号线S1、S2、S3、……和Sm的扫描信号。例如，扫描信号驱动器可以将具有导通电平脉冲的扫描信号顺序地提供到扫描信号线S1至Sm。例如，扫描信号驱动器可以被构造为移位寄存器的形式，并且可以以在时钟信号的控制下顺序地将以导通电平脉冲形式提供的扫描起始信号传输到下一级电路的方式产生扫描信号，m可以是自然数。子像素阵列可以包括多个像素子PXij。每个像素子PXij可以连接到对应的数据信号线和对应的扫描信号线，i和j可以是自然数。子像素PXij可以指其中晶体管连接到第i扫描信号线且连接到第j数据信号线的子像素。In an exemplary embodiment, the timing controller may provide a gray value and a control signal suitable for the specifications of the data signal driver to the data signal driver, and may provide a clock signal, a scan start signal, etc. suitable for the specifications of the scan signal driver. Provided to scan signal driver. The data signal driver may generate data voltages to be provided to the data signal lines D1, D2, D3, . . . and Dn using the grayscale values and control signals received from the timing controller. For example, the data signal driver may sample the grayscale value using a clock signal, and apply a data voltage corresponding to the grayscale value to the data signal lines D1 to Dn in sub-pixel row units, where n may be a natural number. The scan signal driver may generate scan signals to be supplied to the scan signal lines S1, S2, S3, . . . and Sm by receiving a clock signal, a scan start signal, and the like from the timing controller. For example, the scan signal driver may sequentially supply scan signals having on-level pulses to the scan signal lines S1 to Sm. For example, the scan signal driver may be configured in the form of a shift register, and may generate the scan in a manner that sequentially transmits a scan start signal provided in the form of an on-level pulse to a next-stage circuit under the control of a clock signal. Signal, m can be a natural number. The sub-pixel array may include a plurality of pixel sub-PXij. Each pixel sub-PXij can be connected to the corresponding data signal line and the corresponding scanning signal line, and i and j can be natural numbers. The sub-pixel PXij may refer to a sub-pixel in which the transistor is connected to the i-th scanning signal line and connected to the j-th data signal line.
图2为一种显示装置中显示区域的平面结构示意图。如图2所示，显示区域可以包括以矩阵方式排布的多个像素单元P，多个像素单元P的至少一个包括出射第一颜色光线的第一子像素P1、出射第二颜色光线的第二子像素P2和出射第三颜色光线的第三子像素P3，第一子像素P1、第二子像素P2和第三子像素P3均包括像素驱动电路和发光器件。子像素中的像素驱动电路分别与扫描信号线和数据信号线连接，像素驱动电路被配置为在扫描信号线的控制下，接收数据信号线传输的数据电压，向显示发光器件输出相应的电流。子像素中的显示发光器件分别与所在子像素的像素驱动电路连接，显示发光器件被配置为响应所在子像素的像素驱动电路输出的电流发出相应亮度的光。FIG2 is a schematic diagram of a planar structure of a display area in a display device. As shown in FIG2 , the display area may include a plurality of pixel units P arranged in a matrix manner, at least one of the plurality of pixel units P includes a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light, and the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 all include a pixel driving circuit and a light-emitting device. The pixel driving circuit in the sub-pixel is respectively connected to the scanning signal line and the data signal line, and the pixel driving circuit is configured to receive the data voltage transmitted by the data signal line under the control of the scanning signal line, and output a corresponding current to the display light-emitting device. The display light-emitting device in the sub-pixel is respectively connected to the pixel driving circuit of the sub-pixel in which it is located, and the display light-emitting device is configured to emit light of corresponding brightness in response to the current output by the pixel driving circuit of the sub-pixel in which it is located.
在示例性实施方式中，第一子像素P1可以是出射红色(R)光线的红色子像素、第二子像素P2可以是出射蓝色(B)光线的蓝色子像素，第三子像素P3可以是出射绿色(G)光线的绿色子像素。在示例性实施方式中，子像素的形状可以是三角形、正方形、矩形、菱形、梯形、平行四边形、五边形、六边形和其它多边形中的任意一种或多种，可以采用水平并列、竖直并列、X形、十字形、品字形、正方形、钻石形或者delta等方式排列，本公开在此不做限定。In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel emitting red (R) light, the second sub-pixel P2 may be a blue sub-pixel emitting blue (B) light, and the third sub-pixel P3 It can be a green sub-pixel that emits green (G) light. In an exemplary embodiment, the shape of the sub-pixels may be any one or more of triangles, squares, rectangles, rhombuses, trapezoids, parallelograms, pentagons, hexagons and other polygons, and may be horizontally juxtaposed, Arrangement in vertical juxtaposition, X-shape, cross-shape, Z-shape, square, diamond-shape or delta, etc. is not limited in this disclosure.
在示例性实施方式中，像素单元可以包括四个子像素，本公开在此不做限定。In an exemplary embodiment, the pixel unit may include four sub-pixels, which is not limited by the present disclosure.
图3为一种显示装置中显示区域的剖面结构示意图，示意了一种采用白光+彩膜方式实现全彩的结构。如图3所示，显示装置可以包括：基底101，设置在基底101上的驱动电路层102，设置在驱动电路层102远离基底101一侧的发光结构层103，设置在发光结构层103远离基底101一侧的第一封装层104，设置在第一封装层104远离基底101一侧的彩膜结构层105，设置在彩膜结构层105远离基底101一侧的第二封装层106，以及设置在第二封装层106远离基底101一侧的盖板层107。在一些可能的实现方式中，显示装置可以包括其它膜层，本公开在此不做限定。Figure 3 is a schematic cross-sectional structural diagram of a display area in a display device, illustrating a structure that uses white light + color film to achieve full color. As shown in FIG. 3 , the display device may include: a substrate 101 , a driving circuit layer 102 provided on the substrate 101 , a light-emitting structure layer 103 provided on a side of the driving circuit layer 102 away from the substrate 101 , and a light-emitting structure layer 103 provided on a side of the driving circuit layer 102 away from the substrate. The first encapsulation layer 104 on the side of 101, the color filter structural layer 105 disposed on the side of the first encapsulation layer 104 away from the substrate 101, the second encapsulation layer 106 disposed on the side of the color filter structural layer 105 away from the substrate 101, and the The cover layer 107 is on the side of the second encapsulation layer 106 away from the substrate 101 . In some possible implementations, the display device may include other film layers, which is not limited by this disclosure.
在示例性实施方式中，基底101可以为体硅基底或者绝缘层上硅(SOI，Silicon-On-Insulator)基底。驱动电路层102可以通过硅半导体工艺(例如CMOS工艺)制备在基底101上，驱动电路层102可以包括多个电路单元，电路单元可以至少包括像素驱动电路，像素驱动电路分别与扫描信号线和数据信号线连接，像素驱动电路可以包括多个晶体管和存储电容。晶体管可以包括控制极G、第一极S和第二极D，控制极G、第一极S和第二极D可以通过钨金属填充的过孔(即钨过孔，W-via)分别与相应的连接电极连接，并可以通过连接电极与其它电学结构(如走线等)进行连接。In an exemplary embodiment, the substrate 101 may be a bulk silicon substrate or a silicon-on-insulator (SOI, Silicon-On-Insulator) substrate. The driving circuit layer 102 can be prepared on the substrate 101 through a silicon semiconductor process (such as a CMOS process). The driving circuit layer 102 can include a plurality of circuit units. The circuit units can at least include pixel driving circuits. The pixel driving circuits are respectively connected to the scanning signal lines and data. Connected by signal lines, the pixel driving circuit may include multiple transistors and storage capacitors. The transistor may include a control electrode G, a first electrode S, and a second electrode D. The control electrode G, the first electrode S, and the second electrode D may be connected to the control electrode G, the first electrode S, and the second electrode D through a tungsten metal-filled via hole (ie, a tungsten via hole, W-via), respectively. Corresponding connection electrodes are connected, and can be connected to other electrical structures (such as wiring, etc.) through the connection electrodes.
在示例性实施方式中，发光结构层103可以包括多个发光器件，发光器件可以至少包括阳极、有机发光层和阴极，阳极可以通过连接电极与晶体管的第二极D连接，有机发光层与阳极连接，阴极与有机发光层连接，阴极与阴极电压线连接，有机发光层在阳极和阴极驱动下出射光线。在示例性实施方式中，有机发光层可以包括发光层(简称EML)，以及如下任意一种多种：空穴注入层(HIL)、空穴传输层(HTL)、电子阻挡层(EBL)、空穴阻挡层(HBL)、电子传输层(ETL)和电子注入层(EIL)。在示例性实施方式中，对于出射白光的发光器件，所有子像素的有机发光层可以是连接在一起的共通层。In an exemplary embodiment, the light-emitting structure layer 103 may include a plurality of light-emitting devices. The light-emitting device may at least include an anode, an organic light-emitting layer, and a cathode. The anode may be connected to the second electrode D of the transistor through a connecting electrode, and the organic light-emitting layer may be connected to the anode. Connection, the cathode is connected to the organic light-emitting layer, the cathode is connected to the cathode voltage line, and the organic light-emitting layer emits light driven by the anode and cathode. In exemplary embodiments, the organic light-emitting layer may include an light-emitting layer (EML for short), and any one of the following: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), Hole blocking layer (HBL), electron transport layer (ETL) and electron injection layer (EIL). In an exemplary embodiment, for a light-emitting device that emits white light, the organic light-emitting layers of all sub-pixels may be a common layer connected together.
在示例性实施方式中，第一封装层104和第二封装层106可以采用薄膜封装(ThinFilm Encapsulation，简称TFE)方式，可以保证外界水汽无法进入发光结构层，盖板层107可以采用玻璃，或者采用具可挠特性的塑胶类无色聚酰亚胺等。In an exemplary embodiment, the first encapsulation layer 104 and the second encapsulation layer 106 can adopt a thin film encapsulation (Thin Film Encapsulation, referred to as TFE) method to ensure that external water vapor cannot enter the light-emitting structure layer. The cover layer 107 can be made of glass, or a plastic colorless polyimide with flexible properties.
在示例性实施方式中，彩膜结构层105可以包括黑矩阵(BM)和彩色滤光片(CF)，彩色滤光片的位置可以与发光器件的位置相对应，黑矩阵可以位于相邻的彩色滤光片之间，彩色滤光片被配置为将发光器件出射的白光过滤成红色(R)光、绿色(G)光和蓝色(B)光，形成红色子像素、绿色子像素和蓝色子像素。In an exemplary embodiment, the color filter structure layer 105 may include a black matrix (BM) and a color filter (CF). The position of the color filter may correspond to the position of the light-emitting device, and the black matrix may be located adjacent to Between the color filters, the color filters are configured to filter the white light emitted from the light-emitting device into red (R) light, green (G) light and blue (B) light to form red sub-pixels, green sub-pixels and Blue subpixel.
图4a为本公开实施例一种显示基板的平面结构示意图，示意了一个像素单元的结构。在示例性实施方式中，如图4a所示，在平行于显示基板的方向，显示基板可以包括第一子像素区域100、第二子像素区域200、第三子像素区域300和非子像素区域100。第一子像素区域100包括设置在基底上出射第一颜色光线的第一子像素，第一子像素包括第一阳极、设置在第一阳极远离基底一侧的发光层以及设置在发光层极远离基底一侧的阴极；第二子像素区域200包括设置在基底上出射第二颜色光线的第二子像素，第二子像素包括第二阳极、设置在第二阳极远离基底一侧的发光层以及设置在发光层极远离基底一侧的阴极；第三子像素区域300包括设置在基底上出射第三颜色光线的第三子像素，第三子像素包括第三阳极、设置在第二阳极远离基底一侧的发光层以及设置在发光层极远离基底一侧的阴极。非子像素区域100为显示基板不发光的区域，非子像素区域100可以位于第一子像素区域100的四周、第二子像素区域200的四周和第三子像素区域300的四周。FIG. 4a is a schematic plan view of a display substrate according to an embodiment of the present disclosure, illustrating the structure of a pixel unit. In an exemplary embodiment, as shown in FIG. 4a, in a direction parallel to the display substrate, the display substrate may include a first sub-pixel area 100, a second sub-pixel area 200, a third sub-pixel area 300 and a non-sub-pixel area. 100. The first sub-pixel region 100 includes a first sub-pixel disposed on a substrate to emit light of a first color. The first sub-pixel includes a first anode, a luminescent layer disposed on a side of the first anode away from the substrate, and a luminescent layer disposed on a side far away from the luminescent layer. The cathode on one side of the substrate; the second sub-pixel region 200 includes a second sub-pixel disposed on the substrate to emit light of the second color, the second sub-pixel includes a second anode, a light-emitting layer disposed on the side of the second anode away from the substrate, and The cathode is arranged on the side of the light-emitting layer far away from the substrate; the third sub-pixel area 300 includes a third sub-pixel arranged on the substrate to emit light of the third color, and the third sub-pixel includes a third anode, and is arranged on the second anode away from the substrate. A light-emitting layer on one side and a cathode arranged on the side of the light-emitting layer far away from the substrate. The non-subpixel area 100 is an area of the display substrate that does not emit light. The non-subpixel area 100 may be located around the first subpixel area 100 , around the second subpixel area 200 , and around the third subpixel area 300 .
在示例性实施方式中，第一子像素区域100、第二子像素区域200和第三子像素区域300可以共用一个阴极3和发光层，即阴极3和发光层可以是连接在一起的共通层。In an exemplary embodiment, the first sub-pixel region 100 , the second sub-pixel region 200 , and the third sub-pixel region 300 may share one cathode 3 and light emitting layer, that is, the cathode 3 and the light emitting layer may be a common layer connected together.
在示例性实施方式中，第一子像素区域100、第二子像素区域200和第三子像素区域300的形状均为矩形。第一子像素区域100和第二子像素区域200可以沿着第二方向D2间隔排布，形成子像素行。第三子像素区域300位于该子像素行在第一方向D1的一侧。第一子像素区域100、第二子像素区域200和第三子像素区域300呈品字形排布。其中，第一方向D1和第二方向D2均平行于显示基板所在平面，第一方向D1和第二方向D2互相交叉，示例的，第一方向D1和第二方向D2互相垂直。In an exemplary embodiment, the shapes of the first sub-pixel area 100, the second sub-pixel area 200 and the third sub-pixel area 300 are all rectangular. The first sub-pixel area 100 and the second sub-pixel area 200 may be arranged at intervals along the second direction D2 to form a sub-pixel row. The third sub-pixel area 300 is located on one side of the sub-pixel row in the first direction D1. The first sub-pixel area 100, the second sub-pixel area 200 and the third sub-pixel area 300 are arranged in a Z-shape. The first direction D1 and the second direction D2 are both parallel to the plane of the display substrate, and the first direction D1 and the second direction D2 cross each other. For example, the first direction D1 and the second direction D2 are perpendicular to each other.
在示例性实施方式中，显示基板还可以包括设置在基底上的隔断结构10。隔断结构10位于非子像素区域400，隔断结构10设置在第一子像素区域100、第二子像素区域200和第三子像素区域300中的至少一侧，用于将相邻子像素区域的发光层和阴极3隔断，避免相邻子像素区域的电流串扰，解决低灰阶的子像素被点亮的问题。In an exemplary embodiment, the display substrate may further include a partition structure 10 disposed on the substrate. The partition structure 10 is located in the non-subpixel area 400. The partition structure 10 is provided on at least one side of the first sub-pixel area 100, the second sub-pixel area 200 and the third sub-pixel area 300 to separate adjacent sub-pixel areas. The light-emitting layer is separated from the cathode 3 to avoid current crosstalk in adjacent sub-pixel areas and solve the problem of low-gray-scale sub-pixels being lit.
在示例性实施方式中，显示基板可以包括第一隔断结构11、第二隔断结构12、第三隔断结构13、第四隔断结构14、第五隔断结构15和第六隔断结构16。In an exemplary embodiment, the display substrate may include a first partition structure 11 , a second partition structure 12 , a third partition structure 13 , a fourth partition structure 14 , a fifth partition structure 15 and a sixth partition structure 16 .
在示例性实施方式中，第一隔断结构11的形状呈线状，沿着第一方向D1延伸，第一隔断结构11位于非子像素区域400。第一隔断结构11设置在第一子像素区域100在第二方向D2的一侧，设置在第一子像素区域100和第二子像素区域200之间。发光层和阴极3可以在第一隔断结构11处阻断，避免第一子像素区域100的子像素和第二子像素区域200的子像素的电流串扰。In an exemplary embodiment, the first partition structure 11 is linear in shape, extends along the first direction D1 , and is located in the non-subpixel area 400 . The first partition structure 11 is provided on one side of the first sub-pixel region 100 in the second direction D2 and between the first sub-pixel region 100 and the second sub-pixel region 200 . The light-emitting layer and the cathode 3 can be blocked at the first isolation structure 11 to avoid current crosstalk between the sub-pixels of the first sub-pixel region 100 and the sub-pixels of the second sub-pixel region 200 .
在示例性实施方式中，第二隔断结构12的形状呈线状，沿着第二方向D2延伸，第二隔断结构12位于非子像素区域400。第二隔断结构12设置在第一子像素区域100在第一方向D1反方向的一侧，设置在第一子像素区域100远离第三子像素区域300的一侧。发光层和阴极3可以在第二隔断结构12处阻断，避免第一子像素区域100的子像素与相邻像素单元的子像素的电流串扰。In an exemplary embodiment, the second partition structure 12 is linear in shape and extends along the second direction D2, and the second partition structure 12 is located in the non-sub-pixel region 400. The second partition structure 12 is disposed on a side of the first sub-pixel region 100 in the opposite direction of the first direction D1, and is disposed on a side of the first sub-pixel region 100 away from the third sub-pixel region 300. The light-emitting layer and the cathode 3 can be blocked at the second partition structure 12 to avoid current crosstalk between the sub-pixel of the first sub-pixel region 100 and the sub-pixel of the adjacent pixel unit.
在示例性实施方式中，第三隔断结构13的形状呈线状，沿着第一方向D1延伸，第三隔断结构13位于非子像素区域400。第三隔断结构13设置在第二子像素区域200在第二方向D2的一侧，设置在第二子像素区域200远离第一子像素区域100的一侧。发光层和阴极3可以在第三隔断结构13处阻断，避免第二子像素区域200的子像素与相邻像素单元的子像素的电流串扰。In an exemplary embodiment, the third partition structure 13 is linear in shape, extends along the first direction D1 , and is located in the non-sub-pixel region 400 . The third partition structure 13 is provided on the side of the second sub-pixel region 200 in the second direction D2 and is provided on the side of the second sub-pixel region 200 away from the first sub-pixel region 100 . The light-emitting layer and the cathode 3 can be blocked at the third isolation structure 13 to avoid current crosstalk between the sub-pixels of the second sub-pixel region 200 and the sub-pixels of adjacent pixel units.
在示例性实施方式中，第四隔断结构14的形状呈线状，沿着第二方向D2延伸，第四隔断结构14位于非子像素区域400。第四隔断结构14设置在第二子像素区域200在第一方向D1反方向的一侧，设置在第二子像素区域200远离第三子像素区域300的一侧。发光层和阴极3可以在第四隔断结构14处阻断，避免第二子像素区域200的子像素与相邻像素单元的子像素的电流串扰。In an exemplary embodiment, the fourth partition structure 14 is linear in shape and extends along the second direction D2, and the fourth partition structure 14 is located in the non-sub-pixel area 400. The fourth partition structure 14 is provided on the side of the second sub-pixel region 200 in the opposite direction to the first direction D1 and is provided on the side of the second sub-pixel region 200 away from the third sub-pixel region 300 . The light-emitting layer and the cathode 3 can be blocked at the fourth isolation structure 14 to avoid current crosstalk between the sub-pixels of the second sub-pixel region 200 and the sub-pixels of adjacent pixel units.
在示例性实施方式中，第五隔断结构15的形状呈线状，沿着第二方向D2延伸，第五隔断结构15位于非子像素区域400。第五隔断结构15设置在第三子像素区域300在第一方向D1反方向的一侧，设置在第三子像素区域300与第一子像素区域100之间。发光层和阴极3可以在第五隔断结构15处阻断，避免第三子像素区域300的子像素与第一子像素区域100的子像素的电流串扰。In an exemplary embodiment, the fifth partition structure 15 is linear in shape and extends along the second direction D2, and the fifth partition structure 15 is located in the non-sub-pixel area 400. The fifth partition structure 15 is disposed on the opposite side of the third sub-pixel region 300 in the first direction D1 and between the third sub-pixel region 300 and the first sub-pixel region 100 . The light-emitting layer and the cathode 3 can be blocked at the fifth isolation structure 15 to avoid current crosstalk between the sub-pixels in the third sub-pixel region 300 and the sub-pixels in the first sub-pixel region 100 .
在示例性实施方式中，第六隔断结构16的形状呈线状，沿着第二方向D2延伸，第六隔断结构16位于非子像素区域400。第六隔断结构16设置在第三子像素区域300在第一方向D1反方向的一侧，设置在第三子像素区域300与第二子像素区域200之间。发光层和阴极3可以在第六隔断结构16处阻断，避免第三子像素区域300的子像素与第二子像素区域200的子像素的电流串扰。In an exemplary embodiment, the sixth partition structure 16 is linear in shape and extends along the second direction D2, and the sixth partition structure 16 is located in the non-sub-pixel region 400. The sixth partition structure 16 is disposed on the opposite side of the third sub-pixel region 300 in the first direction D1 and between the third sub-pixel region 300 and the second sub-pixel region 200 . The light-emitting layer and the cathode 3 can be blocked at the sixth isolation structure 16 to avoid current crosstalk between the sub-pixels of the third sub-pixel region 300 and the sub-pixels of the second sub-pixel region 200 .
在示例性实施方式中，显示基板还可以包括设置在基底上的辅助阴极20。辅助阴极20位于非子像素区域400，与第一子像素区域100、第二子像素区域200和第三子像素区域300在基底上的正投影均不交叠。辅助阴极20可以与子像素的阳极位于同一膜层，辅助阴极20可以与阳极在基底上的正投影不交叠，且辅助阴极20与阳极互相绝缘。辅助阴极20可以与阴极3在基底上的正投影交叠，示例的，辅助阴极20在基底上的正投影位于阴极3在基底上的正投影中。辅助阴极20可以与阴极3电连接。In an exemplary embodiment, the display substrate may further include an auxiliary cathode 20 disposed on the substrate. The auxiliary cathode 20 is located in the non-sub-pixel area 400, and does not overlap with the orthographic projections of the first sub-pixel area 100, the second sub-pixel area 200, and the third sub-pixel area 300 on the substrate. The auxiliary cathode 20 may be located in the same film layer as the anode of the sub-pixel, the auxiliary cathode 20 may not overlap with the orthographic projection of the anode on the substrate, and the auxiliary cathode 20 and the anode are insulated from each other. The auxiliary cathode 20 may overlap with the orthographic projection of the cathode 3 on the substrate, and for example, the orthographic projection of the auxiliary cathode 20 on the substrate is located in the orthographic projection of the cathode 3 on the substrate. The auxiliary cathode 20 may be electrically connected to the cathode 3.
本公开实施例显示基板通过辅助阴极20与阴极3电连接，减小了阴极3的电阻，增大了电源压降，提升亮度均匀性和显示画面的均一性。The display substrate in the embodiment of the present disclosure is electrically connected to the cathode 3 through the auxiliary cathode 20, which reduces the resistance of the cathode 3, increases the power supply voltage drop, and improves the uniformity of brightness and the uniformity of the display screen.
在示例性实施方式中，辅助阴极20可以与发光器件的阳极采用同一种导电材料，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。In an exemplary embodiment, the auxiliary cathode 20 and the anode of the light-emitting device may be made of the same conductive material and prepared through the same preparation process, thereby simplifying the preparation process and reducing production costs.
在示例性实施方式中，辅助阴极20与隔断结构10在基底上的正投影不交叠，避免辅助阴极20在隔断结构10处阻断，降低辅助阴极20对阴极3电阻的减小，导致阴极3电阻较大。In an exemplary embodiment, the orthographic projections of the auxiliary cathode 20 and the partition structure 10 on the substrate do not overlap, preventing the auxiliary cathode 20 from being blocked at the partition structure 10 and reducing the resistance of the auxiliary cathode 20 to the cathode 3, resulting in the cathode 3 The resistance is larger.
在示例性实施方式中，辅助阴极20的形状呈网格状。辅助阴极20可以围绕第一子像素区域100的四周设置，围绕第二子像素区域200的四周设置，以及围绕第三子像素区域300的四周设置。In an exemplary embodiment, the auxiliary cathode 20 is shaped like a grid. The auxiliary cathode 20 may be disposed around the first sub-pixel area 100 , around the second sub-pixel area 200 , and around the third sub-pixel area 300 .
在示例性实施方式中，显示基板还可以包括设置在辅助阴极20与阴极3之间的连接过孔30，连接过孔30均与阳极和隔断结构10在基底上的正投影不交叠。连接过孔30可以位于非子像素区域400，连接过孔30将至少部分辅助阴极20暴露，至少部分阴极3通过连接过孔30与辅助阴极20连接。In an exemplary embodiment, the display substrate may further include a connection via 30 disposed between the auxiliary cathode 20 and the cathode 3, and the connection vias 30 do not overlap with the orthographic projections of the anode and the partition structure 10 on the substrate. The connection via 30 may be located in the non-sub-pixel region 400, and the connection via 30 exposes at least a portion of the auxiliary cathode 20, and at least a portion of the cathode 3 is connected to the auxiliary cathode 20 through the connection via 30.
在示例性实施方式中，连接过孔30均与阴极3和辅助阴极20在基底上的正投影存在交叠，示例的，连接过孔30在基底上的正投影位于阴极3和辅助阴极20在基底上的正投影中。In an exemplary embodiment, the connection via holes 30 overlap with the orthographic projections of the cathode 3 and the auxiliary cathode 20 on the substrate. For example, the orthographic projections of the connection via holes 30 on the substrate are located between the cathode 3 and the auxiliary cathode 20 . In orthographic projection on the base.
在示例性实施方式中，连接过孔30在基底上的正投影的形状可以包括圆形、椭圆形、菱形、矩形、五边形、六边形、七变形和八边形中的至少一种。In an exemplary embodiment, the shape of the orthographic projection of the connection via 30 on the substrate may include at least one of a circle, an ellipse, a rhombus, a rectangle, a pentagon, a hexagon, a heptagon, and an octagon. .
在示例性实施方式中，显示基板还可以包括第一连接过孔31和第二连接过孔32，第一连接过孔31和第二连接过孔32均设置在辅助阴极20远离基底一侧，第一连接过孔31和第二连接过孔32均将辅助阴极20暴露。第一连接过孔31设置在第三子像素区域300在第二方向D2反方向的一侧。辅助阴极20上设置有第一凸块211，第一凸块211在第二方向D2上凸出辅助阴极20的边缘，第一凸块211朝向靠近第三子像素区域300的方向凸出。第一连接过孔31与第一凸块211在基底上的正投影交叠，第一连接过孔31将至少部分第一凸块211暴露，至少部分阴极3通过第一连接过孔31与第一凸块211连接。第二连接过孔32设置在第三子像素区域300在第二方向D2的一侧。辅助阴极20上设置有第二凸块231，第二凸块231在第二方向D2上凸出辅助阴极20的边缘，第二凸块231朝向靠近第三子像素区域300的方向凸出。第二连接过孔32与第二凸块231在基底上的正投影交叠，第二连接过孔32将至少部分第二凸块231暴露，至少部分阴极3通过第二连接过孔32与第二凸块231连接。In an exemplary embodiment, the display substrate may further include a first connection via hole 31 and a second connection via hole 32. The first connection via hole 31 and the second connection via hole 32 are both disposed on the side of the auxiliary cathode 20 away from the substrate, Both the first connection via hole 31 and the second connection via hole 32 expose the auxiliary cathode 20 . The first connection via 31 is provided on the opposite side of the third sub-pixel region 300 in the second direction D2. A first bump 211 is provided on the auxiliary cathode 20 . The first bump 211 protrudes from the edge of the auxiliary cathode 20 in the second direction D2 . The first bump 211 protrudes toward the direction close to the third sub-pixel region 300 . The orthographic projections of the first connection via hole 31 and the first bump 211 on the substrate overlap. The first connection via hole 31 exposes at least part of the first bump 211 . At least part of the cathode 3 is connected to the first bump 211 through the first connection via hole 31 . A bump 211 is connected. The second connection via 32 is provided on one side of the third sub-pixel region 300 in the second direction D2. A second bump 231 is provided on the auxiliary cathode 20 . The second bump 231 protrudes from the edge of the auxiliary cathode 20 in the second direction D2 . The second bump 231 protrudes toward the direction close to the third sub-pixel region 300 . The orthographic projections of the second connection via hole 32 and the second bump 231 on the substrate overlap. The second connection via hole 32 exposes at least part of the second bump 231 . At least part of the cathode 3 is connected to the second bump 231 through the second connection via hole 32 . Two bumps 231 are connected.
在示例性实施方式中，发光层中设置有连接避让孔70，所述连接避让孔70在所述基底上的正投影覆盖所述连接过孔30在所述基底上的正投影，当阴极3通过连接过孔30与辅助阴极20连接时，位于阴极3与辅助阴极20之间的发光层通过连接避让孔70与阴极3隔开，发光层通过连接避让孔70中的绝缘材料与连接过孔30中的阴极3绝缘。In an exemplary embodiment, a connection escape hole 70 is provided in the light-emitting layer, and the orthographic projection of the connection escape hole 70 on the substrate covers the orthographic projection of the connection via hole 30 on the substrate. When the cathode 3 When connected to the auxiliary cathode 20 through the connection via hole 30, the luminescent layer located between the cathode 3 and the auxiliary cathode 20 is separated from the cathode 3 through the connection escape hole 70, and the luminescent layer is connected to the connection via hole through the insulating material in the connection escape hole 70. Cathode 3 in 30 is insulated.
图4b为本公开实施例一种显示基板的剖面结构示意图，示意了图4a中B-B’方向的剖视图。在示例性实施方式中，如图4b所示，在垂直于显示基板的方向，显示基板可以包括基底101，设置在基底101上的辅助阴极20，设置在辅助阴极20远离基底101一侧的像素定义层6，设置在像素定义层6远离基底101一侧的发光层7，以及设置在发光层7远离基底101一侧的阴极3。Figure 4b is a schematic cross-sectional structural view of a display substrate according to an embodiment of the present disclosure, illustrating a cross-sectional view along the B-B' direction in Figure 4a. In an exemplary embodiment, as shown in FIG. 4b, in a direction perpendicular to the display substrate, the display substrate may include a substrate 101, an auxiliary cathode 20 disposed on the substrate 101, and pixels disposed on a side of the auxiliary cathode 20 away from the substrate 101. The definition layer 6 , the light-emitting layer 7 provided on the side of the pixel definition layer 6 away from the substrate 101 , and the cathode 3 provided on the side of the light-emitting layer 7 away from the substrate 101 .
在示例性实施方式中，像素定义层6中设置有连接过孔30，连接过孔30沿着垂直于基底101方向延伸，连接过孔30贯穿像素定义层6，将至少部分辅助阴极20暴露。In an exemplary embodiment, a connection via 30 is provided in the pixel definition layer 6 . The connection via 30 extends in a direction perpendicular to the substrate 101 . The connection via 30 penetrates the pixel definition layer 6 and exposes at least a portion of the auxiliary cathode 20 .
在示例性实施方式中，发光层7中设置有连接避让孔70，连接避让孔70与连接过孔30连通，所述连接避让孔70在所述基底上的正投影覆盖所述连接过孔30在所述基底上的正投影。In an exemplary embodiment, a connection escape hole 70 is provided in the light-emitting layer 7 , the connection escape hole 70 is connected with the connection via hole 30 , and the orthographic projection of the connection escape hole 70 on the substrate covers the connection via hole 30 Orthographic projection on the base.
在示例性实施方式中，至少部分阴极3填充连接避让孔70和连接过孔30，覆盖连接避让孔70和连接过孔30的侧壁以及连接过孔30的底壁。阴极3通过连接避让孔70和连接过孔30与辅助阴极20连接。In an exemplary embodiment, at least part of the cathode 3 fills the connection escape hole 70 and the connection via hole 30 , covering the side walls of the connection escape hole 70 and the connection via hole 30 and the bottom wall of the connection via hole 30 . The cathode 3 is connected to the auxiliary cathode 20 through the connection escape hole 70 and the connection via hole 30 .
图5为本公开实施例一种显示基板的剖面结构示意图，示意了图4a中A-A’方向的剖视图。在示例性实施方式中，如图5所示，在垂直于显示基板的方向，显示基板可以包括基底101，设置在基底101上的第一连接电极1-1和第二连接电极1-2，设置在第一连接电极1-1和第二连接电极1-2远离基底101一侧的有机介质层2，设置在有机介质层2远离基底101一侧的无机介质层4，设置在无机介质层4远离基底101一侧的第一阳极5-1和第二阳极5-2，设置在第一阳极5-1和第二阳极5-2远离基底101一侧的像素定义层6，设置在像素定义层6远离基底101一侧的发光层7，以及设置在发光层7远离基底101一侧的阴极3。第一阳极5-1和第二阳极5-2均与发光层7电连接，阴极3与发光层7电连接，发光层7在第一阳极5-1和阴极3驱动下出射光线，和/或在第二阳极5-2和阴极3驱动下出射光线。其中，第一阳极5-1、发光层7和阴极3形成第一子像素的发光器件，第二阳极5-2、发光层7和阴极3形成第二子像素的发光器件，发光层7和阴极3可以是连接在一起的共通层。FIG. 5 is a schematic cross-sectional structural view of a display substrate according to an embodiment of the present disclosure, illustrating a cross-sectional view along the A-A’ direction in FIG. 4a. In an exemplary embodiment, as shown in FIG. 5 , in a direction perpendicular to the display substrate, the display substrate may include a substrate 101, a first connection electrode 1-1 and a second connection electrode 1-2 disposed on the substrate 101, The organic dielectric layer 2 is provided on the side of the first connection electrode 1-1 and the second connection electrode 1-2 away from the substrate 101, the inorganic dielectric layer 4 is provided on the side of the organic dielectric layer 2 away from the substrate 101, and the inorganic dielectric layer 4 is provided on the side of the organic dielectric layer 2 away from the substrate 101. 4. The first anode 5-1 and the second anode 5-2 on the side away from the substrate 101 are arranged on the pixel definition layer 6 on the side of the first anode 5-1 and the second anode 5-2 away from the substrate 101. The defining layer 6 is the luminescent layer 7 on the side away from the substrate 101, and the cathode 3 is disposed on the side of the luminescent layer 7 away from the substrate 101. The first anode 5-1 and the second anode 5-2 are both electrically connected to the luminescent layer 7, the cathode 3 is electrically connected to the luminescent layer 7, the luminescent layer 7 emits light driven by the first anode 5-1 and the cathode 3, and/ Or emit light driven by the second anode 5-2 and the cathode 3. Among them, the first anode 5-1, the light-emitting layer 7 and the cathode 3 form the light-emitting device of the first sub-pixel, the second anode 5-2, the light-emitting layer 7 and the cathode 3 form the light-emitting device of the second sub-pixel, and the light-emitting layer 7 and The cathode 3 may be a common layer connected together.
在示例性实施方式中，第一连接电极1-1可以与第一子像素的像素驱动电路电连接，第二连接电极1-2可以与第二子像素的像素驱动电路电连接。第一连接电极1-1和第二连接电极1-2可以采用同一种导电薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。In an exemplary embodiment, the first connection electrode 1-1 may be electrically connected to a pixel driving circuit of a first sub-pixel, and the second connection electrode 1-2 may be electrically connected to a pixel driving circuit of a second sub-pixel. The first connection electrode 1-1 and the second connection electrode 1-2 may be made of the same conductive film and prepared by the same preparation process, thereby simplifying the preparation process and reducing production costs.
在示例性实施方式中，有机介质层2可以是连接在一起的共通层。有机介质层2中设置有第一过孔2-1和第二过孔2-2，第一过孔2-1将至少部分第一连接电极1-1暴露，第二过孔2-2将至少部分第二连接电极1-2暴露。In an exemplary embodiment, the organic medium layer 2 may be a common layer connected together. The organic dielectric layer 2 is provided with a first via hole 2-1 and a second via hole 2-2. The first via hole 2-1 exposes at least part of the first connection electrode 1-1, and the second via hole 2-2 exposes at least part of the first connection electrode 1-1. At least part of the second connection electrode 1-2 is exposed.
在示例性实施方式中，无机介质层4包括第一无机介质图案41和第二无机介质图案42，第一无机介质图案41和第二无机介质图案42可以采用同一种无机薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。In an exemplary embodiment, the inorganic dielectric layer 4 includes a first inorganic dielectric pattern 41 and a second inorganic dielectric pattern 42. The first inorganic dielectric pattern 41 and the second inorganic dielectric pattern 42 can use the same inorganic film and adopt the same preparation process. prepared, thereby simplifying the preparation process and reducing production costs.
在示例性实施方式中，第一无机介质图案41中设置有第三过孔2-3，第三过孔2-3在基底101的正投影位于第一过孔2-1在基底101的正投影中，第三过孔2-3的至少部分侧壁沿着平行于基底101的方向伸出第一过孔2-1的侧壁。In an exemplary embodiment, a third via hole 2-3 is provided in the first inorganic medium pattern 41, and the orthographic projection of the third via hole 2-3 on the substrate 101 is located at the orthogonal projection of the first via hole 2-1 on the substrate 101. In projection, at least part of the side wall of the third via hole 2 - 3 protrudes from the side wall of the first via hole 2 - 1 in a direction parallel to the substrate 101 .
在示例性实施方式中，第二无机介质图案42中设置有第四过孔2-4，第四过孔2-4在基底101的正投影位于第二过孔2-2在基底101的正投影中，第四过孔2-4的至少部分侧壁沿着平行于基底101的方向伸出第二过孔2-2的侧壁。In an exemplary embodiment, a fourth via 2-4 is provided in the second inorganic dielectric pattern 42, the orthographic projection of the fourth via 2-4 on the substrate 101 is located in the orthographic projection of the second via 2-2 on the substrate 101, and at least part of the side wall of the fourth via 2-4 extends out of the side wall of the second via 2-2 in a direction parallel to the substrate 101.
在示例性实施方式中，第一阳极5-1和第二阳极5-2可以采用同一种导电薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。第一阳极5-1通过第一过孔2-1和第三过孔2-3与第一连接电极1-1连接，第二阳极5-2通过第二过孔2-2和第四过孔2-4与第二连接电极1-2连接。In an exemplary embodiment, the first anode 5-1 and the second anode 5-2 can be made of the same conductive film through the same preparation process, thereby simplifying the preparation process and reducing production costs. The first anode 5-1 is connected to the first connection electrode 1-1 through the first via hole 2-1 and the third via hole 2-3, and the second anode 5-2 is connected through the second via hole 2-2 and the fourth via hole 2-2. The hole 2-4 is connected to the second connection electrode 1-2.
在示例性实施方式中，像素定义层6可以是连接在一起的共通层。像素定义层6中设置有第一像素开口6-1和第二像素开口6-2，第一像素开口6-1将至少部分第一阳极5-1暴露，至少部分第一阳极5-1可以作为第一像素开口6-1的底壁；第二像素开口6-2将至少部分第二阳极5-2暴露，至少部分第二阳极5-2可以作为第二像素开口6-2的底壁。In an exemplary embodiment, the pixel definition layer 6 may be a common layer connected together. A first pixel opening 6-1 and a second pixel opening 6-2 are provided in the pixel definition layer 6. The first pixel opening 6-1 exposes at least a portion of the first anode 5-1, and at least a portion of the first anode 5-1 may serve as a bottom wall of the first pixel opening 6-1. The second pixel opening 6-2 exposes at least a portion of the second anode 5-2, and at least a portion of the second anode 5-2 may serve as a bottom wall of the second pixel opening 6-2.
在示例性实施方式中，发光层7可以是连接在一起的共通层。发光层7与第一阳极5-1和第二阳极5-2在基底101上的正投影存在交叠。示例的，第一阳极5-1在基底101上的正投影位于发光层7在基底101上的正投影中，第二阳极5-2在基底101上的正投影位于发光层7在基底101上的正投影中。至少部分发光层7覆盖第一像素开口6-1的侧壁和底壁，至少部分发光层7通过第一像素开口6-1与第一阳极5-1电连接；至少部分发光层7覆盖第二像素开口6-2的侧壁和底壁，至少部分发光层7通过第二像素开口6-2与第二阳极5-2电连接。In an exemplary embodiment, the light-emitting layer 7 may be a common layer connected together. The light-emitting layer 7 overlaps with the orthographic projections of the first anode 5-1 and the second anode 5-2 on the substrate 101. For example, the orthographic projection of the first anode 5-1 on the substrate 101 is located in the orthographic projection of the light-emitting layer 7 on the substrate 101, and the orthographic projection of the second anode 5-2 on the substrate 101 is located in the orthographic projection of the light-emitting layer 7 on the substrate 101. At least part of the light-emitting layer 7 covers the side walls and bottom walls of the first pixel opening 6-1, and at least part of the light-emitting layer 7 is electrically connected to the first anode 5-1 through the first pixel opening 6-1; at least part of the light-emitting layer 7 covers the side walls and bottom walls of the second pixel opening 6-2, and at least part of the light-emitting layer 7 is electrically connected to the second anode 5-2 through the second pixel opening 6-2.
在示例性实施方式中，阴极3可以是连接在一起的共通层。至少部分阴极3与发光层7电连接。至少部分阴极3与第一阳极5-1和第二阳极5-2在基底101上的正投影存在交叠。示例的，第一阳极5-1在基底101上的正投影位于阴极3在基底101上的正投影中，第二阳极5-2在基底101上的正投影位于阴极3在基底101上的正投影中。In an exemplary embodiment, the cathode 3 may be a common layer connected together. At least part of the cathode 3 is electrically connected to the light-emitting layer 7 . At least part of the cathode 3 overlaps with the orthographic projections of the first anode 5-1 and the second anode 5-2 on the substrate 101. For example, the orthographic projection of the first anode 5-1 on the substrate 101 is located in the orthographic projection of the cathode 3 on the substrate 101, and the orthographic projection of the second anode 5-2 on the substrate 101 is located in the orthographic projection of the cathode 3 on the substrate 101. Projecting.
在示例性实施方式中，在垂直于显示基板的方向，显示基板还包括设置在基底101上的隔断结构10，隔断结构10位于相邻子像素之间，将相邻子像素的发光层和阴极阻断。示例的，隔断结构10位于第一子像素和第二子像素之间，将第一子像素的发光层和阴极与第二子像素的发光层和阴极阻断。In an exemplary embodiment, in a direction perpendicular to the display substrate, the display substrate further includes a partition structure 10 disposed on the substrate 101. The partition structure 10 is located between adjacent sub-pixels and connects the light-emitting layer and cathode of the adjacent sub-pixels. Block. For example, the partition structure 10 is located between the first sub-pixel and the second sub-pixel, blocking the light-emitting layer and cathode of the first sub-pixel from the light-emitting layer and cathode of the second sub-pixel.
本公开实施例显示基板通过隔断结构10将相邻子像素的发光层和阴极阻断，避免相邻子像素的电流互相串扰。The embodiment of the present disclosure shows that the substrate blocks the light-emitting layer and cathode of adjacent sub-pixels through the partition structure 10 to avoid crosstalk between currents of adjacent sub-pixels.
在示例性实施方式中，隔断结构10包括第一隔离墙10-1、第二隔离墙10-2以及位于第一隔离墙10-1与第二隔离墙10-2之间的隔离槽10-3。第一隔离墙10-1位于靠近第一子像素一侧，第二隔离墙10-2位于靠近第二子像素一侧。In an exemplary embodiment, the partition structure 10 includes a first isolation wall 10-1, a second isolation wall 10-2, and an isolation groove 10- located between the first isolation wall 10-1 and the second isolation wall 10-2. 3. The first isolation wall 10-1 is located on the side close to the first sub-pixel, and the second isolation wall 10-2 is located on the side close to the second sub-pixel.
在示例性实施方式中，第一隔离墙10-1包括设置在基底101上的第一隔离层111以及设置在第一隔离层111远离基底101一侧的第二隔离层112。第一隔离层111可以与相邻的有机介质层2连接成一体，采用同一种有机薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。第二隔离层112可以与相邻的第一无机介质图案41连接成一体，采用同一种无机薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。In an exemplary embodiment, the first isolation wall 10-1 includes a first isolation layer 111 disposed on the base 101 and a second isolation layer 112 disposed on a side of the first isolation layer 111 away from the base 101. The first isolation layer 111 can be integrated with the adjacent organic dielectric layer 2 and is made of the same organic film and prepared through the same preparation process, thereby simplifying the preparation process and reducing production costs. The second isolation layer 112 can be integrated with the adjacent first inorganic dielectric pattern 41 and made of the same inorganic film through the same preparation process, thus simplifying the preparation process and reducing production costs.
在示例性实施方式中，第二隔离层112的至少部分沿着平行于基底101的方向伸出第一隔离层111的侧壁，形成凸台51。像素定义层6覆盖第二隔离层112远离基底一侧的表面，将至少部分第二隔离层112远离基底一侧的表面以及侧面暴漏，发光层7和阴极3在凸台51处阻断。In an exemplary embodiment, at least part of the second isolation layer 112 extends out of the sidewall of the first isolation layer 111 in a direction parallel to the substrate 101 to form a boss 51 . The pixel definition layer 6 covers the surface of the second isolation layer 112 away from the substrate, exposing at least part of the surface and side surfaces of the second isolation layer 112 away from the substrate, and the light-emitting layer 7 and the cathode 3 are blocked at the boss 51 .
在示例性实施方式中，第二隔离墙10-2包括设置在基底101上的第三隔离层113以及设置在第三隔离层113远离基底101一侧的第四隔离层114。第三隔离层113可以与相邻的有机介质层2连接成一体，采用同一种有机薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。第四隔离层114可以与相邻的第二无机介质图案42连接成一体，采用同一种无机薄膜，通过同一制备工艺制备而成，从而简化了制备工艺，降低了生产成本。In an exemplary embodiment, the second isolation wall 10 - 2 includes a third isolation layer 113 disposed on the base 101 and a fourth isolation layer 114 disposed on a side of the third isolation layer 113 away from the base 101 . The third isolation layer 113 can be integrated with the adjacent organic dielectric layer 2 and is made of the same organic film and prepared through the same preparation process, thereby simplifying the preparation process and reducing production costs. The fourth isolation layer 114 can be integrated with the adjacent second inorganic dielectric pattern 42 and made of the same inorganic film through the same preparation process, thus simplifying the preparation process and reducing production costs.
在示例性实施方式中，第四隔离层114靠近第一隔离墙10-1一侧的侧壁与第三隔离层113靠近第一隔离墙10-1一侧的侧壁形成连续的平坦面，像素定义层6、发光层7和阴极3形成的堆叠结构覆盖第四隔离层114的侧壁与第三隔离层113的侧壁形成的平坦面。In an exemplary embodiment, the side wall of the fourth isolation layer 114 close to the first isolation wall 10-1 and the side wall of the third isolation layer 113 close to the first isolation wall 10-1 form a continuous flat surface, The stacked structure formed by the pixel definition layer 6, the light-emitting layer 7 and the cathode 3 covers the flat surface formed by the side walls of the fourth isolation layer 114 and the third isolation layer 113.
在示例性实施方式中，隔离槽10-3的槽底为有机介质层2，发光层7和阴极3形成的堆叠结构覆盖覆盖隔离槽10-3的槽底。In an exemplary embodiment, the bottom of the isolation trench 10-3 is the organic dielectric layer 2, and the stacked structure formed by the light-emitting layer 7 and the cathode 3 covers the bottom of the isolation trench 10-3.
下面通过显示基板的制备过程进行示例性说明。本公开所说的“图案化工艺”，对于金属材料、无机材料或透明导电材料，包括涂覆光刻胶、掩模曝光、显影、刻蚀、剥离光刻胶等处理，对于有机材料，包括涂覆有机材料、掩模曝光和显影等处理。沉积可以采用溅射、蒸镀、化学气相沉积中的任意一种或多种，涂覆可以采用喷涂、旋涂和喷墨打印中的任意一种或多种，刻蚀可以采用干刻和湿刻中的任意一种或多种，本公开不做限定。“薄膜”是指将某一种材料在基底上利用沉积、涂覆或其它工艺制作出的一层薄膜。若在整个制作过程当中该“薄膜”无需图案化工艺，则该“薄膜”还可以称为“层”。若在整个制作过程当中该“薄膜”需图案化工艺，则在图案化工艺前称为“薄膜”，图案化工艺后称为“层”。经过图案化工艺后的“层”中包含至少一个“图案”。本公开所说的“A和B同层设置”是指，A和B通过同一次图案化工艺同时形成，膜层的“厚度”为膜层在垂直于显示基板方向上的尺寸。本公开示例性实施例中，“B的正投影位于A的正投影的范围之内”或者“A的正投影包含B的正投影”是指，B的正投影的边界落入A的正投影的边界范围内，或者A的正投影的边界与B的正投影的边界重叠。The following is an exemplary description through the preparation process of the display substrate. The "patterning process" mentioned in this disclosure includes processes such as coating of photoresist, mask exposure, development, etching, and stripping of photoresist for metal materials, inorganic materials, or transparent conductive materials. For organic materials, it includes Processes such as coating of organic materials, mask exposure and development. Deposition can use any one or more of sputtering, evaporation, and chemical vapor deposition. Coating can use any one or more of spraying, spin coating, and inkjet printing. Etching can use dry etching and wet etching. Any one or more of them are not limited by this disclosure. "Thin film" refers to a thin film produced by depositing, coating or other processes of a certain material on a substrate. If the "thin film" does not require a patterning process during the entire production process, the "thin film" can also be called a "layer." If the "thin film" requires a patterning process during the entire production process, it will be called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern". “A and B are arranged on the same layer” mentioned in this disclosure means that A and B are formed simultaneously through the same patterning process, and the “thickness” of the film layer is the size of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiment of the present disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the orthographic projection of A. within the bounds of A, or the bounds of the orthographic projection of A overlap with the bounds of the orthographic projection of B.
在示例性实施方式中，本实施例显示基板的制备过程可以包括如下操作。In an exemplary embodiment, this embodiment shows that the preparation process of the substrate may include the following operations.
(11)形成无机介质层和隔断结构。在示例性实施方式中，形成无机介质层和隔断结构可以包括：先在基底上形成有机介质层；随后，在有机介质层上沉积无机绝缘薄膜，通过图案化工艺对无机绝缘薄膜进行图案化，形成无机介质层，无机介质层包括间隔设置的第一无机介质图案41、第二无机介质图案42和第三无机介质图案43，第一无机介质图案41、第二无机介质图案42和第三无机介质图案43均与有机介质层形成隔断结构10，如图6所示。(11) Form the inorganic dielectric layer and partition structure. In an exemplary embodiment, forming the inorganic dielectric layer and the partition structure may include: first forming an organic dielectric layer on the substrate; subsequently, depositing an inorganic insulating film on the organic dielectric layer, and patterning the inorganic insulating film through a patterning process, An inorganic medium layer is formed. The inorganic medium layer includes first, second and third inorganic medium patterns 41, 42 and 43 arranged at intervals. The first, second and third inorganic medium patterns 41, 42 and 43 are arranged at intervals. The dielectric patterns 43 each form a partition structure 10 with the organic dielectric layer, as shown in FIG. 6 .
在示例性实施方式中，第一无机介质图案41、第二无机介质图案42和第三无机介质图案43的形状均包括矩形，第一无机介质图案41和第二无机介质图案42沿着第二方向D2间隔设置，形成无机介质图案列，第三无机介质图案43位于无机介质图案列在第一方向D1的一侧。In an exemplary embodiment, the shapes of the first, second and third inorganic media patterns 41, 42 and 43 each include a rectangle, and the first and second inorganic media patterns 41 and 42 are arranged along the second The inorganic medium patterns are arranged at intervals in the direction D2 to form an inorganic medium pattern row, and the third inorganic medium pattern 43 is located on the side of the inorganic medium pattern row in the first direction D1.
在示例性实施方式中，隔断结构10的形状包括线状，隔断结构10可以位于第一无机介质图案41、第二无机介质图案42和第三无机介质图案43中的至少一侧。示例的，隔断结构10可以位于第一无机介质图案41在第二方向D2的一侧，和/或，隔断结构10可以位于第一无机介质图案41在第一方向D1反方向的一侧，和/或，隔断结构10可以位于第二无机介质图案42在第二方向D2的一侧，和/或，隔断结构10可以位于第二无机介质图案42在第一方向D1反方向的一侧，和/或，隔断结构10可以位于第三无机介质图案43在第一方向D1反方向的一侧，且位于第三无机介质图案43与第一无机介质图案41之间，和/或，隔断结构10可以位于第三无机介质图案43在第一方向D1反方向的一侧，且位于第三无机介质图案43与第二无机介质图案42之间。In an exemplary embodiment, the partition structure 10 has a linear shape, and the partition structure 10 may be located on at least one side of the first inorganic dielectric pattern 41, the second inorganic dielectric pattern 42, and the third inorganic dielectric pattern 43. For example, the partition structure 10 may be located on one side of the first inorganic dielectric pattern 41 in the second direction D2, and/or the partition structure 10 may be located on one side of the first inorganic dielectric pattern 41 in the opposite direction of the first direction D1, and/or the partition structure 10 may be located on one side of the second inorganic dielectric pattern 42 in the second direction D2, and/or the partition structure 10 may be located on one side of the second inorganic dielectric pattern 42 in the opposite direction of the first direction D1, and/or the partition structure 10 may be located on one side of the third inorganic dielectric pattern 43 in the opposite direction of the first direction D1 and between the third inorganic dielectric pattern 43 and the first inorganic dielectric pattern 41, and/or the partition structure 10 may be located on one side of the third inorganic dielectric pattern 43 in the opposite direction of the first direction D1 and between the third inorganic dielectric pattern 43 and the second inorganic dielectric pattern 42.
(12)形成第一阳极、第二阳极、第三阳极和辅助阴极。在示例性实施方式中，形成第一阳极、第二阳极、第三阳极和辅助阴极可以包括：在形成前述图案的基底上，在基底上沉积第一导电薄膜，通过图案化工艺对第一导电薄膜进行图案化，形成第一阳极5-1、第二阳极5-2、第三阳极5-3和辅助阴极20，辅助阴极20均与第一阳极5-1、第二阳极5-2和第三阳极5-3间隔设置，如图7a和7b所示。(12) Form the first anode, the second anode, the third anode and the auxiliary cathode. In an exemplary embodiment, forming the first anode, the second anode, the third anode and the auxiliary cathode may include: depositing a first conductive film on the substrate on which the foregoing pattern is formed, and performing a patterning process on the first conductive film. The film is patterned to form a first anode 5-1, a second anode 5-2, a third anode 5-3 and an auxiliary cathode 20. The auxiliary cathode 20 is connected to the first anode 5-1, the second anode 5-2 and the auxiliary cathode 20. The third anodes 5-3 are arranged at intervals, as shown in Figures 7a and 7b.
在示例性实施方式中，第一阳极5-1、第二阳极5-2和第三阳极5-3的形状均包括矩形，第一阳极5-1和第二阳极5-2沿着第二方向D2间隔设置，形成阳极列，第三阳极5-3位于阳极列在第一方向D1的一侧。In an exemplary embodiment, the shapes of the first anode 5-1, the second anode 5-2, and the third anode 5-3 each include a rectangle, and the first anode 5-1 and the second anode 5-2 are arranged along the second They are spaced apart in the direction D2 to form an anode row, and the third anode 5-3 is located on one side of the anode row in the first direction D1.
在示例性实施方式中，第一阳极5-1在基底上的正投影位于第一无机介质图案41在基底上的正投影中；第二阳极5-2在基底上的正投影位于第二无机介质图案42在基底上的正投影中；第三阳极5-3在基底上的正投影位于第三无机介质图案43在基底上的正投影中。In an exemplary embodiment, the orthographic projection of the first anode 5-1 on the substrate is located in the orthographic projection of the first inorganic dielectric pattern 41 on the substrate; the orthographic projection of the second anode 5-2 on the substrate is located in the orthographic projection of the second inorganic dielectric pattern 42 on the substrate; and the orthographic projection of the third anode 5-3 on the substrate is located in the orthographic projection of the third inorganic dielectric pattern 43 on the substrate.
在示例性实施方式中，辅助阴极20的形状呈网格状。辅助阴极20可以围绕第一子像素区域100的四周设置，围绕第二子像素区域200的四周设置，以及围绕第三子像素区域300的四周设置。In an exemplary embodiment, the auxiliary cathode 20 is shaped like a grid. The auxiliary cathode 20 may be disposed around the first sub-pixel area 100 , around the second sub-pixel area 200 , and around the third sub-pixel area 300 .
在示例性实施方式中，辅助阴极20包括第一边部21、第二边部22、第三边部23、第四边部24、第五边部25和第六边部26。第一边部21的形状呈线状，沿着第一方向D1延伸，第一边部21位于第一子像素区域100和第三子像素区域300在第二方向D2反方向的一侧，第一边部21的第一端与第二边部22的第一端连接，第一边部21的第二端与第四边部24的第一端连接。第二边部22的形状呈线状，沿着第二方向D2延伸，第二边部22位于第一子像素区域100和第二子像素区域200在第一方向D1反方向的一侧，第二边部22的第一端与第一边部21的第一端连接，第二边部22的第二端与第三边部23的第一端连接。第三边部23的形状呈线状，沿着第一方向D1延伸，第三边部23位于第二子像素区域200和第三子像素区域300在第二方向D2的一侧，第三边部23的第一端与第二边部22的第二端连接，第三边部23的第二端与第四边部24的第二端连接。第四边部24的形状呈线状，沿着第二方向D2延伸，第四边部24位于第三子像素区域300在第一方向D1的一侧，第四边部24的第一端与第一边部21的第二端连接，第四边部24的第二端与第三边部23的第二端连接。第五边部25的形状呈线状，沿着第一方向D1延伸，第五边部25位于第一子像素区域100和第二子像素区域200之间，第五边部25的第一端与第二边部22的中部连接，第五边部25的第二端与第六边部26的中部连接。第六边部26的形状呈线状，沿着第二方向D2延伸，第六边部26位于第一子像素区域100与第三子像素区域300之间以及第二子像素区域200与第三子像素区域300之间，第六边部26的的第一端与第一边部21的中部连接，第六边部26的的第二端与第三边部23的中部连接。In the exemplary embodiment, the auxiliary cathode 20 includes a first side 21 , a second side 22 , a third side 23 , a fourth side 24 , a fifth side 25 and a sixth side 26 . The first side 21 is linear in shape and extends along the first direction D1. The first side 21 is located on the opposite side of the first sub-pixel region 100 and the third sub-pixel region 300 in the second direction D2. The first end of the side portion 21 is connected to the first end of the second side portion 22 , and the second end of the first side portion 21 is connected to the first end of the fourth side portion 24 . The second side portion 22 is linear in shape and extends along the second direction D2. The second side portion 22 is located on the opposite side of the first sub-pixel region 100 and the second sub-pixel region 200 in the first direction D1. The first end of the two side portions 22 is connected to the first end of the first side portion 21 , and the second end of the second side portion 22 is connected to the first end of the third side portion 23 . The third side 23 is linear in shape and extends along the first direction D1. The third side 23 is located on one side of the second sub-pixel region 200 and the third sub-pixel region 300 in the second direction D2. The first end of the side portion 23 is connected to the second end of the second side portion 22 , and the second end of the third side portion 23 is connected to the second end of the fourth side portion 24 . The fourth side portion 24 is linear in shape and extends along the second direction D2. The fourth side portion 24 is located on one side of the third sub-pixel region 300 in the first direction D1. The first end of the fourth side portion 24 is connected to the first end of the fourth side portion 24. The second end of the first side 21 is connected, and the second end of the fourth side 24 is connected to the second end of the third side 23 . The fifth side portion 25 is linear in shape and extends along the first direction D1. The fifth side portion 25 is located between the first sub-pixel area 100 and the second sub-pixel area 200. The first end of the fifth side portion 25 It is connected to the middle part of the second side part 22 , and the second end of the fifth side part 25 is connected to the middle part of the sixth side part 26 . The sixth side portion 26 is linear in shape and extends along the second direction D2. The sixth side portion 26 is located between the first sub-pixel area 100 and the third sub-pixel area 300 and between the second sub-pixel area 200 and the third sub-pixel area 200. Between the sub-pixel areas 300 , the first end of the sixth side 26 is connected to the middle of the first side 21 , and the second end of the sixth side 26 is connected to the middle of the third side 23 .
在示例性实施方式中，辅助阴极20的第一边部21上设置有第一凸块211，第一凸块211在第二方向D2上凸出第一边部21的边缘，第一凸块211朝向靠近第三阳极5-3的方向凸出。辅助阴极20的第三边部23上设置有第二凸块231，第二凸块231在第二方向D2上凸出第三边部23的边缘，第二凸块231朝向靠近第三阳极5-3的方向凸出。In an exemplary embodiment, a first protrusion 211 is provided on the first side portion 21 of the auxiliary cathode 20, the first protrusion 211 protrudes from the edge of the first side portion 21 in the second direction D2, and the first protrusion 211 protrudes toward a direction close to the third anode 5-3. A second protrusion 231 is provided on the third side portion 23 of the auxiliary cathode 20, the second protrusion 231 protrudes from the edge of the third side portion 23 in the second direction D2, and the second protrusion 231 protrudes toward a direction close to the third anode 5-3.
(13)形成像素定义层。在示例性实施方式中，形成像素定义层可以包括：在形成前述图案的基底上，在基底上沉积覆盖第一阳极5-1、第二阳极5-2、第三阳极5-3和辅助阴极20的像素定义薄膜，通过图案化工艺对像素定义薄膜进行图案化，形成像素定义层6，如图8a和图8b所示。(13) Forming a pixel definition layer. In an exemplary embodiment, forming a pixel definition layer may include: on the substrate on which the aforementioned pattern is formed, depositing a pixel definition film covering the first anode 5-1, the second anode 5-2, the third anode 5-3 and the auxiliary cathode 20 on the substrate, and patterning the pixel definition film by a patterning process to form a pixel definition layer 6, as shown in FIGS. 8a and 8b.
在示例性实施方式中，像素定义层6中设置有第一像素开口6-1、第二像素开口6-2和第三像素开口6-3，第一像素开口6-1将至少部分第一阳极5-1暴露，第一阳极5-1可以作为第一像素开口6-1的底壁；第二像素开口6-2将至少部分第二阳极5-2暴露，第二阳极5-2可以作为第二像素开口6-2的底壁；第三像素开口6-3将至少部分第三阳极5-3暴露，第三阳极5-3可以作为第三像素开口6-3的底壁。In an exemplary embodiment, a first pixel opening 6-1, a second pixel opening 6-2 and a third pixel opening 6-3 are provided in the pixel definition layer 6, and the first pixel opening 6-1 will at least partially form the first pixel opening 6-1. The anode 5-1 is exposed, and the first anode 5-1 can serve as the bottom wall of the first pixel opening 6-1; the second pixel opening 6-2 exposes at least part of the second anode 5-2, and the second anode 5-2 can As the bottom wall of the second pixel opening 6-2; the third pixel opening 6-3 exposes at least part of the third anode 5-3, and the third anode 5-3 can serve as the bottom wall of the third pixel opening 6-3.
在示例性实施方式中，像素定义层6中设置有第一连接过孔31和第二连接过孔32，第一连接过孔31位于第三像素开口6-3在第二方向D2反方向的一侧，将辅助阴极20的第一凸块暴露；第二连接过孔32位于第三像素开口6-3在第二方向D2的一侧，将辅助阴极20的第二凸块暴露。In an exemplary embodiment, the pixel definition layer 6 is provided with a first connection via hole 31 and a second connection via hole 32. The first connection via hole 31 is located in the opposite direction of the third pixel opening 6-3 in the second direction D2. On one side, the first bump of the auxiliary cathode 20 is exposed; the second connection via hole 32 is located on the side of the third pixel opening 6-3 in the second direction D2, and the second bump of the auxiliary cathode 20 is exposed.
在示例性实施方式中，像素定义层6中设置有至少一个第一隔断避让孔61，第一隔断避让孔61与隔断结构10对应设置，第一隔断避让孔61与隔断结构10在所述基底上的正投影存在交叠，第一隔断避让孔61将至少部分隔断结构10暴露，使之后形成的发光层和阴极能够在第一隔断避让孔61处与隔断结构10接触，在隔断结构10处阻断。In an exemplary embodiment, at least one first partition escape hole 61 is provided in the pixel definition layer 6 . The first partition escape hole 61 is provided corresponding to the partition structure 10 . The first partition escape hole 61 and the partition structure 10 are located on the substrate. There is overlap in the orthographic projection on the screen, and the first partition escape hole 61 will expose at least part of the partition structure 10 , so that the luminescent layer and cathode formed later can contact the partition structure 10 at the first partition escape hole 61 , and at the partition structure 10 Block.
(14)形成发光层和阴极。在示例性实施方式中，形成发光层和阴极可以包括：在形成前述图案的基底上，先在基底上沉积覆盖像素定义层6的发光层，发光层可以是连接在一起的共通层，发光层通过第一像素开口6-1与第一阳极5-1连接，发光层通过第二像素开口6-2与第二阳极5-2连接，发光层通过第三像素开口6-3与第三阳极5-3连接；且发光层在隔断结构10处阻断；发光层中设置有第一连接避让孔和第二接避让孔，第一连接避让孔与辅助阴极20的第一凸块211在基底上的正投影交叠，第二接避让孔与辅助阴极20的第二凸块231在基底上的正投影交叠；(14) Form the light-emitting layer and cathode. In an exemplary embodiment, forming the luminescent layer and the cathode may include: first depositing a luminescent layer covering the pixel definition layer 6 on the substrate on which the foregoing pattern is formed. The luminescent layer may be a common layer connected together. The first pixel opening 6-1 is connected to the first anode 5-1, the light-emitting layer is connected to the second anode 5-2 through the second pixel opening 6-2, and the light-emitting layer is connected to the third anode through the third pixel opening 6-3. 5-3 connection; and the luminescent layer is blocked at the partition structure 10; a first connection escape hole and a second connection escape hole are provided in the luminescent layer, and the first connection escape hole and the first bump 211 of the auxiliary cathode 20 are on the base The orthographic projection on the substrate overlaps, and the orthographic projection of the second relief hole and the second bump 231 of the auxiliary cathode 20 on the substrate overlaps;
随后，在发光层上沉积第二导电薄膜，通过图案化工艺对第二导电薄膜进行图案化，形成阴极3，如图9和图4a所示。Subsequently, a second conductive film is deposited on the light-emitting layer, and the second conductive film is patterned through a patterning process to form a cathode 3, as shown in Figures 9 and 4a.
在示例性实施方式中，阴极3可以是连接在一起的共通层，阴极3与发光层连接，且阴极3在隔断结构10处阻断。In an exemplary embodiment, the cathode 3 may be a common layer connected together, the cathode 3 is connected to the light-emitting layer, and the cathode 3 is blocked at the partition structure 10 .
在示例性实施方式中，阴极3均与第一阳极5-1、第二阳极5-2、第三阳极5-3和辅助阴极20在基底上的正投影交叠，示例的，第一阳极5-1在基底上的正投影位于阴极3在基底上的正投影中，第二阳极5-2在基底上的正投影位于阴极3在基底上的正投影中，第三阳极5-3在基底上的正投影位于阴极3在基底上的正投影中，辅助阴极20在基底上的正投影位于阴极3在基底上的正投影中。In an exemplary embodiment, the cathodes 3 each overlap with the orthographic projections of the first anode 5-1, the second anode 5-2, the third anode 5-3 and the auxiliary cathode 20 on the substrate. In the example, the first anode The orthographic projection of 5-1 on the substrate is located in the orthographic projection of cathode 3 on the substrate, the orthographic projection of the second anode 5-2 on the substrate is located in the orthographic projection of cathode 3 on the substrate, and the third anode 5-3 is located on the substrate. The orthographic projection on the substrate is located in the orthographic projection of the cathode 3 on the substrate, and the orthographic projection of the auxiliary cathode 20 on the substrate is located in the orthographic projection of the cathode 3 on the substrate.
在示例性实施方式中，阴极3可以通过第一连接过孔31与辅助阴极20的第一凸块连接，阴极3可以通过第二连接过孔32与辅助阴极20的第二凸块连接，从而可以通过辅助阴极20减小阴极3的面电阻。In an exemplary embodiment, the cathode 3 may be connected to the first bump of the auxiliary cathode 20 through the first connection via 31 , and the cathode 3 may be connected to the second bump of the auxiliary cathode 20 through the second connection via 32 , so that The surface resistance of the cathode 3 can be reduced by the auxiliary cathode 20 .
在示例性实施方式中，阴极3中设置有至少一个第二隔断避让孔62，第二隔断避让孔62与隔断结构10对应设置，阴极3在隔断结构10处阻断，形成第二隔断避让孔62。In an exemplary embodiment, at least one second partition escape hole 62 is provided in the cathode 3. The second partition escape hole 62 is provided corresponding to the partition structure 10. The cathode 3 is blocked at the partition structure 10 to form a second partition escape hole. 62.
本公开实施例还提供了一种显示基板的制备方法，包括：An embodiment of the present disclosure also provides a method for preparing a display substrate, including:
在基底上形成隔断结构；Form a partition structure on the substrate;
在基底上形成导电薄膜，使所述导电薄膜形成互相绝缘的阳极和辅助阴极，所述阳极与所述隔断结构在所述基底上的正投影不交叠，所述辅助阴极与所述隔断结构在所述基底上的正投影不交叠；A conductive film is formed on the substrate, so that the conductive film forms an anode and an auxiliary cathode that are insulated from each other. The orthographic projections of the anode and the partition structure on the substrate do not overlap, and the auxiliary cathode and the partition structure do not overlap. Orthographic projections on said substrate do not overlap;
在所述阳极远离所述基底一侧形成发光层，所述发光层与所述阳极连接，所述发光层在所述隔断结构处阻断；A luminescent layer is formed on the side of the anode away from the substrate, the luminescent layer is connected to the anode, and the luminescent layer is blocked at the partition structure;
在所述发光层远离所述基底一侧形成阴极，所述阴极与所述发光层连接，所述阴极在所述隔断结构处阻断，所述阴极与所述辅助阴极电连接。A cathode is formed on the side of the light-emitting layer away from the substrate, the cathode is connected to the light-emitting layer, the cathode is blocked at the partition structure, and the cathode is electrically connected to the auxiliary cathode.
本公开实施例还提供了一种显示装置，包括上述显示基板。显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件，本发明实施例并不以此为限。The present disclosure also provides a display device, including the above display substrate. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc., but the present disclosure is not limited thereto.
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由若干物理组件合作执行。某些组件或所有组件可以被实施为由处理器，如数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。Those of ordinary skill in the art can understand that all or some steps, systems, and functional modules/units in the devices disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may consist of several physical components. Components execute cooperatively. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer-readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). As is known to those of ordinary skill in the art, the term computer storage media includes volatile and nonvolatile media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. removable, removable and non-removable media. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disk (DVD) or other optical disk storage, magnetic cassettes, tapes, disk storage or other magnetic storage devices, or may Any other medium used to store the desired information and that can be accessed by a computer. Additionally, it is known to those of ordinary skill in the art that communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media .
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| CN202410021683.2ACN117794294A (en) | 2024-01-05 | 2024-01-05 | Display substrate, preparation method thereof and display device |
| PCT/CN2025/070422WO2025146133A1 (en) | 2024-01-05 | 2025-01-03 | Display substrate and fabrication method therefor, and display apparatus |
| Application Number | Priority Date | Filing Date | Title |
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| CN202410021683.2ACN117794294A (en) | 2024-01-05 | 2024-01-05 | Display substrate, preparation method thereof and display device |
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| CN202410021683.2APendingCN117794294A (en) | 2024-01-05 | 2024-01-05 | Display substrate, preparation method thereof and display device |
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| WO2025146133A1 (en)* | 2024-01-05 | 2025-07-10 | 京东方科技集团股份有限公司 | Display substrate and fabrication method therefor, and display apparatus |
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