Disclosure of Invention
In view of the foregoing, embodiments of the present invention provide a method, a system, and a storage medium for data processing in a DPU-based memory separation architecture, which obviate or mitigate one or more disadvantages in the related art. The problem of poor performance of data processing between the computing domain and the storage domain can be solved.
The invention provides a data processing method under a memory-computing separation architecture based on a DPU, which is applied to a computing node connected to a computing domain under the memory-computing separation architecture; the method comprises the following steps:
acquiring a data processing statement;
converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators;
pushing down the executable operator to a DPU storage agent under a storage separation architecture, so that the DPU storage agent executes the executable operator after receiving the executable operator, obtains an intermediate execution result corresponding to the executable operator through a storage node connected to a storage domain under the storage separation architecture, and returns the intermediate execution result to a calculation node;
and under the condition that the intermediate execution result is received, completing the executable physical planning tree based on the intermediate execution result to obtain a data processing result corresponding to the data processing statement.
Optionally, the number of intermediate execution results is at least one; and completing the executable physical planning tree based on the intermediate execution results to obtain a data processing result corresponding to the data processing statement under the condition that the number of the intermediate execution results is two or more, wherein the method comprises the following steps:
performing association query processing on the intermediate execution result to obtain a data result meeting the connection relation indicated by the data processing statement;
and carrying out aggregation operation processing on the data result to obtain a data processing result.
Optionally, before pushing the executable operator down to the DPU storage agent under the memory split architecture, further comprising: at least one executable operator is merged.
Optionally, the executable operator includes a filter operator, a projection operator, or a file read operator.
One aspect of the present invention provides a data processing system under a storage and calculation separation architecture based on a DPU, which is applied to the data processing method under the storage and calculation separation architecture based on the DPU, and the system includes:
a compute node connected to a compute domain under a memory-separation architecture for: acquiring a data processing statement; converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators; pushing down the executable operator to a DPU storage agent under a computational separation architecture;
a DPU storage agent for: after receiving the executable operator, executing the executable operator, and obtaining an intermediate execution result corresponding to the executable operator through a storage node connected to a storage domain under the storage and calculation separation architecture; returning the intermediate execution result to the computing node; a communication connection is established between the DPU storage agent and the storage node;
a compute node further to: and under the condition that the intermediate execution result is received, completing the executable physical planning tree based on the intermediate execution result to obtain a data processing result corresponding to the data processing statement.
Optionally, a first data processor based on a KPU architecture is included in the computing node; the first data processor is used for storing and unloading acceleration, network unloading acceleration or data processing unloading acceleration, and releasing CPU computing resources in the computing nodes.
Optionally, the computing nodes include at least one node, and the computing frameworks corresponding to different nodes are the same or different.
Optionally, the DPU store agent comprises at least one second data processor;
the DPU storage agent is further configured to: in the case where two or more numbers of operators are included in the executable operators, the executable operators are allocated to the corresponding numbers of second data processors for execution in accordance with the numbers of the executable operators.
Optionally, the DPU storage agent is further configured to: acquiring current network bandwidth information; and under the condition that the current network bandwidth information indicates that the current network bandwidth is smaller than or equal to a preset bandwidth threshold, the intermediate execution result is compressed and then returned to the computing node.
Another aspect of the present invention provides a computer readable storage medium having stored thereon a computer program, wherein the program when executed by a processor implements the steps of the above-described data processing method under a DPU-based memory-separation architecture.
The invention has the advantages that:
according to the data processing method, the system and the storage medium under the DPU-based memory calculation separation architecture, data processing sentences are obtained; converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators; pushing down the executable operator to a DPU storage agent under a storage separation architecture, so that the DPU storage agent executes the executable operator after receiving the executable operator, obtains an intermediate execution result corresponding to the executable operator through a storage node connected to a storage domain under the storage separation architecture, and returns the intermediate execution result to a calculation node; under the condition that an intermediate execution result is received, completing an executable physical planning tree based on the intermediate execution result to obtain a data processing result corresponding to the data processing statement; the problem of poor data processing performance between a computing domain and a storage domain can be solved; the data processing statement is converted into the executable physical planning tree, branch nodes in the executable physical planning tree are pushed down to the DPU storage agent for execution, so that the DPU storage agent returns an intermediate execution result after execution, and therefore, a calculation domain does not need to pull huge original data, the network bandwidth between the calculation domain and the storage domain is prevented from becoming the bottleneck of the whole data platform, transmission data is obviously reduced, the network bandwidth pressure between the calculation domain and the storage domain is greatly reduced, the data throughput of the system is improved, and the data processing performance between the calculation domain and the storage domain is further improved; meanwhile, the storage domain does not need to output a large amount of original data, only needs to output an intermediate execution result, and the data input and data output capability of the storage domain is prevented from becoming a data reading bottleneck, so that the data processing performance between the calculation domain and the storage domain is further improved.
Furthermore, the computing domain does not need to consume computing power resources in huge original data input, output and processing, and the computing domain and the storage domain can have sufficient resources to perform other data processing tasks through releasing the computing power resources of the computing domain and the data input, output and processing resources of the storage domain, so that the data processing speed of the computing domain can be improved, and the data processing performance between the computing domain and the storage domain is further improved.
Further, in the computing domain, the data processing statement is executed by the first data processor based on the KPU architecture, in the storage domain, the data reading and the calculation of the executable operator are accelerated by the second data processor in the DPU storage agent, and the data processor is used as a heterogeneous special chip, has strong performance in data input and output and network, can improve the speed of data processing, and further improves the data processing performance between the computing domain and the storage domain.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
It will be appreciated by those skilled in the art that the objects and advantages that can be achieved with the present invention are not limited to the above-described specific ones, and that the above and other objects that can be achieved with the present invention will be more clearly understood from the following detailed description.
Detailed Description
The present invention will be described in further detail with reference to the following embodiments and the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. The exemplary embodiments of the present invention and the descriptions thereof are used herein to explain the present invention, but are not intended to limit the invention.
It should be noted here that, in order to avoid obscuring the present invention due to unnecessary details, only structures and/or processing steps closely related to the solution according to the present invention are shown in the drawings, while other details not greatly related to the present invention are omitted.
It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components.
It is also noted herein that the term "coupled" may refer to not only a direct connection, but also an indirect connection in which an intermediate is present, unless otherwise specified.
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the drawings, the same reference numerals represent the same or similar components, or the same or similar steps.
The embodiment provides a schematic diagram of a data processing system under a DPU-based memory and computation separation architecture.
As shown in fig. 1, the data processing system under the DPU-based memory separation architecture includes: computing node 110, DPU storage agent 120, and storage node 130.
Wherein the computing node 110 refers to a device for performing computing tasks and processing data, and is connected to a computing domain under a separate architecture for storage and computing. Optionally, the computing node 110 includes, but is not limited to, a physical server, a personal computer, or the like. The present embodiment is not limited to the implementation of the compute node 110.
In this embodiment, the computing node 110 includes at least one node, and the computing frames corresponding to different nodes are the same or different. The computing frame comprises Apache Spark, preston SQL, apache Hive and the like. In fig. 1, the number of the computing nodes 110 is taken as one example, and in actual implementation, the number of the computing nodes 110 is one or at least two, and the present embodiment does not limit the number of the computing nodes 110.
A computing node 110 for: acquiring a data processing statement; converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators; the executable operator is pushed down to the DPU storage agent under the compute splitting architecture.
Wherein, the data processing statement refers to a statement used for database data operation or management, such as SQL statement, displain command, etc.
In one example, the computing node 110 receives a data processing statement input by a user through an input device connected to the computing node 110; wherein the input device comprises a keyboard, mouse, or touchable display screen, etc., coupled to the computing node 110.
In another example, the data processing statement is sent to the computing node 110 by other electronic devices that establish a communication connection with the computing node 110, where the other electronic devices include other nodes under a separate architecture or devices outside of the separate architecture.
In yet another example, the data processing statements are pre-stored in a local storage medium of the computing node 110 or in an external storage medium connected to the computing node 110, such as a usb disk, an external hard disk, or the like.
Performing basic grammar checking, keyword analysis, naming semantic analysis and other operations on the data processing statement to generate an unresolved logic plan tree; the unresolved logical plan tree is sent to a parser for syntax parsing and semantic parsing, and the parser converts the unresolved logical plan tree into a parsed logical plan tree. During parsing, if a grammar error or naming error occurs, error information is returned. After analysis, a series of rules and strategies are used for optimizing the analyzed logic plan tree, so that the execution efficiency of inquiry is improved as much as possible, the cost is reduced, and errors are reduced, and an optimized logic plan tree is generated; the optimized logical plan tree is converted into a physical plan tree, also known as an execution plan. A physical plan tree is a tree structure made up of operators, data sources, and underlying data structures, which describes the specific execution logic of a query statement. Finally, the physical planning tree is compiled into executable machine code, i.e. the physical planning tree is executed and the query result is finally returned.
In this embodiment, each molecular node of the executable physical planning tree may be implemented as an executable operator node, and the computing node 110 pushes the executable operator node down to the DPU storage agent 120 in the storage domain.
Specifically, the DPU store agent is configured to: after receiving the executable operator, executing the executable operator, and obtaining an intermediate execution result corresponding to the executable operator through a storage node 130 connected to a storage domain under the storage and calculation separation architecture; and returning the intermediate execution result to the computing node.
Accordingly, the computing node 110 is further configured to: and under the condition that the intermediate execution result is received, completing the executable physical planning tree based on the intermediate execution result to obtain a data processing result corresponding to the data processing statement.
In this embodiment, the computing node includes a first data processor based on a KPU architecture.
The core processor (Kernel Processing Unit, KPU) architecture is a special technical chip architecture developed based on a technical route of a software defined accelerator, is a coprocessor architecture designed for accelerating core function calculation in a specific field, takes a functional core as a basic unit, and has super heterogeneous core integration and scheduling capability.
A plurality of core processors are provided in the KPU architecture, and the operation modes of the core processors can be fixed according to rules. The KPU architecture may include PCIe controllers, network controllers, logic processing units, memory management units, data caching units, data schedulers, task schedulers, core processors, and the like. The coprocessor architecture is specially designed for accelerating core function computation in a specific field, takes a functional core as a basic unit, and has super heterogeneous core integration and scheduling capability. The KPU can integrate tens to hundreds of functional cores according to the requirements, can directly abstract the intensive application of computation in the application and synthesize the high-level, realize the architecture customization taking data as the center, has extremely high flexibility, ensures abundant computing power and supports more computing load types with the lowest power consumption.
A data processor (Data Processing Unit, DPU) is a specially designed hardware unit for data processing, the main function of which is to achieve efficient, fast and reliable data processing and analysis.
In this embodiment, the first data processor is configured to store offload acceleration, network offload acceleration, or data processing offload acceleration, and release CPU computing resources in the computing node. Such as receiving intermediate execution results or other data returned from the storage domain, executing special operators, etc.
The DPU storage agent refers to a DPU-based lightweight storage agent that includes at least one second data processor. For example, referring to fig. 2, taking the example that the DPU store agent includes three second data processors, second data processor a, second data processor B, and second data processor C, respectively.
The DPU storage agent establishes a communication connection with storage node 130. Wherein the communication connection between DPU storage agent 120 and storage node 130 comprises a wireless connection or a wired connection, the implementation of the communication connection between DPU storage agent 120 and storage node 130 is not limited in this embodiment.
In the case that the number of executable operators received by the DPU storage agent is two or more, all the executable operators can be executed by the same second data processor in the DPU storage agent, so as to save data processor resources, or the executable operators are distributed to a corresponding number of different second data processors for execution according to the number of the executable operators, so that the execution efficiency of the executable operators is improved.
Specifically, the DPU storage agent is further configured to: in the case where two or more numbers of operators are included in the executable operators, the executable operators are allocated to the corresponding numbers of second data processors for execution in accordance with the numbers of the executable operators.
In this embodiment, the executable operators include a filter operator (filter), a projection operator (project), a file reading operator (filescan), or the like. The DPU storage agent performs data reading, querying or filtering operations through the storage nodes 130 by communication connection with the storage nodes 130 during execution of the executable operators.
Where storage node 130 refers to a device for storing and managing data, it is connected to a storage domain under a separate architecture, and optionally storage node 130 includes, but is not limited to, a disk, a storage controller, a network adapter, a physical server, or a disk array. The present embodiment is not limited to the implementation of storage node 130. In fig. 1, the number of storage nodes 130 is taken as an example, and in actual implementation, the number of storage nodes 130 is one or at least two, and the present embodiment does not limit the number of storage nodes 130.
In addition, before the DPU storage agent returns the intermediate execution result to the computing node 110, in order to ensure transmission efficiency, the current network bandwidth needs to be acquired, and whether the intermediate execution result needs to be compressed according to the current network bandwidth is determined and then returned to the computing node 110.
Specifically, the DPU storage agent is further configured to: acquiring current network bandwidth information; and under the condition that the current network bandwidth information indicates that the current network bandwidth is smaller than or equal to a preset bandwidth threshold, the intermediate execution result is compressed and then returned to the computing node.
The preset bandwidth threshold is a preset network bandwidth threshold, including but not limited to 10 megabits per second (Megabits per second, mbps) or 1 gigabit per second (Gigabits per second, gbps), and the embodiment does not limit the selection of the preset bandwidth threshold.
Fig. 3 is a flowchart of a data processing method under a DPU-based memory separation architecture according to an embodiment of the present invention. Taking as an example that the method is applied to a computing node connected to a computing domain under a storage and separation architecture in the above embodiment, the method includes the following steps:
step S301, a data processing statement is acquired.
Step S302, converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement.
Wherein the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators. The executable operators include filter operators, projection operators, or file read operators. In actual implementation, the executable operators further include an aggregation operator, a sequencing operator or a connection operator, and the type of the executable operators can be selected according to actual conditions, and the embodiment does not limit the type of the executable operators.
Step S303, pushing down the executable operator to the DPU storage agent under the storage separation architecture, so that the DPU storage agent executes the executable operator after receiving the executable operator, obtains an intermediate execution result corresponding to the executable operator through a storage node connected to the storage domain under the storage separation architecture, and returns the intermediate execution result to the computing node.
In addition, in actual implementation, in case of a large number of executable operators, in order to improve the computing efficiency and the performance and reduce unnecessary computing overhead and data transmission overhead, the executable operators executed on the same batch of data are combined so as to avoid the overhead of multiple data transmission, thereby the operator execution speed is improved. Meanwhile, a plurality of executable operators are combined, so that the generation of intermediate execution results can be reduced, the data transmission efficiency is improved, and the data processing efficiency is further improved.
Specifically, before pushing down the executable operator to the DPU storage agent under the architecture of memory separation, the method further includes: at least one executable operator is merged.
Step S304, under the condition that the intermediate execution result is received, the executable physical planning tree is completed based on the intermediate execution result, and the data processing result corresponding to the data processing statement is obtained.
In this embodiment, the number of intermediate execution results is at least one.
In the case where the number of intermediate execution results is two or more, the compute node also needs to execute other operators in the executable physical planning tree based on the intermediate execution results to complete the executable physical planning tree, such as a hash association operator (Hashjoin), a hash aggregation operator (hashaagagregate), and the like.
Specifically, in the case that the number of intermediate execution results is two or more, the executable physical planning tree is completed based on the intermediate execution results, and a data processing result corresponding to the data processing statement is obtained, including: performing association query processing on the intermediate execution result to obtain a data result meeting the connection relation indicated by the data processing statement; and carrying out aggregation operation processing on the data result to obtain a data processing result.
Such as: referring to fig. 4, the number of intermediate execution results is taken as two as an example; the DPU storage agent returns the intermediate execution result a and the intermediate execution result b to the computing node, and then the computing node processes the associated query processing and the aggregation operation processing to obtain a data processing result.
The embodiment provides a data processing method under a storage and calculation separation architecture based on a DPU, which comprises the steps of obtaining data processing sentences; converting the data processing statement to obtain an executable physical planning tree corresponding to the data processing statement; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators; pushing down the executable operator to a DPU storage agent under a storage separation architecture, so that the DPU storage agent executes the executable operator after receiving the executable operator, obtains an intermediate execution result corresponding to the executable operator through a storage node connected to a storage domain under the storage separation architecture, and returns the intermediate execution result to a calculation node; under the condition that an intermediate execution result is received, completing an executable physical planning tree based on the intermediate execution result to obtain a data processing result corresponding to the data processing statement; the problem of poor data processing performance between a computing domain and a storage domain can be solved; the data processing statement is converted into the executable physical planning tree, branch nodes in the executable physical planning tree are pushed down to the DPU storage agent for execution, so that the DPU storage agent returns an intermediate execution result after execution, and therefore, a calculation domain does not need to pull huge original data, the network bandwidth between the calculation domain and the storage domain is prevented from becoming the bottleneck of the whole data platform, transmission data is obviously reduced, the network bandwidth pressure between the calculation domain and the storage domain is greatly reduced, the data throughput of the system is improved, and the data processing performance between the calculation domain and the storage domain is further improved; meanwhile, the storage domain does not need to output a large amount of original data, only needs to output an intermediate execution result, and the data input and data output capability of the storage domain is prevented from becoming a data reading bottleneck, so that the data processing performance between the calculation domain and the storage domain is further improved.
Furthermore, the computing domain does not need to consume computing power resources in huge original data input, output and processing, and the computing domain and the storage domain can have sufficient resources to perform other data processing tasks through releasing the computing power resources of the computing domain and the data input, output and processing resources of the storage domain, so that the data processing speed of the computing domain can be improved, and the data processing performance between the computing domain and the storage domain is further improved.
Further, in the computing domain, the data processing statement is executed by the first data processor based on the KPU architecture, in the storage domain, the data reading and the calculation of the executable operator are accelerated by the second data processor in the DPU storage agent, and the data processor is used as a heterogeneous special chip, has strong performance in data input and output and network, can improve the speed of data processing, and further improves the data processing performance between the computing domain and the storage domain.
The present embodiment provides a data processing apparatus under a memory separation architecture based on a DPU, as shown in fig. 5. The embodiment is applied to the computing node shown in fig. 1 by the device, and the device comprises at least the following modules: statement acquisition module 510, statement transformation module 520, operator push down module 530, and result processing module 540.
Statement acquisition module 510 is configured to acquire a data processing statement.
The sentence conversion module 520 is configured to perform conversion processing on the data processing sentence, so as to obtain an executable physical plan tree corresponding to the data processing sentence; the executable physical planning tree comprises at least one branch node, and different branch nodes correspond to different executable operators.
The operator pushing module 530 is configured to push the executable operator down to the DPU storage agent under the storage separation architecture, so that the DPU storage agent executes the executable operator after receiving the executable operator, obtains an intermediate execution result corresponding to the executable operator through a storage node connected to the storage domain under the storage separation architecture, and returns the intermediate execution result to the computing node.
And the result processing module 540 is configured to, when receiving the intermediate execution result, complete the executable physical plan tree based on the intermediate execution result, and obtain a data processing result corresponding to the data processing statement.
For relevant details reference is made to the above-described method and system embodiments.
It should be noted that: in the data processing device under the storage and calculation separation architecture based on the DPU provided in the above embodiment, only the division of the above functional modules is used for illustration when the data processing under the storage and calculation separation architecture based on the DPU is performed, and in practical application, the above functional allocation may be completed by different functional modules according to needs, that is, the internal structure of the data processing device under the storage and calculation separation architecture based on the DPU is divided into different functional modules, so as to complete all or part of the functions described above. In addition, the data processing device under the storage and calculation separation architecture based on the DPU provided in the foregoing embodiment and the data processing method embodiment under the storage and calculation separation architecture based on the DPU belong to the same concept, and detailed implementation processes of the data processing device are shown in the method embodiment, which is not described herein.
The present embodiment provides an electronic device, as shown in fig. 6. The electronic device comprises at least a processor 601 and a memory 602.
Processor 601 may include one or more processing cores, such as: 4 core processors, 8 core processors, etc. The processor 601 may be implemented in at least one hardware form of DSP (Digital Signal Processing ), FPGA (Field-Programmable Gate Array, field programmable gate array), PLA (Programmable Logic Array ). The processor 601 may also include a main processor, which is a processor for processing data in an awake state, also called a CPU (Central Processing Unit ), and a coprocessor; a coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 601 may integrate a GPU (Graphics Processing Unit, image processor) for rendering and drawing of content required to be displayed by the display screen. In some embodiments, the processor 601 may also include an AI (Artificial Intelligence ) processor for processing computing operations related to machine learning.
The memory 602 may include one or more computer-readable storage media, which may be non-transitory. The memory 602 may also include high-speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In some embodiments, a non-transitory computer readable storage medium in memory 602 is used to store at least one instruction for execution by processor 601 to implement the DPU-based memory separation architecture data processing method provided by the method embodiments herein.
In some embodiments, the electronic device may further optionally include: a peripheral interface and at least one peripheral. The processor 601, memory 602, and peripheral interfaces may be connected by buses or signal lines. The individual peripheral devices may be connected to the peripheral device interface via buses, signal lines or circuit boards. Illustratively, peripheral devices include, but are not limited to: radio frequency circuitry, touch display screens, audio circuitry, and power supplies, among others.
Of course, the electronic device may also include fewer or more components, as the present embodiment is not limited in this regard.
Optionally, the application further provides a computer readable storage medium, in which a program is stored, and the program is loaded and executed by a processor to implement the data processing method under the DPU-based storage separation architecture in the above method embodiment.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
It will be apparent that the embodiments described above are only some, but not all, of the embodiments of the present application. Based on the embodiments herein, one of ordinary skill in the art could make other variations or modifications without making any inventive effort, which would be within the scope of the present application.