Detailed Description
In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It should be noted that, without conflict, the embodiments of the present invention and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those described herein, and the scope of the invention is therefore not limited to the specific embodiments disclosed below.
The energy storage converter, the control method, the device and the readable storage medium thereof provided in the embodiments of the present application are described in detail below with reference to fig. 1 to 16 through specific embodiments and application scenarios thereof.
As shown in fig. 1, in an embodiment of the present invention, an energy storage converter 100 is provided for converting a dc power source into an ac power source, where the energy storage converter 100 includes:
a first port 101 and a second port 102 for connection to a first direct current power supply 104;
the direct current converter module 103 comprises a first capacitor 105 and a second capacitor 106, one end of the first capacitor 105 is connected with the first port 101, the other end of the first capacitor 105 is connected with one end of the second capacitor 106, and the other end of the second capacitor 106 is connected with the second port 102;
The dc converter module 103 further includes a first semiconductor assembly 107, where the first semiconductor assembly 107 includes a first semiconductor device 1071, a second semiconductor device 1072, a third semiconductor device 1073, and a fourth semiconductor device 1074, a first end of the first semiconductor device 1071 is connected to the first capacitor 105, a second end of the first semiconductor device 1071 is connected to a first end of the second semiconductor device 1072, a second end of the second semiconductor device 1072 is connected to a first end of the third semiconductor device 1073, a second end of the third semiconductor device 1073 is connected to a first end of the fourth semiconductor device 1074, and a second end of the fourth semiconductor device 1074 is connected to the second capacitor 106;
the dc converter module 103 further includes a third capacitor 108, one end of the third capacitor 108 is connected to the second end of the first semiconductor device 1071, and the other end of the third capacitor 108 is connected to the second end of the third semiconductor device 1073;
the dc converter module 103 further comprises an inductance assembly 109, one end of the inductance assembly 109 being connected to the second end of the second semiconductor device 1072;
the dc converter module 103 further includes a fourth capacitor 110, one end of the fourth capacitor 110 is connected to the other end of the inductance component 109, and the other end of the fourth capacitor 110 is connected to the second port 102;
The dc converter module 103 further includes a midpoint balance branch 120, a first end of the midpoint balance branch 120 is connected to the other end of the first capacitor 105, a second end of the midpoint balance branch 120 is connected to one end of the third capacitor 108, and a third end of the midpoint balance branch 120 is connected to the other end of the third capacitor 108;
the energy storage converter 100 further comprises an ac converter module 111, one end of the ac converter module 111 is connected to the other end of the inductance component 109, the other end of the ac converter module is connected to the second port 102, and the ac converter module is configured to convert dc power output by the dc converter module into ac power;
the first semiconductor component 107 is configured to adjust a voltage value of the fourth capacitor 110 so that the voltage value of the fourth capacitor 110 is greater than a first preset value and less than a second preset value;
the first semiconductor component 107 is further configured to adjust a voltage value of the third capacitor 108 so that the voltage value of the third capacitor 108 is a third preset value;
the midpoint balancing branch 120 is configured to adjust the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 so that the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are a fourth preset value.
In this embodiment, an energy storage converter 100 is provided for converting an input first dc power source 104 into an ac power source for output, where the first dc power source 104 is a power source for providing dc power.
The energy storage converter 100 comprises a first port 101 and a second port 102 for connection to a first direct current power supply 104.
For example, the first port 101 may be connected to the positive electrode of the first direct current power supply 104, and the second port 102 may be connected to the negative electrode of the first direct current power supply 104.
The energy storage converter 100 further comprises a direct current converter module 103, and comprises a first capacitor 105 and a second capacitor 106, wherein one end of the first capacitor 105 is connected with the first port 101, the other end of the first capacitor 105 is connected with one end of the second capacitor 106, and the other end of the second capacitor 106 is connected with the second port 102; the first capacitor 105 and the second capacitor 106 are voltage stabilizing capacitors for balancing the voltage values of the energy storage converter 100.
The dc converter module 103 further includes a first semiconductor assembly 107, where the first semiconductor assembly 107 includes a first semiconductor device 1071, a second semiconductor device 1072, a third semiconductor device 1073, and a fourth semiconductor device 1074, the first end of the first semiconductor device 1071 is connected to the first capacitor 105, the second end of the first semiconductor device 1071 is connected to the first end of the second semiconductor device 1072, the second end of the second semiconductor device 1072 is connected to the first end of the third semiconductor device 1073, the second end of the third semiconductor device 1073 is connected to the first end of the fourth semiconductor device 1074, and the second end of the fourth semiconductor device 1074 is connected to the second capacitor 106.
The first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, and the fourth semiconductor device 1074 are specifically devices of semiconductor characteristics.
Illustratively, the first, second, third and fourth semiconductor devices 1071, 1072, 1073, 1074 may include IGBTs (Insulated Gate Bipolar Transistor, insulated gate bipolar transistors).
It should be noted that, the first semiconductor component 107 is a device capable of controlling on/off, and the state switching duration of the first semiconductor component 107 is faster, so as to ensure the state switching speed of the energy storage converter 100.
The state switching duration of the first semiconductor component 107 may be specifically 5ms to 10ms, for example.
The dc converter module 103 further includes a third capacitor 108, one end of the third capacitor 108 is connected to the second end of the first semiconductor device 1071, and the other end of the third capacitor 108 is connected to the second end of the third semiconductor device 1073; the third capacitor 108 is a voltage stabilizing capacitor, and is used for balancing the voltage value of the energy storage converter 100.
Illustratively, the third capacitance 108 may balance the voltage values of the energy storage converter 100 with the first capacitance 105 and the second capacitance 106.
The dc converter module 103 further comprises an inductance assembly 109, one end of the inductance assembly 109 being connected to the second end of the second semiconductor device 1072 for storing the electrical energy of the first dc power supply 104.
The dc converter module 103 further includes a fourth capacitor 110, one end of the fourth capacitor 110 is connected to the other end of the inductance component 109, and the other end of the fourth capacitor 110 is connected to the second port 102.
The energy storage converter 100 further includes an ac converter module 111, where one end of the ac converter module 111 is connected to the other end of the inductance assembly 109, and the other end of the ac converter module is connected to the second port 102, and the ac converter module is configured to convert dc power output by the dc converter module into ac power. The ac converter module 111 is configured to convert the dc power output from the dc converter module 103 into ac power and output the ac power.
The ac converter module 111 may be an H-bridge circuit, an NPC circuit, or an ANPC circuit, for example.
It should be noted that, the first semiconductor component 107 is configured to adjust the voltage value of the fourth capacitor 110, so that the voltage value of the fourth capacitor 110 is greater than the first preset value and less than the second preset value; and further, the current ripple of the inductance assembly 109 is minimized, so that the efficiency of the energy storage converter 100 is prevented from being reduced due to the fact that the current ripple of the inductance assembly 109 is large.
Further, the first semiconductor component 107 is further configured to adjust a voltage value of the third capacitor 108, so that the voltage value of the third capacitor 108 is a third preset value, and stability of the voltage value in the current transmission process in the operation process of the energy storage capacitor is further ensured.
Further, the midpoint balancing branch 120 is configured to adjust the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106, so that the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are a fourth preset value. To ensure stable operation of the energy storage converter 100.
Through the arrangement of the dc converter module, the energy storage converter 100 in this embodiment can adjust the voltage value of the fourth capacitor 110 in the operation process of the high dc voltage value and the low ac voltage value, so that the voltage value of the fourth capacitor 110 is kept between the first preset value and the second preset value, and further the current ripple of the inductance component 109 is minimized, so as to avoid the efficiency reduction of the energy storage converter 100 caused by the larger current ripple of the inductance component 109. Meanwhile, the voltage values of the first capacitor 105 and the second capacitor 106 are adjusted to be fourth preset values through the midpoint balance branch 120, so that the operation stability of the energy storage converter 100 is ensured.
In some embodiments, optionally, an energy storage converter 100 is provided, where a half of the voltage value of the first direct current power supply 104 is smaller than a first preset value, controlling the first semiconductor component 107 to operate in the first mode so that the voltage value of the fourth capacitor 110 is greater than the first preset value;
in the first mode, the duty cycle of the first semiconductor device 1071 and the second semiconductor device 1072 is greater than 0.5, and the duty cycle of the third semiconductor device 1073 and the fourth semiconductor device 1074 is less than 0.5;
in the case that one half of the voltage value of the first dc power supply 104 is greater than the second preset value, controlling the first semiconductor device 107 to operate in the second mode so that the voltage value of the fourth capacitor 110 is less than the second preset value;
in the second mode, the duty cycle of the first semiconductor device 1071 and the second semiconductor device 1072 is less than 0.5, and the duty cycle of the third semiconductor device 1073 and the fourth semiconductor device 1074 is greater than 0.5;
in the case that one half of the voltage value of the first dc power supply 104 is greater than the first preset value and less than the second preset value, controlling the first semiconductor device 107 to operate in the third mode so that the voltage value of the fourth capacitor 110 is greater than the first preset value and less than the second preset value;
In the third mode, the duty ratio of the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, and the fourth semiconductor device 1074 is 0.5.
In this embodiment, in the case that one half of the voltage value of the first dc power supply 104 is smaller than the first preset value, the first semiconductor device 107 is controlled to operate in the first mode so that the voltage value of the fourth capacitor 110 is greater than the first preset value.
Specifically, in the first mode, the duty ratio of the first semiconductor device 1071 and the second semiconductor device 1072 is greater than 0.5, and the duty ratio of the third semiconductor device 1073 and the fourth semiconductor device 1074 is less than 0.5.
In the case that one half of the voltage value of the first dc power supply 104 is greater than the second preset value, the first semiconductor device 107 is controlled to operate in the second mode so that the voltage value of the fourth capacitor 110 is less than the second preset value.
Specifically, in the second mode, the duty ratio of the first semiconductor device 1071 and the second semiconductor device 1072 is less than 0.5, and the duty ratio of the third semiconductor device 1073 and the fourth semiconductor device 1074 is greater than 0.5.
In the case that one half of the voltage value of the first dc power supply 104 is greater than the first preset value and less than the second preset value, the first semiconductor device 107 is controlled to operate in the third mode so that the voltage value of the fourth capacitor 110 is greater than the first preset value and less than the second preset value.
Specifically, in the third mode, the duty ratio of the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, and the fourth semiconductor device 1074 is 0.5.
It will be appreciated that, in the case where one half of the voltage value of the first dc power source 104 is smaller than the first preset value or larger than the second preset value, the voltage value of the fourth capacitor 110 may be too low or too high, which may result in a larger current ripple of the inductance assembly 109, thereby reducing the efficiency of the energy storage converter 100. At this time, the duty ratios of the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073 and the fourth semiconductor device 1074 are adjusted, so that the voltage value of the fourth capacitor 110 is adjusted, the voltage value of the fourth capacitor 110 is kept between the first preset value and the second preset value, the current ripple of the inductance assembly 109 is further minimized, and the efficiency reduction of the energy storage converter 100 caused by the larger current ripple of the inductance assembly 109 is avoided.
Accordingly, in the case that one half of the voltage value of the first dc power supply 104 is greater than the first preset value and less than the second preset value, the first semiconductor device 107 is controlled to operate in the third mode so that the voltage value of the fourth capacitor 110 is greater than the first preset value and less than the second preset value. The current ripple of the inductance assembly 109 is minimized, and the efficiency reduction of the energy storage converter 100 caused by the larger current ripple of the inductance assembly 109 is avoided.
In this embodiment, the first dc power supply 104 is compared with the first preset value and the second preset value, and the first semiconductor device 107 is further controlled in operation mode according to the comparison result, so that the voltage value of the fourth capacitor 110 is greater than the first preset value and less than the second preset value. The current ripple of the inductance assembly 109 is minimized, and the efficiency reduction of the energy storage converter 100 caused by the larger current ripple of the inductance assembly 109 is avoided.
In some embodiments, optionally, in a case where the voltage value of the third capacitor 108 is greater than the third preset value and the current average value of the inductance component 109 is greater than 0, the on-time period of the first semiconductor device 1071 and the third semiconductor device 1073 is reduced, and the on-time period of the second semiconductor device 1072 and the fourth semiconductor device 1074 is increased, so that the voltage value of the third capacitor 108 is equal to the third preset value;
when the voltage value of the third capacitor 108 is greater than the third preset value and the average current value of the inductance component 109 is less than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is increased, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is reduced, so that the voltage value of the third capacitor 108 is equal to the third preset value;
When the voltage value of the third capacitor 108 is smaller than the third preset value and the average current value of the inductance component 109 is larger than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is increased, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is reduced, so that the voltage value of the third capacitor 108 is equal to the third preset value;
in the case where the voltage value of the third capacitor 108 is smaller than the third preset value and the average current value of the inductance component 109 is smaller than 0, the on-time period of the first semiconductor device 1071 and the third semiconductor device 1073 is reduced, and the on-time period of the second semiconductor device 1072 and the fourth semiconductor device 1074 is increased so that the voltage value of the third capacitor 108 is equal to the third preset value.
In this embodiment, in the case where the voltage value of the third capacitor 108 is greater than the third preset value and the average value of the currents of the inductance component 109 is greater than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is reduced, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is increased so that the voltage value of the third capacitor 108 is equal to the third preset value, the on-time being the time when the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, or the fourth semiconductor device 1074 is in the on-state.
In a case where the voltage value of the third capacitor 108 is greater than the third preset value and the average current value of the inductance component 109 is less than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is increased, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is reduced, so that the voltage value of the third capacitor 108 is equal to the third preset value.
In the case where the voltage value of the third capacitor 108 is smaller than the third preset value and the average current value of the inductance component 109 is greater than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is increased, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is reduced, so that the voltage value of the third capacitor 108 is equal to the third preset value.
In the case where the voltage value of the third capacitor 108 is smaller than the third preset value and the average value of the currents of the inductance component 109 is smaller than 0, the on-time of the first semiconductor device 1071 and the third semiconductor device 1073 is reduced, and the on-time of the second semiconductor device 1072 and the fourth semiconductor device 1074 is increased so that the voltage value of the third capacitor 108 is equal to the third preset value.
The energy storage converter 100 in this embodiment adjusts the on-time of the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073 and the fourth semiconductor device 1074 so that the voltage value of the third capacitor 108 is equal to the third preset value, thereby realizing the voltage value balance of the energy storage converter 100 and further ensuring the safe operation of the energy storage converter 100.
In some embodiments, the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, and the fourth semiconductor device 1074 each optionally include an insulated gate transistor and a diode for controlling the flow of current between the first port 101 and the second port 102 and the inductive component 109.
In this embodiment, the first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073, and the fourth semiconductor device 1074 each include an insulated gate transistor and a diode for controlling the flow of current between the first port 101 and the second port 102 and the inductance assembly 109, wherein the diodes and the insulated gate transistors are antiparallel.
Illustratively, the anode of the diode is connected to the source of the insulated gate transistor and the cathode of the diode is connected to the drain of the insulated gate transistor.
The first semiconductor device 1071, the second semiconductor device 1072, the third semiconductor device 1073 and the fourth semiconductor device 1074 in the energy storage converter 100 in this embodiment each include an insulated gate transistor and a diode, so that voltage value balance of the energy storage converter 100 is achieved, and safe operation of the energy storage converter 100 is further ensured.
In some embodiments, as shown in fig. 2, optionally, the midpoint balanced leg 120 further comprises:
a branch resistor 112, one end of the branch resistor 112 is connected to the other end of the first capacitor 105;
the branch switch 114, one end of the branch switch 114 is connected with the other end of the branch resistor 112;
a fifth semiconductor device 116, wherein the positive electrode of the fifth semiconductor device 116 is connected to the other end of the branch switch 114, and the negative electrode of the fifth semiconductor device 116 is connected to one end of the third capacitor 108;
a sixth semiconductor device 118, the positive electrode of the sixth semiconductor device 118 being connected to the other end of the third capacitor 108, the negative electrode of the sixth semiconductor device 118 being connected to the other end of the branch switch 114;
the bypass switch 114 is used for controlling the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 to be equal to one half of the voltage value of the first direct current power supply 104.
In this embodiment, the midpoint balanced leg 120 includes a leg resistor 112 and a leg switch 114, and the switching of the current in the leg resistor 112 can be achieved by the switching of the leg switch 114. Further, the dc converter module 103 further includes a fifth semiconductor device 116, where an anode of the fifth semiconductor device 116 is connected to the other end of the branch switch 114, and a cathode of the fifth semiconductor device 116 is connected to one end of the third capacitor 108; and a sixth semiconductor device 118, wherein a positive electrode of the sixth semiconductor device 118 is connected to the other end of the third capacitor 108, and a negative electrode of the sixth semiconductor device 118 is connected to the other end of the bypass switch 114. The fifth semiconductor device 116 and the sixth semiconductor device 118 serve to limit the current flow in the shunt resistor 112.
Illustratively, the fifth semiconductor device 116 and the sixth semiconductor device 118 may each be a diode.
The energy storage converter 100 in this embodiment controls the on or off of the branch switch 114, so as to connect the branch resistor 112 to the first semiconductor component 107, and further, adjust the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106, so that the voltage value of the first capacitor 105 is equal to the voltage value of the second capacitor 106, and balance the voltage values of the energy storage converter 100, and further, ensure safe operation of the energy storage converter 100.
In some embodiments, optionally, in a case where the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the second capacitor 106 is smaller than the difference between the voltage value of the first dc power source 104 and the voltage value of the third capacitor 108, the control branch switch 114 is closed, and the first semiconductor device 1071 is controlled to be turned on;
in the case that the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the first capacitor 105 is smaller than the difference between the voltage value of the first dc power supply 104 and the voltage value of the third capacitor 108, the control branch switch 114 is closed, and the fourth semiconductor device 1074 is controlled to be turned on.
In this embodiment, in the case where the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the second capacitor 106 is smaller than the difference between the voltage value of the first dc power supply 104 and the voltage value of the third capacitor 108, that is, in the case where the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the first capacitor 105 is larger than the voltage value of the second capacitor 106. The branch switch 114 is controlled to be closed so that the branch resistor 112 is connected to the first semiconductor element 107. Further, after the branch switch 114 is closed, the first semiconductor device 1071 is controlled to be turned on, so that current flows from the first semiconductor component 107 into the branch resistor 112, so that the voltage value of the first capacitor 105 is reduced, and the voltage value of the second capacitor 106 is increased, so that the voltage value of the first capacitor 105 is equal to the voltage value of the second capacitor 106.
In the case where the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the first capacitor 105 is smaller than the difference between the voltage value of the first dc power supply 104 and the voltage value of the third capacitor 108, that is, in the case where the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106 are not equal, and the voltage value of the first capacitor 105 is smaller than the voltage value of the second capacitor 106. The branch switch 114 is controlled to be closed so that the branch resistor 112 is connected to the first semiconductor element 107. Further, after the branch switch 114 is closed, the fourth semiconductor device 1074 is controlled to be turned on, so that current flows from the branch resistor 112 into the first semiconductor component 107, and thus the voltage value of the first capacitor 105 increases, and the voltage value of the second capacitor 106 decreases, so that the voltage value of the first capacitor 105 is equal to the voltage value of the second capacitor 106.
The energy storage converter 100 in this embodiment controls the on or off of the branch switch 114, and simultaneously cooperates with the conduction of the first semiconductor device 1071 and the fourth semiconductor device 1074, so as to connect the branch resistor 112 to the first semiconductor component 107, and further, adjust the voltage value of the first capacitor 105 and the voltage value of the second capacitor 106, so that the voltage value of the first capacitor 105 is equal to the voltage value of the second capacitor 106, and balance the voltage values of the energy storage converter 100, and further, ensure safe operation of the energy storage converter 100.
In some embodiments, optionally, the fifth semiconductor device 116 and the sixth semiconductor device 118 each include a diode for controlling the current flow between the shunt resistor 112 and the third capacitor 108.
As shown in fig. 3, an embodiment of the present invention provides a method for controlling an energy storage converter, including:
step 302, determining a first preset value according to a target output voltage value of the energy storage converter;
step 304, determining a second preset value according to the operation parameters of the AC converter module;
in step 306, the first semiconductor device is controlled so that the voltage value of the fourth capacitor is greater than the first preset value and less than the second preset value.
In this embodiment, a method for controlling an energy storage converter is provided, where the energy storage converter is an energy storage converter in any one of the foregoing embodiments, and the energy storage converter is connected to a first dc power supply.
Firstly, a target output voltage value of the energy storage current device is obtained, and a first preset value can be determined according to the target output voltage value.
For example, if the output is a three-phase three-wire system, the output voltage value isUac1 A first preset valueUdcmin The method comprises the following steps:
if the output is three-phase four-wire system, the output voltage value isUac2 A first preset valueUdcmin The method comprises the following steps:
where k is a compensation factor greater than 1, and is generally related to device voltage drop, dead time, etc., and is generally about 1.02.
Further, the first semiconductor component is controlled so that the voltage value of the fourth capacitor is larger than the first preset value and smaller than the second preset value.
Specifically, under the condition that one half of the voltage value of the first direct current power supply is smaller than a first preset value, controlling the first semiconductor component to operate in a first mode so as to enable the voltage value of the fourth capacitor to be larger than the first preset value;
in the first mode, the duty cycle of the first semiconductor device and the second semiconductor device is greater than 0.5, and the duty cycle of the third semiconductor device and the fourth semiconductor device is less than 0.5.
Specifically, in the first mode, as shown in fig. 10, the voltage value of the fourth capacitor may be setUc4 The reference value isU*c4 Reference valueU*c4 And sampled to obtainUc4 Subtracting, obtaining a reference value I of the inductance current by the difference through a voltage value ring UPI(s)L * . Reference valueIL * And sampled to obtainIL Subtracting, the difference value passes through a current loop CPI(s) to obtain the duty ratioD. The waveform diagram of the dc converter module in the first mode is shown in fig. 7. Wherein S is1 Is a first semiconductor device, S2 Is a second semiconductor device, S3 Is a third semiconductor device, S4 In the case of the fourth semiconductor device,UL1 as the voltage value of the inductive component,IL1 is the current of the inductive component.
And under the condition that one half of the voltage value of the first direct current power supply is larger than a second preset value, controlling the first semiconductor component to operate in a second mode so as to enable the voltage value of the fourth capacitor to be smaller than the second preset value.
In the second mode, the duty cycle of the first semiconductor device and the second semiconductor device is less than 0.5, and the duty cycle of the third semiconductor device and the fourth semiconductor device is greater than 0.5.
Specifically, in the second mode, as shown in FIG. 10, the voltage value of the fourth capacitor may be setUc4 The reference value isU*c4 Reference valueU*c4 And sampled to obtainUc4 Subtracting, obtaining the reference value of the inductance current by the difference value through a voltage value ring UPI(s)IL * . Reference valueIL * And sampled to obtainIL Subtracting, the difference value passes through a current loop CPI(s) to obtain the duty ratioD. The waveform diagram of the dc converter module in the second mode is shown in fig. 8. Wherein S is1 Is a first semiconductor device, S2 Is a second semiconductor device, S3 Is a third semiconductor device, S4 In the case of the fourth semiconductor device,UL1 as the voltage value of the inductive component,IL1 is the current of the inductive component.
Controlling the first semiconductor component to operate in a third mode under the condition that one half of the voltage value of the first direct current power supply is larger than a first preset value and smaller than a second preset value, so that the voltage value of the fourth capacitor is larger than the first preset value and smaller than the second preset value;
in the third mode, the duty ratio of the first semiconductor device, the second semiconductor device, the third semiconductor device, and the fourth semiconductor device is 0.5. The waveform diagram of the dc converter module in the third mode is shown in fig. 9. Wherein S is1 Is a first semiconductor device, S2 Is a second semiconductor device, S3 Is a third semiconductor device, S4 In the case of the fourth semiconductor device,UL1 as the voltage value of the inductive component,IL1 is the current of the inductive component.
In this embodiment, the first dc power supply is compared with the first preset value and the second preset value, so that the first semiconductor component is controlled in the operation mode according to the comparison result, so that the voltage value of the fourth capacitor is greater than the first preset value and less than the second preset value. The current ripple of the inductance component is minimized, and the efficiency reduction of the energy storage converter caused by the fact that the current ripple of the inductance component is large is avoided.
In one embodiment, as shown in FIG. 6, first, the voltage value of the fourth capacitor is calculated based on the AC voltage value that is required to be outputUc4 Reference value of (2) isUdcmin If (if)Uc4 Too high, voltage spikes at the time of device turn-on or turn-off may cause device damage, and thus the ac converter module pairUc4 The highest value of (2) is limited toUdcmax . This value is typically determined experimentally or empirically.
Judging the voltage value of the first direct current power supplyUbat andUdcmax (d cm)Udcmin relationship. If it isUdcmin<0.5Ubat<Udcmax, the duty cycle is fixed at 0.5. Otherwise if 0.5Ubat<Udcmin, can set the capacitance C4 Voltage valueUc4 Reference value of (2)Uc4 * Is thatUdcmin, which enables the DC converter module to perform closed-loop control in the working mode 1; otherwise if notUdcmax<0.5Ubat, can set up the electric capacity C according to the overall efficiency consideration of the converter4 Voltage valueUc4 The dc converter module is closed-loop controlled in operating mode 2.
In some embodiments, optionally, as shown in fig. 4, there is provided a control method of an energy storage converter, controlling the first semiconductor component to make the voltage value of the first capacitor, the voltage value of the second capacitor and the voltage value of the sixth capacitor equal, including:
step 402, determining a first preset value according to a target output voltage value of the energy storage converter;
step 404, determining a second preset value according to the operation parameters of the ac converter module;
step 406, controlling the first semiconductor device so that the voltage value of the fourth capacitor is greater than the first preset value and less than the second preset value;
step 408, obtaining a voltage value of the third capacitor;
in step 410, the first semiconductor device is controlled so that the voltage value of the third capacitor is a third predetermined value.
In this embodiment, the voltage value of the third capacitor may also be obtained, and then the first semiconductor device may be controlled so that the voltage value of the third capacitor is a third preset value.
Specifically, when the voltage value of the third capacitor is greater than a third preset value and the current average value of the inductance component is greater than 0, the conduction time of the first semiconductor device and the third semiconductor device is reduced, and the conduction time of the second semiconductor device and the fourth semiconductor device is increased, so that the voltage value of the third capacitor is equal to the third preset value;
When the voltage value of the third capacitor is larger than a third preset value and the current average value of the inductance component is larger than 0, the conduction time of the first semiconductor device and the third semiconductor device is increased, and the conduction time of the second semiconductor device and the fourth semiconductor device is reduced, so that the voltage value of the third capacitor is equal to the third preset value;
when the voltage value of the third capacitor is smaller than a third preset value and the current average value of the inductance component is larger than 0, the conduction time of the first semiconductor device and the third semiconductor device is increased, and the conduction time of the second semiconductor device and the fourth semiconductor device is reduced, so that the voltage value of the third capacitor is equal to the third preset value;
when the voltage value of the third capacitor is smaller than a third preset value and the current average value of the inductance component is larger than 0, the conduction time of the first semiconductor device and the third semiconductor device is reduced, and the conduction time of the second semiconductor device and the fourth semiconductor device is increased, so that the voltage value of the third capacitor is equal to the third preset value;
according to the energy storage converter in the embodiment, the voltage value of the third capacitor is a third preset value by adjusting the conduction time of the first semiconductor device, the second semiconductor device, the third semiconductor device and the fourth semiconductor device, so that the voltage value balance of the energy storage converter is realized, and the safe operation of the energy storage converter is further ensured.
In one implementation, as shown in FIG. 11, a third capacitance C is first obtained3 Voltage value of (2)Uc3 And set C3 The reference value of the voltage value, i.e. the third preset valueUc3 * . Then, judgeUc3 And (3) withUc3 * Relationship between them. Meanwhile, the average current of the inductance component is judgedILave Whether greater than 0. If it isUc3 Greater thanUc3 * And is also provided withILave If the voltage is larger than zero, the time for simultaneously conducting the first semiconductor device and the third semiconductor device is reduced, and S is correspondingly increased2 And S is4 The time of simultaneous conduction; if it isUc3 Greater thanUc3 * And is also provided withILave If the current is smaller than zero, the time for simultaneously conducting the first semiconductor device and the third semiconductor device is increased, and the time for simultaneously conducting the second semiconductor device and the fourth semiconductor device is correspondingly reduced; if it isUc3 Less thanUc3 * And is also provided withILave If the voltage is larger than zero, the time for simultaneously conducting the first semiconductor device and the third semiconductor device is increased, and the time for simultaneously conducting the second semiconductor device and the fourth semiconductor device is correspondingly reduced; if it isUc3 Less thanUc3 * And is also provided withILave And if the voltage is smaller than zero, the time for simultaneously conducting the first semiconductor device and the third semiconductor device is reduced, and the time for simultaneously conducting the second semiconductor device and the fourth semiconductor device is correspondingly increased.
Specifically, the decreasing and increasing time Δt can be obtained by closed-loop control, which can adopt the structure shown in fig. 12. Reference valueUc3 * And sampled to obtainUc3 Subtracting, dividing the difference by the average of the inductor currentsILave And then the delta T is obtained through the balance ring BPI(s).
In some embodiments, optionally, as shown in fig. 5, there is provided a control method of an energy storage converter, including:
step 502, determining a first preset value according to a target output voltage value of the energy storage converter;
step 504, determining a second preset value according to the operation parameters of the ac converter module;
step 506, controlling the first semiconductor component so that the voltage value of the fourth capacitor is greater than the first preset value and less than the second preset value;
step 508, obtaining a voltage value of the third capacitor;
step 510, controlling the first semiconductor device so that the voltage value of the third capacitor is a third preset value;
step 512, obtaining a voltage value of the first capacitor and a voltage value of the second capacitor;
step 514, controlling the midpoint balance branch and the first semiconductor component of the energy storage converter to make the voltage value of the first capacitor and the voltage value of the second capacitor equal to a fourth preset value.
In this embodiment, the neutral point balancing branch and the first semiconductor component are controlled such that the voltage value of the first capacitor and the voltage value of the second capacitor are equal to a fourth preset value, i.e. such that the voltage value of the first capacitor is equal to the voltage value of the second capacitor. Specifically, in the case where the voltage value of the first capacitor and the voltage value of the second capacitor are not equal, and the voltage value of the second capacitor is smaller than the difference between the voltage value of the first dc power supply and the voltage value of the third capacitor, that is, in the case where the voltage value of the first capacitor and the voltage value of the second capacitor are not equal, and the voltage value of the first capacitor is greater than the voltage value of the second capacitor. The branch switch controlling the midpoint balanced branch is closed such that the branch resistor is connected into the first semiconductor assembly. Further, after the branch switch is closed, the first semiconductor device is controlled to be turned on, so that current flows from the first semiconductor component into the branch resistor, the voltage value of the first capacitor is reduced, and the voltage value of the second capacitor is increased, so that the voltage value of the first capacitor is equal to the voltage value of the second capacitor.
In the case that the voltage value of the first capacitor and the voltage value of the second capacitor are not equal, and the voltage value of the first capacitor is smaller than the difference between the voltage value of the first direct current power supply and the voltage value of the third capacitor, that is, the voltage value of the first capacitor and the voltage value of the second capacitor are not equal, and the voltage value of the first capacitor is smaller than the voltage value of the second capacitor. The branch switch controlling the midpoint balanced branch is closed such that the branch resistor is connected into the first semiconductor assembly. Further, after the branch switch is closed, the fourth semiconductor device is controlled to be turned on, so that current flows into the first semiconductor component from the branch resistor, the voltage value of the first capacitor is increased, and the voltage value of the second capacitor is reduced, so that the voltage value of the first capacitor is equal to the voltage value of the second capacitor.
The energy storage converter in the embodiment realizes the connection of the branch resistor to the first semiconductor component by controlling the on or off of the branch switch of the midpoint balance branch and matching with the conduction of the first semiconductor device and the fourth semiconductor device, thereby realizing the adjustment of the voltage value of the first capacitor and the voltage value of the second capacitor, so that the voltage value of the first capacitor is equal to the voltage value of the second capacitor, realizing the voltage value balance of the energy storage converter, and further ensuring the safe operation of the energy storage converter.
In one embodiment, as shown in FIG. 13, the voltage value of the first capacitor may be set firstUc1 The upper limit Δumax of the voltage value deviation from the voltage value Uc2 of the second capacitor. Then, the absolute value of the difference between Uc1 and Uc2 is calculated, and the relation with Umax is judged. If Uc1-Uc2 is greater than Umax, closing the bypass switch K1; otherwise, K1 is disconnected.
Further, in order to avoid frequent actions of K1, K may be performed as follows1 As shown in fig. 14:
first, two threshold voltage values Δuth1 and Δuth2 are set, and Δuth1< Δuth2. And judging the state of K1. The absolute value of the difference between Uc1 and Uc2 is calculated, and the relationship with DeltaUth 1 and DeltaUth 2 is determined. If K1 is already closed and |Uc1-Uc2| is smaller than DeltaUth 1, then K1 is opened; if K1 has been closed and |Uc1-Uc2| is greater than ΔUth1, then K1 remains closed; if K1 has been opened and |Uc1-Uc2| is greater than DeltaUth 2, then K1 is closed; if K1 has been turned off and |Uc1-Uc2| is less than ΔUth2, K1 remains turned off.
As shown in fig. 15, in an embodiment of the present invention, there is provided a control apparatus 1500 of an energy storage converter, including:
an obtaining module 1502, configured to obtain a first preset value according to a target output voltage value of the energy storage converter; determining a second preset value according to the operation parameters of the alternating current converter module;
The control module 1504 is configured to control the first semiconductor device so that the voltage value of the fourth capacitor is greater than the first preset value and less than the second preset value.
In this embodiment, a control device 1500 of an energy storage converter is provided, where the energy storage converter is an energy storage converter in any of the foregoing embodiments, and the energy storage converter is connected to a first dc power supply.
The control device of the energy storage converter in the embodiment can adjust the voltage value of the fourth capacitor in the operation process of occasions with high direct current voltage value and low alternating current voltage value, so that the voltage value of the fourth capacitor is kept between the first preset value and the second preset value, further, current ripple of the inductance component is enabled to be minimum, and efficiency reduction of the energy storage converter caused by larger current ripple of the inductance component is avoided.
In some embodiments, as shown in fig. 16, optionally, a control device 1600 of an energy storage converter is provided, where the control device 1600 of an energy storage converter includes a processor 1602 and a memory 1604, and a program or an instruction is stored in the memory 1604, where the program or the instruction is executed by the processor 1602 to implement the steps of the control method of an energy storage converter according to any of the foregoing claims. Therefore, the control device 1600 of the energy storage converter has all the advantages of the control method of the energy storage converter in any of the above-mentioned embodiments, and will not be described herein.
In some embodiments, optionally, a readable storage medium is provided, on which a program is stored, which when executed by a processor, implements a method for controlling an energy storage converter as in any of the embodiments above, thereby having all the beneficial technical effects of the method for controlling an energy storage converter as in any of the embodiments above.
Among them, readable storage media such as Read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk, and the like.
It is to be understood that in the claims, specification and drawings of the present invention, the term "plurality" means two or more, and unless otherwise explicitly defined, the orientation or positional relationship indicated by the terms "upper", "lower", etc. are based on the orientation or positional relationship shown in the drawings, only for the convenience of describing the present invention and making the description process easier, and not for the purpose of indicating or implying that the apparatus or element in question must have the particular orientation described, be constructed and operated in the particular orientation, so that these descriptions should not be construed as limiting the present invention; the terms "connected," "mounted," "secured," and the like are to be construed broadly, and may be, for example, a fixed connection between a plurality of objects, a removable connection between a plurality of objects, or an integral connection; the objects may be directly connected to each other or indirectly connected to each other through an intermediate medium. The specific meaning of the terms in the present invention can be understood in detail from the above data by those of ordinary skill in the art.
In the claims, specification, and drawings of the present invention, the descriptions of terms "one embodiment," "some embodiments," "particular embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In the claims, specification and drawings of the present invention, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.