Disclosure of Invention
In a first aspect, an embodiment of the present disclosure provides an optical module test board, including:
a test board body;
the optical emission sub-module is fixed on the test board body, and the data transmission rate of optical signals emitted by the optical emission sub-module is configured to be adjustable, and the maximum data transmission rate is more than or equal to 800Gbps;
the digital signal processing chip is fixed on the test board body, and a TX terminal at the Line side of the digital signal processing chip is connected with the light emission sub-module through a third conductive circuit on the test board body and is used for sending an error code test control electric signal to the light emission sub-module through the third conductive circuit so as to control the light emission sub-module to generate and emit an error code test optical signal;
the first radio frequency connector is fixed on the test board body and used for connecting an adaptive optical module to be tested so that the optical module to be tested is electrically connected with a corresponding conductive circuit on the test board body, and the first radio frequency connector is a QSFP-DD radio frequency connector or an OSFP radio frequency connector;
the first optical fiber circuit is used for transmitting the error code test optical signal transmitted by the optical transmitting sub-module to the optical module to be tested, so that the optical module to be tested generates and outputs a corresponding error code test electric signal according to the received error code test optical signal;
the RX terminal of the Host side of the digital signal processing chip is connected with the RX terminal of the Host side of the optical module to be tested through a first conductive circuit on the test board body, and the digital signal processing chip is further used for receiving the error code test electric signal output by the optical module to be tested through the first conductive circuit and determining the error code rate of the optical module to be tested according to the error code test electric signal.
In some embodiments, the first radio frequency connector is a QSFP-DD radio frequency connector, and the optical module to be tested includes: 800G QSFP-DD packaged optical module, 400G QSFP-DD packaged optical module, 200G QSFP56 packaged optical module, or 100G QSFP28 packaged optical module;
or, the first radio frequency connector is an OSFP radio frequency connector, and the optical module to be tested includes an 800GOSFP packaged optical module.
In some embodiments, the TX terminal on the Host side of the digital signal processing chip is further connected to the TX terminal on the Host side of the optical module to be tested through a second conductive line on the test board body, and the digital signal processing chip is further configured to send an output test electrical signal to the optical module to be tested through the second conductive line, so that the optical module to be tested performs an output performance test based on the output test electrical signal.
In some embodiments, further comprising: the first optical switch is connected with the first optical fiber line;
the TX terminal of the Line side of the optical module to be tested corresponds to M optical channels, the second optical fiber circuit comprises M optical channels, the input end of the first optical switch is provided with M optical channels corresponding to the second optical fiber circuit one by one, the output end of the first optical switch is provided with 1 optical channel, the input end of the second optical switch is provided with 1 optical channel, and the output end of the second optical switch is provided with N optical channels;
one end of the second optical fiber circuit is connected with the optical module to be tested, the other end of the second optical fiber circuit is connected with the input end of the first optical switch, the output end of the first optical switch is connected with the input end of the second optical switch, and the output end of the second optical switch is connected with at least one optical testing device;
the second optical fiber circuit is used for respectively transmitting optical signals in M optical channels corresponding to the TX terminal on the Line side of the optical module to be tested to the first optical switch;
the first optical switch is used for responding to external control and transmitting optical signals transmitted by 1 first target optical channel in the M optical channels at the input end to the output end;
the second optical switch is used for responding to external control to transmit the optical signal at the input end to 1 second target optical channel in the N optical channels at the output end so as to test the external test equipment connected with the second target optical channel according to the optical signal in the second target optical channel.
In some embodiments, further comprising:
the micro control unit is connected with the digital signal processing chip through a third communication link and is used for sending a test signal code pattern and a test signal rate corresponding to the current error code test to the digital signal processing chip through the third communication link and also used for receiving the error rate information of the optical module to be tested fed back by the digital signal processing chip through the third communication link;
the micro control unit is provided with at least one communication interface for the micro control unit to communicate data with the upper computer through the communication interface.
In some embodiments, further comprising: at least one of the first monitoring module and the second monitoring module;
the first monitoring module is connected with the light emission sub-module through a first communication link, and is used for monitoring the working state of the light emission sub-module through the first communication link, generating corresponding first working state information and sending the first working state information to an upper computer;
the second monitoring module is connected with the optical module to be tested through a second communication link, and is used for monitoring the working state of the optical module to be tested through the second communication link, generating corresponding second working state information and sending the second working state information to an upper computer.
In some embodiments, further comprising: at least one of a dial switch module and a display module;
the dial switch module is connected with the first radio frequency connector and is used for controlling the level of at least part of pins in the first radio frequency connector.
The display module is connected with the first radio frequency connector and is used for displaying the working state of at least part of pins of the first radio frequency connector.
In some embodiments, further comprising: the device comprises a power supply module, a voltage reduction chip and a slow start chip;
the power supply module is used for providing the working voltage of the test board;
the voltage drop chip is electrically connected with the power module and the slow start chip, and is used for carrying out voltage reduction treatment on the working voltage of the test board provided by the power module to obtain the working voltage of the optical module, and the working voltage of the optical module is supplied to the optical module to be tested, which is connected with the first radio frequency connector, through the slow start chip and the first radio frequency connector.
In a second aspect, an embodiment of the present disclosure provides an optical module testing method, based on the optical module testing board provided in the first aspect, where the optical module testing method includes a step of performing an error rate test on an optical module to be tested, and specifically includes:
the digital signal processing chip sends error code test control electric signals to the light emission sub-module through a third conductive circuit;
the optical emission sub-module is used for responding to the control of the error code test control electric signal to generate and emit an error code test optical signal;
the first optical fiber circuit transmits error code test optical signals transmitted by the optical transmitting sub-module to an optical module to be tested, which is connected with a first radio frequency connector;
the optical module to be tested generates and outputs a corresponding error code test electric signal according to the received error code test optical signal;
the digital signal processing chip receives the error code test electric signal output by the optical module to be tested through the first conductive circuit, and determines the error code rate of the optical module to be tested according to the error code test electric signal.
In some embodiments, the optical module testing method further comprises: the step of testing the light output of the light module to be tested specifically comprises the following steps:
the digital signal processing chip sends an output test electric signal to the optical module to be tested through the second conductive circuit;
and outputting a corresponding output test optical signal by the optical module to be tested based on the output test electrical signal so as to realize the output performance test of the optical module to be tested according to the output test optical signal by external test equipment.
Detailed Description
In order that those skilled in the art will better understand the technical solutions of the present disclosure, the present disclosure will be described in further detail with reference to the accompanying drawings and detailed description.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a," "an," or "the" and similar terms do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also change accordingly when the absolute position of the object being described changes.
Like elements are denoted by like reference numerals throughout the various figures. For purposes of clarity, the various features of the drawings are not drawn to scale. Furthermore, some well-known portions may not be shown in the drawings.
In the embodiment of the disclosure, the 100G/200G/400G/800G optical module refers to an optical module with a data communication transmission rate capable of reaching 100Gbps/200Gbps/400Gbps/800Gbps (gigabits per second) respectively.
The TX terminal refers to a signal transmission (transport) terminal of a corresponding structure, and the RX terminal refers to a signal reception (reception) terminal of a corresponding structure. In the drawings, LTX represents a Line-side TX terminal set in the corresponding structure, LRX represents a Line-side RX terminal set in the corresponding structure, HTX represents a Host-side TX terminal set in the corresponding structure, and HRX represents a Host-side RX terminal set in the corresponding structure.
Fig. 1A is a block diagram of an optical module test board according to an embodiment of the present disclosure. Fig. 1B is a schematic diagram of an electrical connection between a light emitting sub-module, a light module to be tested, and a digital signal processing chip in an embodiment of the disclosure. Fig. 2 is a schematic diagram of a pin portion of a digital signal processing chip in an embodiment of the disclosure. Fig. 3A is a schematic diagram of the pin portion of a QSFP-DD radio frequency connector. Fig. 3B is a schematic diagram of a pin portion of an OSFP radio frequency connector in an embodiment of the present disclosure. As shown in fig. 1 to 3B, the Optical module test board may be at least used for performing error code test on an Optical module (Optical Modules), and includes: the test board comprises a test board body, an optical emission sub-module (Transmitter Optical Subassembly, TOSA for short), a digital signal processing (Digital Signal Processing, DSP for short), a first radio frequency connector and a first optical fiber circuit.
The test board body is also called a module adaptability test board (Module Compliance Board, MCB for short), and generally comprises an insulating board and some conductive circuits preset on the insulating board according to requirements.
The optical emission sub-module is fixed on the test board body, and the data transmission rate of the optical signals emitted by the optical emission sub-module is configured to be adjustable, and the maximum data transmission rate is more than or equal to 800Gbps; in some embodiments, the test light source may be specifically configured to generate and emit an error-testing light signal.
In some embodiments, the signal pattern corresponding to the transmitted bit error test optical signal is PRBS31 or PRBS31Q.
The digital signal processing chip is fixed on the test board body, adopts a Harvard structure with separated program and data inside, has special hardware multipliers, widely adopts pipeline operation, provides special DSP instructions, and can be used for rapidly realizing various digital signal processing algorithms. Referring to fig. 2, the digital signal processing chip has a Line side and a Host side, each of which is configured with a plurality of TX terminals and a plurality of RX terminals. And a TX terminal on the Line side of the digital signal processing chip is connected with the optical emission sub-module through a third conductive Line on the test board and is used for sending an error code test control electric signal to the optical emission sub-module through the third conductive Line so as to control the optical emission sub-module to generate and emit an error code test optical signal.
The first radio frequency connector is fixed on the test board body and is used for connecting the adaptive optical module to be tested so that the optical module to be tested is electrically connected with the corresponding conductive circuit on the test board body, and the first radio frequency connector is a QSFP-DD radio frequency connector or an OSFP radio frequency connector.
The first optical fiber circuit is used for transmitting the error code test optical signal transmitted by the optical transmitting sub-module to the optical module to be tested, so that the optical module to be tested generates and outputs a corresponding error code test electric signal according to the received error code test optical signal.
The RX terminal of the Host side of the digital signal processing chip is connected with the RX terminal of the Host side of the optical module to be tested through a first conductive circuit on the test board body, and the digital signal processing chip is also used for receiving an error code test electric signal output by the optical module to be tested through the first conductive circuit and determining the error code rate of the optical module to be tested according to the error code test electric signal.
Specifically, the digital signal processing chip compares the error code test electric signal sent by the optical module to be tested with the pre-stored standard error code test electric signal, so that the error code in the received error code test electric signal can be identified and the corresponding error code rate can be counted. The specific process of performing error detection and counting bit errors based on the error test electrical signal belongs to the conventional technology in the art, and will not be described in detail here.
The optical module test board provided by the embodiment of the disclosure integrates functions of code sending, code receiving, testing and the like, and can realize error code testing of the optical module to be tested based on the optical module test board. In addition, the optical module test board provided by the embodiment of the disclosure has stronger stability and maintainability.
In the present disclosure, the first optical fiber circuit includes a plurality of optical channels, and specifically includes an equal number of optical channels corresponding to RX terminals on a Line side of the optical module to be tested. As an example, 800g 2 x dr4 optical fibers with 2 MPO-12 optical fiber lines; the four paths on the left side of the optical fiber are Tx, the four paths on the right side of the optical fiber are Rx, 2 x 4 paths of Tx of the test light source are connected with 2 x 4 paths of Rx of the optical module to be tested through light attenuation, and 2 x 4 paths of Tx of the optical module to be tested are connected with the optical switch.
In some embodiments, a tunable optical attenuator (Variable Optical Attenuator) is disposed on the first optical fiber line, and the intensity of the optical signal for error code test input to the optical module to be tested can be adjusted based on the tunable optical attenuator, so as to test the sensitivity of the optical module to be tested in the process of error code test.
In the embodiment of the disclosure, the data transmission rate of the optical signal emitted by the test light source is configured to be adjustable, so that the optical module test board can be compatible with the test requirements of optical modules based on OSFP package or QSFP series package, such as 800G OSFP package optical module, 800G QSFP-DD package optical module, 400G QSFP-DD package optical module, 200G QSFP56 package optical module, 100G QSFP28 package optical module and the like.
Referring to FIG. 3A, in some embodiments, the first RF connector is a QSFP-DD RF connector, which includes two parts (e.g., U1A and U1B in FIG. 3A), and in actual use is a unitary chip structure.
When the first radio frequency connector is a QSFP-DD radio frequency connector, the optical module to be tested may include: 800G QSFP-DD packaged light module, 400G QSFP-DD packaged light module, 200G QSFP56 packaged light module, or 100G QSFP28 packaged light module.
Referring to FIG. 3B, in other embodiments, the first RF connector is an OSFP RF connector and the optical module to be tested comprises an 800G OSFP packaged optical module.
It should be noted that, the QSFP-DD radio frequency connector and the OSFP radio frequency connector shown in fig. 3A and 3B each include some signal transmitting pins TX, some signal receiving pins RX, a ground pin GND, and some functional pins (e.g., modPrsL pins, initMode pins, etc.); the QSFP-DD RF connector and the OSFP RF connector in the present proposal are both standard RF connectors, and the specific structure and the functions of each pin are not described in detail herein.
The optical module test board provided by the embodiment of the disclosure not only can support error code test of the optical module to be tested, but also can support output performance test of the optical module to be tested.
With continued reference to fig. 1, in some embodiments, the TX terminal on the Host side of the digital signal processing chip is further connected to the TX terminal on the Host side of the optical module to be tested through a second conductive line on the test board body, and the digital signal processing chip is further configured to send an output test electrical signal to the optical module to be tested through the second conductive line, so that the optical module to be tested performs an output performance test based on the output test electrical signal. Specifically, the optical module to be tested may output a corresponding optical signal based on the output test electrical signal, and the external test device (for example, a digital communication analyzer, a spectrometer, an optical power meter, etc.) may test the output performance of the optical module to be tested based on the optical signal output by the optical module to be tested.
In some embodiments, the signal pattern corresponding to the output test electrical signal may be PRBS15 or PRBS15Q. Specifically, when the optical module to be tested is 100g DR1, outputting a signal code pattern corresponding to the test electric signal as PRBS15; when the optical module to be tested adopts other series, the signal code pattern corresponding to the output test electric signal is PRBS15Q.
Fig. 4 is another structural block diagram of an optical module test board provided in an embodiment of the present disclosure. As shown in fig. 4, in some embodiments, further comprising: the optical fiber comprises a second optical fiber line, a first optical switch and a second optical switch.
The TX terminal of the Line side of the optical module to be tested corresponds to M optical channels, the second optical fiber circuit comprises M optical channels, the input end of the first optical switch is provided with M optical channels corresponding to the second optical fiber circuit one by one, the output end of the first optical switch is provided with 1 optical channel, the input end of the second optical switch is provided with 1 optical channel, and the output end of the second optical switch is provided with N optical channels. Wherein N is more than or equal to 2 and N is an integer.
In practical application, the number of external test devices to be arranged can be selected according to the test requirement, and the value of N in the second optical switch is determined according to the number of external test devices. In principle, each external test device is connected to a corresponding one of the optical channels in the second optical switch, so N is greater than or equal to the number of all external test devices configured. Fig. 4 illustrates only an N value of 4, which serves only as an example, and does not limit the technical solution of the present disclosure.
One end of the second optical fiber circuit is connected with the optical module to be tested, the other end of the second optical fiber circuit is connected with the input end of the first optical switch, the output end of the first optical switch is connected with the input end of the second optical switch, and the output end of the second optical switch is connected with at least one optical testing device.
The second optical fiber circuit is used for respectively transmitting optical signals in M optical channels corresponding to the TX terminal on the Line side of the optical module to be tested to the first optical switch.
The first optical switch is used for responding to external control and transmitting optical signals transmitted by 1 first target optical channel in M optical channels at the input end to the output end.
The second optical switch is used for responding to external control to transmit the optical signal at the input end to 1 second target optical channel in the N optical channels at the output end, so that external testing equipment connected with the second target optical channel can test according to the optical signal in the second target optical channel.
That is, the first optical switch may selectively transmit an optical signal in a certain channel (hereinafter referred to as an optical channel to be tested) in the TX terminal of the Line side of the optical module to be tested to the second optical switch, and the second optical switch may selectively transmit the optical signal in the optical channel to be tested to a certain external test device, so as to perform a corresponding test on the output performance of the optical channel to be tested.
With continued reference to fig. 1 and 4, in some embodiments, the optical module test board further comprises: micro-Controller Unit (MCU for short). The micro control unit is connected with the digital signal processing chip through a third communication link, and is used for sending a test signal code pattern (generally, PRBS31 or PRBS 31Q) corresponding to the current error code test to the digital signal processing chip through the third communication link, for example, PRBS31 is adopted when the electrical port signal is an NRZ signal, PRBS31Q is adopted when the electrical port signal is a PAM4 signal, and the test signal rate (determined according to the maximum data transmission rate of the optical module to be tested) is adopted when the electrical port signal is a PAM4 signal, and is also used for receiving the error code rate information of the optical module to be tested fed back by the digital signal processing chip through the third communication link.
In some embodiments, the micro control unit is configured with at least one communication interface for the micro control unit to communicate data with the host computer through the communication interface. As an alternative embodiment, the MCU is configured with a half duplex interface (e.g., I2C interface) and a full duplex interface (RS 232 interface).
In some embodiments, the MCU is configured with a charged erasable programmable read-only memory (Electrically Erasable Programmable read only memory, EEPROM for short), in which programs that the MCU needs to run when operating normally are pre-stored. The EEPROM and the MCU can communicate through an SPI interface. In addition, the EEPROM can also be pre-stored with a program which needs to be operated when the digital signal processing chip works normally, and the EEPROM and the signal processing module can communicate through an SPI interface.
In some embodiments, the optical module test board further comprises: at least one of the first monitoring module and the second monitoring module.
The first monitoring module is connected with the light emission sub-module through a first communication link and is used for monitoring the working state of the light emission sub-module through the first communication link, generating corresponding first working state information and sending the first working state information to the upper computer.
The second monitoring module is connected with the optical module to be tested through a second communication link, and is used for monitoring the working state of the optical module to be tested through the second communication link, generating corresponding second working state information and sending the second working state information to the upper computer.
In some embodiments, the first communication link and the second communication link are each an I2C serial communication bus.
In the embodiment of the disclosure, by setting the first monitoring module and the second monitoring module, the working state information (including, for example, working temperature, working voltage, bias current, emitted light power, received light power, etc.) of the light emitting sub-module and the light module to be tested can be respectively obtained based on the digital diagnosis monitoring technology (Digital Diagnostic Monitoring) to monitor, so that the problems can be rapidly positioned and solved when the light emitting sub-module and the light module to be tested fail. In addition, based on the first monitoring module and the second monitoring module, the light emission sub-module and the light module to be tested can be respectively subjected to compatibility verification (the compatibility verification is that whether the working environment of the analysis module accords with a data manual or is compatible with related standards, for example, the working voltage exceeds a specified range, the received light power is too high or too low, the temperature exceeds a working temperature range, and the like).
In some embodiments, the optical module test board further comprises: a dial switch module; the dial switch module is connected with the first radio frequency connector and is used for controlling the level of at least part of pins in the first radio frequency connector. Illustratively, the first radio frequency connector is a QSFP-DD radio frequency connector, and the pins controllable by the dial switch module include an InitMode pin, a ModSelL pin, a ResetL pin, and a ModPrsL pin of the QSFP-DD radio frequency connector.
Fig. 5 is a schematic circuit diagram of a dial switch module in the implementation of the present disclosure. As shown in fig. 5, in an embodiment, the dial switch module includes a first switch SW1, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9.
One end of a sixth resistor R6 is connected with the power supply VCC, and the other end of the sixth resistor R6 is respectively connected with the first end of the first switch SW1 and the QSFP-DD radio frequency connector; one end of a seventh resistor R7 is connected with a power supply VCC, and the other end of the seventh resistor R7 is respectively connected with the second end of the first switch SW1 and the QSFP-DD radio frequency connector; one end of an eighth resistor R8 is connected with a power supply VCC, and the other end of the eighth resistor R8 is respectively connected with a third end of the first switch SW1 and a QSFP-DD radio frequency connector; one end of a ninth resistor R9 is connected with a power supply VCC, and the other end of the ninth resistor R9 is respectively connected with a fourth end of the first switch SW1 and a QSFP-DD radio frequency connector; the fifth to eighth ends of the first switch SW1 are grounded;
it is understood that the dial switch includes, but is not limited to, a 2-bit dial switch or a 3-bit dial switch or a 4-bit dial switch, and the present embodiment is illustrated with the first switch SW1 being a 4-bit dial switch.
As shown in fig. 5, the first to fourth ends of the first switch SW1 are respectively connected to the InitMode pin, the ModSelL pin, the ResetL pin, and the ModPrsL pin of the QSFP-DD rf connector, and the first switch SW1 is used for controlling the high and low levels of the InitMode pin, the ModSelL pin, the ResetL pin, and the ModPrsL pin.
In actual use, the first switch SW1 may be turned on or off to control the corresponding pin to be high or low.
It should be noted that, in practical application, the specific composition of the dial switch module may be adjusted according to practical requirements, which is not limited in this disclosure.
In some embodiments, the optical module test board further comprises a display module, wherein the display module is connected with the first radio frequency connector, and the display module is used for displaying the working state of at least part of pins of the first radio frequency connector. The display module is used for visually observing the state of at least one pin in the QSFP radio frequency connector by a tester, such as voltage, current and the like at the corresponding pin.
It should be noted that, the display mode of the display module includes, but is not limited to, LED lamp display. In some embodiments, the operating status of pins including VCC, intL, modPrsL, etc. may be displayed by LED lights.
In some embodiments, the optical module test board further comprises: the device comprises a power supply module, a voltage reduction chip and a slow start chip; wherein the power module is used for providing a test board operating voltage (e.g., 12V); the voltage drop chip is electrically connected with the power module and the slow start chip, and is used for carrying out voltage reduction treatment on the working voltage of the test board provided by the power module to obtain the working voltage (for example, 3.3V) of the optical module, and the working voltage of the optical module passes through the slow start chip to the first radio frequency connector so as to supply power to the optical module to be tested, which is connected with the first radio frequency connector.
In the embodiment of the disclosure, the slow start chip is arranged between the working voltage of the optical module and the voltage drop chip, so that the slow start chip can effectively prevent the optical module to be tested from being overcharged, and the test board can also support hot plug of the optical module to be tested.
In addition, the voltage drop chip in the present disclosure may also power the digital signal processing chip and the light emission sub-module.
In some embodiments, a cooling fan is further disposed on the optical module test board, and the power module may supply power to the cooling fan.
The optical module test board provided by the embodiment of the disclosure integrates functions of code receiving and transmitting, power supplying, monitoring and the like, and can be compatible with test requirements of optical modules based on OSFP (open field effect transistor) package or QSFP series package, such as 800G OSFP package optical modules, 800G QSFP-DD package optical modules, 400G QSFP-DD package optical modules, 200G QSFP56 package optical modules, 100G QSFP28 package optical modules and the like; compared with the prior art, the method saves expensive equipment such as error code instruments, radio frequency wires and the like, and greatly reduces the test cost. In addition, the optical module test board provided by the embodiment of the disclosure has stronger stability and maintainability.
Fig. 6 is a schematic flow chart of an optical module testing method according to an embodiment of the disclosure. As shown in fig. 6, the optical module testing method is based on the optical module testing board provided in the foregoing embodiment, and includes: the step S1 of carrying out error rate test on the optical module to be tested specifically comprises the following steps:
and step S101, the digital signal processing chip sends an error code test control electric signal to the light emission sub-module through a third conductive line.
Specifically, an error code test starting instruction is sent to the MCU through the upper computer, the MCU sends an error code test control instruction to the digital signal processing chip, and the error code test control instruction comprises code pattern information of an error code test optical signal sent by the optical emission sub-module and baud rate information of the error code test optical signal in each optical channel.
Step S102, the optical emission sub-module responds to the control of the error code test control electric signal to generate and emit an error code test optical signal.
Step S103, the first optical fiber circuit transmits the error code test optical signal transmitted by the optical transmitting sub-module to the optical module to be tested, which is connected with the first radio frequency connector.
In some embodiments, a tunable optical attenuator is disposed on the first optical fiber line, and the intensity of the optical signal for error code test input to the optical module to be tested can be adjusted based on the tunable optical attenuator, so that the sensitivity of the optical module to be tested can be tested (i.e. the minimum light intensity that the optical module to be tested can identify is determined) in the process of performing error code test.
Step S104, the optical module to be tested generates and outputs a corresponding error code test electric signal according to the received error code test optical signal.
Step 105, the digital signal processing chip receives the error code test electric signal output by the optical module to be tested through the first conductive circuit, and determines the error code rate of the optical module to be tested according to the error code test electric signal.
For the specific description of the above steps S101 to S105, reference may be made to the content in the previous embodiments, and the description is omitted here.
Fig. 7 is a schematic flow chart of an optical module testing method according to an embodiment of the disclosure. As shown in fig. 7, the TX terminal on the Host side of the digital signal processing chip is further connected to the TX terminal on the Host side of the optical module to be tested through a second conductive trace on the test board body, and the optical module testing method includes not only step S1 in the previous embodiment, but also: the step S2 of performing the light output test on the optical module to be tested specifically includes:
step S201, the digital signal processing chip sends an output test electric signal to the optical module to be tested through the second conductive circuit.
In some embodiments, the pattern of the output test optical signal is PRBS15Q.
Step S202, the optical module to be tested outputs a corresponding output test optical signal based on the output test electrical signal, so that the external test equipment can realize the output performance test of the optical module to be tested according to the output test optical signal.
For the specific description of the above steps S201 to S202, reference may be made to the content in the previous embodiments, and the description is omitted here.
The sequence of the steps S1 and S2 is not limited, and the steps S1 and S2 may be performed first, then the steps S2 may be performed first, or the steps S2 may be performed first, then the steps S1 may be performed, which both cases belong to the protection scope of the present disclosure.
The technical scheme of the embodiment of the disclosure not only can realize error code test of the optical module to be tested, but also can test the sensitivity and output performance of the optical module to be tested.
It is noted that the flowcharts and block diagrams in the figures to which the above described embodiments relate illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The circuits or sub-circuits described in the embodiments of the present disclosure may be implemented in software or may be implemented in hardware. The described circuits or sub-circuits may also be provided in a processor, for example described as: a processor, comprising: the processing module comprises a writing sub-circuit and a reading sub-circuit. The names of these circuits or sub-circuits do not constitute limitations of the circuits or sub-circuits themselves in some cases.
It is to be understood that the above embodiments are merely exemplary embodiments employed to illustrate the principles of the present disclosure, however, the present disclosure is not limited thereto. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the disclosure, and are also considered to be within the scope of the disclosure.