Disclosure of Invention
In order to solve the above problems, the present invention provides a unified coding method in a converged communication system, including:
step S1: a CRC check code is added to a transmission block; selecting matched CRC check codes for the Turbo coding transmission blocks and the LDPC coding transmission blocks and generating polynomials;
step S2: dividing the code block of the transmission block added with the CRC check code;
step S3: coding the code blocks divided by the code blocks;
step S4: performing rate matching on each divided code block;
step S5: and each code block rate matching output is used for code block cascading.
Further, in the step S1, a matched CRC check code is selected for the Turbo encoded transport block, and a 24-bit CRC check code is selected for the Turbo encoded transport block.
Further, in the step S1, a matching CRC check code is selected for the LDPC coded transport block, wherein,
when the transport block length is greater than 3824, then a 24-bit CRC check code is selected;
when the transport block length is less than or equal to 3824, then a 16-bit CRC check code is selected.
Further, in the step S1, a Turbo encoded transport block and an LDPC encoded transport block generate polynomial, wherein,
when a 24-bit CRC check code is selected, the polynomial is expressed as equation (1),
gCRC24A (D)＝[D24 +D23 +D18 +D17 +D14 +D11 +D10 +D7 +D6 +D5 +D4 +D3 +D+1] (1)
when a 16-bit CRC check code is selected, the polynomial is expressed as equation (2),
gCRC16 (D)＝[D16 +D12 +D5 +1] (2)
further, in the step S2, performing code block segmentation on the transport block to which the CRC check code is added includes,
step S21: determining a maximum number of code blocks for Turbo coding and LDPC coding,
step S22: determining the number of code blocks C, the number of bits B' after adding CRC check code and the number of check bits L,
step S23: the parameter sets of the LDPC code and the Turbo code are determined, respectively.
Further, in the step S2, for Turbo coding, the number of bits of each coding block is first determined:
if C=1, { C+ ＝1,K- ＝0,C_ ＝0；
If C>1 { delta }K ＝K+ -K_ ，C+ ＝C-C_
Number of padding bits: f=c+ ·K+ +C_ ·K_ -B'
For LDPC encoding, parameters K', K are determinedb ，Zc Wherein, the method comprises the steps of, wherein,
K'＝B'/C
Kb the maximum value of B is determined based on the size of B, the maximum value of B depends on the maximum transmission block size, when the subcarrier spacing is 30KHz of a 5G communication system, the bandwidth is configured with 273 RBs, 4 layers of data transmission, 256QAM modulation, one DMRS symbol is configured, no other RE resource overhead exists, the maximum TB block size is 1277992, the corresponding maximum B value is 1278016,
zc is the satisfying inequality Kb The minimum Z value of Z.gtoreq.K',
step S24, determining the bit sequence of each code block, wherein the output bits of the code block segmentation are as follows:
wherein C represents the number of code blocks divided by the code blocks of the transmission block, C+ Representing the number of blocks of a first split code of Turbo coding, C- Representing the number of blocks of a second type of split code for Turbo coding, K+ Representing the block size, K, of the first split code of Turbo coding- Representing the block size of the second type of split code for Turbo coding, B' representing the total bit length of the transport block with CRC check code added, F representing the filler bit length, B representing the bit length of the transport block with CRC check code added, Kb An intermediate parameter representing the code block LDPC encoding,bit stream, Z, representing each code block after code block segmentationc Representing the lifting factor of the LDPC code.
Further, in step S3, encoding the code blocks of the code block division includes,
step S31: determining a code output length;
and S32, coding the code blocks, and selecting LDPC or Turbo to code the code blocks.
Further, the step S31: determining a code output length; wherein,,
for Turbo coding with code rate of 1/3, the coding output has three paths, and the output length of each path is Dr ＝Kr +4. Wherein each path is added with 4 bits, and three paths are added with 12 bits for sendingThe memory is zeroed.
For LDPC encoding, the encoded output length N and base map and spreading factor Zc Related to the following.
Wherein D isr Represents the output bit length, K of the Turbo code of the (r) th code blockr Representing the input bit length of the Turbo code of the r code block.
Further, the step S4 performs rate matching on the encoded block, where the matching step needs to determine the number of bits that can be carried by the resource, the size of the cyclic buffer, the output length of rate matching, and the starting position of reading the cyclic buffer.
Further, in step S5, code block concatenation is performed on the code block rate matching output, where a common module for Turbo coding and LDPC coding is designed.
Compared with the prior art, the invention comprises the following steps of S1: a transmission block TB adds a Cyclic Redundancy Check (CRC) check code for checking transmission block bits during decoding; step S2: code block segmentation, i.e. if the transport block size exceeds the maximum code block, the transport block needs to be segmented into smaller code blocks CB; if the number of the divided code blocks is greater than 1, each CB also needs to be added with a CRC check code for checking the code block bits during decoding; step S3: performing Turbo or LDPC coding on each CB; step S4: rate matching, wherein the coded bits are subjected to bit selection, bit deletion, bit repeated transmission and other treatments according to the information carried by the allocated resources; step S5: the invention combines two coding methods into a unified architecture, which is convenient to realize, reduces module redundancy and reduces complexity.
In particular, the method reduces the implementation complexity, the resource consumption and the running time consumption by less module redundancy design. The universal and redundant modules include: a TB/CB adds a CRC check code module, a partial parameter calculation module for code block segmentation, a sub-block interleaving and LDPC bit interleaving module for Turbo coding, an output length calculation module for Turbo and LDPC coding rate matching, a bit selection and punching module for Turbo and LDPC coding rate matching steps, a code block cascading module and the like;
in particular, the invention designs an interleaving matrix to realize the interleaving function of Turbo coding sub-blocks and LDPC coding bits;
in particular, the method of the invention can be applied to a 4G/5G mobile communication fusion system, and can be popularized to various fusion systems, such as a fusion system of a 4G and Digital Video Broadcasting (DVB) and an evolution system thereof, a fusion system of a 4G system and a Beidou system, a fusion system of a 4G system and a low-orbit satellite Internet system, and the like. The method is beneficial to system compatibility, system switching and system realization, and has wide practicability and application value.
Detailed Description
In order that the objects and advantages of the invention will become more apparent, the invention will be further described with reference to the following examples; it should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood by those skilled in the art that these embodiments are merely for explaining the technical principles of the present invention, and are not intended to limit the scope of the present invention.
Furthermore, it should be noted that, in the description of the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention can be understood by those skilled in the art according to the specific circumstances.
Referring to fig. 1-14, fig. 1 is a schematic flow diagram of a fusion encoding method according to an embodiment of the present invention; FIG. 2 is a detailed diagram of a fusion encoding method according to an embodiment of the present invention; FIG. 3 is a schematic diagram of adding CRC codes to transport blocks according to an embodiment of the invention; FIG. 4 is a block partitioning flow chart according to an embodiment of the present invention; FIG. 5 is a schematic diagram illustrating the calculation of code block segmentation parameters according to an embodiment of the present invention; FIG. 6 is a block diagram of LDPC code K in an embodiment of the present inventionb Determining a schematic diagram; FIG. 7 is a diagram of encoding according to an embodiment of the present invention; FIG. 8 is a schematic diagram of speed matching in an embodiment of the present invention; FIG. 9 is a schematic diagram of a portion of module attributes in speed matching in an embodiment of the present invention; FIG. 10 is a schematic diagram of interleaving of sub-blocks in Turbo code rate matching in an embodiment of the invention; FIG. 11 is a schematic diagram of LDPC code rate matching cyclic buffer reading in an embodiment of the present invention; fig. 12 is a schematic diagram of LDPC coded bit interleaving in an embodiment of the invention, fig. 13 is a schematic diagram of code block concatenation in an embodiment of the invention, and fig. 14 is a schematic diagram of LDPC coded base graph partitioning in an embodiment of the invention; the unified coding method in the converged communication system comprises the following steps:
step S1: a CRC check code is added to a transmission block; selecting matched CRC check codes for the Turbo coding transmission blocks and the LDPC coding transmission blocks and generating polynomials;
step S2: dividing the code block of the transmission block added with the CRC check code;
step S3: coding the code blocks divided by the code blocks;
step S4: performing rate matching on each divided code block;
step S5: and each code block rate matching output is used for code block cascading.
Specifically, in the step S1, a matched CRC check code is selected for the Turbo encoded transport block, and a 24-bit CRC check code is selected for the Turbo encoded transport block.
Specifically, in the step S1, a matched CRC check code is selected for the LDPC coded transport block, wherein,
when the transport block length is greater than 3824, then a 24-bit CRC check code is selected;
when the transport block length is less than or equal to 3824, then a 16-bit CRC check code is selected.
Specifically, in the step S1, a Turbo encoded transport block and an LDPC encoded transport block generator polynomial are generated, wherein,
when a 24-bit CRC check code is selected, the polynomial is expressed as equation (1),
gCRC24A (D)＝[D24 +D23 +D18 +D17 +D14 +D11 +D10 +D7 +D6 +D5 +D4 +D3 +D+1] (1)
when a 16-bit CRC check code is selected, the polynomial is expressed as equation (2),
gCRC16 (D)＝[D16 +D12 +D5 +1] (2)
d represents a variable that can be understood to represent a polynomial, which is essentially a shift register representation of delay cell formation, a standard representation in 3GPP protocols.
Specifically, the invention can realize adding CRC check codes to the transmission blocks of different coding methods by configuring CRC check code generating polynomials.
Specifically, the input bits in step S1 are: a, a0 ,a1 ,…,aA-1 The generated CRC check code check bits are: p is p0 ,p1 ,…,pL-1 The output bits are: b0 ,b1 ,…,bB-1 The output and input relationship is:
bk ＝ak ,k＝0,1,2,…,A-1
bk ＝pk-A ,k＝A,A+1,…,A+L-1
wherein a is0 ,a1 ,…,aA-1 Representing transport block bit stream, p0 ,p1 ,…,pL-1 Representing a TB block cyclic redundancy check bit stream, b0 ,b1 ,…,bB-1 Represents a transport block bit stream after adding cyclic redundancy check bits, a represents a transport block bit length, and L represents a TB block check bit length.
Specifically, in the step S2, the code block division of the transport block to which the CRC check code is added includes,
step S21: determining a maximum number of code blocks for Turbo coding and LDPC coding,
step S22: determining the number of code blocks C, the number of bits B' after adding CRC check code and the number of check bits L,
step S23: the parameter sets of the LDPC code and the Turbo code are determined, respectively.
Specifically, in the step S2, for Turbo coding, the number of bits of each coding block is first determined:
first partition size: k (K)+ The minimum K value satisfying inequality c.k+.b' in table 1,
TABLE 1 interleaving parameters in turbo coding
If C=1, { C+ ＝1,K_ ＝0,C_ ＝0；
If C>1 { delta }K ＝K+ -K_ ，C+ ＝C-C-
Number of padding bits: f=c+ ·K+ +C- ·K--B'
For LDPC encoding, parameters K', K are determinedb ，Zc Wherein, the method comprises the steps of, wherein,
K'＝B'/C
Kb the maximum value of B is determined based on the size of B, the maximum value of B depends on the maximum transmission block size, when the subcarrier spacing is 30KHz of a 5G communication system, the bandwidth is configured with 273 RBs, 4 layers of data transmission, 256QAM modulation, one DMRS symbol is configured, no other RE resource overhead exists, the maximum TB block size is 1277992, the corresponding maximum B value is 1278016,
zc is selected from Table 2 to satisfy inequality Kb The minimum Z value of Z.gtoreq.K',
TABLE 2 LDPC spreading factor set Z
| Set index (i)LS ) | Expansion factor set (Z) |
| 0 | {2,4,8,16,32,64,128,256} |
| 1 | {3,6,12,24,48,96,192,384} |
| 2 | {5,10,20,40,80,160,320} |
| 3 | {7,14,28,56,112,224} |
| 4 | {9,18,36,72,144,288} |
| 5 | {11,22,44,88,176,352} |
| 6 | {13,26,52,104,208} |
| 7 | {15,30,60,120,240} |
Step S24, determining the bit sequence of each code block, wherein the output bits of the code block segmentation are as follows:
wherein C represents the number of code blocks divided by the code blocks of the transmission block, C+ Representing the number of blocks of a first split code of Turbo coding, C- Representing the number of blocks of a second type of split code for Turbo coding, K+ Representing the block size, K, of the first split code of Turbo coding- Representing the block size of the second type of split code for Turbo coding, B' representing the total bit length of the transport block with CRC check code added, F representing the filler bit length, B representing the bit length of the transport block with CRC check code added, Kb An intermediate parameter representing the code block LDPC encoding,bit stream, Z, representing each code block after code block segmentationc Representing the lifting factor of LDPC coding, K represents the code block LDPC coding input bit length。
Specifically, step S22 may be designed as a common module of the inventive method, and parameter calculation may be performed as long as the maximum code block size and the transport block length to which the CRC check code is added are introduced; since the two types of codes need to be calculated with a large difference in parameter sets, step S23 needs to be designed independently, and since the two types of code stuffing bit positions are added differently: turbo coding filler bits are added before a first code block; the LDPC coded filler bits are added after the code block tail, i.e., the code block CRC check code, so step S24 requires a separate design.
Specifically, in step S3, encoding the code blocks of the code block division includes,
step S31: determining a code output length;
and S32, coding the code blocks, and selecting LDPC or Turbo to code the code blocks.
Specifically, the step S31: determining a code output length; wherein,,
for Turbo coding with code rate of 1/3, the coding output has three paths, and the output length of each path is Dr ＝Kr +4. Wherein each way is 4 bits more, and three ways are 12 bits more for register zeroing.
For LDPC encoding, the encoded output length N and base map and spreading factor Zc Related to;
base fig. 1: n=66Zc
Base fig. 2: n=50zc
Wherein D isr Represents the output bit length, K of the Turbo code of the (r) th code blockr Indicating the input bit length of the Turbo code of the r code block, Zc Representing the lifting factor of the LDPC code, N represents the code block LDPC code output bit length.
Specifically, the step S4 performs rate matching on the encoded block, where the matching step needs to determine the number of bits that can be carried by the resource, the size of the cyclic buffer, the output length of rate matching, and the starting position of reading the cyclic buffer.
Specifically, the step S4 includes,
step S41: determining the number of bits which can be carried by the allocated resources;
step S42: calculating the size N of the cyclic buffercb
For Turbo coding
For uplink service transmission, the total bit length of the cyclic buffer size and the three paths of bit streams output by coding after sub-block interleaving and bit collection is the same;
for downlink service transmission, the size of the cyclic buffer is also related to the number of code blocks, the size of the HARQ buffer at the receiving end, the duration of service scheduling, the number of downlink processes and the transmission mode;
for LDPC encoding
For uplink traffic transmission, the cyclic buffer size is related to the higher layer parameter rateMatching configuration, and if configured as limitedBufferrM, the cyclic buffer size Ncb ＝min(N,Nref ) The method comprises the steps of carrying out a first treatment on the surface of the And N isref Is calculated according to parameters such as maximum resource block configuration, maximum layer number, maximum modulation order, maximum code rate, number of code blocks, fixed code rate 2/3 and the like;
step S43: calculates the rate matching output length of each code block,
the number of code blocks scheduled is denoted by C ', C' =c for a 4G system.
Front Ca The rate matching length of each code block is:
rear Cb The rate matching length of each code block is:
Ca and Cb The method meets the following conditions:
wherein N iscb C' represents the number of code blocks scheduled in a 5G system, N represents the length of code block LDPC coded output bits, G represents the length of code block cascade output bits or the number of bits which can be carried by allocated resources, Qm Representing the modulation order, NL Indicating the number of transmission layers.
Step S44: the starting position of the rate matching read is calculated,
for Turbo coding
Wherein k is0 Indicating the starting read position of the bit at the time of rate matching,representing the number of rows, rv, of sub-block interlaces in Turbo code rate matchingidx Represents RV version number, Ncb Indicating the length of the cyclic buffer.
For LDPC encoding
The starting position of the LDPC rate matching read cycle buffer is related to the base map and RV version number, and the specific calculation is referred to Table 3.
TABLE 3 initial position k corresponding to different RV version numbers0
Rate matching other modules, sub-block interleaving, bit collection, bit selection and puncturing, bit interleaving, are not all modules of each coding mode; fig. 9 illustrates the uniqueness and commonality of modules, wherein sub-block interleaving, bit collection are Turbo coding unique modules, bit interleaving is LDPC coding unique modules, and bit selection and puncturing are common modules for both codes.
Step S45: subblock interleaving, referring to fig. 10, a turbo coding unique processing step,
interleaving is to write data into a buffer area according to a certain sequence and then read data from the buffer area according to another sequence; the subblock interleaving is to interleave each path of bits of Turbo coding output, namely the input is with the length of Dr Is output with length K after interleaving sub-blocksπ ；
Setting the number of interleaving columns of the subblocks:calculating the interleaving line number +.>So that the subblock interleaves the number of linesIs the minimum value that satisfies the following inequality:
number of padding NULL
Wherein,,representing the number of columns of sub-block interleaving in Turbo code rate matching, Dr Indicating the Turbo encoded output bit length of the r code block.
Adding N before inputting dataD A number of NULL bits, writing data into a rectangular buffer with the column number fixed to 32 columns and the line number determined by the input bit number;
for the followingPerforming column exchange on the data written into the rectangular buffer memory, wherein the column exchange mode refers to a table 4, and reading the data from left to right column by column to obtain an interleaved bit stream;
TABLE 4 column swap mode for sub-block interleaving
For the followingOutput bit stream number k and input bit stream number pi (k)
Wherein,,
the protocol gives only one sub-block interleaving and column switching pattern, and it is theoretically possible to design interleavers based on different column switching patterns.
Wherein,,representing the bit stream of the Turbo encoded output.
Step S46: the method comprises the steps of bit collection, turbo coding special processing steps,
three paths of output bits of the subblock interleaving are cascaded in sequence, and the output length is Kw ＝3Kπ ；
Step S47: the bits are selected and punctured and the bits are punctured,
bit selection and k calculated from RV version number0 The size of the cyclic buffer is related, and two cases are discussed;
first case: for LDPC encoding, the cyclic buffer size is equal to the code output length, Ncb =n; or for Turbo coding, the cyclic buffer size is equal to the length after interleaving and bit collection of the coded sub-blocks, namely Ncb ＝Kw ；
Second case: for LDPC encoding, the cyclic buffer size is smaller than the code output length, Ncb <N; or for Turbo coding, the cyclic buffer size is smaller than the length after interleaving and bit collection of the coded sub-blocks, i.e. Ncb <Kw 。
From k0 Position switchFirstly, continuously reading bits, discarding NULL bits in the bits, reading from the beginning after reading the buffer tail until the number of the read bits is the rate matching length; cyclic buffer read schematic reference fig. 11;
step S48: bit interleaving, see fig. 12; this step is a specific processing step of LDPC encoding.
Writing LDPC coded rate-matched data into a line number modulation order Q from top to bottom and from left to rightm The column number is output by rate matching and the modulation order Qm And in the determined rectangular buffer, reading out the bits in the rectangular buffer from top to bottom and from left to right column by column, namely, the bit interleaving result. This step is similar to sub-block interleaving in Turbo coding, except that no bit stuffing is required before writing into the rectangular buffer, as this is guaranteed by the rate matching output bit length calculation.
Specifically, in step S5, code block concatenation is performed on the code block rate matching output, where a common module for Turbo coding and LDPC coding is designed, and referring to fig. 13, the concatenated bits are used for allocating the bearing and transmission of data on a resource block or a resource grid.
In the case of example 1,
for 4G systems, consider the higher layer parameter altCQI-Table-r12 configuration case, and the CRC check code of PDCCH/EPDCCH associated with PDSCH transmission is DCI format 2B scrambled with C-RNTI, then the UE uses IMCS And table 7.1.7.1-1A in protocol 36213-d00 determines the modulation scheme. IMCS =21, look-up table gives Qm ＝8，ITBS ＝27。
First according to (I)TBS ,NPRB ) The parameters are looked up in table 7.1.7.2.1-1 to obtain tbs_l1= 66592, and then tbs_l1 is used to look up table 7.1.7.2.5-1 to obtain tbs= 266440 for four layer transmission.
Determining code block segmentation parameters according to TBS and Turbo coding flow: c=44, k+ ＝6080，K- ＝6016，C+ ＝44，C- ＝0，F＝0；
According to the code block size K+ And K- Determining coding output parameters:
Dr ＝Kr +4＝6084、6020
according to Dr Determining sub-block interleaving and bit collection parameters:ND ＝28，Kw ＝3Kπ ＝18336。
according to one resource configuration, g= 398512 is calculated. According to the layer number NL And modulation order Qm Configuration, calculation Ca ＝4，Cb ＝40，Ea ＝8128，Eb ＝8160。
Further, the output bit stream of each step may be determined, resulting in a coded output result.
For a 5G system:
according to the configuration of bandwidth, subcarrier spacing, allocated RB number, layer number, modulation order, code rate and the like, the transport block size a= 229576 can be calculated, and further, the TB CRC check code length is determined to be 24. The TB adds a length b= 229600 of the CRC check code;
determining a base map of LDPC coding as 1 according to a transport block size and a code rate, referring to FIG. 14;
from the base fig. 1, the code block size is determined to be 8448, kb ＝22；
Determining the number of code blocks c=28, B '=b+c=24= 230272 and K' =8224 according to the value of B;
according to Kb And K', determining Zc ＝384；
Determining a filler bit f=224 according to K' and the code block size;
according to Zc And a base map, determining a code block LDPC code output length n=25344;
according to the configuration of the related parameters such as the maximum modulation order, the maximum layer number of the TB mapping and the like, N is calculatedcb ＝25344；
According to a DMRS parameter configuration, determining the number of bits g= 340704 that a resource can carry;
according to G,Number of code blocks C, modulation order Qm And the number of layers, determining a rate matching length e=12168;
further, the output bit stream of each step may be determined, resulting in a coded output result.
Thus far, the technical solution of the present invention has been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of protection of the present invention is not limited to these specific embodiments. Equivalent modifications and substitutions for related technical features may be made by those skilled in the art without departing from the principles of the present invention, and such modifications and substitutions will be within the scope of the present invention.