技术领域technical field
本申请涉及显示技术领域，特别涉及一种显示基板及显示装置。The present application relates to the field of display technology, in particular to a display substrate and a display device.
背景技术Background technique
在制备显示面板的批量生产过程中，通常在大尺寸的衬底基板上制备多个显示面板的结构，之后进行切割，得到多个显示面板。显示面板包括用于连接起始行栅极驱动电路与驱动芯片的连接走线，连接走线至少部分位于显示面板的切割区域，在切割过程该连接走线可能会被切掉至少部分，导致起始行栅极驱动电路无法工作的问题，影响显示面板的正常显示。In the mass production process of preparing display panels, structures of multiple display panels are usually prepared on a large-sized base substrate, and then cut to obtain multiple display panels. The display panel includes connecting wires for connecting the starting row gate driving circuit and the driving chip. The connecting wires are at least partially located in the cutting area of the display panel. During the cutting process, at least part of the connecting wires may be cut off, resulting in The problem that the initial gate driving circuit cannot work affects the normal display of the display panel.
发明内容Contents of the invention
本申请提供了一种显示基板及显示装置。The present application provides a display substrate and a display device.
根据本申请实施例的第一方面，提供了一种显示基板。所述显示基板包括显示区及边框区，所述边框区包括第一边框区及与所述第一边框区相邻且位于所述第一边框区侧部的第二边框区；所述显示基板包括：According to a first aspect of the embodiments of the present application, a display substrate is provided. The display substrate includes a display area and a frame area, and the frame area includes a first frame area and a second frame area adjacent to the first frame area and located at a side of the first frame area; the display substrate include:
衬底；Substrate;
位于所述衬底一侧的发光结构层，所述发光结构层包括位于所述显示区的多个子像素及位于所述第二边框区的多个子像素；A light emitting structure layer located on one side of the substrate, the light emitting structure layer including a plurality of sub-pixels located in the display area and a plurality of sub-pixels located in the second frame area;
位于所述衬底与所述发光结构层之间的驱动电路层，所述驱动电路层包括多个栅极驱动电路及多个像素电路，所述栅极驱动电路位于所述第一边框区，所述像素电路与所述子像素电连接；所述多个栅极驱动电路包括起始行栅极驱动电路；a driving circuit layer located between the substrate and the light emitting structure layer, the driving circuit layer includes a plurality of gate driving circuits and a plurality of pixel circuits, the gate driving circuits are located in the first frame area, The pixel circuit is electrically connected to the sub-pixel; the plurality of gate drive circuits include a starting row gate drive circuit;
连接线，位于所述第一边框区，所述连接线的一端与所述起始行栅极驱动电路电连接，另一端用于与驱动芯片电连接，所述驱动芯片向所述起始行栅极驱动电路提供驱动信号；至少一个所述像素电路在所述衬底上的正投影位于所述连接线在所述衬底上的正投影背离所述显示区的一侧。A connection line, located in the first frame area, one end of the connection line is electrically connected to the gate drive circuit of the initial row, and the other end is used to electrically connect to the driving chip, and the driving chip is connected to the initial row. The gate driving circuit provides driving signals; the orthographic projection of at least one pixel circuit on the substrate is located on the side of the orthographic projection of the connection line on the substrate away from the display area.
在一个实施例中，所述驱动电路层还包括第一导电线和第二导电线，所述第一导电线的一端与所述栅极驱动电路相连，另一端与所述连接线相连，所述第二导电线的一端用于与所述驱动芯片电连接，另一端与所述连接线相连；所述第一导电线与所述第二导电线同层设置，所述显示基板还包括所述第一导电线与所述连接线之间的绝缘层，所述绝缘层设有多个通孔，所述第一导电线及所述第二导电线分别通过所述通孔与所述连接线电连接。In one embodiment, the driving circuit layer further includes a first conductive wire and a second conductive wire, one end of the first conductive wire is connected to the gate driving circuit, and the other end is connected to the connecting wire, so One end of the second conductive wire is used to electrically connect with the driving chip, and the other end is connected to the connecting wire; the first conductive wire and the second conductive wire are arranged on the same layer, and the display substrate further includes the The insulating layer between the first conductive wire and the connecting wire, the insulating layer is provided with a plurality of through holes, and the first conductive wire and the second conductive wire are respectively connected to the connecting wire through the through holes. Wire connection.
在一个实施例中，所述第一导电线及所述第二导电线的延伸方向与所述连接线的延伸方向相交，且在所述连接线的延伸方向上，所述第一导电线与所述第二导电线位于所述连接线的相对两侧；所述第一导电线在所述衬底上的正投影与所述连接线的一端在所述衬底上的正投影存在交叠，所述第二导电线在所述衬底上的正投影与所述连接线的另一端在所述衬底上的正投影存在交叠。In one embodiment, the extending direction of the first conductive wire and the second conductive wire intersects the extending direction of the connecting wire, and in the extending direction of the connecting wire, the first conductive wire and the The second conductive line is located on opposite sides of the connecting line; the orthographic projection of the first conductive line on the substrate overlaps with the orthographic projection of one end of the connecting line on the substrate , the orthographic projection of the second conductive wire on the substrate overlaps with the orthographic projection of the other end of the connecting wire on the substrate.
在一个实施例中，所述显示基板还包括位于所述通孔内的导电部，所述显示基板还包括导电结构，所述导电结构的至少部分位于所述通孔内且包覆所述导电部。In one embodiment, the display substrate further includes a conductive portion located in the through hole, the display substrate further includes a conductive structure, at least part of the conductive structure is located in the through hole and covers the conductive portion. department.
在一个实施例中，所述导电结构部分位于所述绝缘层背离所述衬底的一侧，所述导电结构位于所述绝缘层背离所述衬底一侧的部分覆盖所述通孔。In one embodiment, the conductive structure part is located on the side of the insulating layer away from the substrate, and the part of the conductive structure located on the side of the insulating layer away from the substrate covers the through hole.
在一个实施例中，所述多个栅极驱动电路还包括虚设栅极驱动电路；所述驱动电路层还包括位于所述第一边框区的目标信号线，所述目标信号线与所述虚设栅极驱动电路电连接；所述目标信号线包括所述连接线、第一子信号线和第二子信号线，在所述连接线的延伸方向上，所述第一子信号线与所述第二子信号线位于所述连接线的相对两侧，所述连接线与所述第一子信号线及所述第二子信号线之间均存在间隙。In one embodiment, the multiple gate driving circuits further include a dummy gate driving circuit; the driving circuit layer further includes a target signal line located in the first frame area, and the target signal line is connected to the dummy The gate drive circuit is electrically connected; the target signal line includes the connection line, the first sub-signal line and the second sub-signal line, and in the extending direction of the connection line, the first sub-signal line and the The second sub-signal line is located on opposite sides of the connection line, and there is a gap between the connection line and the first sub-signal line and the second sub-signal line.
在一个实施例中，所述驱动电路层还包括与所述第一导电线同层设置的导电部，所述间隙在所述衬底上的正投影与所述导电部在所述衬底上的正投影无交叠。In one embodiment, the driving circuit layer further includes a conductive part provided on the same layer as the first conductive line, and the orthographic projection of the gap on the substrate is the same as that of the conductive part on the substrate. The orthographic projection of has no overlap.
在一个实施例中，所述驱动电路层包括多个信号线，所述连接线的宽度大于所述信号线的宽度。In one embodiment, the driving circuit layer includes a plurality of signal lines, and the width of the connecting lines is greater than that of the signal lines.
在一个实施例中，所述连接线的材料与所述信号线的材料不同。In one embodiment, the material of the connecting wire is different from that of the signal wire.
在一个实施例中，所述第二边框区的子像素排布为多行，且位于同一行的子像素的排布方向与所述第二边框区的延伸方向相同；所述第二边框区的多行子像素包括与所述显示区相邻的至少两行第一子像素，与所述至少两行第一子像素电连接的栅极驱动电路被配置为在一帧画面显示期间向对应的第一子像素的像素电路输出插黑信号，使所述至少两行第一子像素保持不发光。In one embodiment, the sub-pixels in the second frame area are arranged in multiple rows, and the arrangement direction of the sub-pixels in the same row is the same as the extending direction of the second frame area; the second frame area The multiple rows of sub-pixels include at least two rows of first sub-pixels adjacent to the display area, and the gate drive circuit electrically connected to the at least two rows of first sub-pixels is configured to provide corresponding The pixel circuits of the first sub-pixels output a black insertion signal, so that the at least two rows of first sub-pixels keep not emitting light.
在一个实施例中，所述多个栅极驱动电路还包括虚设栅极驱动电路；所述驱动电路层还包括位于所述第二边框区的目标信号线，所述虚设栅极驱动电路与所述目标信号线电连接；所述目标信号线包括所述连接线；所述第二边框区的多行子像素还包括位于所述至少两行第一子像素背离所述显示区一侧的至少一行第二子像素，所述虚设栅极驱动电路与一行第二子像素的像素电路电连接。In one embodiment, the multiple gate driving circuits further include a dummy gate driving circuit; the driving circuit layer further includes a target signal line located in the second frame area, and the dummy gate driving circuit is connected to the dummy gate driving circuit. The target signal line is electrically connected; the target signal line includes the connection line; the multiple rows of sub-pixels in the second frame area also include at least A row of second sub-pixels, the dummy gate drive circuit is electrically connected to a pixel circuit of a row of second sub-pixels.
在一个实施例中，所述发光结构层包括液晶分子，所述显示基板还包括位于所述第二边框区的封框胶，所述封框胶环绕所述液晶分子，所述封框胶位于所述至少两行第一子像素背离所述显示区的一侧，且位于与所述至少一行第二子像素朝向所述显示区的一侧，或所述封框胶在所述衬底上的正投影与所述第二子像素在所述衬底上的正投影存在交叠。In one embodiment, the light-emitting structure layer includes liquid crystal molecules, and the display substrate further includes a sealant located in the second frame area, the sealant surrounds the liquid crystal molecules, and the sealant is located in the second frame area. The at least two rows of first sub-pixels are on a side away from the display area and are located on the side of the at least one row of second sub-pixels facing the display area, or the sealant is glued on the substrate There is an overlap between the orthographic projection of the second sub-pixel on the substrate.
在一个实施例中，所述显示基板还包括位于所述衬底背离所述驱动电路层一侧的第一偏光片及位于所述发光结构层背离所述衬底一侧的第二偏光片；所述第一偏光片的偏光轴与所述第二偏光片的偏光轴垂直；所述第一偏光片的边缘及所述第二偏光片的边缘分别与所述第二边框区的外侧边缘齐平。In one embodiment, the display substrate further includes a first polarizer located on the side of the substrate away from the driving circuit layer and a second polarizer located on the side of the light emitting structure layer away from the substrate; The polarization axis of the first polarizer is perpendicular to the polarization axis of the second polarizer; the edge of the first polarizer and the edge of the second polarizer are respectively aligned with the outer edge of the second frame area flat.
根据本申请实施例的第二方面，提供了一种显示装置，所述显示装置包括上述的显示基板。According to a second aspect of the embodiments of the present application, a display device is provided, and the display device includes the above-mentioned display substrate.
本申请实施例提供的显示基板及显示装置，通过在第二边框区设置连接起始行栅极驱动电路与驱动芯片的连接线，且至少一个像素电路在衬底上的正投影位于连接线在衬底上的正投影背离显示区的一侧，可避免在对大尺寸显示基板进行的切割过程中连接线被切除，解决在对大尺寸显示基板进行的切割过程中将用于连接起始行栅极驱动电路与驱动电路的连接走线切除而导致起始行驱动电路无法工作的问题，保证显示基板的正常显示。In the display substrate and the display device provided by the embodiments of the present application, the connecting line connecting the starting row gate driving circuit and the driving chip is provided in the second frame area, and the orthographic projection of at least one pixel circuit on the substrate is located on the connecting line. The orthographic projection on the substrate is away from the side of the display area, which can prevent the connection line from being cut off during the cutting process of the large-size display substrate, and solve the problem that will be used to connect the starting line during the cutting process of the large-size display substrate. The connection line between the gate drive circuit and the drive circuit is cut off, which leads to the problem that the initial row drive circuit cannot work, so as to ensure the normal display of the display substrate.
附图说明Description of drawings
图1是本申请一示例性实施例提供的显示基板的结构示意图；FIG. 1 is a schematic structural view of a display substrate provided by an exemplary embodiment of the present application;
图2是本申请一示例性实施例提供的显示基板的驱动电路层的结构示意图；FIG. 2 is a schematic structural diagram of a driving circuit layer of a display substrate provided by an exemplary embodiment of the present application;
图3是图2所示的显示基板的驱动电路层的局部结构示意图；3 is a schematic diagram of a partial structure of a driving circuit layer of the display substrate shown in FIG. 2;
图4是本申请另一示例性实施例提供的显示基板的驱动电路层的局部结构示意图；Fig. 4 is a partial structural schematic diagram of a driving circuit layer of a display substrate provided by another exemplary embodiment of the present application;
图5是本申请一示例性实施例提供的显示基板的局部结构示意图；Fig. 5 is a schematic diagram of a partial structure of a display substrate provided by an exemplary embodiment of the present application;
图6是本申请一示例性实施例提供的显示基板的局部结构示意图；Fig. 6 is a schematic diagram of a partial structure of a display substrate provided by an exemplary embodiment of the present application;
图7是本申请一示例性实施例提供的显示基板的局部剖视图。Fig. 7 is a partial cross-sectional view of a display substrate provided by an exemplary embodiment of the present application.
具体实施方式Detailed ways
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施例并不代表与本申请相一致的所有实施例。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.
在本申请使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本申请。在本申请和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。The terminology used in this application is for the purpose of describing particular embodiments only, and is not intended to limit the application. As used in this application and the appended claims, the singular forms "a", "the", and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.
应当理解，尽管在本申请可能采用术语第一、第二、第三等来描述各种信息，但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。例如，在不脱离本申请范围的情况下，第一信息也可以被称为第二信息，类似地，第二信息也可以被称为第一信息。取决于语境，如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”。It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of the present application, first information may also be called second information, and similarly, second information may also be called first information. Depending on the context, the word "if" as used herein may be interpreted as "at" or "when" or "in response to a determination."
本申请实施例提供了一种显示基板及显示装置。下面结合附图，对本申请实施例中的显示基板及显示装置进行详细说明。在不冲突的情况下，下述的实施例中的特征可以相互补充或相互组合。Embodiments of the present application provide a display substrate and a display device. The display substrate and the display device in the embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the case of no conflict, the features in the following embodiments may complement each other or be combined with each other.
本申请实施例提供了一种显示基板。如图1所示，所述显示基板包括显示区101及边框区，所述边框区包括第一边框区102及与所述第一边框区102相邻且位于所述第一边框区102侧部的第二边框区103。The embodiment of the present application provides a display substrate. As shown in FIG. 1 , the display substrate includes a display area 101 and a frame area, and the frame area includes a first frame area 102 and is adjacent to the first frame area 102 and located at the side of the first frame area 102 The second frame area 103.
所述显示基板包括衬底、发光结构层、驱动电路层及连接线。所述发光结构层位于所述衬底的一侧。如图1所示，所述发光结构层包括位于所述显示区101的多个子像素10及位于所述第二边框区103的多个子像素10。所述驱动电路层位于所述衬底与所述发光结构层之间，所述驱动电路层包括多个栅极驱动电路及多个像素电路。所述多个栅极驱动电路包括起始行栅极驱动电路。所述像素电路与所述子像素电连接。如图1至图3所示，所述栅极驱动电路20位于所述第一边框区102；所述连接线30位于所述第一边框区102，所述连接线30的一端与所述起始行栅极驱动电路电连接，另一端用于与驱动芯片电连接，所述驱动芯片向所述起始行栅极驱动电路提供驱动信号。至少一个所述像素电路40在所述衬底上的正投影位于所述连接线30在所述衬底上的正投影背离所述显示区101的一侧。The display substrate includes a substrate, a light emitting structure layer, a driving circuit layer and connecting wires. The light emitting structure layer is located on one side of the substrate. As shown in FIG. 1 , the light emitting structure layer includes a plurality of sub-pixels 10 located in the display area 101 and a plurality of sub-pixels 10 located in the second frame area 103 . The driving circuit layer is located between the substrate and the light emitting structure layer, and the driving circuit layer includes a plurality of gate driving circuits and a plurality of pixel circuits. The plurality of gate drive circuits includes a start row gate drive circuit. The pixel circuit is electrically connected to the sub-pixel. As shown in FIG. 1 to FIG. 3 , the gate drive circuit 20 is located in the first frame area 102; the connection line 30 is located in the first frame area 102, and one end of the connection line 30 is connected to the The gate drive circuit of the first row is electrically connected, and the other end is used for electrical connection with a driving chip, and the drive chip provides a driving signal to the gate drive circuit of the first row. The orthographic projection of at least one pixel circuit 40 on the substrate is located on a side away from the display area 101 of the orthographic projection of the connection line 30 on the substrate.
本申请实施例提供的显示基板，通过在第二边框区设置连接起始行栅极驱动电路与驱动芯片的连接线，且至少一个像素电路在衬底上的正投影位于连接线在衬底上的正投影背离显示区的一侧，可避免在对大尺寸显示基板进行的切割过程中连接线被切除，解决在对大尺寸显示基板进行的切割过程中将用于连接起始行栅极驱动电路与驱动电路的连接走线切除而导致起始行驱动电路无法工作的问题，保证显示基板的正常显示。In the display substrate provided by the embodiment of the present application, the connecting line connecting the gate driving circuit of the initial row and the driving chip is arranged in the second frame area, and the orthographic projection of at least one pixel circuit on the substrate is located on the connecting line on the substrate. The orthographic projection is away from the side of the display area, which can avoid the connection line being cut off during the cutting process of the large-size display substrate, and solve the problem of connecting the starting row gate driver during the cutting process of the large-size display substrate. The connection line between the circuit and the driving circuit is cut off, which leads to the problem that the driving circuit of the first row cannot work, so as to ensure the normal display of the display substrate.
在一个实施例中，如图1所示，显示基板的边框区可包括相对设置的两个第一边框区102，显示基板还包括与第二边框区103相对设置且同向延伸的第三边框区104。第二边框区103和第三边框区104可沿第一方向X延伸，两个第一边框区102沿第二方向Y延伸。第一方向X与第二方向Y可互相垂直。两个第一边框区102可分别设有栅极驱动电路20。第三边框区104可设有扇出线路、柔性电路板等，柔性电路板可与驱动芯片电连接，连接线可通过与柔性电路板电连接来实现与驱动芯片的电连接。在对制备得到的大尺寸显示基板进行切割得到多个显示基板的过程中，若切割区域沿X方向延伸，则对大尺寸显示基板沿X方向进行切割，导致位于第一边框区102的连接走线被切掉。第二边框区103及第一边框区102与第二边框区103相邻的区域为切割边框区切割后保留的区域。In one embodiment, as shown in FIG. 1 , the frame area of the display substrate may include two first frame areas 102 oppositely arranged, and the display substrate further includes a third frame area opposite to the second frame area 103 and extending in the same direction. District 104. The second frame area 103 and the third frame area 104 can extend along the first direction X, and the two first frame areas 102 can extend along the second direction Y. The first direction X and the second direction Y may be perpendicular to each other. The two first frame regions 102 can be respectively provided with gate driving circuits 20 . The third frame area 104 can be provided with fan-out lines, flexible circuit boards, etc. The flexible circuit board can be electrically connected to the driver chip, and the connection line can be electrically connected to the driver chip by being electrically connected to the flexible circuit board. In the process of cutting the prepared large-size display substrate to obtain a plurality of display substrates, if the cutting area extends along the X direction, the large-size display substrate is cut along the X direction, causing the connection in the first frame area 102 to go away. The thread is cut off. The second frame area 103 and the area of the first frame area 102 adjacent to the second frame area 103 are reserved areas after cutting the frame area.
在一个实施例中，显示基板在第一方向X上的尺寸大于其在第二方向Y上的尺寸。In one embodiment, the size of the display substrate in the first direction X is greater than its size in the second direction Y.
在一个实施例中，如图1所示，所述发光结构层的子像素10排布为多行，多行子像素沿所述第一边框区102的延伸方向也即是沿第二方向Y排布，位于同一行的多个子像素沿第一方向X排布。显示区101与第二边框区103分别设有多行子像素。In one embodiment, as shown in FIG. 1 , the sub-pixels 10 of the light-emitting structure layer are arranged in multiple rows, and the multiple rows of sub-pixels are along the extension direction of the first frame region 102, that is, along the second direction Y. Arrangement, a plurality of sub-pixels in the same row are arranged along the first direction X. The display area 101 and the second frame area 103 are respectively provided with a plurality of rows of sub-pixels.
在一个实施例中，子像素包括第一电极、位于第一电极背离衬底一侧的第二电极、以及位于第一电极与第二电极之间的液晶分子。显示基板包括阵列基板及彩膜基板，阵列基板包括衬底、驱动电路层及第一电极。彩膜基板可包括第二电极及位于第二电极背离衬底一侧的彩色滤光层。显示基板的制备过程可如下：首先制备大尺寸阵列基板和大尺寸彩膜基板；之后在大尺寸彩膜基板与大尺寸阵列基板的其中一个涂覆封框胶，在另一个滴加液晶材料；随后将大尺寸彩膜基板与大尺寸阵列基板对盒，得到大尺寸显示基板；最后对大尺寸显示基板进行切割，即可得到多个小尺寸显示基板。或者，显示基板的制备过程可如下：首先制备小尺寸阵列基板和小尺寸彩膜基板；之后在小尺寸彩膜基板与小尺寸阵列基板的其中一个涂覆封框胶，在另一个滴加液晶材料；随后将小尺寸彩膜基板与小尺寸阵列基板对盒，得到小尺寸显示基板。小尺寸显示基板也即是本申请实施例提供的显示基板。In one embodiment, the sub-pixel includes a first electrode, a second electrode located on a side of the first electrode facing away from the substrate, and liquid crystal molecules located between the first electrode and the second electrode. The display substrate includes an array substrate and a color filter substrate, and the array substrate includes a substrate, a driving circuit layer and a first electrode. The color filter substrate may include a second electrode and a color filter layer located on a side of the second electrode away from the substrate. The preparation process of the display substrate can be as follows: first prepare a large-size array substrate and a large-size color filter substrate; then apply a sealant on one of the large-size color filter substrate and a large-size array substrate, and drop liquid crystal material on the other; Then, the large-size color filter substrate is boxed with the large-size array substrate to obtain a large-size display substrate; finally, the large-size display substrate is cut to obtain multiple small-size display substrates. Alternatively, the preparation process of the display substrate can be as follows: first prepare a small-sized array substrate and a small-sized color filter substrate; then apply a sealant to one of the small-sized color filter substrate and a small-sized array substrate, and drop liquid crystal on the other Materials; then the small-size color filter substrate and the small-size array substrate are boxed together to obtain a small-size display substrate. The small-sized display substrate is also the display substrate provided by the embodiment of the present application.
本一个实施例中，阵列基板的所述多个栅极驱动电路还包括非起始行栅极驱动电路。其中，起始行栅极驱动电路接收驱动芯片提供的驱动信号后工作，并向其他非起始行栅极驱动电路输出级联信号。起始行栅极驱动电路的数量可为一个或多个，例如起始行栅极驱动电路的数量可为三个。In this embodiment, the plurality of gate driving circuits of the array substrate further include a non-starting row gate driving circuit. Wherein, the starting row gate driving circuit works after receiving the driving signal provided by the driving chip, and outputs cascaded signals to other non-starting row gate driving circuits. The number of gate driving circuits in the initial row may be one or more, for example, the number of gate driving circuits in the initial row may be three.
在一个实施例中，如图2所示，所述驱动电路层包括第一导电层81及位于第一导电层81背离衬底一侧的第二导电层82。像素电路与栅极驱动电路均可包括薄膜晶体管，薄膜晶体管包括有源层、栅电极、源电极及漏电极。栅电极可位于有源层朝向衬底的一侧，源电极及漏电极可位于有源层背离衬底的一侧。驱动电路层还可包括多个信号线，多个信号线例如包括扫描信号线、数据信号线、低电平电源信号线92、高电平电源信号线、时钟信号线91等。In one embodiment, as shown in FIG. 2 , the driving circuit layer includes a first conductive layer 81 and a second conductive layer 82 located on a side of the first conductive layer 81 away from the substrate. Both the pixel circuit and the gate driving circuit can include a thin film transistor, and the thin film transistor includes an active layer, a gate electrode, a source electrode and a drain electrode. The gate electrode can be located on the side of the active layer facing the substrate, and the source electrode and the drain electrode can be located on the side of the active layer facing away from the substrate. The driving circuit layer may further include a plurality of signal lines, such as scanning signal lines, data signal lines, low-level power signal lines 92 , high-level power signal lines, clock signal lines 91 and the like.
在一个实施例中，栅电极、扫描信号线等可位于第一导电层81；源电极、漏电极、数据信号线、低电平电源信号线、高电平电源信号线、时钟信号线等可位于第二导电层82。In one embodiment, gate electrodes, scanning signal lines, etc. can be located on the first conductive layer 81; source electrodes, drain electrodes, data signal lines, low-level power signal lines, high-level power signal lines, clock signal lines, etc. can be Located on the second conductive layer 82 .
在一个实施例中，第一导电层81与第二导电层82的材料可相同，例如第一导电层81与第二导电层82的材料均为铜。在其他实施例中，第一导电层81与第二导电层82的材料可不同。In one embodiment, the first conductive layer 81 and the second conductive layer 82 may be made of the same material, for example, both the first conductive layer 81 and the second conductive layer 82 are made of copper. In other embodiments, the materials of the first conductive layer 81 and the second conductive layer 82 may be different.
在一个实施例中，如图3及图4所示，所述驱动电路层还包括第一导电线70和第二导电线60，所述第一导电线70的一端与驱动芯片相连，另一端与所述连接线30相连，所述第二导电线60的一端用于与起始行栅极驱动电路相连，另一端与所述连接线30相连。所述第一导电线70与所述第二导电线60同层设置，所述显示基板还包括所述第一导电线70与所述连接线30之间的绝缘层，所述绝缘层设有多个通孔，所述第一导电线70及所述第二导电线60分别通过所述通孔与所述连接线30电连接。具体来说，所述显示基板还包括位于所述通孔内的导电部，第一导电线70及第二导电线60分别通过位于通孔内的导电部与连接线30电连接。其中，连接线30可与多个第二导电线60相连。在该实施例中，连接线30可位于第二导电层82。在一些实施例中，第二导电线60的数量可与起始行子像素对应的栅极驱动电路的数量相同，第一导电线70与起始行子像素对应的各栅极驱动电路均相连。In one embodiment, as shown in FIG. 3 and FIG. 4, the driving circuit layer further includes a first conductive wire 70 and a second conductive wire 60, one end of the first conductive wire 70 is connected to the driving chip, and the other end is Connected to the connecting wire 30 , one end of the second conductive wire 60 is used to connect to the starting row gate drive circuit, and the other end is connected to the connecting wire 30 . The first conductive wire 70 and the second conductive wire 60 are arranged on the same layer, and the display substrate further includes an insulating layer between the first conductive wire 70 and the connecting wire 30, and the insulating layer is provided with A plurality of through holes, the first conductive wire 70 and the second conductive wire 60 are respectively electrically connected to the connecting wire 30 through the through holes. Specifically, the display substrate further includes a conductive portion located in the through hole, and the first conductive line 70 and the second conductive line 60 are respectively electrically connected to the connection line 30 through the conductive portion located in the through hole. Wherein, the connection wire 30 can be connected with a plurality of second conductive wires 60 . In this embodiment, the connection wire 30 can be located on the second conductive layer 82 . In some embodiments, the number of second conductive lines 60 may be the same as the number of gate drive circuits corresponding to the sub-pixels in the initial row, and the first conductive lines 70 are connected to each gate drive circuit corresponding to the sub-pixels in the initial row. .
在一个实施例中，如图3及图4所示，所述第一导电线70及所述第二导电线60的延伸方向与所述连接线30的延伸方向相交，且在所述连接线30的延伸方向上，所述第一导电线70与所述第二导电线60位于所述连接线30的相对两侧。所述第一导电线70在所述衬底上的正投影与所述连接线30的一端在所述衬底上的正投影存在交叠，所述第二导电线60在所述衬底上的正投影与所述连接线30的另一端在所述衬底上的正投影存在交叠。如此设置，第一导电线70与第二导电线60可通过通孔与连接线30直接相连，无需通过其他转接结构，有助于简化显示基板的结构。图3及图4所示的实施例中，第一导电线70与第二导电线60沿第二方向Y延伸，连接线30沿第一方向X延伸。In one embodiment, as shown in FIG. 3 and FIG. 4 , the extending direction of the first conductive wire 70 and the second conductive wire 60 intersects the extending direction of the connecting wire 30 , and the connecting wire In the extending direction of the connection line 30 , the first conductive line 70 and the second conductive line 60 are located on opposite sides of the connecting line 30 . The orthographic projection of the first conductive wire 70 on the substrate overlaps with the orthographic projection of one end of the connection wire 30 on the substrate, and the second conductive wire 60 is on the substrate The orthographic projection of the connecting line 30 overlaps with the orthographic projection of the other end of the connection line 30 on the substrate. In this way, the first conductive wire 70 and the second conductive wire 60 can be directly connected to the connection wire 30 through the through hole without using other transition structures, which helps to simplify the structure of the display substrate. In the embodiment shown in FIG. 3 and FIG. 4 , the first conductive wire 70 and the second conductive wire 60 extend along the second direction Y, and the connecting wire 30 extends along the first direction X.
在一个实施例中，所述多个栅极驱动电路包括虚设栅极驱动电路。虚设栅极驱动电路指的是不向像素电路提供栅极驱动信号的栅极驱动电路。如图3及图4所示，所述驱动电路层还包括位于所述第一边框区102的目标信号线50，所述目标信号线50与虚设栅极驱动电路电连接。所述目标信号线50包括所述连接线30、第一子信号线51和第二子信号线52，在所述连接线30的延伸方向上，所述第一子信号线51与所述第二子信号线52位于所述连接线30的相对两侧，所述连接线30与所述第一子信号线51及所述第二子信号线52之间均存在间隙501。如此，利用位于第一边框区102内的目标信号线50的一部分作为连接线30，无需额外制作连接线，有助于简化显示基板的制备工艺。In one embodiment, the plurality of gate drive circuits include dummy gate drive circuits. The dummy gate driving circuit refers to a gate driving circuit that does not provide a gate driving signal to the pixel circuit. As shown in FIG. 3 and FIG. 4 , the driving circuit layer further includes a target signal line 50 located in the first frame area 102 , and the target signal line 50 is electrically connected to the dummy gate driving circuit. The target signal line 50 includes the connection line 30 , a first sub-signal line 51 and a second sub-signal line 52 , and in the extending direction of the connection line 30 , the first sub-signal line 51 and the second sub-signal line The two sub-signal lines 52 are located on opposite sides of the connection line 30 , and there are gaps 501 between the connection line 30 , the first sub-signal line 51 and the second sub-signal line 52 . In this way, using a part of the target signal line 50 located in the first frame region 102 as the connection line 30 does not require additional connection lines, which helps to simplify the manufacturing process of the display substrate.
在一些实施例中，在制备得到阵列基板后，且在阵列基板与彩膜基板对盒之前，可采用激光刻蚀工艺对目标信号线50进行切割，以将目标信号线50分为第一子信号线51、第二子信号线52和连接线30三部分。可采用激光刻蚀工艺在第一导电层81与第二导电层82之间的绝缘层上形成两个通孔，一个通孔暴露第一导电线70的一部分，另一通孔暴露第二导电线60的一部分；在激光刻蚀的同时，连接线30的端部融化并进入各个通孔内形成导电部，从而连接线与第一导电线70和第二导电线60相连。In some embodiments, after the array substrate is prepared and before the array substrate and the color filter substrate are assembled, the target signal line 50 can be cut by using a laser etching process, so as to divide the target signal line 50 into first sub-sections. The signal line 51 , the second sub-signal line 52 and the connection line 30 are divided into three parts. Two through holes can be formed on the insulating layer between the first conductive layer 81 and the second conductive layer 82 by using a laser etching process, one through hole exposes a part of the first conductive line 70, and the other through hole exposes the second conductive line 60; at the same time of laser etching, the ends of the connecting wires 30 are melted and enter into each through hole to form a conductive part, so that the connecting wires are connected with the first conductive wire 70 and the second conductive wire 60.
在一个实施例中，所述驱动电路层还包括与所述第一导电线70同层设置的导电部，所述间隙501在所述衬底上的正投影与所述导电部在所述衬底上的正投影无交叠。如此设置，在采用激光刻蚀工艺对目标信号线50进行切割以及在绝缘层上刻蚀通孔时，可避免激光的能量作用在导电部上导致导电部熔融与其他导电部电连接，而影响显示基板的性能。在一些实施例中，导电部可包括位于第一导电层81的栅电极、信号线等。In one embodiment, the driving circuit layer further includes a conductive part provided on the same layer as the first conductive line 70, and the orthographic projection of the gap 501 on the substrate is the same as that of the conductive part on the substrate. The orthographic projection on the base has no overlap. Such setting, when adopting laser etching process to cut the target signal line 50 and etch the through hole on the insulating layer, can avoid the energy of the laser acting on the conductive part to cause the conductive part to melt and be electrically connected with other conductive parts, thereby affecting Displays the properties of the substrate. In some embodiments, the conductive portion may include a gate electrode on the first conductive layer 81 , a signal line, and the like.
在一个实施例中，如图3所示，所述目标信号线50为时钟信号线91。在另一实施例中，如图4所示，所述目标信号线50为低电平电源信号线92。时钟信号线91和低电平电源信号线92在所述衬底上的正投影均与第一导电线70在衬底上的正投影存在交叠，且均与第二导电线60在衬底上的正投影存在交叠，因此时钟信号线91和低电平电源信号线92的一部分均可作为连接线30，以便于连接线30与第一导电线70和第二导电线60的连接。In one embodiment, as shown in FIG. 3 , the target signal line 50 is a clock signal line 91 . In another embodiment, as shown in FIG. 4 , the target signal line 50 is a low-level power signal line 92 . The orthographic projections of the clock signal line 91 and the low-level power supply signal line 92 on the substrate overlap with the orthographic projection of the first conductive line 70 on the substrate, and both overlap with the second conductive line 60 on the substrate. There is an overlap in the orthographic projection on , so a part of the clock signal line 91 and the low-level power signal line 92 can be used as the connection line 30 to facilitate the connection of the connection line 30 with the first conductive line 70 and the second conductive line 60 .
在另一实施例中，所述连接线30的宽度大于所述驱动电路层中的信号线的宽度。在该实施例中，连接线30可在第一导电层81与第二导电层82形成之后形成，连接线30可采用溅射工艺形成。如此，连接线30不依赖于第一导电层81与第二导电层82的布局，连接线30的位置设置更加灵活。在一些实施例中，连接线30可位于第二导电层82中相邻导电结构之间的间隙。在其他实施例中，驱动电路层可包括位于第二导电层82背离衬底一侧的平坦化层，连接线30可位于平坦化层80背离衬底一侧。与驱动电路层中的信号线相比，采用溅射工艺形成的连接线30的宽度较大，且连接线30的边缘更加毛糙。In another embodiment, the width of the connection line 30 is larger than the width of the signal line in the driving circuit layer. In this embodiment, the connection line 30 may be formed after the first conductive layer 81 and the second conductive layer 82 are formed, and the connection line 30 may be formed by a sputtering process. In this way, the connection line 30 does not depend on the layout of the first conductive layer 81 and the second conductive layer 82 , and the position setting of the connection line 30 is more flexible. In some embodiments, the connection lines 30 may be located in gaps between adjacent conductive structures in the second conductive layer 82 . In other embodiments, the driving circuit layer may include a planarization layer located on the side of the second conductive layer 82 away from the substrate, and the connecting wire 30 may be located on the side of the planarization layer 80 away from the substrate. Compared with the signal lines in the driving circuit layer, the width of the connection lines 30 formed by sputtering is larger, and the edges of the connection lines 30 are rougher.
进一步地，所述连接线30的材料与所述驱动电路层的信号线的材料不同。连接线30的材料可为钨，钨的稳定性较高，不易被氧化，可避免连接线30被氧化而影响其与第一导电线70及第二导电线60的电连接效果。Further, the material of the connecting wire 30 is different from that of the signal wire of the driving circuit layer. The material of the connection wire 30 can be tungsten, which has high stability and is not easy to be oxidized, so as to prevent the connection wire 30 from being oxidized and affecting its electrical connection with the first conductive wire 70 and the second conductive wire 60 .
在一个实施例中，所述显示基板还包括导电结构，所述导电结构的至少部分位于所述通孔内且包覆所述导电部。由于位于通孔内的导电部为激光刻蚀过程中连接线30的端部融化形成，连接线30的端部融化并进入到通孔内的量不可控，容易出现导电部与第一导电线70和第二导电线60接触不良的问题。通过设置导电结构，且导电结构至少部分位于通孔内并包覆导电部，可提升连接线30与第一导电线70和第二导电线60的电连接效果。In one embodiment, the display substrate further includes a conductive structure, at least part of the conductive structure is located in the through hole and covers the conductive portion. Since the conductive portion located in the through hole is formed by melting the end of the connecting wire 30 during the laser etching process, the amount of the end of the connecting wire 30 melting and entering into the through hole is uncontrollable, and it is easy for the conductive portion to be separated from the first conductive line. 70 and the second conductive wire 60 are in poor contact. By disposing a conductive structure, and the conductive structure is at least partially located in the through hole and covers the conductive part, the electrical connection effect of the connecting wire 30 and the first conductive wire 70 and the second conductive wire 60 can be improved.
在一个实施例中，所述导电结构部分位于所述绝缘层背离所述衬底的一侧，所述导电结构位于所述绝缘层背离所述衬底一侧的部分覆盖所述通孔。如此，可保证导电结构在形成的过程中，进入到通孔内的部分较多，更有助于避免连接线30与第一导电线70和第二导电线60电连接效果不好的情况。In one embodiment, the conductive structure part is located on the side of the insulating layer away from the substrate, and the part of the conductive structure located on the side of the insulating layer away from the substrate covers the through hole. In this way, it can be ensured that during the formation of the conductive structure, more parts enter into the through hole, which is more helpful to avoid the poor electrical connection effect between the connecting wire 30 and the first conductive wire 70 and the second conductive wire 60 .
在一些实施例中，导电结构可采用溅射工艺形成，具体来说，在通孔处溅射形成导电结构，从而在溅射过程中，导电结构部分进入到通孔内。导电结构位于通孔外的部分覆盖至少部分连接线30。In some embodiments, the conductive structure can be formed by a sputtering process, specifically, the conductive structure is formed by sputtering at the through hole, so that during the sputtering process, the conductive structure partially enters the through hole. The portion of the conductive structure located outside the through hole covers at least part of the connection line 30 .
在一些实施例中，导电结构的材料可为钨，钨的稳定性较高，不易被氧化，可避免导电结构被氧化而影响其与第一导电线70及第二导电线60的电连接效果。In some embodiments, the material of the conductive structure can be tungsten, which has high stability and is not easy to be oxidized, which can prevent the conductive structure from being oxidized and affecting its electrical connection effect with the first conductive line 70 and the second conductive line 60 .
在一个实施例中，如图5所示，所述第二边框区103的多行子像素包括与所述显示区101相邻的至少两行第一子像素12，与所述至少两行第一子像素12电连接的栅极驱动电路被配置为在一帧画面显示期间向对应的第一子像素的像素电路输出插黑信号，使所述至少两行第一子像素12保持不发光。第二边框区103设有子像素，由于第二边框区为切割区域切割后保留的区域，显示基板的第二边框区未设置黑色遮光层，在显示基板显示画面时，第二边框区103的子像素的电极易与信号线耦合，进而导致第二边框区103的子像素发光，也即是本来应呈黑色的边框区的子像素发光，影响用户的使用体验。通过设置在一帧画面显示期间，与显示区相邻的各行第一子像素保持不发光，可避免出现第一子像素发光的情况。在一个示例性实施例中，像素电路接收到插黑信号后，像素电路的驱动晶体管截止。In one embodiment, as shown in FIG. 5 , the multiple rows of sub-pixels in the second frame area 103 include at least two rows of first sub-pixels 12 adjacent to the display area 101, and the at least two rows of first sub-pixels 12 are adjacent to the at least two rows of first sub-pixels 12 The gate drive circuit electrically connected to one sub-pixel 12 is configured to output a black insertion signal to the pixel circuit of the corresponding first sub-pixel during a frame display period, so that the at least two rows of first sub-pixels 12 keep not emitting light. The second frame area 103 is provided with sub-pixels. Since the second frame area is the area reserved after cutting the cutting area, the second frame area of the display substrate is not provided with a black light-shielding layer. When the display substrate displays a picture, the second frame area 103 The electrodes of the sub-pixels are easily coupled with the signal lines, which causes the sub-pixels in the second frame area 103 to emit light, that is, the sub-pixels in the frame area that should be black to emit light, which affects user experience. By setting that the first sub-pixels in each row adjacent to the display area keep not emitting light during the display period of one frame of picture, the situation that the first sub-pixels emit light can be avoided. In an exemplary embodiment, after the pixel circuit receives the black insertion signal, the driving transistor of the pixel circuit is turned off.
进一步地，如图5所示，位于第一边框区的目标信号线包括所述连接线时，所述第二边框区的多行子像素还包括位于所述至少两行第一子像素12背离所述显示区一侧的至少一行第二子像素11，所述虚设栅极驱动电路与一行第二子像素11的像素电路电连接。如此设置，将第二子像素11的目标信号线的一部分作为连接线，不影响第一子像素12在一帧画面显示期间保持不发光。Further, as shown in FIG. 5 , when the target signal line located in the first frame area includes the connection line, the multiple rows of sub-pixels in the second frame area also include For at least one row of second sub-pixels 11 on one side of the display area, the dummy gate drive circuit is electrically connected to the pixel circuits of one row of second sub-pixels 11 . With this arrangement, a part of the target signal line of the second sub-pixel 11 is used as a connection line, which does not affect the first sub-pixel 12 to keep no light during the display period of one frame of picture.
在另一实施例中，对大显示基板沿第二方向Y进行切割得到多个显示基板时，显示基板的第一边框区102设有多个子像素10。第一边框区102的多个子像素10被排布为多列，位于同一列的子像素10沿第二方向Y排布。第一边框区102的多列子像素包括与所述显示区101相邻的至少两列第三子像素13，与所述至少两列第三子像素13电连接的栅极驱动电路被配置为在一帧画面显示期间向对应的第三子像素的像素电路输出插黑信号，使所述至少两列第三子像素13保持不发光。显示基板的第一边框区未设置黑色遮光层，在显示基板显示画面时，第一边框区102的子像素的电极易与信号线耦合，进而导致第一边框区102的子像素发光，也即是本来应呈黑色的边框区的子像素发光，影响用户的使用体验。通过设置在一帧画面显示期间，与显示区相邻的各列第三子像素保持不发光，可使得在一帧画面显示期间第一边框区呈黑色。In another embodiment, when a large display substrate is cut along the second direction Y to obtain a plurality of display substrates, the first frame region 102 of the display substrate is provided with a plurality of sub-pixels 10 . The sub-pixels 10 in the first frame area 102 are arranged in multiple columns, and the sub-pixels 10 in the same column are arranged along the second direction Y. The multiple columns of sub-pixels in the first frame area 102 include at least two columns of third sub-pixels 13 adjacent to the display area 101, and the gate drive circuit electrically connected to the at least two columns of third sub-pixels 13 is configured to During one frame display period, a black insertion signal is output to the pixel circuit of the corresponding third sub-pixel, so that the at least two columns of third sub-pixels 13 keep not emitting light. The first frame area of the display substrate is not provided with a black light-shielding layer. When the substrate is displaying a picture, the electrodes of the sub-pixels in the first frame area 102 are easily coupled with the signal lines, thereby causing the sub-pixels in the first frame area 102 to emit light. That is, the sub-pixels in the frame area that should be black originally emit light, which affects the user experience. By arranging that the third sub-pixels in each row adjacent to the display area keep not emitting light during the display period of a frame image, the first frame area can be rendered black during the display period of a frame image.
在一个实施例中，如图5及图6所示，一行子像素10的像素电路40与一条扫描信号线97相连。在其他实施例中，一行子像素10的像素电路40可与两条或三条扫描信号线97相连。In one embodiment, as shown in FIG. 5 and FIG. 6 , the pixel circuits 40 of one row of sub-pixels 10 are connected to one scanning signal line 97 . In other embodiments, the pixel circuits 40 of a row of sub-pixels 10 may be connected to two or three scanning signal lines 97 .
在一个实施例中，如图7所示，所述发光结构层包括液晶分子201，所述显示基板还包括位于所述第二边框区103的封框胶24，所述封框胶24环绕所述液晶分子201。第二边框区103包括第一子边框区1031及位于第一子边框区1031背离显示区101一侧的第二子边框区1032，第一子像素12位于第一子边框区1031，第二子像素12位于第二子边框区1032。所述封框胶24位于第二子边框区1032。也即是，所述至少两行第一子像素12位于所述显示区101的外侧，且位于与所述至少一行第二子像素11朝向所述显示区101的一侧，或所述封框胶24在所述衬底上的正投影与所述第二子像素11在所述衬底上的正投影存在交叠。如此设置，封框胶24可防止液晶分子流至第二边框区103位于第一子像素12外侧的区域，则第二子像素11不包括液晶分子，无法发光，可使得在一帧画面显示期间第二边框区103的所有像素均不发光。In one embodiment, as shown in FIG. 7, the light-emitting structure layer includes liquid crystal molecules 201, and the display substrate further includes a sealant 24 located in the second frame area 103, and the sealant 24 surrounds the The liquid crystal molecules 201 described above. The second frame area 103 includes a first sub-frame area 1031 and a second sub-frame area 1032 located on the side of the first sub-frame area 1031 away from the display area 101, the first sub-pixel 12 is located in the first sub-frame area 1031, and the second sub-frame area 1032 The pixel 12 is located in the second sub-frame area 1032 . The sealant 24 is located in the second sub-frame area 1032 . That is, the at least two rows of first sub-pixels 12 are located outside the display area 101, and are located on the side of the at least one row of second sub-pixels 11 facing the display area 101, or the sealing frame The orthographic projection of the glue 24 on the substrate overlaps with the orthographic projection of the second sub-pixel 11 on the substrate. In this way, the sealant 24 can prevent the liquid crystal molecules from flowing to the area outside the second frame area 103 outside the first sub-pixel 12, and the second sub-pixel 11 does not include liquid crystal molecules and cannot emit light. All the pixels in the second frame area 103 do not emit light.
在一个实施例中，如图7所示，显示基板的彩膜基板95包括衬底层951及位于衬底层951朝向液晶分子201一侧的彩膜层952；显示基板的阵列基板96包括衬底961及位于衬底961朝向液晶分子201一侧的驱动电路层962。彩膜层952与驱动电路层962可位于显示区101、第一边框区及第一子边框区1021。In one embodiment, as shown in FIG. 7 , the color filter substrate 95 of the display substrate includes a substrate layer 951 and a color filter layer 952 located on the side of the substrate layer 951 facing the liquid crystal molecules 201; the array substrate 96 of the display substrate includes a substrate 961 And the driving circuit layer 962 located on the side of the substrate 961 facing the liquid crystal molecules 201 . The color filter layer 952 and the driving circuit layer 962 can be located in the display area 101 , the first frame area and the first sub-frame area 1021 .
在一个实施例中，如图7所示，所述显示基板还包括位于所述衬底961背离所述驱动电路层962一侧的第一偏光片93及位于所述发光结构层背离所述衬底961一侧的第二偏光片94；所述第一偏光片93的偏光轴与所述第二偏光片94的偏光轴垂直；所述第一偏光片93的边缘及所述第二偏光片94的边缘分别与所述第二边框区103的外侧边缘齐平。如此设置，入射至第二边框区103未设置液晶分子的区域的光线无法出射，可使得在一帧画面显示期间第二边框区103的全部区域呈黑色，更有助于提升用户的使用体验。In one embodiment, as shown in FIG. 7 , the display substrate further includes a first polarizer 93 located on the side of the substrate 961 away from the driving circuit layer 962 and a first polarizer 93 located on the side of the light emitting structure layer away from the substrate. The second polarizer 94 on the bottom 961 side; the polarization axis of the first polarizer 93 is perpendicular to the polarization axis of the second polarizer 94; the edge of the first polarizer 93 and the second polarizer Edges 94 are respectively flush with outer edges of the second frame area 103 . In this way, the light incident on the area of the second frame area 103 where no liquid crystal molecules are installed cannot exit, so that the entire area of the second frame area 103 is black during the display of a frame, which is more helpful to improve the user experience.
本申请实施例还提供了一种显示装置，所述显示装置包括上述任一实施例所述的显示基板。Embodiments of the present application further provide a display device, the display device comprising the display substrate described in any one of the above embodiments.
在一些实施例中，所述显示装置还包括外壳，显示基板嵌设在壳体内。In some embodiments, the display device further includes a housing, and the display substrate is embedded in the housing.
本申请实施例提供的显示装置可以为任意适当的显示装置，包括但不限于手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、电子书等任何具有显示功能的产品或部件。The display device provided in the embodiment of this application can be any suitable display device, including but not limited to mobile phones, tablet computers, televisions, monitors, notebook computers, digital photo frames, navigators, e-books, and any other products or components with display functions .
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。It should be noted that in the drawings, the dimensions of layers and regions may be exaggerated for clarity of illustration. Also it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. Further, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element, or one or more intervening layers or elements may be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or one or more intervening layers may also be present. or components. Like reference numerals designate like elements throughout.
本领域技术人员在考虑说明书及实践这里公开的内容后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本申请的真正范围和精神由下面的权利要求指出。Other embodiments of the present application will readily occur to those skilled in the art from consideration of the specification and practice of the disclosure herein. This application is intended to cover any modification, use or adaptation of the application, these modifications, uses or adaptations follow the general principles of the application and include common knowledge or conventional technical means in the technical field not disclosed in the application . The specification and examples are to be considered exemplary only, with a true scope and spirit of the application indicated by the following claims.
应当理解的是，本申请并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本申请的范围仅由所附的权利要求来限制。It should be understood that the present application is not limited to the precise constructions which have been described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.
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| CN202310621307.2ACN116631320A (en) | 2023-05-29 | 2023-05-29 | Display substrate and display device |
| PCT/CN2024/096086WO2024245290A1 (en) | 2023-05-29 | 2024-05-29 | Display substrate and display device |
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| CN202310621307.2ACN116631320A (en) | 2023-05-29 | 2023-05-29 | Display substrate and display device |
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| CN202310621307.2APendingCN116631320A (en) | 2023-05-29 | 2023-05-29 | Display substrate and display device |
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| WO2024245308A1 (en)* | 2023-05-31 | 2024-12-05 | 京东方科技集团股份有限公司 | Array substrate, display substrate, and display device |
| WO2024245290A1 (en)* | 2023-05-29 | 2024-12-05 | 京东方科技集团股份有限公司 | Display substrate and display device |
| WO2025043581A1 (en)* | 2023-08-31 | 2025-03-06 | 京东方科技集团股份有限公司 | Driving circuit structure, array substrate, display apparatus and manufacturing method for array substrate |
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| CN113241421A (en)* | 2021-06-16 | 2021-08-10 | 京东方科技集团股份有限公司 | Display substrate, display panel and display device |
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| CN109671703B (en)* | 2018-12-14 | 2021-07-09 | 厦门天马微电子有限公司 | Display panel and display device |
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| US20150346887A1 (en)* | 2014-05-30 | 2015-12-03 | Lg Display Co., Ltd. | Time-division driving type touch sensing device and method for driving the same |
| CN106409875A (en)* | 2016-11-11 | 2017-02-15 | 上海天马微电子有限公司 | Display panel, display panel mother board and manufacturing method thereof |
| CN111863903A (en)* | 2020-07-23 | 2020-10-30 | 上海天马有机发光显示技术有限公司 | Display panel, method for making the same, and display device |
| CN114788009A (en)* | 2020-10-26 | 2022-07-22 | 京东方科技集团股份有限公司 | Display substrate, display panel and display device |
| CN112670304A (en)* | 2020-12-25 | 2021-04-16 | 昆山国显光电有限公司 | Array substrate and display panel |
| CN113193149A (en)* | 2021-04-27 | 2021-07-30 | Oppo广东移动通信有限公司 | OLED display screen, manufacturing method and electronic equipment |
| CN115605939A (en)* | 2021-04-28 | 2023-01-13 | 京东方科技集团股份有限公司（Cn） | Display substrate and display panel |
| CN113241421A (en)* | 2021-06-16 | 2021-08-10 | 京东方科技集团股份有限公司 | Display substrate, display panel and display device |
| CN114120905A (en)* | 2021-11-12 | 2022-03-01 | 合肥京东方卓印科技有限公司 | Display substrate, preparation method thereof and display device |
| CN115004376A (en)* | 2022-04-29 | 2022-09-02 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN115241264A (en)* | 2022-08-10 | 2022-10-25 | 武汉华星光电半导体显示技术有限公司 | display panel |
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| WO2024245290A1 (en)* | 2023-05-29 | 2024-12-05 | 京东方科技集团股份有限公司 | Display substrate and display device |
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| WO2025043581A1 (en)* | 2023-08-31 | 2025-03-06 | 京东方科技集团股份有限公司 | Driving circuit structure, array substrate, display apparatus and manufacturing method for array substrate |
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| WO2024245290A1 (en) | 2024-12-05 |
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