CN116191851A - Soft start control circuit of switch capacitor converter - Google Patents

Abstract

The application discloses a soft start control circuit of a switched capacitor converter. The soft start control circuit of the switched capacitor boost converter comprises a switched capacitor boost converter circuit, a first control circuit, a second control circuit, a third control circuit and a fourth control circuit, wherein the switched capacitor boost converter circuit is respectively connected with the first control circuit, the second control circuit, the third control circuit and the fourth control circuit, and is configured to control the process of boosting and converting input voltage by the switched capacitor boost converter circuit according to the output of the control circuits until the output voltage of the switched capacitor boost converter circuit meets the voltage output rule and output voltage. The soft start process of the switching capacitor boost conversion circuit is controlled by the control circuit, peak current generated in the soft start process is controlled, and the problem that the element damage is easy to generate in soft start of the switching capacitor architecture boost converter is solved.

Description

Soft start control circuit of switch capacitor converter

Technical Field

The present disclosure relates to the field of integrated circuits, and in particular, to a soft start control circuit for a switched capacitor converter.

Background

Compared with the traditional switching power supply, the switch capacitor structure converter does not need to introduce inductive elements, and has higher conversion efficiency and power density. However, the switch capacitor structure converter has no inductance current limiting, so that the output voltage is difficult to carry out soft start like a traditional switch power supply. For switched capacitor architecture boost converters, the output voltage soft start problem is more difficult because the output voltage is much higher than the input voltage.

In the scheme for realizing voltage soft start in the prior art, a higher peak current is generated after the power tube is started, and the power tube is easily damaged.

Therefore, the soft start of the boost converter with the switched capacitor architecture in the prior art has the problem of easily generating element damage.

Disclosure of Invention

The primary objective of the present application is to provide a soft start control circuit for a switched capacitor converter, so as to solve the problem that the soft start of the boost converter of the switched capacitor architecture in the prior art is easy to damage the components, and avoid the power tube from generating higher peak current during the soft start.

In order to achieve the above object, the present application provides a soft start control circuit of a switched capacitor converter, comprising: the switch capacitor boost conversion circuit comprises a first control signal input end, a second control signal input end, a third control signal input end and a fourth control signal input end, wherein the first control signal input end is connected with the output end of the first control circuit, the second control signal input end is connected with the output end of the second control circuit, the third control signal input end is connected with the output end of the third control circuit, and the fourth control signal input end is connected with the output end of the fourth control circuit, wherein:

The first control circuit is configured to generate a first current when in a first control state and transmit the first current to the switched capacitor boost conversion circuit, and generate a first control signal when the first control circuit is in a second control state and transmit the first control signal to the switched capacitor boost conversion circuit;

the second control circuit is configured to generate a second current when in a third control state and transmit the second current to the switched capacitor boost converter circuit, and generate a second control signal when in a fourth control state and transmit the second control signal to the switched capacitor boost converter circuit;

the third control circuit is configured to generate a third current when in a fifth control state and transmit the third current to the switched capacitor boost converter circuit, and generate a third control signal when in a sixth control state and transmit the third control signal to the switched capacitor boost converter circuit;

the fourth control circuit is configured to generate a fourth current when in a seventh control state and transmit the fourth current to the switched capacitor boost converter circuit, and generate a fourth control signal when in an eighth control state and transmit the fourth control signal to the switched capacitor boost converter circuit;

The switched capacitor boost conversion circuit is configured to control the switched capacitor boost conversion circuit to boost convert an input voltage according to the outputs of the first control circuit, the second control circuit, the third control circuit and the fourth control circuit until the output voltage of the switched capacitor boost conversion circuit meets a voltage output rule, and output the output voltage.

In some alternative embodiments of the present application, the first control circuit includes a first current generation circuit and a first control signal generation circuit,

when the first control circuit is in the first control state, the first current generation circuit works, and the output end of the first current generation circuit is connected with the first control signal input end of the switched capacitor boost conversion circuit;

when the first control circuit is in the second control state, the first control signal generating circuit works, and the output end of the first control signal generating circuit is connected with the first control signal input end of the switched capacitor boost converting circuit.

In some optional embodiments of the present application, the first current generating circuit includes a first current source and a first mirror transistor, the first mirror transistor and a first transistor in the switched capacitor boost converter circuit form a first current mirror structure, the first current source is configured to generate a first current and provide the first current to the first current mirror structure;

The first control signal generating circuit is configured to receive a first driving signal, generate a first control signal according to the first driving signal, and provide the first control signal for the switched capacitor boost converting circuit.

In some alternative embodiments of the present application, the switched capacitor boost converter circuit includes a voltage source, a voltage output circuit, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first flying capacitor, a second flying capacitor, and a third flying capacitor,

the grid electrode of the second transistor is coupled with the second control signal input end of the switch capacitor boost conversion circuit, the first electrode of the second transistor is coupled with the positive electrode of the voltage source, and the second electrode of the second transistor is coupled with the first node;

the grid electrode of the third transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit, the first electrode of the third transistor is coupled with the first node, and the second electrode of the third transistor is coupled with the voltage end;

the grid electrode of the first transistor is coupled with the first control signal input end of the switch capacitor boost conversion circuit, the first electrode of the first transistor is coupled with the positive electrode of the voltage source, and the second electrode of the first transistor is coupled with the second node;

The grid electrode of the fourth transistor is coupled with the fourth control signal input end of the switch capacitor boost conversion circuit, the first electrode of the fourth transistor is coupled with the second node, and the second electrode of the fourth transistor is coupled with the voltage end;

the voltage source is configured to generate the input voltage, and a negative electrode of the voltage source is coupled to the voltage terminal;

the first electrode of the fifth transistor is coupled with a third node, and the second electrode of the fifth transistor is coupled with the positive electrode of the voltage source;

a first pole of the sixth transistor is coupled to a fourth node, and a second pole of the sixth transistor is coupled to the third node;

a first pole of the seventh transistor is coupled to a fifth node, and a second pole of the seventh transistor is coupled to the fourth node;

a first pole of the eighth transistor is coupled to the voltage output circuit, and a second pole of the eighth transistor is coupled to the fifth node;

one end of the first flying capacitor is coupled with the first node, and the other end of the first flying capacitor is coupled with the third node;

one end of the second flying capacitor is coupled with the second node, and the other end of the second flying capacitor is coupled with the fourth node;

One end of the third flying capacitor is coupled with the first node, and the other end of the third flying capacitor is coupled with the fifth node;

an input of the voltage output circuit is coupled to the first pole of the eighth transistor, and the input of the voltage output circuit is configured to generate the output voltage according to the first pole output current of the eighth transistor and output the output voltage through the output of the voltage output circuit.

In some alternative embodiments of the present application, the switched capacitor boost converter circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor,

when the third control circuit is in a fifth control state and the fourth control circuit is in a seventh control state, the first transistor and the second transistor are turned off, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are turned on, and the switched capacitor boost conversion circuit enters a precharge state;

when the first control circuit is in a first control state, the second control circuit is in a third control state, the third control circuit is in a sixth control state, and the fourth control circuit is in an eighth control state, the switched capacitor boost conversion circuit is configured to control the operating states of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor according to the third control signal and the fourth control signal, and the switched capacitor boost conversion circuit enters a soft start state.

In some alternative embodiments of the present application, after the switched capacitor conversion circuit enters a soft start state,

when the third control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned on, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned off;

when the fourth control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned off, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned on;

after the switch capacitor conversion circuit enters a soft start state, the switch capacitor conversion circuit is configured to alternately generate the third control signal as a high-phase signal and the fourth control signal as a high-phase signal so as to realize boost conversion of input voltage until the output end of the voltage output circuit meets a voltage output rule and output voltage.

In some optional embodiments of the present application, a first end of the first current source is coupled to the fourth node of the switched capacitor boost converter circuit, a second end of the first current source is coupled to a first pole of the first mirror transistor, a second pole of the first mirror transistor is coupled to the second node of the switched capacitor boost converter circuit, a gate of the first mirror transistor is coupled to the first control signal input end of the switched capacitor boost converter circuit, and a gate of the first mirror transistor is coupled to the first pole of the first mirror transistor.

In some optional embodiments of the present application, the second control circuit includes a second current generating circuit and a second control signal generating circuit, wherein the second current generating circuit operates when the second control circuit is in a third control state; the second current generation circuit comprises a second current source and a second mirror transistor, the second mirror transistor and a second transistor in the switched capacitor boost conversion circuit form a second current mirror structure, and the second current source is configured to generate a second current and provide the second current for the second current mirror structure;

the third control circuit comprises a third current generation circuit and a third control signal generation circuit, wherein when the third control circuit is in a fifth control state, the third current generation circuit works; the third current generation circuit comprises a third current source and a third mirror transistor, the third mirror transistor and a third transistor in the switch capacitor boost conversion circuit form a third current mirror structure, and the third current source is configured to generate a third current and provide the third current for the third current mirror structure;

The fourth control circuit comprises a fourth current generation circuit and a fourth control signal generation circuit, wherein when the fourth control circuit is in a seventh control state, the fourth current generation circuit works; the fourth current generation circuit comprises a fourth current source and a fourth mirror transistor, the fourth mirror transistor and a fourth transistor in the switched capacitor boost conversion circuit form a fourth current mirror structure, and the fourth current source is configured to generate a fourth current and provide the fourth current for the fourth current mirror structure.

In some optional embodiments of the present application, the second control signal generating circuit is configured to receive a second driving signal and generate a second control signal according to the second driving signal, and provide the second control signal to the switched capacitor boost converting circuit;

the third control signal generating circuit is configured to receive a first driving signal, generate a third control signal according to the first driving signal, and provide the third control signal for the switched capacitor boost converting circuit;

the fourth control signal generation circuit is configured to receive the second driving signal and generate a fourth control signal according to the second driving signal, and provide the fourth control signal for the switched capacitor boost converter circuit.

In some optional embodiments of the present application, a first end of a second current source is coupled to the third node of the switched capacitor boost converter circuit, a second end of the second current source is coupled to a first pole of a second mirror transistor, a second pole of the second mirror transistor is coupled to the first node of the switched capacitor boost converter circuit, a gate of the second mirror transistor is coupled to a second control signal input end of the switched capacitor boost converter circuit, and a gate of the second mirror transistor is coupled to the first pole of the second mirror transistor;

the output end of the third current source is coupled with the first pole of the third mirror image transistor, the second pole of the third mirror image transistor is coupled with the voltage end, the grid electrode of the third mirror image transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit, and the grid electrode of the third mirror image transistor is coupled with the first pole of the third mirror image transistor;

the output end of the fourth current source is coupled to the first pole of the fourth mirror transistor, the second pole of the fourth mirror transistor is coupled to the voltage end, the grid electrode of the fourth mirror transistor is coupled to the fourth control signal input end of the switch capacitor boost conversion circuit, and the grid electrode of the fourth mirror transistor is coupled to the first pole of the fourth mirror transistor.

The technical scheme provided by the embodiment of the application can comprise the following beneficial effects:

in the application, the soft start control circuit of the switched capacitor boost converter comprises a switched capacitor boost conversion circuit, a first control circuit, a second control circuit, a third control circuit and a fourth control circuit, wherein the switched capacitor boost conversion circuit is respectively connected with the first control circuit, the second control circuit, the third control circuit and the fourth control circuit, and the switched capacitor boost conversion circuit is configured to boost convert input voltage according to output control of the first control circuit, the second control circuit, the third control circuit and the fourth control circuit until output voltage of the switched capacitor boost conversion circuit meets voltage output rules and outputs output voltage. The first control circuit, the second control circuit, the third control circuit and the fourth control circuit are arranged to control the soft start process of the switching capacitor boost converter circuit, so that peak current generated in the soft start process is controlled, and the problem that the element damage is easy to generate in the soft start process of the switching capacitor architecture boost converter is solved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of the application and to provide a further understanding of the application with regard to the other features, objects and advantages of the application. The drawings of the illustrative embodiments of the present application and their descriptions are for the purpose of illustrating the present application and are not to be construed as unduly limiting the present application. In the drawings:

fig. 1 is a schematic diagram of a soft start control circuit of a switched capacitor boost converter according to an embodiment of the present application;

fig. 2 is a schematic circuit diagram of a soft start control circuit of a switched capacitor converter according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by those skilled in the art based on the described embodiments of the present disclosure without the need for creative efforts, are also within the scope of the protection of the present disclosure.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the presently disclosed subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together either directly or joined through one or more intermediate parts.

In all embodiments of the present disclosure, since the source and drain (emitter and collector) of the transistor are symmetrical and the on-current direction between the source and drain (emitter and collector) of the N-type transistor and the P-type transistor is opposite, in embodiments of the present disclosure, the controlled middle terminal of the transistor is referred to as the gate and the remaining two terminals of the transistor are referred to as the first and second poles, respectively. In addition, terms such as "first" and "second" are used merely to distinguish one component (or portion of a component) from another component (or another portion of a component).

In an alternative embodiment of the present application, a soft start control circuit of a switched capacitor boost converter is provided, and fig. 1 is a schematic diagram of a soft start control circuit of a switched capacitor boost converter provided in an embodiment of the present application, as shown in fig. 1, where the soft start control circuit of a switched capacitor boost converter includes: the switching capacitorboost converter circuit 500 comprises a first control signal input end, a second control signal input end, a third control signal input end and a fourth control signal input end, wherein the first control signal input end is connected with the output end of thefirst control circuit 100, the second control signal input end is connected with the output end of thesecond control circuit 200, the third control signal input end is connected with the output end of thethird control circuit 300, and the fourth control signal input end is connected with the output end of thefourth control circuit 400.

Thefirst control circuit 100 is configured to generate a first current and deliver the first current to the switched-capacitorboost converter circuit 500 when in a first control state, and generate a first control signal and deliver the first control signal to the switched-capacitorboost converter circuit 500 when thefirst control circuit 100 is in a second control state;

thesecond control circuit 200 is configured to generate a second current when in the third control state and to deliver the second current to the switched-capacitorboost converter circuit 500, and to generate a second control signal when thesecond control circuit 200 is in the fourth control state and to deliver the second control signal to the switched-capacitorboost converter circuit 500;

thethird control circuit 300 is configured to generate a third current and deliver the third current to the switched-capacitorboost converter circuit 500 when in the fifth control state, generate a third control signal when thethird control circuit 300 is in the sixth control state, and deliver the third control signal to the switched-capacitorboost converter circuit 500;

thefourth control circuit 400 is configured to generate a fourth current and pass the fourth current to the switched-capacitorboost converter circuit 500 when in the seventh control state, generate a fourth control signal when thefourth control circuit 400 is in the eighth control state, and pass the fourth control signal to the switched-capacitorboost converter circuit 500;

The switched capacitorboost converting circuit 500 is configured to control output voltages of the switched capacitor boost converting circuits to meet a voltage output rule according to outputs of thefirst control circuit 100, thesecond control circuit 200, thethird control circuit 300, and thefourth control circuit 400, and output the output voltages, and boost-convert the switched capacitor boost converting circuits through the first control circuit, the second control circuit, the third control circuit, and the fourth control circuit to achieve soft start of the switched capacitor boost converting circuits.

In an alternative embodiment of the present application, the first control circuit includes a first current generating circuit and a first control signal generating circuit, when the first control circuit is in a first control state, the first current generating circuit works, and an output end of the first current generating circuit is connected with a first control signal input end of the switched capacitor boost converting circuit; when the first control circuit is in a second control state, the first control signal generating circuit works, and the output end of the first control signal generating circuit is connected with the first control signal input end of the switched capacitor boost converting circuit;

the second control circuit comprises a second current generation circuit and a second control signal generation circuit, when the second control circuit is in a third control state, the second current generation circuit works, and the output end of the second current generation circuit is connected with the second control signal input end of the switched capacitor boost conversion circuit; when the second control circuit is in a fourth control state, the second control signal generating circuit works, and the output end of the second control signal generating circuit is connected with the second control signal input end of the switched capacitor boost converting circuit;

The third control circuit comprises a third current generation circuit and a third control signal generation circuit, when the third control circuit is in a fifth control state, the third current generation circuit works, and the output end of the third current generation circuit is connected with the third control signal input end of the switched capacitor boost conversion circuit; when the third control circuit is in a sixth control state, the third control signal generating circuit works, and the output end of the third control signal generating circuit is connected with the third control signal input end of the switched capacitor boost converting circuit;

the fourth control circuit comprises a fourth current generation circuit and a fourth control signal generation circuit, when the fourth control circuit is in a seventh control state, the fourth current generation circuit works, and the output end of the fourth current generation circuit is connected with the fourth control signal input end of the switched capacitor boost conversion circuit; when the fourth control circuit is in the eighth control state, the fourth control signal generating circuit works, and the output end of the fourth control signal generating circuit is connected with the fourth control signal input end of the switched capacitor boost converting circuit.

In another alternative embodiment of the present application, a soft start control circuit of a switched capacitor converter is provided, fig. 2 is a schematic circuit diagram of the soft start control circuit of the switched capacitor converter provided in the embodiment of the present application, in the example of fig. 2, a voltage ground is connected to thefirst control circuit 100 and the switched capacitorboost conversion circuit 500 through a first switch S1, when thefirst control circuit 100 is in a first state, a control end of the first switch S1 is connected to a first end a, and when thefirst control circuit 100 is in a second state, a control end of the first switch S1 is connected to a second end b;

Thesecond control circuit 200 is connected with the switched capacitorboost converter circuit 500 through a second switch S2, when thesecond control circuit 200 is in a third state, the control end of the second switch S2 is connected with the first end a, and when thesecond control circuit 200 is in a fourth state, the control end of the second switch S2 is connected with the second end b;

thethird control circuit 300 is connected with the switched capacitorboost converter circuit 500 through a third switch S3, when thethird control circuit 300 is in a fifth state, the control end of the third switch S3 is connected with the first end a, and when thethird control circuit 300 is in a sixth state, the control end of the third switch S3 is connected with the second end b;

thefourth control circuit 400 and the switched capacitorboost converter circuit 500 are connected through a fourth switch S4, when thefourth control circuit 400 is in the seventh state, the control end of the fourth switch S4 is connected to the first end a, and when thesecond control circuit 200 is in the eighth state, the control end of the fourth switch S4 is connected to the second end b.

The first current generation circuit comprises a first current source Iref1 and a first mirror transistor Q1-1, wherein the first mirror transistor and the first transistor Q1 in the switch capacitor boost conversion circuit form a first current mirror structure, and the first current source is configured to generate a first current and provide the first current for the first current mirror structure; the first control signal generating circuit is configured to receive the first driving signal drv1, generate a first control signal according to the first driving signal, and provide the first control signal for the switched capacitor boost converting circuit.

The second current generation circuit comprises a second current source Iref2 and a second mirror transistor Q2-1, the second mirror transistor and a second transistor in the switched capacitor boost converter circuit form a second current mirror structure, and the second current source is configured to generate a second current and provide the second current for the second current mirror structure; the second control signal generating circuit is configured to receive the second driving signal drv2, generate a second control signal according to the second driving signal and provide the second control signal for the switched capacitor boost converting circuit;

the third current generation circuit comprises a third current source Iref3 and a third mirror transistor Q3-1, the third mirror transistor and a third transistor in the switched capacitor boost converter circuit form a third current mirror structure, and the third current source is configured to generate a third current and provide the third current for the third current mirror structure; the third control signal generating circuit is configured to receive the first driving signal drv1, generate a third control signal according to the first driving signal and provide the third control signal for the switched capacitor boost converting circuit;

the fourth current generation circuit comprises a fourth current source Iref4 and a fourth mirror transistor Q4-1, the fourth mirror transistor and a fourth transistor in the switch capacitor boost conversion circuit form a fourth current mirror structure, and the fourth current source is configured to generate a fourth current and provide the fourth current for the fourth current mirror structure; the fourth control signal generating circuit is configured to receive the second driving signal drv2 and generate a fourth control signal according to the second driving signal, and provide the fourth control signal for the switched capacitor boost converting circuit.

In another alternative embodiment of the present application, the first control signal generating circuit is configured to perform signal processing on the received first driving signal drv1 to generate a first control signal, the first control circuit is configured to level-convert the first driving signal drv1 to a switching signal with a high level of cb2+5v and a low level of CB2, so that the first transistor Q1 may be normally switched, the negative power supply terminal is coupled to the second node CB2, the positive power supply terminal is coupled to the first positive power supply terminal, and the voltage of the first positive power supply terminal may be set to be higher than the first positive power supply terminal with a voltage of 5V of thesecond node CB 2;

the second control signal generating circuit is configured to perform signal processing on the received second driving signal drv2 to generate a second control signal, the second control circuit is configured to convert the signal level of the second driving signal drv2 to a switching signal with a high level of CT1 and a low level of CB1, so that the second transistor Q2 can be normally switched, a negative power supply terminal is coupled to the first node CB1, and a positive power supply terminal is coupled to thethird node CT 1;

the third control signal generating circuit is configured to perform signal processing on the received first driving signal drv1 to generate a third control signal, the third control circuit is configured to perform signal processing on the first driving signal drv1 to generate dead time, the negative power supply terminal is coupled to the voltage terminal, and the positive power supply terminal can be coupled to a second positive power supply terminal higher than the voltage terminal by +5v;

The fourth control signal generating circuit is configured to amplify the received second driving signal drv2 to generate a fourth control signal, the third control circuit is configured to signal-process the second driving signal drv2 to generate dead time, the negative power supply terminal is coupled to the voltage terminal, and the positive power supply terminal may be coupled to a third positive power supply terminal higher than +5v.

The switched capacitor boost converter circuit includes a voltage source, a voltage output circuit, a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a first flying capacitor CFLY1, a second flying capacitor CFLY2 and a third flying capacitor CFLY3,

in an alternative embodiment of the present application, a gate of the second transistor is coupled to the second control signal input end of the switched capacitor boost converter circuit, a first pole of the second transistor is coupled to the positive pole of the voltage source, and a second pole of the second transistor is coupled to the first node CB1;

the grid electrode of the third transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit, the first electrode of the third transistor is coupled with the first node CB1, and the second electrode of the third transistor is coupled with the voltage end;

The grid electrode of the first transistor is coupled with the first control signal input end of the switch capacitor boost conversion circuit, the first electrode of the first transistor is coupled with the positive electrode of the voltage source, and the second electrode of the first transistor is coupled with the second node CB2;

the grid electrode of the fourth transistor is coupled with the fourth control signal input end of the switch capacitor boost conversion circuit, the first electrode of the fourth transistor is coupled with the second node CB2, and the second electrode of the fourth transistor is coupled with the voltage end;

the voltage source is configured to generate an input voltage Vin, and a negative electrode of the voltage source is coupled to the voltage terminal;

the first pole of the fifth transistor is coupled to the third node CT1, and the second pole of the fifth transistor is coupled to the positive pole of the voltage source;

the first pole of the sixth transistor is coupled to the fourth node CT2, and the second pole of the sixth transistor is coupled to the third node CT1;

the first pole of the seventh transistor is coupled to the fifth node CT3, and the second pole of the seventh transistor is coupled to the fourth node CT2;

the first pole of the eighth transistor is coupled to the voltage output circuit, and the second pole of the eighth transistor is coupled to the fifth node CT3;

one end of the first flying capacitor is coupled with the first node, and the other end of the first flying capacitor is coupled with the third node;

one end of the second flying capacitor is coupled with the second node, and the other end of the second flying capacitor is coupled with the fourth node;

One end of the third flying capacitor is coupled with the first node, and the other end of the third flying capacitor is coupled with the fifth node;

an input terminal of the voltage output circuit is coupled to the first pole of the eighth transistor, and the input terminal of the voltage output circuit is configured to generate an output voltage Vout according to the first pole output terminal current of the eighth transistor and output the output voltage Vout through the output terminal of the voltage output circuit; the voltage output circuit comprises an output capacitor COUT, a first end of the output capacitor is coupled to the voltage end, and a second end of the output capacitor is coupled to the first pole of the eighth transistor.

A first end of a first current source is coupled with a fourth node of the switch capacitor boost conversion circuit, a second end of the first current source is coupled with a first pole of a first mirror transistor, a second pole of the first mirror transistor is coupled with a second node of the switch capacitor boost conversion circuit, and a grid electrode of the first mirror transistor is coupled with a first control signal input end of the switch capacitor boost conversion circuit;

a first end of a second current source is coupled to a third node of the switched capacitor boost converter circuit, a second end of the second current source is coupled to a first pole of a second mirror transistor, a second pole of the second mirror transistor is coupled to the first node of the switched capacitor boost converter circuit, and a gate of the second mirror transistor is coupled to a second control signal input end of the switched capacitor boost converter circuit;

The output end of the third current source is coupled with the first pole of the third mirror image transistor, the second pole of the third mirror image transistor is coupled with the voltage end, and the grid electrode of the third mirror image transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit;

the output end of the fourth current source is coupled to the first pole of the fourth mirror transistor, the second pole of the fourth mirror transistor is coupled to the voltage end, and the grid electrode of the fourth mirror transistor is coupled to the fourth control signal input end of the switch capacitor boost conversion circuit.

In another alternative embodiment of the present application, the first driving signal drv1 and the second driving signal drv2 are driving signals with a duty ratio of 50%, and in the soft start control circuit of the switch capacitor converter, the first mirror transistor Q1-1 and the first transistor Q1 form a first current mirror structure, when Q1 is turned on, the current flowing through Q1 is

The second mirror transistor Q2-1 and the second transistor Q2 form a second current mirror structure, when Q2 is turned on, the current flowing through Q2 is

The third mirror transistor Q3-1 and the third transistor Q3 form a third current mirror structure, when Q3 is turned on, the current flowing through Q3 is +.>

The fourth mirror transistor Q4-1 and the fourth transistor Q4 form a fourth current mirror structure, when Q4 is turned on, the current flowing through Q4 is +. >

Wherein W, L is the width and length of the transistor, respectively.

When the third control circuit is in a fifth control state and the fourth control circuit is in a seventh control state, the first transistor and the second transistor are turned off, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are turned on, and the switched capacitor boost conversion circuit enters a precharge state;

in the precharge state, the first flying capacitor CFLY1, the second flying capacitor CFLY2 and the third flying capacitor CFLY3 are connected in parallel, the voltage source supplies the input voltage Vin, the voltage source is turned off through the first transistor and the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are turned on and precharge the first flying capacitor CFLY1, the second flying capacitor CFLY2 and the third flying capacitor CFLY3, and the precharge current magnitude of the first flying capacitor CFLY1, the second flying capacitor CFLY2 and the third flying capacitor CFLY3 is controlled through the third current mirror structure and the fourth current mirror structure, and at this stage, the capacitor voltages of the first flying capacitor CFLY1, the second flying capacitor CFLY2 and the third flying capacitor CFLY3 can be charged to Vin.

When the first control circuit is in a first control state, the second control circuit is in a third control state, the third control circuit is in a sixth control state, and the fourth control circuit is in an eighth control state, the switched capacitor boost conversion circuit is configured to control the working states of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor according to the third control signal and the fourth control signal, and the switched capacitor boost conversion circuit enters a soft start state.

In the soft start state, when the first control circuit is in the first control state, the second control circuit is in the third control state, the third control circuit is in the sixth control state, and the fourth control circuit is in the eighth control state; when the third control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned on, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned off; when the fourth control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned off, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned on; after the switch capacitor conversion circuit enters a soft start state, the switch capacitor conversion circuit is configured to alternately generate the third control signal as a high-phase signal and the fourth control signal as a high-phase signal so as to realize boost conversion of input voltage until the output end of the voltage output circuit meets a voltage output rule and output voltage.

The third control signal is obtained by signal processing according to the first driving signal drv1, and the fourth control signal is obtained by signal processing according to the seconddriving signal drv 2; in the soft-start state, two phase phases are included, the first phase being: the second driving signal drv2 is a high phase signal, and the second phase is: the first driving signal drv1 is a high phase signal,

when the second driving signal drv2 is a high-phase signal, the transistor Q2/Q4/Q6/Q8 is turned on, the transistor Q1/Q3/Q5/Q7 is turned off, the input voltage Vin generated by the voltage source bootstraps the third node CT1 to 2Vin through the second transistor Q2, the third node soft-charges the second flying capacitor CFLY2 through the sixth transistor Q6, and the charging current is I_Q4 (I_Q4 <I_ss2 ) The voltage increase amount of the second flying capacitor CFLY2 in one period is Δv_CT2 ＝I_Q4 *t₂ /C_FLY2 The method comprises the steps of carrying out a first treatment on the surface of the Meanwhile, the input voltage Vin generated by the voltage source firstly bootstraps the fifth node CT3 to 2Vin through the second transistor Q2, at the moment, the input voltage Vin generated by the voltage source charges the output capacitor COUT through the fifth node CT3 in a soft start manner through the second transistor Q2 and the eighth transistor Q8, and the charging current I_OUT Size I_ss2 -I_Q4 Wherein，I_Q4 The input voltage Vin is supplied to the second flying capacitor through the first flying capacitor CFLY1, and the voltage increase of the output voltage VOUT in one period is DeltaV_OUT ＝I_OUT *t₂ /C_OUT Wherein t is₂ C is the time length when the second driving signal drv2 is a high-phase signal in one period_FLY2 Capacitance of the second flying capacitor, C_OUT For the capacitance of the output capacitance, I_OUT A current representing the power supply to the output capacitor COUT;

when the first driving signal drv1 is a high-phase signal, the transistor Q1/Q3/Q5/Q7 is turned on, the transistor Q2/Q4/Q6/Q8 is turned off, and the input voltage Vin generated by the voltage source supplements the first flying capacitor CFLY1 to Vin through the third transistor Q3 (consumption exists in the first flying capacitor CFLY1 in the previous phase, namely, the consumption of the previous phase is more than the supplement of the power); meanwhile, the input voltage Vin generated by the voltage source is bootstrapped to 2Vin at the fourth node CT2 through the first transistor Q1, and charges the third flying capacitor CFLY3 through the fourth node CT2 via the first transistor Q1 and the seventh transistor Q7, with the charging current I_ss1 The voltage increase of the fifth node CT3 in one period is DeltaV_CFLY3 ＝I_ss1 *t₁ /C_FLY3 Wherein t is₁ C is the duration when the first driving signal drv1 is a high phase signal in one period_FLY3 The capacitance of the third flying capacitor.

The first phase and the second phase are alternated continuously to output voltage V_OUT The slow rise avoids generating too high spike currents in the soft start state by controlling the currents of the first transistor Q1 and the second transistor Q2. C after a plurality of soft start periods_FLY2 The voltage can be charged to 2V_IN ，C_FLY3 The voltage is charged to 3V_IN ，V_OUT The voltage may be charged to 4Vin. When V is_OUT Near 4vin, the control end of the first switch S1 is connected to the second end b, and the control end of the second switch S2 is connected to the second end b, so as to complete the soft start of the output voltage and enter the normal working state.

In summary, in the present application, the soft start control circuit of the switched capacitor boost converter includes a switched capacitor boost converter circuit, a first control circuit, a second control circuit, a third control circuit, and a fourth control circuit, where the switched capacitor boost converter circuit is connected to the first control circuit, the second control circuit, the third control circuit, and the fourth control circuit, respectively, and the switched capacitor boost converter circuit is configured to boost the input voltage according to the output control of the first control circuit, the second control circuit, the third control circuit, and the fourth control circuit until the output voltage of the switched capacitor boost converter circuit satisfies the voltage output rule, and output the output voltage. Through setting up first control circuit, second control circuit, third control circuit and fourth control circuit, control the soft start of switching capacitor boost converting circuit, control the peak current that produces in the soft start process, solved switching capacitor framework boost converter soft start and had the problem that produces the component damage easily.

It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is illustrated in the flowcharts, in some cases the steps illustrated or described may be performed in an order other than that illustrated herein.

It will be apparent to those skilled in the art that the elements or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, or they may alternatively be implemented in program code executable by computing devices, such that they may be stored in a memory device for execution by the computing devices, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps within them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims (10)

1. A switched capacitor converter soft start control circuit, comprising: the switch capacitor boost conversion circuit comprises a first control signal input end, a second control signal input end, a third control signal input end and a fourth control signal input end, wherein the first control signal input end is connected with the output end of the first control circuit, the second control signal input end is connected with the output end of the second control circuit, the third control signal input end is connected with the output end of the third control circuit, and the fourth control signal input end is connected with the output end of the fourth control circuit, wherein:

the first control circuit is configured to generate a first current when in a first control state and transmit the first current to the switched capacitor boost conversion circuit, and generate a first control signal when the first control circuit is in a second control state and transmit the first control signal to the switched capacitor boost conversion circuit;

the second control circuit is configured to generate a second current when in a third control state and transmit the second current to the switched capacitor boost converter circuit, and generate a second control signal when in a fourth control state and transmit the second control signal to the switched capacitor boost converter circuit;

The third control circuit is configured to generate a third current when in a fifth control state and transmit the third current to the switched capacitor boost converter circuit, and generate a third control signal when in a sixth control state and transmit the third control signal to the switched capacitor boost converter circuit;

the fourth control circuit is configured to generate a fourth current when in a seventh control state and transmit the fourth current to the switched capacitor boost converter circuit, and generate a fourth control signal when in an eighth control state and transmit the fourth control signal to the switched capacitor boost converter circuit;

the switched capacitor boost conversion circuit is configured to control the switched capacitor boost conversion circuit to boost convert an input voltage according to the outputs of the first control circuit, the second control circuit, the third control circuit and the fourth control circuit until the output voltage of the switched capacitor boost conversion circuit meets a voltage output rule, and output the output voltage.

2. The soft start control circuit of claim 1, wherein the first control circuit comprises a first current generation circuit and a first control signal generation circuit,

When the first control circuit is in the first control state, the first current generation circuit works, and the output end of the first current generation circuit is connected with the first control signal input end of the switched capacitor boost conversion circuit;

when the first control circuit is in the second control state, the first control signal generating circuit works, and the output end of the first control signal generating circuit is connected with the first control signal input end of the switched capacitor boost converting circuit.

3. The soft start control circuit of a switched capacitor converter as claimed in claim 2, wherein,

the first current generation circuit comprises a first current source and a first mirror transistor, the first mirror transistor and a first transistor in the switched capacitor boost conversion circuit form a first current mirror structure, and the first current source is configured to generate a first current and provide the first current for the first current mirror structure;

the first control signal generating circuit is configured to receive a first driving signal, generate a first control signal according to the first driving signal, and provide the first control signal for the switched capacitor boost converting circuit.

4. The soft-start control circuit of claim 1, wherein the switched-capacitor boost converter circuit comprises a voltage source, a voltage output circuit, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first flying capacitor, a second flying capacitor, and a third flying capacitor,

the grid electrode of the second transistor is coupled with the second control signal input end of the switch capacitor boost conversion circuit, the first electrode of the second transistor is coupled with the positive electrode of the voltage source, and the second electrode of the second transistor is coupled with the first node;

the grid electrode of the third transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit, the first electrode of the third transistor is coupled with the first node, and the second electrode of the third transistor is coupled with the voltage end;

the grid electrode of the first transistor is coupled with the first control signal input end of the switch capacitor boost conversion circuit, the first electrode of the first transistor is coupled with the positive electrode of the voltage source, and the second electrode of the first transistor is coupled with the second node;

The grid electrode of the fourth transistor is coupled with the fourth control signal input end of the switch capacitor boost conversion circuit, the first electrode of the fourth transistor is coupled with the second node, and the second electrode of the fourth transistor is coupled with the voltage end;

the voltage source is configured to generate the input voltage, and a negative electrode of the voltage source is coupled to the voltage terminal;

the first electrode of the fifth transistor is coupled with a third node, and the second electrode of the fifth transistor is coupled with the positive electrode of the voltage source;

a first pole of the sixth transistor is coupled to a fourth node, and a second pole of the sixth transistor is coupled to the third node;

a first pole of the seventh transistor is coupled to a fifth node, and a second pole of the seventh transistor is coupled to the fourth node;

a first pole of the eighth transistor is coupled to the voltage output circuit, and a second pole of the eighth transistor is coupled to the fifth node;

one end of the first flying capacitor is coupled with the first node, and the other end of the first flying capacitor is coupled with the third node;

one end of the second flying capacitor is coupled with the second node, and the other end of the second flying capacitor is coupled with the fourth node;

One end of the third flying capacitor is coupled with the first node, and the other end of the third flying capacitor is coupled with the fifth node;

an input of the voltage output circuit is coupled to the first pole of the eighth transistor, and the input of the voltage output circuit is configured to generate the output voltage according to the first pole output current of the eighth transistor and output the output voltage through the output of the voltage output circuit.

5. The soft-start control circuit of claim 1, wherein the switched-capacitor boost converter circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

when the third control circuit is in a fifth control state and the fourth control circuit is in a seventh control state, the first transistor and the second transistor are turned off, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are turned on, and the switched capacitor boost conversion circuit enters a precharge state;

when the first control circuit is in a first control state, the second control circuit is in a third control state, the third control circuit is in a sixth control state, and the fourth control circuit is in an eighth control state, the switched capacitor boost conversion circuit is configured to control the operating states of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor according to the third control signal and the fourth control signal, and the switched capacitor boost conversion circuit enters a soft start state.

6. The soft start control circuit of claim 5, wherein, after the switch capacitor converting circuit enters a soft start state,

when the third control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned on, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned off;

when the fourth control signal is a high phase signal, the first transistor, the third transistor, the fifth transistor, and the seventh transistor are turned off, and the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor are turned on;

after the switch capacitor conversion circuit enters a soft start state, the switch capacitor conversion circuit is configured to alternately generate the third control signal as a high-phase signal and the fourth control signal as a high-phase signal so as to realize boost conversion of input voltage until the output end of the voltage output circuit meets a voltage output rule and output voltage.

7. The soft start control circuit of a switched capacitor converter as claimed in claim 1,

The first end of the first current source is coupled to the fourth node of the switch capacitor boost conversion circuit, the second end of the first current source is coupled to the first pole of the first mirror transistor, the second pole of the first mirror transistor is coupled to the second node of the switch capacitor boost conversion circuit, the grid electrode of the first mirror transistor is coupled to the first control signal input end of the switch capacitor boost conversion circuit, and the grid electrode of the first mirror transistor is coupled to the first pole of the first mirror transistor.

8. The soft start control circuit of a switched capacitor converter as claimed in claim 1,

the second control circuit comprises a second current generation circuit and a second control signal generation circuit, wherein when the second control circuit is in a third control state, the second current generation circuit works; the second current generation circuit comprises a second current source and a second mirror transistor, the second mirror transistor and a second transistor in the switched capacitor boost conversion circuit form a second current mirror structure, and the second current source is configured to generate a second current and provide the second current for the second current mirror structure;

The third control circuit comprises a third current generation circuit and a third control signal generation circuit, wherein when the third control circuit is in a fifth control state, the third current generation circuit works; the third current generation circuit comprises a third current source and a third mirror transistor, the third mirror transistor and a third transistor in the switch capacitor boost conversion circuit form a third current mirror structure, and the third current source is configured to generate a third current and provide the third current for the third current mirror structure;

the fourth control circuit comprises a fourth current generation circuit and a fourth control signal generation circuit, wherein when the fourth control circuit is in a seventh control state, the fourth current generation circuit works; the fourth current generation circuit comprises a fourth current source and a fourth mirror transistor, the fourth mirror transistor and a fourth transistor in the switched capacitor boost conversion circuit form a fourth current mirror structure, and the fourth current source is configured to generate a fourth current and provide the fourth current for the fourth current mirror structure.

9. The soft start control circuit of a switched capacitor converter as claimed in claim 8,

The second control signal generating circuit is configured to receive a second driving signal, generate a second control signal according to the second driving signal, and provide the second control signal for the switched capacitor boost converting circuit;

the third control signal generating circuit is configured to receive a first driving signal, generate a third control signal according to the first driving signal, and provide the third control signal for the switched capacitor boost converting circuit;

the fourth control signal generation circuit is configured to receive the second driving signal and generate a fourth control signal according to the second driving signal, and provide the fourth control signal for the switched capacitor boost converter circuit.

10. The soft start control circuit of a switched capacitor converter as claimed in claim 1,

a first end of a second current source is coupled to a third node of the switched capacitor boost converter circuit, a second end of the second current source is coupled to a first pole of a second mirror transistor, a second pole of the second mirror transistor is coupled to the first node of the switched capacitor boost converter circuit, a gate of the second mirror transistor is coupled to a second control signal input end of the switched capacitor boost converter circuit, and a gate of the second mirror transistor is coupled to the first pole of the second mirror transistor;

The output end of the third current source is coupled with the first pole of the third mirror image transistor, the second pole of the third mirror image transistor is coupled with the voltage end, the grid electrode of the third mirror image transistor is coupled with the third control signal input end of the switch capacitor boost conversion circuit, and the grid electrode of the third mirror image transistor is coupled with the first pole of the third mirror image transistor;

the output end of the fourth current source is coupled to the first pole of the fourth mirror transistor, the second pole of the fourth mirror transistor is coupled to the voltage end, the grid electrode of the fourth mirror transistor is coupled to the fourth control signal input end of the switch capacitor boost conversion circuit, and the grid electrode of the fourth mirror transistor is coupled to the first pole of the fourth mirror transistor.

Images