Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, where, with reference to fig. 1 and fig. 2, the display panel 1 includes: a plurality of pixel circuits 10 arranged in an array; the pixel circuit 10 includes a data writing block 11, a driving transistor M1, a bias adjustment block 12, and a light emitting element 13; in the same pixel circuit 10, the data writing module 11 is configured to write a data signal to the gate of the driving transistor M1; the driving transistor M1 is for supplying a driving current to the light emitting element 13 according to the data signal; the bias adjustment module 12 is electrically connected to the first pole of the driving transistor M1, the second pole of the driving transistor M1, and the data writing module 11, and the bias adjustment module 12 is configured to store a data signal provided by the data writing module 11 to the gate of the driving transistor M1, and provide charges to the first pole and the second pole of the driving transistor M1 according to the data signal.
It can be understood that the display panel 1 includes a plurality of pixel circuits 10 arranged in an array, and the driving transistors in the pixel circuits can drive the light emitting elements of the pixel circuits to emit light, so that the display panel presents a corresponding display screen. In the pixel circuit 10, a voltage difference exists between the gate and the source or the drain of the driving transistor M1 for a long time, so that the driving transistor M1 is in a bias state for a long time, and the threshold voltage of the driving transistor M1 shifts under a bias state for a long time, so that a hysteresis effect is generated, and a corresponding data signal cannot be accurately written into the gate of the driving transistor. For example, when two adjacent frames of display images are different, for example, the image displayed in the previous frame is a black image and the image displayed in the next frame is a white image, the driving transistor M1 needs to be switched from the positive bias state to the negative bias state, but due to the hysteresis effect of the driving transistor M1, the display brightness of the white image is lower when the display panel is switched from the black image to the white image, so that the display effect is affected.
Based on this, fig. 2 is an exemplary schematic diagram of a pixel circuit, and as shown in fig. 2, the driving transistor M1 may be a P-channel transistor or an N-channel transistor, which is not limited in this embodiment of the present invention. The data writing module 11 is electrically connected to the first pole of the driving transistor M1, and on the data writing path, the pixel circuit 10 further includes a threshold compensation module 15 to compensate the threshold voltage of the driving transistor M1, so that the data writing module 11 writes the data signal Vdata to the gate of the driving transistor M1 sequentially through the driving transistor M1 and the threshold compensation module 15 during the data writing phase. Meanwhile, the data writing module 11 also provides the data signal Vdata to the bias adjustment module 12, so that the bias adjustment module 12 stores the data signal Vdata, and after the data signal writing is finished, the bias adjustment module 12 provides charges to the first pole and the second pole of the driving transistor M1 according to the data signal Vdata. Since the process of switching the driving transistor M1 from one bias state to another bias state is substantially that the charges in the driving transistor M1 are redistributed, after the data writing is finished, the bias adjustment module 12 provides charges to the first pole and the second pole of the driving transistor M1 according to the data signal Vdata, and can supplement charges in the driving transistor M1, so that the charges in the driving transistor M1 can be redistributed according to the data signal Vdata, the bias state of the driving transistor M1 is adjusted, the threshold voltage drift problem of the driving transistor M1 is improved, and the hysteresis effect of the driving transistor M1 is reduced, so that in the light emitting stage, the threshold voltage drift problem of the driving transistor M1 is improved, the driving transistor M1 can generate accurate driving current, and the driving current can drive the light emitting element 13 to emit light accurately, thereby improving the display quality of the display panel.
The light emitting element 13 may include a sub-Micro light emitting diode (Mini-LED), a Micro light emitting diode (Micro-LED), an Organic Light Emitting Diode (OLED), and the like, which is not particularly limited in the implementation of the present invention, and fig. 2 illustrates the light emitting element 13 as an organic light emitting diode by way of example only.
It should be noted that, the specific electrical connection manner between the data writing module 11 and the driving transistor M1 includes, but is not limited to, the structure shown in fig. 2, and fig. 2 is only an exemplary schematic diagram of the pixel circuit 10. The pixel circuit 10 may further include an initialization module 14, and a light-emitting control module 16, where the initialization module 14 is configured to initialize the gate of the driving transistor M1 in an initialization stage, and the light-emitting control module 16 is configured to control the driving transistor M1 to provide a driving current to the light-emitting element 13, which is not described in detail herein.
According to the embodiment of the invention, the bias adjustment module is electrically connected with the first pole of the driving transistor, the second pole of the driving transistor and the data writing module, so that the bias adjustment module can store a data signal provided by the data writing module to the grid electrode of the driving transistor, and provide charges to the first pole and the second pole of the driving transistor according to the data signal, so as to supplement charges in the driving transistor, redistribute the charges again, adjust the bias state of the driving transistor, slow down the hysteresis effect of the driving transistor and improve the threshold voltage drift problem of the driving transistor, and therefore, when the picture is switched, especially when the black and white picture is switched, the driving transistor can accurately drive the light emitting element to emit light, the picture display brightness is improved, the display trailing image is improved, and the display quality is improved; in addition, compared with the condition of adopting a fixed voltage signal to adjust the bias state of the driving transistor, in the technical scheme of the invention, the bias adjusting module receives the data signal provided by the data writing module, so that the additional fixed voltage signal is not required to be provided for bias adjustment of the driving transistor, the number of signals provided for a pixel circuit is reduced, the structure of the display panel is simplified, meanwhile, the charges in the driving transistor are supplemented according to the data signal, and the supplemented charges in the driving transistor and the data signal provided for the grid electrode of the driving transistor can be ensured to be consistent, thereby enabling the driving transistor to generate accurate driving current, and further improving the accuracy of pictures displayed by the display panel.
Optionally, with continued reference to fig. 1, the pixel circuits include a first pixel circuit 101 and a second pixel circuit 102; the light emitting element 13 of the first pixel circuit 101 emits light of a first color, and the light emitting element 13 of the second pixel circuit 102 emits light of a second color; the wavelength of the first color light is greater than the wavelength of the second color light; the channel width-to-length ratio of the driving transistor M1 in the first pixel circuit 101 is larger than that of the driving transistor M1 in the second pixel circuit 102.
The first pixel circuit 101 and the second pixel circuit 102 may be located at any position in the display panel 1, which is not particularly limited in the embodiment of the present invention. The first color light or the second color light emitted by the light emitting element 13 in the pixel circuit 10 includes, but is not limited to, red, green, blue, yellow, white, cyan, magenta, and the like, which is not particularly limited in the embodiment of the present invention.
Specifically, the wavelength of the light emitting element 13 of the first pixel circuit 101 emits light of the first color is larger than the wavelength of the light emitting element 13 of the second pixel circuit 102 emits light of the second color, for example, the light emitting element 13 of the first pixel circuit 101 emits light of blue, and the light emitting element 13 of the second pixel circuit 102 emits light of red or green. Since the light emitting materials of the light emitting elements 13 of different colors are different, so that the light emitting efficiency of the light emitting elements 13 of different colors is also different, when the driving transistors M1 in the respective pixel circuits 10 have the same size, the light emitting efficiency of blue is lower, and thus, when the same display gray scale is required to be displayed, the light emitting element of blue needs to have a larger driving current, that is, the driving transistor M1 of the pixel circuit 10 in which the light emitting element of blue is located needs to generate a larger driving current. The driving transistor M1 usually operates in the saturation region, and the driving current I generated by the driving transistor M1 has the following formulaWhere Vgs is the gate-source voltage difference of the driving transistor M1, vth is the threshold voltage of the driving transistor M1, W is the width of the channel region, L is the length of the channel region, cox is the parasitic capacitance formed by the gate electrode and the active layer of the driving transistor, μ is the mobility of the active layer of the driving transistor, and the larger the channel width-to-length ratio W/L of the driving transistor M1 is, the larger the driving current generated by the driving transistor is. Therefore, by setting the channel width-to-length ratio of the driving transistor M1 in the first pixel circuit 101 to be greater than the channel width-to-length ratio of the driving transistor M1 in the second pixel circuit 102, the driving current generated by the driving transistor M1 in the first pixel circuit 101 is greater than the driving current generated by the driving transistor M1 in the second pixel circuit 102 when the driving transistors have the same gate-source voltage difference under the same data signal voltage, so that the light emitting element of the first pixel circuit 101 and the light emitting element of the second pixel circuit 102 exhibit the same display gray scale, and the display quality is improved.
Optionally, fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 1 and fig. 3, the bias adjustment module 12 of the first pixel circuit 101 includes a first capacitor C1, and the bias adjustment module 12 of the second pixel circuit 102 includes a second capacitor C2; the capacitance of the first capacitor C1 is smaller than the capacitance of the second capacitor C2.
Wherein the bias adjustment module 12 includes a capacitor C, the bias adjustment module 12 of the first pixel circuit 101 includes a first capacitor C1, the bias adjustment module 12 of the second pixel circuit 102 includes a second capacitor C2, that is, the bias adjustment module 12 is composed of the capacitor C, and the data write module 11 supplies a data signal to the gate of the driving transistor M1 during the data write period, and charges the capacitor C at the same time, so that the data signal can be stored in the capacitor C, and after the data signal write is finished, the capacitor C can supply charges to the first pole and the second pole of the driving transistor M1 according to the stored data signal, so that the charges in the driving transistor M1 can be redistributed according to the data signal to adjust the bias state of the driving transistor M1. It should be noted that the capacitance values of the bias adjustment modules 12 in different pixel circuits 10 may be the same or different, which is not limited in particular, and may be set according to actual requirements in the embodiment of the present invention.
Specifically, when the first pixel circuit 101 and the second pixel circuit 102 have the same display luminance, the data signal written by the data writing module 11 to the gate of the driving transistor M1 in the first pixel circuit 101 may be the same as the data signal written by the data writing module 11 to the gate of the driving transistor M1 in the second pixel circuit 102, and since the channel width-to-length ratio of the driving transistor M1 in the first pixel circuit 101 is greater than the channel width-to-length ratio of the driving transistor M1 in the second pixel circuit 102, the driving current generated by the driving transistor M1 in the first pixel circuit 101 is greater than the driving current generated by the driving transistor M1 in the second pixel circuit 102, so that the first pixel circuit 101 and the second pixel circuit 102 have the same display luminance. However, when the channel width-to-length ratio of the driving transistor M1 in the first pixel circuit 101 is greater than the channel width-to-length ratio of the driving transistor M1 in the second pixel circuit 102, the parasitic capacitance of the driving transistor M1 in the first pixel circuit 101 may be smaller than the parasitic capacitance of the driving transistor M1 in the second pixel circuit 102, that is, the parasitic capacitance of the driving transistor M1 in the second pixel circuit 102 is greater than the parasitic capacitance of the driving transistor M1 in the first pixel circuit 101, and the larger the parasitic capacitance is, the larger the charge amount needed for charge redistribution is, so that the capacitance of the capacitor C in the bias adjustment module 12 needs to be greater, and therefore, by setting the capacitance of the first capacitor C1 to be smaller than the capacitance of the second capacitor C2, that is, the capacitance of the second capacitor C2 is greater than the capacitance of the first capacitor C1, the first capacitor C1 can provide enough charge to the driving transistor M1 in the first pixel circuit 101 when the first pixel circuit 101 is full, the charge amount of the driving transistor M1 can be guaranteed to be redistributed, the charge amount of the driving transistor M1 in the first pixel circuit is required to be full, and the charge amount of the driving transistor M1 can be well regulated when the second pixel circuit 102 is full, and the charge amount of the driving transistor M1 can be well distributed in the first transistor M1 can be well can be regulated, and the state of the driving transistor M can be well regulated.
Optionally, fig. 4 is a schematic cross-sectional structure of a display panel according to an embodiment of the present invention, as shown in fig. 4, including a substrate 100; an insulating spacer multilayer conductive layer 200 located on one side of the substrate 100; the conductive layer 200 includes a first conductive layer 201, a second conductive layer 202, a third conductive layer 203, and a fourth conductive layer 204; the first conductive layer 201 includes a first plate of the first capacitor C1, and the second conductive layer 202 includes a second plate of the first capacitor C1; the third conductive layer 203 includes a first plate of the second capacitor C2, and the fourth conductive layer 204 includes a second plate of the second capacitor C2; in the thickness direction Z of the display panel 1, a distance d1 between the first conductive layer 201 and the second conductive layer 202 is larger than a distance d2 between the third conductive layer 203 and the fourth conductive layer 204.
The substrate 100 may be a flexible substrate or a rigid substrate, which is not limited in the embodiment of the present invention. When the substrate 100 is a flexible substrate, the substrate 100 may include one or more flexible layers, and a material of the flexible layers may include Polyimide (PI), which is not limited in the embodiment of the present invention.
The first conductive layer 201, the second conductive layer 202, the third conductive layer 203 and the fourth conductive layer 204 can be used for multiplexing any existing conductive layer in the display panel 1, and no additional arrangement is needed to reduce the thickness of the display panel 1, which is beneficial to the design of thinning the display panel 1. The specific materials of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 in the embodiment of the present invention are not limited, and may be, for example, metal materials, or one or more of indium tin oxide, indium zinc oxide, or indium gallium zinc oxide.
Specifically, the capacitance value calculation formula of the known capacitor is as followsWhere k is an electrostatic force constant, ε is a relative dielectric constant, d is a distance between two opposite polar plates of the capacitor, and S is an overlapping area between two opposite polar plates of the capacitor, so it can be known that when the materials of the first capacitor C2 and the second capacitor C2 are the same, and the overlapping area between two opposite polar plates of the first capacitor C1 and the overlapping area between two opposite polar plates of the second capacitor C2 are the same, by setting the distance d1 between the first conductive layer 201 and the second conductive layer 202 to be greater than the distance d2 between the third conductive layer 203 and the fourth conductive layer 204, that is, the distance d1 between two opposite polar plates of the first capacitor C1 is greater than the distance d2 between two opposite polar plates of the second capacitor C2, the capacitance value of the first capacitor C1 can be smaller than the capacitance value of the second capacitor C2, so that the capacitance value of the first capacitor C1 in the first pixel circuit 101 can be ensured to provide enough charge quantity to the driving transistor M1, the charge in the driving transistor M1 can be redistributed, and the charge quantity in the second capacitor C2 in the driving transistor M1 can be adjusted to be provided to the bias state.
In other embodiments, the overlapping area between the two opposite plates of the first capacitor C1 may also be smaller than the overlapping area between the two opposite plates of the second capacitor C2; or the overlapping area between the two opposite polar plates of the first capacitor C1 may be smaller than the overlapping area between the two opposite polar plates of the second capacitor C2, and the ratio of the overlapping area between the two opposite polar plates of the first capacitor C1 to d1 is smaller than the ratio of the overlapping area between the two opposite polar plates of the second capacitor C2 to d2, which may make the capacitance of the first capacitor C1 smaller than the capacitance of the second capacitor C2, and have the same technical effects as described above, and will not be repeated here.
It should be noted that the specific positions of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 include, but are not limited to, those shown in fig. 4, and fig. 4 is given only as an example.
In addition, the insulating material between each adjacent conductive layer may be silicon oxide, silicon oxynitride, silicon nitride, aluminum oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconium oxide, or the like, which is not limited in the embodiment of the present invention.
Optionally, fig. 5 is a schematic cross-sectional structure of another display panel provided in the embodiment of the present invention, as shown in fig. 5, the first conductive layer 201 is multiplexed to the third conductive layer 203, that is, the first electrode plate of the first capacitor C1 and the first electrode plate of the second capacitor C2 are located in the same conductive layer, so that the number of the arranged film layers can be reduced, and the circuit structure layout of the display panel 1 is simplified.
Or in another embodiment, the first conductive layer 201 is multiplexed into a fourth conductive layer 204 (see fig. 6); or in yet another embodiment, the second conductive layer 202 is multiplexed into a third conductive layer 203 (as can be seen with reference to fig. 7); or in another embodiment, the second conductive layer 202 is multiplexed into the fourth conductive layer 204 (refer to fig. 8), and the structural schematic diagrams of the display panel 1 in fig. 6 to 8 are that any two layers of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203 and the fourth conductive layer 204 are located on the same layer, which can also reduce the number of the layers, so as to simplify the circuit structure layout of the display panel 1, and the detailed description thereof is omitted.
It will be understood that the following embodiments may be described by taking the cross-sectional structure of the display panel shown in fig. 5 as an example for ease of understanding, without any particular description.
Optionally, fig. 9 is a schematic cross-sectional structure of another display panel according to an embodiment of the present invention, as shown in fig. 9, any one of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 includes a gate 301 of the driving transistor M1.
For example, taking the first conductive layer 201 as the third conductive layer 203 as an example, fig. 9 shows that the first conductive layer 201 further includes the gate 301 of the driving transistor M1, that is, the first plate of the first capacitor C1, the first plate of the second capacitor C2 and the gate of the driving transistor M1 are located in the same conductive layer, so as to reduce the number of layers, and facilitate the design of thinning the display panel 1.
In addition, one or more other conductive layers may be provided in the first conductive layer 201, the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 in addition to the conductive layer including the gate electrode 301 of the driving transistor M1 for providing the source electrode, the drain electrode, and the like of the driving transistor M1, or may further include a conductive layer or the like for providing the anode electrode 131 of the light emitting element 13, but not limited thereto, and may be provided according to actual needs, and fig. 9 is only exemplary.
It should be noted that, in other embodiments, any one of the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 may include the gate 301 of the driving transistor M1, which is not illustrated, and may be set by those skilled in the art according to actual needs.
Optionally, fig. 10 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, fig. 11 is a schematic sectional structural diagram of a display panel according to an embodiment of the present invention, and, as shown in fig. 10 and 11, the pixel circuit 10 includes at least one first transistor M2, where a first pole or a second pole of the first transistor M2 is electrically connected to a gate of the driving transistor M1; the channel type of the first transistor M2 is different from that of the driving transistor M1.
The first transistor M2 may be an initialization transistor in the initialization module 14 or a threshold compensation transistor in the threshold compensation module 15, but is not limited thereto, and the embodiment of the invention is not limited thereto.
Specifically, when the driving transistor M1 is a P-channel transistor, the second transistor M2 is an N-channel transistor, whereas when the driving transistor M1 is an N-channel transistor, the second transistor M2 is a P-channel transistor. Preferably, referring to fig. 10, in the same pixel circuit 10, the driving transistor M1 is a P-channel transistor, for example, the driving transistor M1 is a low-temperature polysilicon transistor, and the first transistor M2 is an N-channel transistor, for example, an oxide thin film transistor, further, both the initializing transistor and the threshold compensating transistor are oxide thin film transistors, so that the drain current can be reduced, the stability of the gate potential of the driving transistor M1 can be maintained, the light emitting stability of the light emitting element 13 can be further ensured, and the display quality can be improved.
Alternatively, as shown in fig. 11, with continued reference to fig. 11, a first semiconductor layer 205 and a second semiconductor layer 206 are positioned on one side of the substrate 100 and are insulated from each other; the first semiconductor layer 205 and the second semiconductor layer 206 are insulated from each other; the first semiconductor layer 205 includes an active layer of the driving transistor M1, and the second semiconductor layer 206 includes an active layer of the first transistor M2; one of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203, and the fourth conductive layer 204 includes the gate 401 of the first transistor M2, and the other conductive layer includes the gate of the driving transistor M1.
Illustratively, taking the driving transistor M1 as a P-channel transistor and the first transistor M2 as an N-channel transistor as an example, the first semiconductor layer 205 includes an active layer of the driving transistor M1, so that the first semiconductor layer 205 may include silicon, for example, polysilicon, and the driving transistor M1 may be a low-temperature polysilicon transistor. The second semiconductor layer 206 includes an active layer of the first transistor M2, and the second semiconductor layer 206 may include an oxide semiconductor, for example, indium gallium zinc oxide, and then the first transistor M2 is an oxide thin film transistor. But not limited thereto, and those skilled in the art can set them according to actual demands.
Further, one of the first conductive layer 201, the second conductive layer 202, the third conductive layer 203 and the fourth conductive layer 204 includes the gate 401 of the first transistor M2, the other conductive layer includes the gate of the driving transistor M1, fig. 10 exemplarily shows that the first conductive layer 201 is multiplexed to the third conductive layer 203, and the first conductive layer 201 includes the gate of the driving transistor M1, and the fourth conductive layer 204 includes the gate 401 of the first transistor M2, so as to reduce the number of layers and ensure the light and thin structure of the display panel, and in other embodiments, the second conductive layer 202 may include the gate 401 of the first transistor M2, but is not limited thereto, and may be set according to practical requirements.
Optionally, fig. 12 is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, fig. 13 is a schematic sectional structural diagram of another display panel provided in the embodiment of the present invention, and, as shown in fig. 12 and fig. 13, the pixel circuit 10 further includes a storage capacitor Cst; one of the first plate and the second plate of the storage capacitor Cst is electrically connected to the gate of the driving transistor M1, and the other is electrically connected to the fixed power signal terminal PVDD, so that the storage capacitor Cst can maintain the potential of the gate of the driving transistor M1 when the pixel circuit 10 operates in the light-emitting phase, so as to ensure that the driving transistor M1 can continuously and stably generate a driving current under the action of the potential of the gate of the driving transistor M1 and the fixed power signal terminal PVDD in the light-emitting phase, and drive the light-emitting element 13 to stably emit light. With continued reference to fig. 12, the pixel circuit 10 may further include a reset module 17, where the reset module 17 is configured to reset the potential of the anode of the light emitting element 13, so as to reduce the influence of the potential of the anode of the light emitting element 13 of the previous frame on the potential of the anode of the light emitting element 13 of the next frame, and improve the display effect.
It should be noted that the transistors in the data writing module 11, the transistors in the light emitting control module 16, and the transistors in the reset module 17 may have the same channel type as the driving transistor M1, or may have the same channel type as the first transistor M2, which is not particularly limited in this embodiment of the present invention, and may be set according to practical requirements. Fig. 10 and 12 are only exemplary illustrations.
Optionally, the first plate of the storage capacitor Cst is arranged in the same layer as at least one of the first plate of the first capacitor C1 and the first plate of the second capacitor C2, and/or the second plate of the storage capacitor Cst is arranged in the same layer as at least one of the second plate of the first capacitor C1 and the second plate of the second capacitor C2. It can be understood that one of the two plates of the storage capacitor Cst is at least arranged on the same layer as one of the two plates of the first capacitor C1, or one of the two plates of the storage capacitor Cst is at least arranged on the same layer as one of the two plates of the second capacitor C2, so as to reduce the number of film layers, simplify the circuit structure, and facilitate the light and thin of the display panel 1.
For example, taking the first conductive layer 201 as the third conductive layer 203, in fig. 12, one of the two plates of the storage capacitor Cst and the first plate of the first capacitor C1 and the first plate of the second capacitor C2 are located in the same layer, and the other of the two plates of the storage capacitor Cst and the second plate of the second capacitor C2 are located in the same layer.
Optionally, fig. 14 is a schematic cross-sectional structure of another display panel according to an embodiment of the present invention, and as shown in fig. 14, the bias adjustment module 12 includes a variable capacitance Cx.
For example, the variable capacitance Cx may be formed of three conductive layers disposed at different layers, namely, the first electrode 121, the second electrode 122, and the third electrode 123, respectively, and the distance d3 between the first electrode 121 and the second electrode 122 is different from the distance d4 between the second electrode 122 and the third electrode 123, and when the first electrode 121 and the second electrode 122 are provided with signals, the corresponding variable capacitance Cx is formed of two opposite electrodes of the first electrode 121 and the second electrode 122, or when the second electrode 122 and the third electrode 123 are provided with signals, the corresponding variable capacitance Cx is formed of two opposite electrodes of the second electrode 122 and the third electrode 123, so that the capacitance of the variable capacitance Cx may be changed by adjusting to provide signals to different electrodes.
In other embodiments, the difference in the overlapping areas between the first plate 121, the second plate 122 and the third plate 123 may be used, and the different plates may be selected to provide signals to adjust the magnitude of the variable capacitance Cx, which is not particularly limited in the embodiments of the present invention.
Based on the same inventive concept, the embodiment of the present invention further provides a display device, and fig. 15 is a schematic structural diagram of the display device provided by the embodiment of the present invention, as shown in fig. 15, the display device 2 includes the display panel 1 provided by any embodiment of the present invention, so that the display device 2 provided by the embodiment of the present invention includes the technical features of the display panel 1 provided by the embodiment of the present invention, and can achieve the beneficial effects of the display panel 1 provided by the embodiment of the present invention, and the same points can refer to the description of the display panel 1 provided by the embodiment of the present invention described above, and are not repeated herein. The display device 2 provided in the embodiment of the present invention may be a mobile phone shown in fig. 15, or any electronic product with a display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, vehicle-mounted display, medical equipment, industrial control equipment, touch interactive terminal, etc., which are not particularly limited in this embodiment of the invention.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.