Disclosure of Invention
The application aims to solve the technical problems that: a multi-region multi-frequency display device is provided, in which refresh frequencies of different display regions are different.
The technical scheme adopted by the application for solving the technical problems is as follows: a multi-region multi-frequency display device comprises at least one first display region and at least one second display region, wherein the first display region and the second display region comprise a plurality of rows of grid lines; wherein the gate lines of the first partial region of at least one of the first display regions are supplied with driving signals by the first clock signal line of at least one via the first gate driving unit of at least one; the grid line of the second partial area of at least one of the first display areas is provided with a driving signal by a second clock signal line of at least one through a second grid driving unit of at least one; wherein the gate lines of the third partial region of at least one of the second display regions are supplied with driving signals by the first clock signal line of at least one via the first gate driving unit of at least one; the grid line of the fourth partial area of at least one of the second display areas is provided with a driving signal by a second clock signal line of at least one through a second grid driving unit of at least one; the signal lines of a certain frame of the first clock signal lines are locally different from the signal lines of another frame, and the signal lines of a certain frame of the second clock signal lines are locally different from the signal lines of another frame.
Preferably, the signal line of a certain frame of the first clock signal line is different from the signal line of a corresponding frame of the second clock signal line.
Preferably, a first signal line for supplying a driving signal to a portion of the gate lines of the first display region in one frame of the first clock signal line is the same as or different from a second signal line for supplying a driving signal to a portion of the gate lines of the first display region in another frame of the first clock signal line; the first clock signal line has a third signal line for supplying a driving signal to a part of the gate lines of the second display region in one frame, and the second clock signal line has a fourth signal line for not supplying a driving signal to a part or all of the gate lines of the second display region in the other frame.
Preferably, a fifth signal line for supplying a driving signal to a portion of the gate lines of the first display region in one frame of the second clock signal line is the same as or different from a sixth signal line for supplying a driving signal to a portion of the gate lines of the first display region in another frame of the second clock signal line; the second clock signal line has a seventh signal line for supplying no driving signal to a part or all of the gate lines of the second display region in one frame, and has an eighth signal line for supplying a driving signal to a part of the gate lines of the second display region in the other frame.
Preferably, the first signal line of one frame of the first clock signal line and the fifth signal line of the corresponding frame of the second clock signal line are combined to supply a driving signal to the gate line of the first display region, and the third signal line of one frame of the first clock signal line and the eighth signal line of the other frame of the second clock signal line are combined to supply a driving signal to the gate line of the second display region.
Preferably, the multi-region multi-frequency display device includes at least two first clock signal lines and at least two second clock signal lines, the signal lines of corresponding frames of the two first clock signal lines are different; the signal lines of the corresponding frames of the two second clock signal lines are not identical.
Preferably, the two first clock signal lines supply the driving signals to part of the gate lines of the second display area in one frame, and the two first clock signal lines supply no driving signals to part or all of the gate lines of the second display area in the other frame.
Preferably, the two second clock signal lines supply no driving signal to part or all of the gate lines of the second display area in one frame, and the two second clock signal lines supply the driving signal to part of the gate lines of the second display area in another frame.
Preferably, one of the first clock signal lines supplies a driving signal to a part of the gate lines of the second display area in one frame, and the first clock signal line supplies no driving signal to a part or all of the gate lines of the second display area in another frame; the other first clock signal line does not provide a driving signal to part or all of the gate lines of the second display area in the corresponding frame; the other first clock signal line supplies a driving signal to a portion of the gate lines of the second display region in another corresponding frame.
Preferably, one of the second clock signal lines supplies a driving signal to a part of the gate lines of the second display area in one frame, and the other second clock signal line supplies no driving signal to a part or all of the gate lines of the second display area in the other frame; the other second clock signal line does not provide a driving signal to part or all of the gate lines of the second display region in a certain frame; the other second clock signal line supplies a driving signal to a part of the gate lines of the second display region in another frame.
The beneficial effects of the application are as follows: the refresh times of the first display area in two or more frames are different from the refresh times of the second display area in two or more corresponding frames, so that the application achieves the effect that the refresh frequencies of different display areas of the display panel are different. The display area with higher refresh frequency is suitable for competitive games or videos, and the display area with lower refresh frequency is suitable for text reading or picture viewing, etc.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by the person skilled in the art based on the present application are included in the scope of protection of the present application.
In a first embodiment, as shown in fig. 1, 2 and 7, a multi-region multi-frequency display device includes at least one first display region and at least one second display region. In the first embodiment, the display screen is divided into a first display area corresponding to the 1 st to 10 th grid lines and a second display area corresponding to the 11 th to 20 th row grid lines, and the display screen has 20 rows of grid lines, wherein the first display area corresponding to the 1 st to 10 th row grid lines is required to have a higher refresh frequency, and the second display area corresponding to the 11 th to 20 th row grid lines is required to have a lower refresh frequency. The division of the display areas may also be adjusted so that the display screen is divided into more display areas, the display areas being divided into a first display area and a second display area, wherein a portion of the display areas are required to have a higher refresh frequency, and wherein a portion of the display areas are required to have a lower refresh frequency.
The first display area and the second display area comprise a plurality of rows of grid lines; wherein the gate lines of the first partial region of at least one of the first display regions are supplied with driving signals by the first clock signal line of at least one via the first gate driving unit of at least one; the gate lines of the second partial region of at least one of the first display regions are supplied with driving signals by the second clock signal line of at least one via the second gate driving unit of at least one. Wherein the gate lines of the third partial region of at least one of the second display regions are supplied with driving signals by the first clock signal line of at least one via the first gate driving unit of at least one; the grid line of the fourth partial area of at least one of the second display areas is provided with a driving signal by a second clock signal line of at least one through a second grid driving unit of at least one; the signal lines of a certain frame of the first clock signal lines are locally different from the signal lines of another frame, and the signal lines of a certain frame of the second clock signal lines are locally different from the signal lines of another frame.
Specifically, as an alternative implementation manner in this embodiment, the signal line of a certain frame of the first clock signal line is different from the signal line of a corresponding frame of the second clock signal line.
Specifically, as an alternative implementation manner in this embodiment, a first signal line that supplies a driving signal to a portion of the gate lines of the first display area in one frame of the first clock signal line is the same as or different from a second signal line that supplies a driving signal to a portion of the gate lines of the first display area in another frame of the first clock signal line; the first clock signal line has a third signal line for supplying a driving signal to a part of the gate lines of the second display region in one frame, and the second clock signal line has a fourth signal line for not supplying a driving signal to a part or all of the gate lines of the second display region in the other frame.
Specifically, as an alternative implementation manner in this embodiment, a fifth signal line that supplies a driving signal to a part of the gate lines of the first display area in one frame of the second clock signal line is the same as or different from a sixth signal line that supplies a driving signal to a part of the gate lines of the first display area in another frame of the second clock signal line; the second clock signal line has a seventh signal line for supplying no driving signal to a part or all of the gate lines of the second display region in one frame, and has an eighth signal line for supplying a driving signal to a part of the gate lines of the second display region in the other frame.
Specifically, as an alternative implementation manner in this embodiment, the first signal line of a certain frame of the first clock signal line and the fifth signal line of a corresponding frame of the second clock signal line are combined to provide a driving signal to the gate line of the first display area, and the third signal line of a certain frame of the first clock signal line and the eighth signal line of another frame of the second clock signal line are combined to provide a driving signal to the gate line of the second display area.
In the first embodiment, the 1 st, 3, 5, 7, and 9 th gate lines correspond to the gate lines of the first partial region of the first display region, and the 2 nd, 4 th, 6 th, 8 th, and 10 th gate lines correspond to the gate lines of the second partial region of the first display region, as shown in fig. 2. The 11 th, 13, 15, 17 and 19 th grid lines correspond to the grid lines of the third partial area of the second display area, and the 12 th, 14, 16, 18 and 20 th grid lines correspond to the grid lines of the fourth partial area of the second display area.
As shown in fig. 4, the first clock ck_l control end sends out the first clock signal line, and the 1 st, 3 rd, 5 th, 7 th and 9 th gate lines are turned on to perform data writing in a certain frame and another frame through the first gate driving unit; the CK_L clock control end sends out a first clock signal line to enable 11 th, 13 th, 15 th, 17 th and 19 th grid lines to be opened in the frame for data writing; in another frame, the 11 th, 13 th, 15 th, 17 th and 19 th gate lines have no driving signals.
The CK_R clock control end sends out a second clock signal line, and the 2 nd, 4 th, 6 th, 8 th and 10 th grid lines are opened through a second grid driving unit in a certain frame to carry out data writing; the 12 th, 14 th, 16 th, 18 th, 20 th gate lines have no driving signals in the frame. The second clock CK_R control end sends out a second clock signal line, and the second grid driving unit enables the 2 nd grid line, the 4 th grid line, the 6 th grid line, the 8 th grid line, the 10 th grid line, the 12 th grid line, the 14 th grid line, the 16 th grid line, the 18 th grid line and the 20 th grid line to be opened for data writing in another frame.
As can be seen from the above, in the two frames, the first display area corresponding to the 1 st to 10 th rows of gate lines is written with data twice, i.e. the first display area is refreshed every frame. And writing a part of data into a first frame by a second display area corresponding to the 11 th-20 th row grid lines, and writing the rest of data into the second frame, wherein the two parts of data form a complete display picture. Thus, the second display area is refreshed once over two frames. The refresh times of the first display region in some two or more frames are different from the refresh times of the second display region in the corresponding two or more frames. The scheme of the application comprehensively realizes that the first display area has higher refreshing frequency and the second display area has lower refreshing frequency, so that the refreshing frequencies of different display areas of the multi-area multi-frequency display device are different, the display area with higher refreshing frequency is suitable for competitive games or videos, and the display area with lower refreshing frequency is suitable for text reading or picture viewing and the like.
The first gate driving unit and the second gate driving unit may be GOA driving units, and the GOA driving units may be GOA driving circuits as shown in fig. 7.
In a second embodiment, as shown in fig. 5, the multi-region multi-frequency display device includes at least two first clock signal lines and at least two second clock signal lines, where signal lines of corresponding frames of the two first clock signal lines are different; the signal lines of the corresponding frames of the two second clock signal lines are not identical. As shown in fig. 5, two first clock signal lines are respectively sent out by the ck1_l clock control terminal and the ck2_l clock control terminal; the CK1_R clock control end and the CK2_R clock control end respectively send out two second clock signal lines.
Specifically, as an alternative implementation manner in this embodiment, two first clock signal lines provide driving signals to part of the gate lines of the second display area in a certain frame, and two first clock signal lines do not provide driving signals to part or all of the gate lines of the second display area in another frame.
Specifically, as an alternative implementation manner in this embodiment, two second clock signal lines provide no driving signals to part or all of the gate lines of the second display area in one frame, and two second clock signal lines provide driving signals to part of the gate lines of the second display area in another frame.
Specifically, as an alternative implementation manner in this embodiment, one first clock signal line provides a driving signal to a part of the gate lines of the second display area in a certain frame, and the first clock signal line does not provide a driving signal to a part or all of the gate lines of the second display area in another frame; the other first clock signal line does not provide a driving signal to part or all of the gate lines of the second display area in the corresponding frame; the other first clock signal line supplies a driving signal to a portion of the gate lines of the second display region in another corresponding frame.
As shown in fig. 5, in a certain frame, the combination of the first clock signal line sent by the ck1_l clock control terminal and the first clock signal line sent by the ck2_l clock control terminal sequentially turns on the 1 st, 3 rd, 5 th, 7 th, 9 th, 11 th, 13 th, 15 th, 17 th and 19 th gate lines for writing data; the second clock signal line sent by the CK1_R clock control end and the second clock signal line sent by the CK2_R clock control end are combined to enable the 2 nd, 4 th, 6 th, 8 th and 10 th grid lines to be opened in sequence for data writing; the 12 th, 14 th, 16 th, 18 th, 20 th gate lines have no driving signals in the frame.
In another frame, the first clock signal line sent by the CK1_L clock control end and the first clock signal line sent by the CK2_L clock control end are combined to enable the 1 st, 3 rd, 5 th, 7 th and 9 th grid lines to be opened in sequence for data writing; the 11 th, 13 th, 15 th, 17 th and 19 th grid lines have no driving signals. The combination of the second clock signal line sent by the ck1_r clock control end and the second clock signal line sent by the ck2_r clock control end sequentially enables the 2 nd, 4 th, 6 th, 8 th, 10 th, 12 th, 14 th, 16 th, 18 th and 20 th grid lines to be opened for data writing.
In the second embodiment, in the two frames, the first display area corresponding to the 1 st to 10 th rows of gate lines is written with data twice, that is, the first display area is refreshed in each frame. The second display area corresponding to the 11 th-20 th row gate lines writes some of the data in the first frame, and the second frame writes the rest of the data, so that the second display area is refreshed once after two frames. The refresh times of the first display area in two or more frames are different from the refresh times of the second display area in two or more frames corresponding to the first display area, so that the effect that the refresh frequencies of different display areas of the display panel are different is achieved.
In the third embodiment, as shown in fig. 6, the difference between the third embodiment and the second embodiment is that one second clock signal line provides a driving signal to a part of the gate lines of the second display area in a certain frame, and the second clock signal line does not provide a driving signal to a part or all of the gate lines of the second display area in another frame; the other second clock signal line does not provide a driving signal to part or all of the gate lines of the second display region in a certain frame; the other second clock signal line supplies a driving signal to a part of the gate lines of the second display region in another frame.
As shown in fig. 6, in a certain frame, the combination of the first clock signal line sent by the ck1_l clock control terminal and the first clock signal line sent by the ck2_l clock control terminal sequentially enables the 1 st, 3 rd, 5 th, 7 th, 9 th, 13 th and 17 th gate lines to be turned on for data writing; the second clock signal line sent by the CK1_R clock control end and the second clock signal line sent by the CK2_R clock control end are combined to enable the 2 nd, 4 th, 6 th, 8 th, 10 th, 14 th and 18 th grid lines to be opened in sequence for data writing; the 11 th, 12 th, 15 th, 16 th, 19 th, 20 th gate lines have no driving signal in the frame.
As shown in fig. 6, in another frame, the combination of the first clock signal line sent by the ck1_l clock control terminal and the first clock signal line sent by the ck2_l clock control terminal sequentially turns on the 1 st, 3 rd, 5 th, 7 th, 9 th, 11 th, 15 th, and 19 th gate lines for data writing. The second clock signal line sent by the ck1_r clock control end and the second clock signal line sent by the ck2_r clock control end are combined in sequence to enable the 2 nd, 4 th, 6 th, 8 th, 10 th, 12 th, 16 th and 20 th grid lines to be opened for data writing. The 13 th, 14 th, 17 th, 18 th gate lines have no driving signal in the frame.
In the third embodiment, in the two frames, the first display area corresponding to the 1 st to 10 th rows of gate lines is written with data twice, that is, the first display area is refreshed in each frame. The second display area corresponding to the 11 th-20 th row gate lines writes some of the data in the first frame, and the second frame writes the rest of the data, so that the second display area is refreshed once after two frames. The refresh times of the first display area in two or more frames are different from the refresh times of the second display area in two or more frames corresponding to the first display area, so that the effect that the refresh frequencies of different display areas of the display panel are different is achieved.
The same can also adjust the driving time sequence of the second clock signal line and the second clock signal line to display the screen in multiple areas and multiple frequencies, but the display is not limited to the two display areas shown in the text, and the description is omitted here. It should be noted that, in this document, the technical features in each alternative may be combined to form a solution, so long as they are not contradictory, and all such solutions are within the scope of the disclosure of the present application. Relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and each embodiment is mainly described in a different manner from other embodiments, so that identical and similar parts between the embodiments are referred to each other. The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.