CN115360897B - Airborne DC-DC filtering current suppression device - Google Patents

Abstract

The invention discloses an airborne DC-DC filtering current suppression device, which comprises a peak suppression circuit, an anti-reverse connection protection circuit, a current suppression circuit, a common-mode filter circuit, a differential-mode filter circuit and an enabling control circuit, wherein the peak suppression circuit is connected with the anti-reverse connection protection circuit, the output end of the anti-reverse connection protection circuit is respectively connected with the current suppression circuit and the enabling control circuit, and the current suppression circuit, the common-mode filter circuit and the differential-mode filter circuit are sequentially connected. The invention can effectively prevent the equipment from being burnt down due to the reverse connection of the power supply through the reverse connection prevention protection circuit. The current suppression circuit realizes effective suppression of starting surge current through MOS (metal oxide semiconductor) tube parallel suppression resistors on a bus return wire. The common mode filter circuit and the differential mode filter circuit play a good role in power supply ripple suppression by adopting the three-stage filter circuit, and provide electromagnetic compatibility protection.

Description

Airborne DC-DC filtering current suppression device

Technical Field

The invention relates to the technical field of airborne switching power supplies, in particular to an airborne DC-DC filtering current suppression device.

Background

As is well known, because airborne equipment flies along with an airplane, long-term operation in special environments such as noise, vibration and the like takes long-term stability and reliability of a whole system into consideration, and the airborne equipment has the characteristics of small size, low power consumption, small influence on other parts and the like as far as possible.

When the power supply is started, because the initial voltage on the capacitor is zero, the capacitor can form a large surge current at the charging moment, in particular to a switching power supply of a high-power load. The surge current can impact a power supply system of the whole machine, and in severe cases, the system can not be normally powered on or work normally, so that the whole system is halted, communication is stopped, and equipment can be seriously damaged.

Disclosure of Invention

The invention aims to provide an onboard DC-DC filtering current suppression device, which solves the technical problem that the system cannot be normally powered on due to impact of large surge current generated by an existing onboard product during power-on a power supply system of the whole machine through a current suppression circuit in the device.

In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:

the onboard DC-DC filtering current suppression device comprises a peak suppression circuit, an anti-reverse connection protection circuit, a current suppression circuit, a common-mode filter circuit, a differential-mode filter circuit and an enabling control circuit, wherein the peak suppression circuit is connected with the anti-reverse connection protection circuit, the output end of the anti-reverse connection protection circuit is respectively connected with the current suppression circuit and the enabling control circuit, and the current suppression circuit, the common-mode filter circuit and the differential-mode filter circuit are sequentially connected.

Further, the spike suppression circuit includes a transient suppression diode D1 connected between the input power source Vi + terminal and the Vi-terminal.

Further, the reverse connection prevention protection circuit comprises a diode D2, an anode of the diode D2 is connected to the spike suppression circuit, and a cathode of the diode D2 is used as an anode output end of the reverse connection prevention protection circuit and is connected to the current suppression circuit.

Further, the current suppression circuit comprises a triode Q1, a MOS transistor Q2, a voltage regulator tube Z1, a diode D3, a diode D4, a current limiting resistor R1, a current limiting resistor R2, a resistor R4, a resistor R5, a suppression resistor 2RS1, a capacitor CS, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C12 and a triode Q1A; the MOS tube Q2 is connected with one end of a capacitor C12, one end of a resistor R4, one end of a capacitor C10, a collector of a triode 1Q1A, one end of a capacitor C9 and one end of a capacitor C8 in sequence, a common end of the connection is connected with one end of a current-limiting resistor R2 and an anode of a diode D3, a pin 3 of the MOS tube Q2 is connected with one end of a parallel circuit composed of a suppression resistor 2RS and a suppression resistor 2RS1, the other end of the capacitor C10, the other end of the capacitor C9, the other end of the capacitor C8, an anode of a voltage-stabilizing tube Z1 and one end of a capacitor CS in sequence, and the common end of the connection is used as a negative electrode input end of a current suppression circuit and is connected with an anti-reverse connection protection circuit and an emitting stage of the triode 1Q1A; the pin 2 of the MOS tube Q2 is sequentially connected with the other end of a parallel circuit consisting of a suppression resistor 2RS and a suppression resistor 2RS1 and one end of a resistor R5, and the connected common end is used as the negative output end of the current suppression circuit and is connected with the common mode filter circuit; the cathode of the voltage stabilizing tube Z1 is connected with one end of a current limiting resistor R1, the base of a triode Q1 and the other end of a capacitor CS together, the other end of the current limiting resistor R1 is connected with the collector of the triode Q1, and the common end of the connection is connected with the anode output end of an anti-reverse connection protection circuit, the input end of a common mode filter circuit and the input end of an enabling control circuit together; the emitting electrode of the triode Q1 is sequentially connected with the cathode of the diode D3, the other end of the current-limiting resistor R2 and the enabling control circuit, the other end of the resistor R5 is connected with the anode of the diode D4, the cathode of the diode D4 is respectively connected with the other end of the capacitor C12 and the other end of the resistor R4, and the common end of the connection is connected with the base level of the triode Q1A.

Further, the enable control circuit comprises a current-limiting resistor R6A, a voltage regulator tube Z2, a capacitor C16, a resistor R6, a resistor R7, a capacitor C13, a capacitor C15, a resistor R9, a resistor R8, a resistor R10, an operational amplifier 2U4, a diode D7, a resistor R11, a resistor R12, a capacitor C17, an MOS tube Q7, a resistor R13, a resistor R14, a capacitor C27, a resistor R15 and a triode Q6; one end of the current-limiting resistor R6A is commonly connected with the current suppression circuit and one end of the resistor R6 by +10V, the other end of the current-limiting resistor R6A is commonly connected with the cathode of the voltage-stabilizing tube Z2, one end of the capacitor C16 and the 5 pins of the operational amplifier 2U4, and the anode of the voltage-stabilizing tube Z2 is commonly connected with the Vi-end of the input power supply and the other end of the capacitor C16; one end of the capacitor C13 is sequentially connected with one end of the resistor R7, one end of the capacitor C15, one end of the resistor R8, the pin 2 of the operational amplifier 2U4, one end of the resistor R12, one end of the capacitor C17, the pin 3 of the MOS transistor Q7, one end of the resistor R14, one end of the capacitor C27 and the emitter of the triode Q6, a public end of the connection is connected with an input power Vi-end, and the other end of the resistor R6 is sequentially connected with the other end of the capacitor C13, the other end of the resistor R7 and the pin 4 of the operational amplifier 2U 4; the other end of the capacitor C15 is sequentially connected with the other end of the resistor R8, one end of the resistor R9, one end of the resistor R10 and the pin 3 of the operational amplifier 2U 4; the other end of the resistor R9 is sequentially connected with the positive electrode output end of the reverse-connection prevention protection circuit, the input end of the current suppression circuit, one end of the resistor R13 and one end of the resistor R15, the other end of the resistor R10 is sequentially connected with a pin 1 of the operational amplifier 2U4, the cathode of the diode D7, one end of the resistor R11 and the other end of the resistor R12, and the anode of the diode D7 is sequentially connected with the other end of the resistor R11, the other end of the C17 and a pin 1 of the MOS transistor Q7; the other end of the resistor R13 is sequentially connected with a pin 2 of the MOS transistor Q7, the other end of the resistor R14, the other end of the capacitor C27 and a pin 1 of the triode Q6, and the other end of the resistor R15 is connected with a pin 3 and an EN end of the triode Q6.

Further, the common mode filter circuit comprises an inductor L1, a capacitor CY3, a capacitor CY5, a capacitor C2, a capacitor CY4, a capacitor CY6, an inductor L2, a capacitor C3 and a capacitor C4 which are connected in sequence, wherein the end a of the inductor L1 is connected with the positive output end of the current suppression circuit and one end of the capacitor CY3 in common, the end B of the inductor L1 is connected with the negative output end of the current suppression circuit and one end of the capacitor CY5 in common, the end C of the inductor L1 is connected with one end of the capacitor C2 and one end of the capacitor CY6 and the end F of the inductor L2 in common, the end D of the inductor L1 is connected with the other end of the capacitor C2 and one end of the capacitor CY4 and the end E of the inductor L2 in common, and the other end of the capacitor CY3 is connected with the other end of the capacitor CY4 and grounded in common; the other end of the capacitor CY5 is connected with the other end of the capacitor CY6 and is grounded together; the H end of the inductor L2 is sequentially connected with one end of the capacitor C3, one end of the capacitor C4 and the negative input end of the differential mode filter circuit, and the G end of the inductor L2 is sequentially connected with the other end of the capacitor C3, the other end of the capacitor C4 and the positive input end of the differential mode filter circuit.

Further, the differential mode filter circuit comprises an inductor L3, an inductor L4, a capacitor CY7, a capacitor CY8 and a capacitor C5; one end of the inductor L3 is connected to the positive output end of the common mode filter circuit, the other end of the inductor L3 is connected to one end of the capacitor CY7 and one end of the capacitor C5, and the connection end serves as the positive output end of the differential mode filter circuit; the other end of the capacitor CY7 is connected with the shell ground, one end of the inductor L4 is connected with the negative electrode output end of the common mode filter circuit, the other end of the inductor L4 is connected with one end of the capacitor CY8 and the other end of the capacitor C5 together, the connecting end serves as the negative electrode output end of the differential mode filter circuit, and the other end of the capacitor CY8 is connected with the shell ground.

Compared with the prior art, the invention has the following technical effects:

1. by designing the reverse connection prevention protection circuit on the front end positive line, the device can be effectively prevented from being burnt down due to the reverse connection of the power supply.

2. The current suppression circuit realizes effective suppression of starting surge current through the 2-pin and 3-pin parallel connection suppression resistor of the MOS tube Q2 on the bus return wire.

3. The common mode filter circuit and the differential mode filter circuit play a good role in power supply ripple suppression by adopting a three-stage filter circuit consisting of a 2-stage common mode filter circuit and a 1-stage differential mode circuit, and provide electromagnetic compatibility protection.

4. The function is realized by integrating the three functions of current suppression, filter and enable control, the filter function meets the requirement in the GJB151A, and the current suppression meets the requirement in the GJB 181A. The invention can greatly reduce the area of the printed board occupied by the product, reduce the scale of the protective circuit, resist the interference of various external factors, and has low cost and wide application prospect.

5. All the used devices are universal domestic devices, and the device has the advantages of high autonomous controllable degree, stable and reliable shelf life and wide application.

Drawings

Fig. 1 is a block diagram of an onboard DC-DC filtering current suppression device according to the present invention;

fig. 2 is a circuit diagram of a spike suppression circuit.

Fig. 3 is a circuit diagram of the reverse-connection prevention protection circuit.

Fig. 4 is a circuit diagram of a current suppressing circuit.

Fig. 5 is a circuit diagram of an enable control circuit.

Fig. 6 is a circuit diagram of a common mode filter circuit.

Fig. 7 is a circuit diagram of a differential mode filter circuit.

Detailed Description

For further understanding of the contents, features and effects of the present invention, the following detailed description is given in conjunction with the embodiments with the accompanying drawings as follows:

referring to fig. 1, the onboard DC-DC filtering current suppression device of the present invention includes a peak suppression circuit, an anti-reverse connection protection circuit, a current suppression circuit, a common mode filter circuit, a differential mode filter circuit, and an enable control circuit, wherein the peak suppression circuit is connected to the anti-reverse connection protection circuit, an output end of the anti-reverse connection protection circuit is respectively connected to the current suppression circuit and the enable control circuit, and the current suppression circuit, the common mode filter circuit, and the differential mode filter circuit are sequentially connected.

In the technical scheme, the input end of the peak suppression circuit is connected with the direct-current power supply, the peak suppression circuit is used for suppressing the peak voltage on a direct-current power supply bus within the safe working range of a post-stage circuit, the peak suppression circuit can suppress the peak voltage exceeding 400V on the bus to be about 53V, and the positive end and the negative end of the suppressed direct-current voltage are used as the positive output end and the negative output end of the peak suppression circuit and input into the reverse-connection prevention protection circuit.

The input end of the reverse connection prevention protection circuit is connected with the output end of the peak suppression circuit, the reverse connection prevention protection circuit is used for reverse connection prevention protection, and direct current voltage passing through the reverse connection prevention circuit is respectively output to the current suppression circuit and the enabling control circuit after the reverse connection prevention protection circuit prevents the rear-stage equipment from being burnt due to the fact that the power supply is connected inversely.

The input end of the current suppression circuit is connected with the output end of the anti-reverse connection protection circuit, the current suppression circuit is used for suppressing surge current generated at the moment of starting the power supply and at the moment of charging the capacitor, and direct-current voltage passing through the current suppression circuit is output to the common-mode filter circuit.

The input end of the enabling control circuit is connected with the output end of the anti-reverse connection protection circuit, the enabling control circuit is mainly used for controlling the rear-stage DC/DC module, the rear-stage DC/DC module is started in a delayed mode, and direct-current voltage passing through the enabling control circuit is output to the common-mode filter circuit.

The input end of the common mode filter circuit is connected with the output end of the current suppression circuit, the common mode filter circuit is mainly used for suppressing common mode interference signals generated on a power bus to ensure that an electromagnetic compatibility test of a complete machine product passes, and direct current voltage passing through the common mode filter circuit is output to the differential mode filter circuit.

The input end of the differential mode filter circuit is connected with the output end of the common mode filter circuit, and the differential mode filter circuit is used for inhibiting differential mode interference signals generated on a power bus to ensure that an electromagnetic compatibility test of a whole machine product passes.

Referring to fig. 2, as a preferred implementation of the present invention, the spike suppression circuit includes a transient suppression diode D1 connected between the input power Vi + terminal and the Vi-terminal; the transient suppression diode D1 is used for suppressing the peak voltage of direct current input on the input power supply bus, and the suppressed direct current voltage is used as the positive output end and the negative output end of the peak suppression circuit to be connected with the reverse connection prevention protection circuit. Wherein, the transient suppression diode D1 adopts XNT6A51SK of Liaoning Kenuo.

Referring to fig. 3, the reverse connection prevention protection circuit includes a diode D2, an anode of the diode D2 is connected to a positive output terminal Vi + of the spike suppression circuit, and a cathode of the diode D2 is used as a positive output terminal Vin + of the reverse connection prevention protection circuit and is connected to a positive input terminal of the current suppression circuit; the negative output end of the peak suppression circuit is simultaneously used as the negative output end of the reverse connection prevention protection circuit; wherein, the diode D2 adopts SL10T100 of Liaoning core Nuo.

Referring to fig. 4, the current suppression circuit includes a transistor Q1, a MOS transistor Q2, a voltage regulator Z1, a diode D3, a diode D4, a current limiting resistor R1, a current limiting resistor R2, a resistor R4, a resistor R5, a suppression resistor 2RS1, a capacitor CS, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C12, and a transistor 1Q1A; the device comprises a MOS tube Q2, a resistor R4, a capacitor C10, a triode 1Q1A, a current limiting resistor R2, a diode D3, a current suppressing resistor 2RS and a suppressing resistor 2RS1, wherein a pin 1 of the MOS tube Q2 is sequentially connected with one end of a capacitor C12, one end of a resistor R4, one end of a capacitor C10, and one end of a capacitor C8, the common end of the connection is connected with one end of the current limiting resistor R2 and the anode of the diode D3, a pin 3 of the MOS tube Q2 is sequentially connected with one end of a parallel circuit composed of the suppressing resistor 2RS and the suppressing resistor 2RS1, the other end of the capacitor C10, the other end of the capacitor C9, the other end of the capacitor C8, the anode of a voltage stabilizing tube Z1 and one end of a capacitor CS, and the common end of the connection is used as the negative input end of the current suppressing circuit and is connected with the negative output end Vi-of the reverse connection preventing protection circuit and the emitter of the triode 1Q 1A. The 2 feet of the MOS tube Q2 are sequentially connected with the other end of a parallel circuit consisting of a suppression resistor 2RS and a suppression resistor 2RS1 and one end of a resistor R5, and the connected common end is used as the negative electrode output end of the current suppression circuit and is connected with the common mode filter circuit. The cathode of the voltage stabilizing tube Z1 is connected with one end of a current limiting resistor R1, the base of the triode Q1 and the other end of the capacitor CS together, the other end of the current limiting resistor R1 is connected with the collector of the triode Q1, and the common end of the connection is connected with the anode output end Vin + of the reverse connection prevention protection circuit, the input end Vin + of the common mode filter circuit and the input end Vin + of the enabling control circuit together. The emitting electrode of the triode Q1 is sequentially connected with the cathode of the diode D3, the other end of the current-limiting resistor R2 and the enabling control circuit, the other end of the resistor R5 is connected with the anode of the diode D4, the cathode of the diode D4 is respectively connected with the other end of the capacitor C12 and the other end of the resistor R4, and the common end of the connection is connected with the base level of the triode Q1A. The capacitor C8, the capacitor C9 and the capacitor C10 are charged through the current-limiting resistor R2, the conduction of the MOS transistor Q2 is delayed, and therefore starting current spikes are restrained.

The capacitance values of the capacitor C8, the capacitor C9 and the capacitor C10 are 2.2uf/50V, the resistance value of the current-limiting resistor R2 is 30K omega, the capacitance values of the diode D3 and the diode D4 are 2DK4148S2P of a Jinan semiconductor, the resistance value of the MOS transistor Q2 is LN10N004SJ, the resistance values of the suppression resistor 2RS and the suppression resistor 2RS1 are 50 omega, the capacitance values of the capacitor C12 and the capacitor CS are 0.1uf/50V, the resistance value of the resistor R5 is 10K omega, the resistance value of the resistor R4 is 1K omega, the triode 1Q1A selects 3DK624S1P of the Jinan semiconductor, the triode Q1 selects 3DK1100SP of the Jinan semiconductor, and the diode Z1 selects 2CW10 UR of the Jinan semiconductor.

Referring to fig. 5, the enable control circuit includes a current-limiting resistor R6A, a voltage regulator tube Z2, a capacitor C16, a resistor R6, a resistor R7, a capacitor C13, a capacitor C15, a resistor R9, a resistor R8, a resistor R10, an operational amplifier 2U4, a diode D7, a resistor R11, a resistor R12, a capacitor C17, a MOS transistor Q7, a resistor R13, a resistor R14, a capacitor C27, a resistor R15, and a transistor Q6; one end of a current limiting resistor R6A is connected with the current suppression circuit and one end of the resistor R6 together by +10V, the other end of the current limiting resistor R6A is connected with the cathode of a voltage stabilizing tube Z2, one end of a capacitor C16 and a pin 5 of an operational amplifier 2U4 together, and the anode of the voltage stabilizing tube Z2 is connected with the input power Vi-end and the other end of the capacitor C16 together. One end of a capacitor C13 is sequentially connected with one end of a resistor R7, one end of a capacitor C15, one end of a resistor R8, 2 pins of an operational amplifier 2U4, one end of a resistor R12, one end of a capacitor C17, 3 pins of an MOS (metal oxide semiconductor) transistor Q7, one end of a resistor R14, one end of a capacitor C27 and an emitting electrode of a triode Q6, a public end of the connection is connected with a Vi-end of an input power supply, and the other end of the resistor R6 is sequentially connected with the other end of the capacitor C13, the other end of the resistor R7 and 4 pins of the operational amplifier 2U 4. The other end of the capacitor C15 is connected with the other end of the resistor R8, one end of the resistor R9, one end of the resistor R10 and the pin 3 of the operational amplifier 2U4 in sequence. The other end of the resistor R9 is sequentially connected with the positive output end Vin + of the reverse-connection prevention protection circuit, the input end of the current suppression circuit, one end of the resistor R13 and one end of the resistor R15, the other end of the resistor R10 is sequentially connected with the pin 1 of the operational amplifier 2U4, the cathode of the diode D7, one end of the resistor R11 and the other end of the resistor R12, and the anode of the diode D7 is sequentially connected with the other end of the R11, the other end of the C17 and the pin 1 of the MOS transistor Q7. The other end of the resistor R13 is sequentially connected with a pin 2 of the MOS transistor Q7, the other end of the resistor R14, the other end of the capacitor C27 and a pin 1 of the triode Q6, and the other end of the resistor R15 is connected with a pin 3 and an EN end of the triode Q6.

The resistance value of the current-limiting resistor R6A is 3K omega, the voltage-stabilizing value of the voltage-stabilizing tube Z2 is 10V, the capacitance values of the capacitor C16, the capacitor C13, the capacitor C15 and the capacitor C27 are all 0.1uf/50V, and the capacitance value of the capacitor C17 is 4.7uf/50V; the resistance values of the resistor R6 and the resistor R7 are 4.7 Komega, the resistance value of the resistor R8 is 22 Komega, the resistance value of the resistor R9 is 10 Komega, the resistance value of the resistor R10 is 200 Komega, the resistance value of the resistor R11 is 200 Komega, the resistance value of the resistor R12 is 10 Komega, the resistance values of the resistor R13, the resistor R15 and the resistor R14 are 10 Komega, the diode D7 is 2DK4148S2P of a Jinan semiconductor, the operational amplifier 2U4 is SGM8541XN5, the MOS transistor Q7 is LY 7002S1P of the Jinan semiconductor, and the triode Q6 is BT5551 of Yonghua.

Referring to fig. 6, the common mode filter circuit includes an inductor L1, a capacitor CY3, a capacitor CY5, a capacitor C2, a capacitor CY4, a capacitor CY6, an inductor L2, a capacitor C3, and a capacitor C4, which are connected in sequence, wherein an a terminal of the inductor L1 is connected to a positive output terminal of the current suppression circuit and one terminal of the capacitor CY3 in common, a B terminal of the inductor L1 is connected to a negative output terminal of the current suppression circuit and one terminal of the capacitor CY5 in common, a C terminal of the inductor L1 is connected to one terminal of the capacitor C2, one terminal of the capacitor CY6 and an F terminal of the inductor L2 in common, a D terminal of the inductor L1 is connected to the other terminal of the capacitor C2, one terminal of the capacitor CY4 and an E terminal of the inductor L2 in common, and the other terminal of the capacitor CY3 is connected to the other terminal of the capacitor CY4 and is grounded in common; the other end of the capacitor CY5 is connected with the other end of the capacitor CY6 and is grounded together; the H end of the inductor L2 is sequentially connected with one end of the capacitor C3, one end of the capacitor C4 and the negative input end of the differential mode filter circuit, and the G end of the inductor L2 is sequentially connected with the other end of the capacitor C3, the other end of the capacitor C4 and the positive input end of the differential mode filter circuit.

The capacitor C2, the capacitor C3 and the capacitor C4 are all differential mode capacitors. The differential mode capacitor is a capacitor connected between the lines in parallel and used for filtering differential mode noise. In principle, the larger the differential mode capacitance value is, the better the filtering effect is, and the filtering effect is mainly reflected on low frequency. However, the cost and volume of the capacitor are increased due to the increase of the differential mode capacitance value, and in actual selection, large capacitance cannot be pursued at one step, so that the performance, cost and volume are considered comprehensively, and the differential mode capacitor with higher selective price ratio is required.

The capacitor CY3, the capacitor CY4, the capacitor CY5 and the capacitor CY6 are common-mode capacitors. The common mode capacitor is connected with the power line at one end and the shell at the other end, and is used for improving the performance of common mode suppression in the circuit, so that the common mode noise can be bypassed (because the common mode noise is very high frequency, the capacitor is short-circuited for high frequency, so that the noise is removed from the capacitor), and the interference on the later-stage electric equipment is suppressed because the common mode noise is bypassed.

The inductor L1 and the inductor L2 are common mode chokes (i.e., common mode inductors). The value of the common mode choke coil is 1.5-5mH, the most important part in the design of the filter is the common mode choke coil, the common mode choke coil has high inductance value and small volume, and the common mode choke coil is a main tool for inhibiting common mode interference signals. The common mode choke is formed by winding coils with the same number of turns and opposite winding directions on an upper half ring and a lower half ring of a ferrite magnetic ring respectively. An ideal common mode choke attenuates the common mode current only and has no effect on the desired differential mode signal or power. However, in actual winding, the upper and lower coils cannot be identical, so that the common mode choke always has some leakage inductance, and thus some attenuation is caused to the differential mode signal. It is also for this reason that the common mode choke can provide both common mode and differential mode filtering. However, the leakage inductance acting on the differential mode cannot be too large, since it would saturate the choke. If the differential mode attenuation is insufficient, the filter is matched with a differential mode filter for use. The common mode choke coil has weak interference signals and works near the initial magnetic conductivity, and the calculation method of the common mode inductance shows that the improvement of the number of turns of the coil, the initial magnetic conductivity of the magnetic material and the effective sectional area of the magnetic ring is an effective way for improving the inductance value, wherein the improvement of the number of turns is most effective. The common mode filter circuit has the function of attenuating frequency signals exceeding the standard by means of fluctuations such as distortion on a power bus and interference signals, and can enable power EMI filtering to meet the requirements of electromagnetic compatibility tests such as electrostatic discharge of CE102, CE107, CS101, CS106, CS114, CS115, CS116, RE102 and RS103 during the electromagnetic compatibility test.

Referring to fig. 7, the differential mode filter circuit includes an inductor L3, an inductor L4, a capacitor CY7, a capacitor CY8, and a capacitor C5; one end of the inductor L3 is connected with the anode output end of the common mode filter circuit, the other end of the inductor L3 is connected with one end of the capacitor CY7 and one end of the capacitor C5 together, and the connecting end is used as the anode output end Vo + of the differential mode filter circuit and is used for connecting the DC/DC module applied by the invention; the other end of the capacitor CY7 is connected with a shell ground, one end of the inductor L4 is connected with a negative electrode output end of the common mode filter circuit, the other end of the inductor L4 is connected with one end of the capacitor CY8 and the other end of the capacitor C5 together, the connecting end is used as a negative electrode output end Vo-of the differential mode filter circuit and is used for being connected with the DC/DC module applied by the invention, and the other end of the capacitor CY8 is connected with the shell ground.

The inductor L3 and the inductor L4 are differential mode chokes (i.e., differential mode inductors), and the differential mode chokes mainly function to suppress differential mode noise. In the design of an EMI power filter, in order to improve the suppression capability of differential mode noise, a differential mode choke coil and a differential mode capacitor are often used to form an L-type, T-type, ii-type, or other filter circuit. The differential mode inductor is connected in series in the filter circuit and has a small impedance to low-frequency alternating current signals and a large impedance to high-frequency noise. The most difference from the common mode inductor is that the differential mode inductor is directly connected in series with the load and is wound by using a single winding structure, unlike the common mode choke coil which uses two identical windings on one magnetic core. Therefore, when the current passing through the differential mode choke coil is too large, magnetic saturation occurs, and the inductance also decreases, thereby losing the filtering effect.

The capacitor CY7 and the capacitor CY8 are both common-mode capacitors, one end of each common-mode capacitor is connected to a power line, and the other end of each common-mode capacitor is connected to a housing end, so that the common-mode capacitors can bypass common-mode noise (the common-mode noise is very high frequency, and the capacitors are short-circuited for high frequency, so that noise is removed from the capacitors), and the interference on the later-stage electric equipment is suppressed because the common-mode noise is bypassed.

The working principle of the invention is as follows:

the peak suppression circuit processes the peak high voltage on the direct-current power supply bus; the reverse connection prevention protection circuit protects the safety of the rear-stage circuit and the power receiving equipment when the power supply at the input end is reversely connected; vi of the input end is 28V, after passing through the peak suppression circuit and the reverse connection prevention protection circuit, because the MOS tube Q7 is in a non-conduction state, the +28V enables the collector electrode and the emitter electrode of the triode Q6 to be conducted through the resistor R15, the enabling end of the rear-stage DC/DC module is pulled down, and the output of the rear-stage DC/DC module is limited (the rear-stage DC/DC module is enabled in a delayed mode). +28V generates +10V voltage through a linear voltage stabilizing circuit composed of a current limiting resistor R1, a voltage stabilizing tube Z1, a capacitor CS and a triode Q1, the capacitor C8, the capacitor C9 and the capacitor C10 are charged through the current limiting resistor R2 to play a role of delaying, current at this time passes through a current peak when the suppression resistors 2RS and 2RS1 consume and start on a loop, the voltage from the gate to the source of the MOS tube Q2 reaches an on state for 10V after 50ms delay, the drain of the MOS tube is conducted with the source at this time, and the conduction internal resistance of the MOS tube Q2 is far lower than the resistance of the suppression resistors 2RS and 2RS1, so that the current flows through the drain and the source of the MOS tube Q2.

In the peak suppression circuit, a +10V voltage is generated by a linear voltage stabilizing circuit consisting of a current-limiting resistor R1, a voltage-stabilizing tube Z1 and a capacitor CS triode Q1, a +5V voltage is generated by a resistor R6A, a voltage-stabilizing tube Z2 and a capacitor C16 to supply power to an operational amplifier 2U4, the +10V voltage is divided into 2.5V voltage by a resistor R6 and a resistor R7 and is transmitted to a pin 4 of the operational amplifier 2U4, and the +28V voltage is divided into 2.5V voltage by resistors R9 and R8 and is transmitted to the pin 4 of the operational amplifier 2U 4. When the product is started, the voltage of a pin 3 of an operational amplifier 2U4 is lower than the voltage of a pin 4, the pin 1 outputs a low level, the voltage of the pin 3 reaches 2.5V along with the rise of input voltage, at the moment, the pin 1 outputs a high level, a delay circuit consisting of a resistor R11 and a capacitor C17 drives a drain electrode and a source electrode of an MOS (metal oxide semiconductor) tube Q7 to be conducted after the delay of 70ms, at the moment, a base electrode and an emitting electrode of a triode are conducted, an enabling end of a rear-stage DC/DC module is released, and the product is output.

Compared with the onboard nationwide production DC-DC filtering current suppression device provided by the invention, surge current generated by repeated startup and shutdown can be suppressed, and the used components are all universal domestic components, so that the device is completely autonomous and controllable, high in reliability and wide in application range.

The above description is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be made by those skilled in the art without inventive work within the technical scope of the present invention are included in the scope of the present invention.

Claims (4)

1. The onboard DC-DC filtering current suppression device is characterized by comprising a peak suppression circuit, an anti-reverse connection protection circuit, a current suppression circuit, a common-mode filter circuit, a differential-mode filter circuit and an enabling control circuit, wherein the peak suppression circuit is connected with the anti-reverse connection protection circuit, the output end of the anti-reverse connection protection circuit is respectively connected with the current suppression circuit and the enabling control circuit, and the current suppression circuit, the common-mode filter circuit and the differential-mode filter circuit are sequentially connected;

the peak suppression circuit comprises a transient suppression diode D1 connected between an input power supply Vi + end and a Vi-end;

the reverse connection prevention protection circuit comprises a diode D2, wherein the anode of the diode D2 is connected with the peak suppression circuit, and the cathode of the diode D2 is used as the anode output end of the reverse connection prevention protection circuit and is connected with the current suppression circuit;

the current suppression circuit comprises a triode Q1, an MOS tube Q2, a voltage regulator tube Z1, a diode D3, a diode D4, a current limiting resistor R1, a current limiting resistor R2, a resistor R4, a resistor R5, a suppression resistor 2RS1, a capacitor CS, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C12 and a triode Q1A; the device comprises a triode Q1A, a resistor R4, a capacitor C10, a current limiting resistor R2, a current limiting resistor R3, a resistor R9, a capacitor C8, a pin 1 of the MOS transistor Q2, a pin 3 of the MOS transistor Q2, a pin C9 of the capacitor C8, a pin C1 of the diode D and a pin C9 of the resistor C1, wherein the pin 1 of the MOS transistor Q2 is connected with one end of a capacitor C12, one end of a resistor R4, one end of a capacitor C8, the other end of the capacitor C2, the other end of the capacitor C8, the anode of a voltage stabilizing transistor Z1 and one end of a capacitor CS; the 2 pins of the MOS tube Q2 are connected with the other end of a parallel circuit consisting of a suppression resistor 2RS and a suppression resistor 2RS1 and one end of a resistor R5, and the connected common end is used as the negative electrode output end of the current suppression circuit and is connected with the common mode filter circuit; the cathode of the voltage stabilizing tube Z1 is connected with one end of a current limiting resistor R1, the base of a triode Q1 and the other end of a capacitor CS together, the other end of the current limiting resistor R1 is connected with the collector of the triode Q1, and the common end of the connection is connected with the anode output end of an anti-reverse connection protection circuit, the input end of a common mode filter circuit and the input end of an enabling control circuit together; the emitting electrode of the triode Q1 is connected with the cathode of the diode D3, the other end of the current-limiting resistor R2 and the enabling control circuit, the other end of the resistor R5 is connected with the anode of the diode D4, the cathode of the diode D4 is respectively connected with the other end of the capacitor C12 and the other end of the resistor R4, and the public end of the connection is connected with the base electrode of the triode Q1A.

2. The on-board DC-DC filtering current suppression device according to claim 1, wherein the enable control circuit includes a current limiting resistor R6A, a voltage regulator tube Z2, a capacitor C16, a resistor R6, a resistor R7, a capacitor C13, a capacitor C15, a resistor R9, a resistor R8, a resistor R10, an operational amplifier 2U4, a diode D7, a resistor R11, a resistor R12, a capacitor C17, a MOS transistor Q7, a resistor R13, a resistor R14, a capacitor C27, a resistor R15, and a transistor Q6; one end of the current-limiting resistor R6A is commonly connected with the current suppression circuit and one end of the resistor R6 by +10V, the other end of the current-limiting resistor R6A is commonly connected with the cathode of the voltage-stabilizing tube Z2, one end of the capacitor C16 and the 5 pins of the operational amplifier 2U4, and the anode of the voltage-stabilizing tube Z2 is commonly connected with the Vi-end of the input power supply and the other end of the capacitor C16; one end of the capacitor C13 is connected with one end of the resistor R7, one end of the capacitor C15, one end of the resistor R8, the pin 2 of the operational amplifier 2U4, one end of the resistor R12, one end of the capacitor C17, the pin 3 of the MOS transistor Q7, one end of the resistor R14, one end of the capacitor C27 and the emitter of the triode Q6, the public end of the connection is connected with the Vi-end of the input power supply, and the other end of the resistor R6 is connected with the other end of the capacitor C13, the other end of the resistor R7 and the pin 4 of the operational amplifier 2U 4; the other end of the capacitor C15 is connected with the other end of the resistor R8, one end of the resistor R9, one end of the resistor R10 and the pin 3 of the operational amplifier 2U 4; the other end of the resistor R9 is connected with the anode output end of the reverse-connection prevention protection circuit, the input end of the current suppression circuit, one end of a resistor R13 and one end of a resistor R15, the other end of the resistor R10 is connected with the pin 1 of the operational amplifier 2U4, the cathode of the diode D7, one end of the resistor R11 and the other end of the resistor R12 in sequence, and the anode of the diode D7 is connected with the other end of the resistor R11, the other end of the C17 and the pin 1 of the MOS transistor Q7; the other end of the resistor R13 is connected with a pin 2 of the MOS transistor Q7, the other end of the resistor R14, the other end of the capacitor C27 and a pin 1 of the triode Q6, and the other end of the resistor R15 is connected with a pin 3 and an EN end of the triode Q6.

3. The on-board DC-DC filter current suppression device according to claim 2, wherein the common mode filter circuit includes an inductor L1, a capacitor CY3, a capacitor CY5, a capacitor C2, a capacitor CY4, a capacitor CY6, an inductor L2, a capacitor C3 and a capacitor C4 connected together, wherein an a terminal of the inductor L1 is connected together with a positive output terminal of the current suppression circuit and one terminal of the capacitor CY3, a B terminal of the inductor L1 is connected together with a negative output terminal of the current suppression circuit and one terminal of the capacitor CY5 in turn, a C terminal of the inductor L1 is connected together with one terminal of the capacitor C2, one terminal of the capacitor CY6 and an F terminal of the inductor L2, a D terminal of the inductor L1 is connected together with the other terminal of the capacitor C2, one terminal of the capacitor CY4 and an E terminal of the inductor L2, and the other terminal of the capacitor CY3 is connected to the other terminal of the capacitor CY4 and is connected to the common ground; the other end of the capacitor CY5 is connected with the other end of the capacitor CY6 and is grounded together; the H end of the inductor L2 is connected with one end of the capacitor C3, one end of the capacitor C4 and the negative electrode input end of the differential mode filter circuit, and the G end of the inductor L2 is connected with the other end of the capacitor C3, the other end of the capacitor C4 and the positive electrode input end of the differential mode filter circuit.

4. An on-board DC-DC filtering current suppression device according to claim 3, wherein said differential mode filtering circuit includes an inductor L3, an inductor L4, a capacitor CY7, a capacitor CY8, and a capacitor C5; one end of the inductor L3 is connected to the positive output end of the common mode filter circuit, the other end of the inductor L3 is connected to one end of the capacitor CY7 and one end of the capacitor C5, and the connection end is used as the positive output end of the differential mode filter circuit; the other end of the capacitor CY7 is connected with the shell ground, one end of the inductor L4 is connected with the negative electrode output end of the common mode filter circuit, the other end of the inductor L4 is connected with one end of the capacitor CY8 and the other end of the capacitor C5 together, the connecting end serves as the negative electrode output end of the differential mode filter circuit, and the other end of the capacitor CY8 is connected with the shell ground.

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