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CN115208839A - Data transmission system, method and device - Google Patents

Data transmission system, method and device
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CN115208839A
CN115208839ACN202110378029.3ACN202110378029ACN115208839ACN 115208839 ACN115208839 ACN 115208839ACN 202110378029 ACN202110378029 ACN 202110378029ACN 115208839 ACN115208839 ACN 115208839A
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data frames
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CN115208839B (en
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陈玉杰
郑述乾
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Huawei Technologies Co Ltd
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Abstract

A data transmission system, method and device are used for flexibly realizing service data transmission. The system comprises: at least one source switching network interface circuit, at least one switching device, and a plurality of destination switching network interface circuits. The first source switching network interface circuit maps the first service data flow to a plurality of first data frames, and the destination address field of each first data frame comprises a load balancing domain; sending a plurality of first data frames to a first switching device according to a balancing sequence, wherein one element in the balancing sequence is inserted into a load balancing domain corresponding to each first data frame, the number of the elements in the balancing sequence is related to the number of first connecting channels, and the number of the first connecting channels is the number of the connecting channels between the first switching device and a first destination switching network interface circuit; the first switching equipment sends a plurality of first data frames to a first destination switching network interface circuit; the first destination switching network interface circuit sequences and de-encapsulates the plurality of first data frames to obtain a first service data stream.

Description

Translated fromChinese
一种数据传输系统、方法及装置A data transmission system, method and device

技术领域technical field

本申请涉及通信技术领域,尤其涉及一种数据传输系统、方法及装置。The present application relates to the field of communication technologies, and in particular, to a data transmission system, method and apparatus.

背景技术Background technique

目前,时分复用(time division multiplexing,TDM)类通信设备,例如同步数字体系(synchronous digital hierarchy,SDH)设备或光传输网络(optical transportnetwork,OTN)设备等的交换网绝大部分采用的是专用的交换芯片。例如,专用集成电路(application-specific integrated circuit,ASIC)芯片等。上述TDM通信类设备通过专有的交换芯片来实现TDM类业务交换。专有的交换芯片需要专门定制,投资成本较高。且交换芯片的内部协议是私有化的,各个厂家不能互换,导致设备应用受限,从而不能灵活实现业务数据传输。At present, most of the switching networks of time division multiplexing (TDM) communication equipment, such as synchronous digital hierarchy (SDH) equipment or optical transport network (OTN) equipment, are dedicated switch chip. For example, an application-specific integrated circuit (ASIC) chip and the like. The above-mentioned TDM communication equipment realizes TDM service exchange through a dedicated switching chip. Proprietary switching chips need to be specially customized, and the investment cost is high. In addition, the internal protocol of the switching chip is privatized, and various manufacturers cannot be interchanged, resulting in limited application of the equipment, so that the service data transmission cannot be flexibly realized.

发明内容SUMMARY OF THE INVENTION

本申请提供一种数据传输方法及装置,用以灵活实现业务数据传输。The present application provides a data transmission method and device for flexibly realizing service data transmission.

第一方面,本申请提供了一种数据传输系统。该系统可以包括:至少一个源交换网接口电路、至少一个交换设备和多个目的交换网接口电路。其中,第一源交换网接口电路将第一业务数据流映射到多个第一数据帧,所述多个第一数据帧的每一个第一数据帧的目的地址字段包括负载均衡域,所述负载均衡域用于实现第一交换设备的负载均衡。所述第一源交换网接口电路根据均衡序列向所述第一交换设备发送所述多个第一数据帧。其中,所述多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了所述均衡序列中的一个元素。所述均衡序列中的元素个数与第一连接通道数相关,所述第一连接通道数为所述第一交换设备与第一目的交换网接口电路之间的连接通道数。所述第一交换设备将所述多个第一数据帧发送给所述第一目的交换网接口电路;所述第一目的交换网接口电路将所述多个第一数据帧进行排序,并对排序后的所述多个第一数据帧进行解封装,得到所述第一业务数据流。其中,所述第一源交换网接口电路为所述至少一个源交换网接口电路中的任一个,所述第一交换设备为所述至少一个交换设备的中的一个或多个,所述第一目的交换网接口电路为所述多个目的交换网接口电路中的任一个。In a first aspect, the present application provides a data transmission system. The system may include: at least one source switching network interface circuit, at least one switching device and a plurality of destination switching network interface circuits. The first source switching network interface circuit maps the first service data stream to multiple first data frames, and the destination address field of each first data frame of the multiple first data frames includes a load balancing field, and the The load balancing domain is used to implement load balancing of the first switching device. The first source switching network interface circuit sends the plurality of first data frames to the first switching device according to the equalization sequence. Wherein, the load balancing field corresponding to each first data frame of the plurality of first data frames is down-inserted with an element in the balancing sequence. The number of elements in the equalization sequence is related to the number of first connection channels, and the first number of connection channels is the number of connection channels between the first switching device and the interface circuit of the first destination switching network. The first switching device sends the multiple first data frames to the first destination switching network interface circuit; the first destination switching network interface circuit sorts the multiple first data frames, and then The sorted first data frames are decapsulated to obtain the first service data stream. The first source switching network interface circuit is any one of the at least one source switching network interface circuit, the first switching device is one or more of the at least one switching device, and the first switching device is one or more of the at least one switching device. A destination switching network interface circuit is any one of the multiple destination switching network interface circuits.

应理解,所述第一源交换网接口电路根据均衡序列向所述第一交换设备发送所述多个第一数据帧指的是第一源交换网接口电路在发送一个数据帧时,需要根据该数据帧包括的负载均衡域携带的均衡序列的一个元素来确定发送的目的交换设备。也就是说,第一源交换网接口电路根据均衡序列的元素来发送第一数据帧。It should be understood that the fact that the first source switching network interface circuit sends the multiple first data frames to the first switching device according to the equalization sequence means that when the first source switching network interface circuit sends a data frame, it needs to The data frame includes an element of the balancing sequence carried in the load balancing field to determine the sending destination switching device. That is, the first source switching network interface circuit transmits the first data frame according to the elements of the equalization sequence.

上述数据传输系统可以由源交换网接口电路在发送数据帧时,在数据帧的负载均衡域中下插一个均衡序列中的元素,以实现交换设备的负载均衡。这样可以无需改变交换设备的处理流程,因此可以采用通用的交换设备就可以实现业务数据的均衡分发,可以避免数据传输系统对专用芯片的依赖,数据传输比较灵活,可以实现各个厂家的互换,应用广泛。In the above data transmission system, when the source switching network interface circuit sends the data frame, an element in the balancing sequence can be inserted into the load balancing field of the data frame, so as to realize the load balancing of the switching equipment. In this way, there is no need to change the processing flow of the switching device. Therefore, a general-purpose switching device can be used to realize the balanced distribution of business data, which can avoid the dependence of the data transmission system on special chips. The data transmission is more flexible, and the exchange of various manufacturers can be realized. Wide range of applications.

在一个可能的设计中,当所述第一交换设备为单级交换设备时,所述均衡序列中的元素个数与所述第一连接通道数相关,具体可以为:所述均衡序列中的元素个数与所述第一连接通道数相等。这样可以准确地通过均衡序列实现交换设备对多个第一数据帧的均衡发送。在另一个可能的设计中,当所述第一交换设备为N级交换设备时,所第一连接通道数为所述第一交换设备与所述第一目的交换网接口电路之间的连接通道数,具体可以为:所述第一连接通道数为所述第一交换设备中第N级交换设备与所述第一目的交换网接口电路之间的连接通道数。进一步地,所述均衡序列中的元素个数与所述第一连接通道数相关,具体可以为:所述均衡序列中的元素个数等于第一值,所述第一值为所述N级交换设备中每两级交换设备之间的连接通道数与所述第一连接通道数的公倍数。其中,N为大于或者等于2的整数。这样可以准确地通过均衡序列实现交换设备对多个第一数据帧的均衡发送。在一个可能的设计中,所述公倍数可以为最小公倍数。这样实现比较简单,降低复杂度。In a possible design, when the first switching device is a single-stage switching device, the number of elements in the equalization sequence is related to the number of the first connection channels, which may be specifically: the number of elements in the equalization sequence The number of elements is equal to the number of the first connection channels. In this way, the balanced transmission of the multiple first data frames by the switching device can be accurately implemented through the balanced sequence. In another possible design, when the first switching device is an N-level switching device, the first number of connection channels is a connection channel between the first switching device and the interface circuit of the first destination switching network Specifically, the number of the first connection channels may be the number of connection channels between the Nth-level switching device in the first switching device and the interface circuit of the first destination switching network. Further, the number of elements in the equalization sequence is related to the number of the first connection channels, specifically: the number of elements in the equalization sequence is equal to a first value, and the first value is the N-level The common multiple of the number of connection channels between every two levels of switching devices in the switching device and the number of the first connection channels. Wherein, N is an integer greater than or equal to 2. In this way, the balanced transmission of the multiple first data frames by the switching device can be accurately implemented through the balanced sequence. In one possible design, the common multiple may be the least common multiple. In this way, the implementation is relatively simple and the complexity is reduced.

在一个可能的设计中,所述多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插的元素与所述第一目的交换网接口电路的接收端口相关。其中,第一数据帧被下插了一个元素后,该第一数据帧的目的地址字段的值即对应所述第一目的交换网接口电路的接收端口。这样可以准确地实现第一交换设备的负载均衡。In a possible design, the down-inserted element of the load balancing field corresponding to each of the first data frames of the plurality of first data frames is related to the receiving port of the first destination switching network interface circuit. Wherein, after an element is inserted into the first data frame, the value of the destination address field of the first data frame corresponds to the receiving port of the first destination switching network interface circuit. In this way, the load balancing of the first switching device can be accurately implemented.

在一个可能的设计中,所述多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了所述均衡序列中的一个元素,具体可以为:前P组第一数据帧中每组第一数据帧中的H个第一数据帧分别依次被下插所述均衡序列中的元素;第P+1组第一数据帧中的Q个第一数据帧分别依次下插所述均衡序列中的前Q个元素。其中,所述H等于所述均衡序列中的元素个数,所述P为T除以所述H所得的整数商,所述Q为所述T除以所述H所得的余数,所述T为所述多个第一数据帧的个数。所述H为大于或者等于1的整数,所述P为大于或者等于1的整数,所述Q为正整数,所述Q小于所述H。这样每个第一数据帧对应的负载均衡域中可以成功下插均衡序列中的一个元素,且实现方法简单。In a possible design, an element in the balancing sequence is inserted into the load balancing field corresponding to each of the first data frames of the plurality of first data frames, which may specifically be: the first P groups of first data The H first data frames in each group of first data frames in the frame are respectively down-inserted to the elements in the equalization sequence; the Q first data frames in the P+1th group of first data frames are down-inserted respectively in sequence The first Q elements in the equalization sequence. The H is equal to the number of elements in the equalization sequence, the P is the integer quotient obtained by dividing T by the H, the Q is the remainder obtained by dividing the T by the H, and the T is the number of the plurality of first data frames. The H is an integer greater than or equal to 1, the P is an integer greater than or equal to 1, the Q is a positive integer, and the Q is less than the H. In this way, an element in the balancing sequence can be successfully inserted into the load balancing domain corresponding to each first data frame, and the implementation method is simple.

在一个可能的设计中,所述多个第一数据帧的每一个第一数据帧的源地址字段包括第一域,所述第一域用于指示所述多个第一数据帧的每一个第一数据帧的排序。在所述第一源交换网接口电路根据均衡序列向第一交换设备发送所述多个第一数据帧之前,所述第一源交换网接口电路按设定顺序在所述多个第一数据帧的每一个第一数据帧对应的第一域中下插时间戳或者序列号。这样可以实现对业务数据帧进行保持顺序,以使后续准确恢复业务数据流。示例性地,所述设定顺序可以为递增顺序等。In a possible design, the source address field of each of the plurality of first data frames includes a first field, and the first field is used to indicate each of the plurality of first data frames The ordering of the first data frame. Before the first source switching network interface circuit sends the plurality of first data frames to the first switching device according to the equalization sequence, the first source switching network interface circuit performs the first data frames in the plurality of first data frames in a set sequence. A timestamp or sequence number is inserted into the first field corresponding to each first data frame of the frame. In this way, the sequence of the service data frames can be maintained, so that the service data flow can be accurately restored subsequently. Exemplarily, the setting order may be an increasing order or the like.

在一个可能的设计中,所述第一目的交换网接口电路将所述多个第一数据帧进行排序,具体可以为:所述第一目的交换网接口电路根据每个所述第一数据帧对应的第一域中的时间戳或者序列号对所述多个第一数据帧进行排序。这样可以使第一目的交换网接口电路准确地恢复业务数据流。示例性地,所述第一目的交换网接口电路可以根据每个所述第一数据帧对应的第一域中的时间戳或者序列号对所述多个第一数据帧进行递增排序。In a possible design, the first destination switching network interface circuit sorts the plurality of first data frames, which may specifically be: the first destination switching network interface circuit sorts the first data frames according to each first data frame. The plurality of first data frames are sorted by timestamps or sequence numbers in the corresponding first fields. In this way, the first-destination switching network interface circuit can accurately restore the service data flow. Exemplarily, the first destination switching network interface circuit may perform an incremental ordering of the plurality of first data frames according to the timestamp or the sequence number in the first field corresponding to each of the first data frames.

在一个可能的设计中,至少一个所述交换设备为局域网交换((local areanetwork,LAN)switch,LSW)交换芯片。这样可以采用通用的以太交换芯片实现业务数据传输,实现简单,数据传输较灵活。In a possible design, at least one of the switching devices is a local area network switch ((local area network, LAN) switch, LSW) switching chip. In this way, a general Ethernet switching chip can be used to realize service data transmission, which is simple to implement and flexible in data transmission.

第二方面,本申请提供了一种数据传输方法。该方法可以包括:将第一业务数据流映射到多个第一数据帧,所述多个第一数据帧的每一个第一数据帧的目的地址字段包括负载均衡域,所述负载均衡域用于实现第一交换设备的负载均衡。根据所述均衡序列向第一交换设备发送所述多个第一数据帧。其中,所述多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了所述均衡序列中的一个元素。所述均衡序列中的元素个数与第一连接通道数相关,所第一连接通道数为所述第一交换设备与第一目的交换网接口电路之间的连接通道数。可以实现第一交换设备的业务数据的均衡分发,数据传输比较灵活,可以实现各个厂家的互换,应用广泛。In a second aspect, the present application provides a data transmission method. The method may include: mapping the first service data flow to a plurality of first data frames, where a destination address field of each first data frame of the plurality of first data frames includes a load balancing domain, and the load balancing domain uses for realizing load balancing of the first switching device. The plurality of first data frames are sent to the first switching device according to the equalization sequence. Wherein, the load balancing field corresponding to each first data frame of the plurality of first data frames is down-inserted with an element in the balancing sequence. The number of elements in the equalization sequence is related to the number of first connection channels, and the first number of connection channels is the number of connection channels between the first switching device and the interface circuit of the first destination switching network. The balanced distribution of the service data of the first switching device can be realized, the data transmission is relatively flexible, the exchange of various manufacturers can be realized, and the application is extensive.

在一个可能的设计中,当所述第一交换设备为单级交换设备时,所述均衡序列中的元素个数与所述第一连接通道数相关的具体描述可以参见上述第一方面可能的设计中的描述,此处不再重复赘述。In a possible design, when the first switching device is a single-stage switching device, for a specific description about the number of elements in the equalization sequence and the number of the first connection channels, refer to the first possible aspect above. The description in the design will not be repeated here.

在一个可能的设计中,当所述第一交换设备为N级交换设备时,具体方案描述可以参见上述第一方面可能的设计中的描述,此处不再重复赘述。In a possible design, when the first switching device is an N-level switching device, for a specific solution description, refer to the description in the possible design of the first aspect above, which will not be repeated here.

在一个可能的设计中,针对所述多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插的元素的相关描述,可以参见上述第一方面可能的设计中的相关描述,此处不再重复赘述。In a possible design, for the relevant description of the element to which the load balancing domain corresponding to each of the plurality of first data frames is down-inserted, reference may be made to the relevant description in the above-mentioned possible design of the first aspect , and will not be repeated here.

在一个可能的设计中,所述第一数据帧的每一个第一数据帧的源地址字段的相关描述,可以上述第一方面可能的设计中的相关描述,此处不再重复赘述。In a possible design, the relevant description of the source address field of each first data frame of the first data frame may be the relevant description in the above-mentioned possible design of the first aspect, which will not be repeated here.

第三方面,本申请还提供了一种数据传输装置。该数据传输装置具有实现上述第二方面或第二方面的各个可能的设计示例中的方法的功能。所述功能可以通过硬件实现,也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。In a third aspect, the present application also provides a data transmission device. The data transmission apparatus has the function of implementing the method in the above-mentioned second aspect or each possible design example of the second aspect. The functions can be implemented by hardware, or can be implemented by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

在一个可能的设计中,所述数据传输装置的结构中包括收发单元和处理单元。这些单元可以执行上述第二方面或第二方面的各个可能的设计示例中相应功能,具体参见方法示例中的详细描述,此处不做赘述。In a possible design, the structure of the data transmission device includes a transceiver unit and a processing unit. These units may perform the corresponding functions in the second aspect or each possible design example of the second aspect. For details, please refer to the detailed description in the method example, which will not be repeated here.

在一个可能的设计中,所述数据传输装置的结构中包括通信接口和处理器。可选地,所述数据传输装置还包括存储器。所述通信接口用于收发数据,以及用于与数据传输系统中的其他设备进行通信交互。所述处理器被配置为支持所述数据传输装置执行上述第二方面或第二方面的各个可能的设计示例中的相应的功能。所述存储器与所述处理器耦合,其保存所述数据传输装置必要的程序指令和数据。In a possible design, the structure of the data transmission device includes a communication interface and a processor. Optionally, the data transmission apparatus further includes a memory. The communication interface is used to send and receive data, and to communicate and interact with other devices in the data transmission system. The processor is configured to support the data transmission apparatus to perform corresponding functions in the above-mentioned second aspect or each possible design example of the second aspect. The memory is coupled to the processor and holds program instructions and data necessary for the data transfer device.

第四方面,本申请实施例提供了一种数据传输系统。该数据传输系统可以包括上述提及的至少一个源交换网接口电路(例如第一源交换网接口电路)、至少一个交换设备(例如第一交换设备)和多个目的交换网接口电路(例如第一目的交换网接口电路等)。In a fourth aspect, an embodiment of the present application provides a data transmission system. The data transmission system may include the above-mentioned at least one source switching network interface circuit (eg, a first source switching network interface circuit), at least one switching device (eg, a first switching device), and a plurality of destination switching network interface circuits (eg, a first switching network interface circuit). A destination switching network interface circuit, etc.).

第五方面,本申请实施例提供的一种计算机可读存储介质。该计算机可读存储介质存储有程序指令,当程序指令在计算机上运行时,使得计算机执行本申请实施例第二方面及其任一可能的设计中所述的方法。示例性地,计算机可读存储介质可以是计算机能够存取的任何可用介质。以此为例但不限于:计算机可读介质可以包括非瞬态计算机可读介质、随机存取存储器(random-access memory,RAM)、只读存储器(read-only memory,ROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)、CD-ROM或其他光盘存储、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质。In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium. The computer-readable storage medium stores program instructions, and when the program instructions are executed on the computer, the computer executes the method described in the second aspect of the embodiments of the present application and any possible designs thereof. Illustratively, a computer-readable storage medium can be any available medium that can be accessed by a computer. Taking this as an example but not limited to: computer-readable media may include non-transitory computer-readable media, random-access memory (RAM), read-only memory (ROM), electrically erasable Except programmable read only memory (electrically EPROM, EEPROM), CD-ROM or other optical disk storage, magnetic disk storage medium or other magnetic storage device, or capable of carrying or storing desired program code in the form of instructions or data structures and capable of Any other media accessed by a computer.

第六方面,本申请实施例提供一种包括计算机程序代码或指令的计算机程序产品。当其在计算机上运行时,使得计算机实现上述第二方面或第二方面任一种可能的设计中所述的方法。In a sixth aspect, the embodiments of the present application provide a computer program product including computer program codes or instructions. When run on a computer, the computer is caused to implement the method described in the second aspect or any possible design of the second aspect.

上述第三方面至第六方面中的各个方面以及各个方面可能达到的技术效果请参照上述针对第一方面或第二方面中的各种可能方案可以达到的技术效果说明,这里不再重复赘述。For each aspect of the third aspect to the sixth aspect and the possible technical effects achieved by each aspect, please refer to the above description of the technical effects that can be achieved by the various possible solutions in the first aspect or the second aspect, which will not be repeated here.

附图说明Description of drawings

图1为本申请提供的一种OTN设备的结构示意图;1 is a schematic structural diagram of an OTN device provided by the application;

图2为本申请提供的一种数据传输系统的架构示意图;2 is a schematic diagram of the architecture of a data transmission system provided by the application;

图3为本申请提供的另一种数据传输系统的架构示意图;3 is a schematic diagram of the architecture of another data transmission system provided by the application;

图4为本申请提供的又一种数据传输系统的架构示意图;4 is a schematic diagram of the architecture of another data transmission system provided by the present application;

图5为本申请提供的一种第一数据帧的结构示意图;5 is a schematic structural diagram of a first data frame provided by the present application;

图6为本申请提供的一种第一业务数据流映射到多个第一数据帧的示意图;6 is a schematic diagram of mapping a first service data stream provided by the present application to multiple first data frames;

图7为本申请提供的一种业务封装/解封装在数据传输系统中的完成位置的示意图;7 is a schematic diagram of the completion position of a service encapsulation/decapsulation in the data transmission system provided by the present application;

图8为本申请提供的一种需要进行均衡处理的位置的示意图;8 is a schematic diagram of a position that needs to be equalized according to the present application;

图9为本申请提供的一种单播业务的均衡处理示意图;9 is a schematic diagram of equalization processing of a unicast service provided by the present application;

图10为本申请提供的一种多级多平面交换系统中均衡位置示意图;FIG. 10 is a schematic diagram of an equalization position in a multi-level and multi-plane switching system provided by the application;

图11为本申请提供的一种多级交换设备的均衡处理示意图;11 is a schematic diagram of equalization processing of a multi-stage switching device provided by the application;

图12为本申请提供的一种业务的保序示意图;12 is a schematic diagram of order preservation of a service provided by this application;

图13为本申请提供的一种数据传输方法的流程图;13 is a flowchart of a data transmission method provided by the application;

图14为本申请提供的一种数据传输装置的结构示意图;14 is a schematic structural diagram of a data transmission device provided by the application;

图15为本申请提供的另一种数据传输装置的结构示意图。FIG. 15 is a schematic structural diagram of another data transmission apparatus provided by the present application.

具体实施方式Detailed ways

下面将结合附图对本申请作进一步地详细描述。The present application will be described in further detail below with reference to the accompanying drawings.

本申请实施例提供一种数据传输方法及装置,用以灵活实现业务数据传输。其中,本申请所述方法和装置基于同一技术构思,由于方法及装置解决问题的原理相似,因此装置与方法的实施可以相互参见,重复之处不再赘述。Embodiments of the present application provide a data transmission method and apparatus, which are used to flexibly implement service data transmission. The methods and devices described in this application are based on the same technical concept. Since the methods and devices have similar principles for solving problems, the implementations of the devices and methods can be referred to each other, and repeated descriptions will not be repeated here.

在本申请的描述中,“第一”、“第二”等词汇,仅用于区分描述的目的,而不能理解为指示或暗示相对重要性,也不能理解为指示或暗示顺序。In the description of this application, words such as "first" and "second" are only used for the purpose of distinguishing and describing, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

在本申请中的描述中,“至少一个(种)”是指一个(种)或者多个(种),多个(种)是指两个(种)或者两个(种)以上。In the description in this application, "at least one (species)" refers to one (species) or multiple (species), and multiple (species) refers to two (species) or more than two (species).

本申请实施例提供的数据传输方法可以适用于由数据交换设备等组成的通信系统。其中,通信系统可以但不限于是数据传输系统、数据交换系统(网络)、光传输网络、时分复用系统等。例如,在光传输网络中,数据交换设备可以是光传输网络(optical transportnetwork,OTN)设备。图1为一种可能的OTN设备的结构示意图。示例性地,一个OTN设备可以包括支路板、线路板、交叉板,以及系统控制和通信类单板,还可能包括电源、风扇、辅助类单板、光层处理单板(图1中未示出)。需要说明的是,根据具体的需要,每个OTN设备具体包含的单板类型和数量可能不相同。例如:作为核心节点的OTN设备可能没有支路板。作为边缘节点的OTN设备可能有多个支路板。其中,电源用于为OTN设备供电,可能包括主用和备用电源。风扇用于为设备散热。辅助类单板用于提供外部告警或者接入外部时钟等辅助功能。支路板、交叉板和线路板主要是用于处理OTN的电层信号。其中,支路板用于实现各种客户业务的接收和发送,例如同步数字系统(synchronous digital hierarchy,SDH)业务、分组业务、以太网业务和前传业务等。更进一步地,支路板可以划分为客户侧光模块和信号处理器。其中,客户侧光模块可以为光收发器,用于接收和/或发送业务数据。信号处理器用于实现对业务数据到数据帧的映射和解映射处理。交叉板用于实现数据帧的交换,完成一种或多种类型的数据帧的交换。线路板主要实现线路侧数据帧的处理。具体地,线路板可以划分为线路侧光模块和信号处理器。其中,线路侧光模块可以为线路侧光收发器,用于接收和/或发送数据帧。信号处理器用于实现对线路侧的数据帧的复用和解复用,或者映射和解映射处理。系统控制和通信类单板用于实现系统控制和通信。具体地,可以通过背板从不同的单板收集信息,或者将控制指令发送到对应的单板上去。需要说明的是,除非特殊说明,具体的组件(例如:信号处理器)可以是一个或多个,本申请不做任何限制。还需要说明的是,本申请实施例不对设备包含的单板类型,以及单板具体的功能设计和数量做任何限制。The data transmission methods provided in the embodiments of the present application may be applicable to a communication system composed of data exchange devices and the like. The communication system may be, but not limited to, a data transmission system, a data exchange system (network), an optical transmission network, a time division multiplexing system, and the like. For example, in an optical transport network, the data switching device may be an optical transport network (optical transport network, OTN) device. FIG. 1 is a schematic structural diagram of a possible OTN device. Exemplarily, an OTN device may include tributary boards, circuit boards, cross-connect boards, and system control and communication boards, and may also include power supplies, fans, auxiliary boards, and optical layer processing boards (not shown in FIG. 1 ). Shows). It should be noted that, according to specific needs, each OTN device may contain different types and numbers of boards. For example, an OTN device serving as a core node may not have tributary boards. An OTN device acting as an edge node may have multiple tributary boards. Among them, the power supply is used to supply power to the OTN equipment, which may include main and backup power supplies. Fans are used to cool the device. Auxiliary boards are used to provide auxiliary functions such as external alarms or access to external clocks. Tributary boards, cross boards and circuit boards are mainly used to process electrical layer signals of OTN. Among them, the tributary board is used to realize the reception and transmission of various customer services, such as synchronous digital hierarchy (SDH) services, packet services, Ethernet services, and fronthaul services. Further, the tributary board can be divided into a client-side optical module and a signal processor. The client-side optical module may be an optical transceiver for receiving and/or sending service data. The signal processor is used to realize the mapping and demapping processing of the service data to the data frame. The crossover board is used to realize the exchange of data frames, and complete the exchange of one or more types of data frames. The circuit board mainly implements the processing of data frames on the line side. Specifically, the circuit board can be divided into a line-side optical module and a signal processor. The line-side optical module may be a line-side optical transceiver for receiving and/or sending data frames. The signal processor is used to implement multiplexing and demultiplexing, or mapping and demapping processing of data frames on the line side. System control and communication boards are used to implement system control and communication. Specifically, information can be collected from different boards through the backplane, or control instructions can be sent to the corresponding board. It should be noted that, unless otherwise specified, there may be one or more specific components (eg, signal processors), which are not limited in this application. It should also be noted that the embodiments of the present application do not impose any restrictions on the types of boards included in the device, and the specific functional design and quantity of the boards.

由于目前OTN设备等的交换网绝大部分采用的是专用的交换芯片。例如,ASIC芯片等,也即OTN等设备通过专有的交换芯片来实现业务交换。然而由于专有的交换芯片需要专门定制,投资成本较高,且交换芯片的内部协议是私有化的,各个厂家不能互换,导致设备应用受限,从而不能灵活实现业务数据传输。基于此,本申请实施例提供一种数据传输系统、方法及装置。用以实现个厂家设备可以通用,灵活实现业务数据传输。Because most of the switching networks such as OTN equipment currently use dedicated switching chips. For example, ASIC chips, etc., that is, OTN and other devices realize service exchange through proprietary switching chips. However, because the proprietary switching chip needs to be specially customized, the investment cost is high, and the internal protocol of the switching chip is privatized and cannot be interchanged by various manufacturers, resulting in limited equipment application and thus inability to flexibly realize business data transmission. Based on this, embodiments of the present application provide a data transmission system, method, and device. It is used to realize that the equipment of each manufacturer can be used universally and flexibly realize the transmission of business data.

图2示出了本申请实施例提供的一种数据传输系统。该数据传输系统可以包括至少一个源交换网接口电路、至少一个交换设备和多个目的交换网接口电路。示例性地,在图2中,至少一个源交换网接口电路以源交换网接口电路1和源交换网接口电路2示出。至少一个交换设备以交换设备1和交换设备2示出。多个目的交换网接口电路以目的交换网接口电路1、目的交换网接口电路2和目的交换网接口电路3示出。需要说明的是,图2中示出的源交换网接口电路、交换设备和目的交换网接口电路的个数仅仅为示例,并不作为对本申请的数据传输系统作为限定。FIG. 2 shows a data transmission system provided by an embodiment of the present application. The data transmission system may include at least one source switching network interface circuit, at least one switching device and a plurality of destination switching network interface circuits. Exemplarily, in FIG. 2 , at least one source switching network interface circuit is shown as source switchingnetwork interface circuit 1 and source switchingnetwork interface circuit 2 . At least one switching device is shown as switchingdevice 1 andswitching device 2 . A plurality of destination switching network interface circuits are shown as destination switchingnetwork interface circuit 1 , destination switchingnetwork interface circuit 2 and destination switchingnetwork interface circuit 3 . It should be noted that the numbers of source switching network interface circuits, switching devices and destination switching network interface circuits shown in FIG. 2 are only examples, and are not intended to limit the data transmission system of the present application.

其中,源交换网接口电路可以称为上行交换网接口电路。例如上行交换网接口电路可以是上行交换网接口电路(fabric interface circuit,FIC)等。目的交换网接口电路可以称为下行交换网接口电路。例如下行FIC等。交换设备可以是芯片。例如可以是通用的以太交换芯片,例如局域网交换((local area network,LAN)switch,LSW)交换芯片等。交换设备还可以是独立的设备,本申请对此不作限定。The source switching network interface circuit may be referred to as an upstream switching network interface circuit. For example, the upstream switching network interface circuit may be an upstream switching network interface circuit (fabric interface circuit, FIC) or the like. The destination switching network interface circuit may be referred to as a downstream switching network interface circuit. For example, downlink FIC, etc. The switching device can be a chip. For example, it may be a general-purpose Ethernet switch chip, such as a local area network switch ((local area network, LAN) switch, LSW) switch chip and the like. The switching device may also be an independent device, which is not limited in this application.

在一种实施例中,数据传输系统中的交换设备可以为单级交换设备。例如图3所示的数据传输系统,以交换设备为多个单级LSW交换芯片,以源交换网接口电路为上行FIC,以目的交换网接口电路为下行FIC为例示出。图3所示的数据传输系统也可以称为单级多平面交换系统,采用通用以太交换芯片,扩展多个平面构建大容量交换系统。In one embodiment, the switching device in the data transmission system may be a single-stage switching device. For example, in the data transmission system shown in FIG. 3 , the switching devices are multiple single-stage LSW switching chips, the source switching network interface circuit is the upstream FIC, and the destination switching network interface circuit is the downstream FIC as an example. The data transmission system shown in FIG. 3 can also be called a single-stage multi-plane switching system, which adopts a general-purpose Ethernet switching chip and expands multiple planes to construct a large-capacity switching system.

在另一种实施例中,数据传输系统中的交换设备可以为多级交换设备。例如图4所示的数据传输系统,以交换设备为多级LSW交换芯片,以源交换网接口电路为上行FIC,以目的交换网接口电路为下行FIC为例示出。图4所示的数据传输系统也可以称为多级多平面交换系统,通过级联多级交换芯片,在图3所示的单级多平面交换系统的基础上,进一步扩展系统容量。In another embodiment, the switching device in the data transmission system may be a multi-level switching device. For example, the data transmission system shown in FIG. 4 takes the switching device as a multi-level LSW switching chip, the source switching network interface circuit as the upstream FIC, and the destination switching network interface circuit as the downstream FIC as an example. The data transmission system shown in FIG. 4 can also be called a multi-level multi-plane switching system. By cascading multi-level switching chips, the system capacity is further expanded on the basis of the single-level multi-plane switching system shown in FIG. 3 .

需要说明的是,图3和图4中的上行FIC、LSW交换芯片和下行FIC的数量仅仅是示例,不作为对本申请的限定。It should be noted that the numbers of upstream FICs, LSW switching chips and downstream FICs in FIG. 3 and FIG. 4 are only examples, and are not intended to limit the present application.

通过上述图2-图4所示的数据传输系统,可以实现业务分发、交换和均衡等。具体地,任一个源交换网接口电路(以第一源交换网接口电路为例说明),通过一个或多个交换设备(以第一交换设备为例说明),将业务数据(以第一业务数据流为例说明)发送到任一个目的交换网接口电路(以第一目的交换网接口电路为例说明)的具体过程可以如下:Through the data transmission system shown in Figures 2 to 4 above, service distribution, switching, and equalization can be realized. Specifically, any source switching network interface circuit (using the first source switching network interface circuit as an example), through one or more switching devices (using the first switching device as an example), converts service data (using the first service The specific process of sending the data stream to any destination switching network interface circuit (taking the first destination switching network interface circuit as an example) may be as follows:

第一源交换网接口电路将第一业务数据流映射到多个第一数据帧,多个第一数据帧的每一个第一数据帧的目的地址字段包括负载均衡域。负载均衡域用于实现第一交换设备的负载均衡。第一源交换网接口电路可以根据均衡序列向第一交换设备发送多个第一数据帧。其中,多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了均衡序列中的一个元素。均衡序列中的元素个数与第一连接通道数相关,第一连接通道数为第一交换设备与第一目的交换网接口电路之间的连接通道数。第一交换设备将多个第一数据帧发送给第一目的交换网接口电路。第一目的交换网接口电路将多个第一数据帧进行排序,并对排序后的多个第一数据帧进行解封装,得到第一业务数据流。The first source switching network interface circuit maps the first service data flow to a plurality of first data frames, and a destination address field of each first data frame of the plurality of first data frames includes a load balance field. The load balancing domain is used to implement load balancing of the first switching device. The first source switching network interface circuit may send a plurality of first data frames to the first switching device according to the equalization sequence. Wherein, the load balancing field corresponding to each of the plurality of first data frames is down-inserted with an element in the balancing sequence. The number of elements in the equalization sequence is related to the number of first connection channels, and the first number of connection channels is the number of connection channels between the first switching device and the interface circuit of the first destination switching network. The first switching device sends a plurality of first data frames to the first destination switching network interface circuit. The first destination switching network interface circuit sorts the multiple first data frames, and decapsulates the sorted multiple first data frames to obtain the first service data stream.

示例性地,本申请实施例中的业务数据流映射的数据结构可以为通用的以太帧结构。也就是说多个第一数据帧的每一个第一数据帧的结构均可以是通用的以太帧结构。例如,第一数据帧的结构可以如图5所示。在本申请中,对以太帧中的目的地址(destinationaddress,DA)字段和源地址(source address,SA)字段的含义进行了重定义。其中,源交换网接口电路和目的交换网接口电路按照重定义的DA字段和SA字段的含义处理数据。交换设备按照DA字段和SA字段在以太帧目前的含义处理数据。也就是说,对于交换设备来说,DA字段和SA字段的含义并没有重定义的,交换设备可以采用现有的处理流程来处理数据。这样可以避免对目前的交换设备的处理流程的更改。Exemplarily, the data structure of the service data flow mapping in this embodiment of the present application may be a general Ethernet frame structure. That is to say, the structure of each first data frame of the plurality of first data frames may be a general Ethernet frame structure. For example, the structure of the first data frame may be as shown in FIG. 5 . In this application, the meanings of the destination address (destination address, DA) field and the source address (source address, SA) field in the Ethernet frame are redefined. The source switching network interface circuit and the destination switching network interface circuit process data according to the meanings of the redefined DA field and SA field. The switching device processes the data according to the current meaning of the DA field and the SA field in the Ethernet frame. That is to say, for the switching device, the meanings of the DA field and the SA field are not redefined, and the switching device can use the existing processing flow to process the data. In this way, changes to the processing flow of the current switching device can be avoided.

具体地,如图5所示,针对单播业务,重定义的DA字段可以包括多播(multicast,MC)字段、保留(reserve,RES)字段、目的交换网接口电路标识(destination FICidentity,DFIC_ID)字段和负载均衡(load balance,LB)字段。例如,针对单播业务,重定义的DA字段的具体含义可以如表1所示。针对多播业务,重定义的DA字段可以包括MC字段、RES字段、多播标识(multicast identity,MID)字段和LB字段。例如,针对多播业务,重定义的DA字段的具体含义可以如表2所示。重定义的SA字段可以包括RES字段、源交换网接口电路标识(source FIC identity,SFIC_ID)字段、流标识(flow identity,FLOW_ID)字段和时间戳_序列号(timestamp_serial number,TS_SN)字段。例如,重定义的SA字段的具体含义可以如表3所示。Specifically, as shown in FIG. 5 , for a unicast service, the redefined DA field may include a multicast (multicast, MC) field, a reserve (reserve, RES) field, and a destination switching network interface circuit identifier (destination FICidentity, DFIC_ID). field and load balance (LB) field. For example, for a unicast service, the specific meaning of the redefined DA field may be as shown in Table 1. For the multicast service, the redefined DA field may include the MC field, the RES field, the multicast identity (multicast identity, MID) field, and the LB field. For example, for the multicast service, the specific meaning of the redefined DA field may be as shown in Table 2. The redefined SA field may include a RES field, a source switched network interface circuit identity (source FIC identity, SFIC_ID) field, a flow identity (flow identity, FLOW_ID) field, and a timestamp_serial number (TS_SN) field. For example, the specific meaning of the redefined SA field may be as shown in Table 3.

表1针对单播业务,重定义的DA字段的具体含义Table 1 For unicast services, the specific meaning of the redefined DA field

域名domain name以太DA比特域Ethernet DA bit field含义说明Meaning descriptionMCMCDA[47]DA[47]单多播指示,0表示单播业务,1表示多播业务Single multicast indication, 0 means unicast service, 1 means multicast serviceRESRESDA[46:16]DA[46:16]保留字段reserved textDFIC_IDDFIC_IDDA[15:6]DA[15:6]目的FIC,单播业务交换的目的FICDestination FIC, destination FIC for unicast traffic exchangeLBLBDA[5:0]DA[5:0]负载均衡字段,用来实现交换设备进行负载均衡The load balancing field is used to implement load balancing for switching devices

其中,从表1中可以看出,针对单播业务,DA字段占用的48个比特(即DA[47:0])的分配分别为:LB字段占用DA字段的前6个比特,即0-5比特。DFIC_ID字段占用DA字段的第7个比特至第16个比特,即6-15比特。RES字段占用DA字段的第17个比特至第47个比特,即16-46比特。MC字段占用DA字段的最后一个比特(第48个比特),即47比特。Among them, it can be seen from Table 1 that for unicast services, the allocation of the 48 bits occupied by the DA field (that is, DA[47:0]) are: the LB field occupies the first 6 bits of the DA field, that is, 0- 5 bits. The DFIC_ID field occupies bits 7 to 16 of the DA field, ie, bits 6-15. The RES field occupies the 17th to 47th bits of the DA field, ie, 16-46 bits. The MC field occupies the last bit (the 48th bit) of the DA field, ie, 47 bits.

表2针对多播业务,重定义的DA字段的具体含义Table 2 For multicast services, the specific meaning of the redefined DA field

域名domain name比特域bit field含义说明Meaning descriptionMCMCDA[47]DA[47]单多播指示,0表示单播业务,1表示多播业务Single multicast indication, 0 means unicast service, 1 means multicast serviceRESRESDA[46:23]DA[46:23]保留字段reserved textMIDMIDDA[22:6]DA[22:6]多播ID,多播业务组号,用来区分不同多播组Multicast ID, multicast service group number, used to distinguish different multicast groupsLBLBDA[5:0]DA[5:0]负载均衡字段,用来实现交换设备进行负载均衡The load balancing field is used to implement load balancing for switching devices

其中,从表2中可以看出,针对多播业务,DA字段占用的48个比特(即DA[47:0])的分配分别为:LB字段占用DA字段的前6个比特,即0-5比特。MID字段占用DA字段的第7个比特至第23个比特,即6-22比特。RES字段占用DA字段的第24个比特至第47个比特,即23-46比特。MC字段占用DA字段的最后一个比特(第48个比特),即47比特。Among them, as can be seen from Table 2, for the multicast service, the allocation of the 48 bits occupied by the DA field (that is, DA[47:0]) are: the LB field occupies the first 6 bits of the DA field, that is, 0- 5 bits. The MID field occupies bits 7 to 23 of the DA field, ie, bits 6-22. The RES field occupies bits 24 to 47 of the DA field, ie, bits 23-46. The MC field occupies the last bit (the 48th bit) of the DA field, ie, 47 bits.

表3重定义的SA字段的具体含义Table 3 Specific meanings of the redefined SA fields

Figure BDA0003011599260000071
Figure BDA0003011599260000071

其中,从表3中可以看出,SA字段占用的48个比特(即SA[47:0])的分配分别为:TS_SN字段占用SA字段的前20个比特,即0-19比特。FLOW_ID字段占用SA字段的第21个比特至第36个比特,即20-35比特。SFIC_ID字段占用SA字段的第37个比特至第46个比特,即36-45比特。RES字段占用SA字段的最后两个比特(第47和第48个比特),即46-47比特。Among them, it can be seen from Table 3 that the allocation of the 48 bits occupied by the SA field (ie SA[47:0]) are as follows: the TS_SN field occupies the first 20 bits of the SA field, that is, bits 0-19. The FLOW_ID field occupies the 21st to 36th bits of the SA field, ie, 20-35 bits. The SFIC_ID field occupies the 37th to 46th bits of the SA field, that is, bits 36-45. The RES field occupies the last two bits (the 47th and 48th bits) of the SA field, ie, bits 46-47.

其中,多个第一数据帧的每一个第一数据帧的目的地址字段包括的负载均衡域即为上述表1或者表2中DA字段包括的LB字段。多个第一数据帧的每一个第一数据帧的源地址字段包括的第一域即为上述表2中SA字段包括的TS_SN字段。The load balancing field included in the destination address field of each of the plurality of first data frames is the LB field included in the DA field in Table 1 or Table 2 above. The first field included in the source address field of each of the plurality of first data frames is the TS_SN field included in the SA field in Table 2 above.

第一源交换网接口电路将第一业务数据流映射到多个第一数据帧的过程,即为第一源交换网接口电路完成业务到上述涉及的第一数据帧的封装的过程。也即进行业务封装。其中,多个第一数据帧的每一个第一数据帧中的负载(payload)字段承载部分业务数据。示例性地,第一业务数据流映射到多个第一数据帧的示意图可以如图6所示。本申请中基于第一数据帧的业务封装在源交换网接口电路(如上行FIC)中进行,对应的业务解封装在目的交换网接口电路(如下行FIC)中进行。例如,图7示出了业务封装/解封装在数据传输系统中的完成位置。The process in which the first source switching network interface circuit maps the first service data stream to a plurality of first data frames is a process in which the first source switching network interface circuit completes the encapsulation of the service into the above-mentioned first data frames. That is, business encapsulation. Wherein, a payload field in each of the plurality of first data frames carries part of the service data. Exemplarily, a schematic diagram of mapping the first service data stream to multiple first data frames may be as shown in FIG. 6 . In this application, the service encapsulation based on the first data frame is performed in the source switching network interface circuit (eg, upstream FIC), and the corresponding service decapsulation is performed in the destination switching network interface circuit (eg, downstream FIC). For example, Figure 7 shows where the service encapsulation/decapsulation is done in the data transmission system.

在业务封装完成后,需要进行业务的均衡分发。为了避免多个交换设备以及同一交换设备的不同输入输出(input output,IO)口间工作负载不均衡,导致交换设备缓存溢出或者传输时延抖动增加。第一源交换网接口电路(如上行FIC)可以对业务数据进行均衡分发。例如,图8中所示的(1)和(2)的位置是需要进行均衡处理的位置。(1)处可以通过上行FIC采用将数据帧轮询(round robin,RR)方式往不同交换设备发送实现均衡。目前实施例中(2)处的均衡处理在专用交换芯片中实现。而本申请中,由于交换设备采用通用的设备或者芯片,为了避免更改当前的硬件处理流程,可以通过第一源交换网接口电路(如上行FIC)间接实现。也即可以通过第一源交换网接口电路间接实现交换设备对业务数据流的均衡分发,以实现负载均衡。After the business encapsulation is completed, the balanced distribution of the business needs to be carried out. In order to avoid the unbalanced workload among multiple switching devices and different input and output (input output, IO) ports of the same switching device, the buffer overflow of the switching device or the increase of transmission delay jitter is caused. The first source switching network interface circuit (eg, the upstream FIC) can perform balanced distribution of service data. For example, the positions of (1) and (2) shown in FIG. 8 are positions where equalization processing is required. At (1), the data frame can be sent to different switching devices in a round robin (RR) manner through the uplink FIC to achieve equalization. The equalization processing at (2) in the current embodiment is implemented in a dedicated switching chip. In this application, since the switching device adopts a general-purpose device or chip, in order to avoid changing the current hardware processing flow, it can be indirectly implemented through the first source switching network interface circuit (eg, upstream FIC). That is, the balanced distribution of the service data flow by the switching device can be indirectly realized through the first source switching network interface circuit, so as to realize load balancing.

具体地,由于本申请重定义的DA字段新增了负载均衡字段,因此可以利用交换设备根据DA字段对应的值找出端口的特性,给相同的目的交换网接口电路分配H个DA。H与交换设备与该目的交换网接口电路的连接通道(比如媒体接入控制(media access control,MAC)通道)数相关。在源交换网接口电路进行分发时,多个第一数据帧的每一个第一数据帧的负载均衡域独立下插均衡序列中的一个元素。例如,H=4时,均衡序列可以为{0,1,2,3},H=3负载均衡域可以为{0,1,2}。通过均匀下插均衡序列中的元素,可以控制交换设备往不同的出口IO均匀分发。第一数据帧中负载均衡域的取值,也即下插的负载均衡序列中的元素,与需要发送到的第一目的交换网接口电路的接收端口相关。第一数据帧中负载均衡域的被下插了均衡序列中的元素后,该第一数据帧对应的DA字段的取值即对应第一目的交换网接口电路的接收端口。Specifically, since the DA field redefined in this application adds a load balancing field, the switching device can be used to find out the port characteristics according to the value corresponding to the DA field, and assign H DAs to the same destination switching network interface circuit. H is related to the number of connection channels (eg, media access control (MAC) channels) between the switching device and the interface circuit of the destination switching network. When the source switching network interface circuit performs distribution, an element in the balancing sequence is independently inserted into the load balancing field of each first data frame of the plurality of first data frames. For example, when H=4, the balancing sequence may be {0,1,2,3}, and the load balancing domain of H=3 may be {0,1,2}. By uniformly inserting elements in the equalization sequence, the switching device can be controlled to distribute IOs to different egress evenly. The value of the load balancing field in the first data frame, that is, the element in the down-inserted load balancing sequence, is related to the receiving port of the interface circuit of the first destination switching network to be sent to. After the elements in the balancing sequence are inserted into the load balancing field in the first data frame, the value of the DA field corresponding to the first data frame corresponds to the receiving port of the first destination switching network interface circuit.

其中,第一源交换网接口电路将所述均衡序列中的元素可以按照预设规则下插到多个第一数据帧的负载均衡域中。在一种可选的实施方式中,多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了均衡序列中的一个元素,具体可以为:前P组第一数据帧中每组第一数据帧中的H个第一数据帧分别依次被下插均衡序列中的元素。第P+1组第一数据帧中的Q个第一数据帧分别依次下插均衡序列中的前Q个元素。其中,H等于均衡序列中的元素个数,P为T除以H所得的整数商,Q为T除以H所得的余数,T为多个第一数据帧的个数。H为大于或者等于1的整数,P为大于或者等于1的整数,Q为正整数,Q小于H。例如,多个第一数据帧为10个(即T为10),均衡序列为{0,1,2,3}(即H为4),此时P为2,Q为2。也就是说,10个第一数据帧可以被分成2+1组,在第3组中有两个第一数据帧。第一源交换网接口电路在10个第一数据帧的每一个第一数据帧下插均衡序列中的一个元素时,可以将0,1,2,3的顺序依次循环下插到10个第一数据帧的负载均衡域中。也即,在10个第一数据帧的前2组中的第一数据帧中分别依次下插0,1,2,3,在第3组第一数据帧中下插均衡序列的前2个元素,即下插0,1。即10个第一数据帧的负载均衡域中下插的元素分别为:0,1,2,3,0,1,2,3,0,1。The first source switching network interface circuit may down-insert the elements in the balancing sequence into the load balancing domains of the plurality of first data frames according to a preset rule. In an optional implementation manner, an element in the balancing sequence is inserted into the load balancing domain corresponding to each first data frame of the plurality of first data frames, which may specifically be: the first P groups of first data frames The H first data frames in each group of first data frames are sequentially down-inserted with elements in the equalization sequence. The Q first data frames in the P+1th group of first data frames are respectively sequentially down-inserted with the first Q elements in the equalization sequence. Wherein, H is equal to the number of elements in the equalization sequence, P is the integer quotient obtained by dividing T by H, Q is the remainder obtained by dividing T by H, and T is the number of multiple first data frames. H is an integer greater than or equal to 1, P is an integer greater than or equal to 1, Q is a positive integer, and Q is less than H. For example, the number of multiple first data frames is 10 (that is, T is 10), the equalization sequence is {0, 1, 2, 3} (that is, H is 4), at this time, P is 2, and Q is 2. That is, 10 first data frames can be divided into 2+1 groups, and there are two first data frames in the third group. When the interface circuit of the first source switching network inserts one element in the equalization sequence in each of the 10 first data frames, the sequence of 0, 1, 2, and 3 can be cyclically inserted to the 10 first data frames. In the load balancing domain of a data frame. That is, 0, 1, 2, and 3 are sequentially inserted into the first data frames in the first two groups of the 10 first data frames, and the first two equalization sequences are inserted into the third group of first data frames. element, that is,insert 0, 1 down. That is, the down-inserted elements in the load balancing domain of the 10 first data frames are: 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, respectively.

需要说明的是,上述第一数据帧的负载均衡域被下插元素的方法仅仅是一种示例。第一源交换网接口电路还可以通过其它方法将均衡中的元素下插到每个第一数据帧的负载均衡域中,本申请此处不再一一列举。It should be noted that the method for inserting elements in the load balancing domain of the first data frame above is just an example. The first source switching network interface circuit may also insert the elements in the balancing into the load balancing domain of each first data frame by other methods, which will not be listed one by one in this application.

在一种具体的实施方式中,当第一交换设备为单级交换设备时,也即数据传输系统为如图3所示的系统时。均衡序列中的元素个数与第一连接通道数相关,具体为:均衡序列中的元素个数与第一连接通道数相等。In a specific implementation manner, when the first switching device is a single-stage switching device, that is, when the data transmission system is the system shown in FIG. 3 . The number of elements in the equalization sequence is related to the number of the first connection channels, specifically: the number of elements in the equalization sequence is equal to the number of the first connection channels.

例如,当第一交换设备为单级交换设备时,图9示出了一种单播业务的均衡处理示意图。假设第一目的交换网接口电路的标识为5,也即DFIC_ID=5。第一交换设备到第一目的交换网接口电路的连接通道数为4,例如IO链路数为4。均衡序列为{0,1,2,3}。此时,配置的第一交换设备的MAC地址转发表,可以为DFIC_ID=5的FIC分配的4个MAC地址[{0,0,5,0},{0,0,5,1},{0,0,5,2},{0,0,5,3}]。对应的第一交换设备的出口IO为{IO_0,IO_1,IO_2,IO_3}。发送到DFIC_ID=5的第一目的交换网接口电路的第一业务数据流映射的每个第一数据帧中,除了DFIC_ID域固定为5,负载均衡域可以依次重复下插序列{0,1,2,3}中的一个元素。从图9中可以看出,通过上述方法,第一交换设备从IO_0,IO_1,IO_2,IO_3端口发送给第一目的交换设备的第一数据帧对应的MAC地址分别依次为循环重复的{0,0,5,0},{0,0,5,1},{0,0,5,2},{0,0,5,3}。也即,第一设备从IO_0发出去的第一数据帧对应的MAC地址均为{0,0,5,0},负载均衡域均下插了元素0。从IO_1发出去的第一数据帧对应的MAC地址均为{0,0,5,1},负载均衡域均下插了元素1。从IO_2发出去的第一数据帧对应的MAC地址均为{0,0,5,2},负载均衡域均下插了元素2。从IO_3发出去的第一数据帧对应的MAC地址均为{0,0,5,3},负载均衡域均下插了元素3。这样,第一交换设备就可以按照目前转发方式,根据MAC地址转发表转发第一数据帧,实现了交换及负载均衡。For example, when the first switching device is a single-stage switching device, FIG. 9 shows a schematic diagram of equalization processing of a unicast service. It is assumed that the identifier of the first destination switching network interface circuit is 5, that is, DFIC_ID=5. The number of connection channels from the first switching device to the interface circuit of the first destination switching network is 4, for example, the number of IO links is 4. The equilibrium sequence is {0,1,2,3}. At this time, the configured MAC address forwarding table of the first switching device can be four MAC addresses [{0,0,5,0},{0,0,5,1},{ 0,0,5,2},{0,0,5,3}]. The corresponding exit IOs of the first switching device are {IO_0, IO_1, IO_2, IO_3}. In each first data frame mapped to the first service data stream sent to the first destination switching network interface circuit with DFIC_ID=5, except that the DFIC_ID field is fixed to 5, the load balancing field can repeat the insertion sequence {0,1, 2,3} an element. It can be seen from FIG. 9 that through the above method, the MAC addresses corresponding to the first data frame sent by the first switching device from the IO_0, IO_1, IO_2, and IO_3 ports to the first destination switching device are respectively cyclically repeated {0, 0,5,0}, {0,0,5,1}, {0,0,5,2}, {0,0,5,3}. That is, the MAC addresses corresponding to the first data frame sent by the first device from IO_0 are all {0, 0, 5, 0}, andelement 0 is inserted in the load balancing domain. The MAC addresses corresponding to the first data frame sent from IO_1 are all {0,0,5,1}, andelement 1 is inserted into the load balancing field. The MAC addresses corresponding to the first data frame sent from IO_2 are all {0, 0, 5, 2}, andelement 2 is inserted in the load balancing field. The MAC addresses corresponding to the first data frame sent from IO_3 are all {0, 0, 5, 3}, andelement 3 is inserted in the load balancing field. In this way, the first switching device can forward the first data frame according to the current forwarding mode and according to the MAC address forwarding table, thereby realizing switching and load balancing.

在另一种具体的实施方式中,当第一交换设备为N级交换设备时,也即数据传输系统为图4所示的系统时。第一连接通道数为第一交换设备与第一目的交换网接口电路之间的连接通道数,具体可以为:第一连接通道数为第一交换设备中第N级交换设备与第一目的交换网接口电路之间的连接通道数。进一步地,均衡序列中的元素个数与第一连接通道数相关,具体可以为:均衡序列中的元素个数等于第一值,第一值为N级交换设备中每两级交换设备之间的连接通道数与第一连接通道数的公倍数。其中,N为大于或等于2的整数。In another specific implementation, when the first switching device is an N-level switching device, that is, when the data transmission system is the system shown in FIG. 4 . The number of the first connection channels is the number of connection channels between the first switching device and the interface circuit of the first destination switching network, which may specifically be: Number of connection channels between network interface circuits. Further, the number of elements in the equalization sequence is related to the number of the first connection channels, and may specifically be: the number of elements in the equalization sequence is equal to the first value, and the first value is between every two levels of switching devices in the N-level switching device. The common multiple of the number of connection channels and the number of first connection channels. Wherein, N is an integer greater than or equal to 2.

可选地,第一值为N级交换设备中每两级交换设备之间的连接通道数与第一连接通道数的公倍数可以为最小公倍数。例如,以第一交换设备为三级交换设备为例,例如图10所示。一、二、三级交换设备每两级交换设备之间的连接通道数分别为K,L,M。也即,每级交换设备输出与下游交换设备连接的IO数分别为K,L,M。其中,M即为上述第一连接通道数。此时,均衡序列的元素个数可以为K,L,M的最小公倍数W=LCM(K,L,M)。则第一数据帧中的负载均衡域的取值范围可以为LB={0,1,2,…,W-1}。也即均衡序列可以为{0,1,2,…,W-1}。Optionally, the first value may be the least common multiple of the number of connection channels between every two levels of switching devices in the N-level switching device and the number of the first connection channels. For example, take the first switching device as a three-level switching device as an example, as shown in FIG. 10 . The number of connection channels between the first-, second-, and third-level switching devices is K, L, and M respectively. That is, the number of IOs output by each level of switching device and connected to the downstream switching device are K, L, and M, respectively. Wherein, M is the number of the above-mentioned first connection channels. At this time, the number of elements of the equalization sequence may be the least common multiple of K, L, and M, W=LCM(K, L, M). Then, the value range of the load balancing field in the first data frame may be LB={0, 1, 2, . . . , W-1}. That is, the equalization sequence can be {0, 1, 2, ..., W-1}.

在上述三级交换设备的情况下,除了通过第一源交换网接口电路实现第一级交换设备的负载均衡外,三级交换设备的输出仍然需要做三次均衡,如图10所示的二次均衡、三次均衡和四次均衡的位置。例如,通过上述确定的最小公倍数确定均衡序列的元素个数之后,第一源交换网接口电路可以在每个第一数据帧的负载均衡域中独立下插均衡序列中的一个元素。三级交换设备通过静态配置MAC地址转发表,将指定DA对应的第一数据帧转发到指定端口,实现交换及负载均衡处理。In the case of the above three-level switching equipment, in addition to realizing the load balancing of the first-level switching equipment through the first source switching network interface circuit, the output of the three-level switching equipment still needs to be balanced three times, as shown in Figure 10. The position of the equalization, the third equalization and the fourth equalization. For example, after the number of elements of the balancing sequence is determined by the least common multiple determined above, the first source switching network interface circuit may independently insert an element in the balancing sequence into the load balancing domain of each first data frame. The third-level switching device forwards the first data frame corresponding to the specified DA to the specified port by statically configuring the MAC address forwarding table to realize switching and load balancing processing.

如图11所示,假设一、二、三级交换设备输出与下游设备连接的IO数分别为{K,L,M}={5,5,4}。则均衡序列的个数可以为LCM(K,L,M)=LCM(5,5,5)=20。第一源交换网接口电路下插到多个第一数据帧的负载均衡域中的均衡序列可以为LB={0,1,2,3,…,17,18,19}。第一源交换网电路在第一业务数据流的多个第一数据帧中分别依次重复下插了LB={0,1,2,3,…,17,18,19}中的一个元素。第一级交换设备输出时:负载均衡域分别下插了LB={0,5,10,15}的第一数据帧从第一交换设备的IO_0输出。负载均衡域分别下插了LB={1,6,11,16}的第一数据帧从第一交换设备的IO_1输出。负载均衡域分别下插了LB={2,7,12,17}的第一数据帧从第一交换设备的IO_2输出。负载均衡域分别下插了LB={3,8,13,18}的第一数据帧从第一交换设备的IO_3输出。负载均衡域分别下插了LB={4,9,14,19}的第一数据帧从第一交换设备的IO_4输出。第二级交换设备输出时:负载均衡域分别下插了LB={0,5,10,15}报文从IO_0输出。负载均衡域分别下插了LB={1,6,11,16}的第一数据帧从第一交换设备的IO_1输出。负载均衡域分别下插了LB={2,7,12,17}的第一数据帧从第一交换设备的IO_2输出。负载均衡域分别下插了LB={3,8,13,18}的第一数据帧从第一交换设备的IO_3输出。负载均衡域分别下插了LB={4,9,14,19}的第一数据帧从第一交换设备的IO_4输出。第三级交换设备输出时:负载均衡域分别下插了LB={0,4,8,12,16}第一数据帧从IO_0输出。负载均衡域分别下插了LB={1,5,9,13,17}的第一数据帧从第一交换设备的IO_1输出。负载均衡域分别下插了LB={2,6,10,14,18}的第一数据帧从第一交换设备的IO_2输出。负载均衡域分别下插了LB={3,7,11,15,19}的第一数据帧从第一交换设备的IO_3输出。通过上述方法,即实现了交换设备的负载均衡。As shown in FIG. 11 , it is assumed that the number of IOs between the output of the first-, second-, and third-level switching devices connected to the downstream devices is {K, L, M}={5, 5, 4}, respectively. Then the number of equalization sequences may be LCM(K,L,M)=LCM(5,5,5)=20. The balancing sequence inserted into the load balancing domain of the plurality of first data frames by the interface circuit of the first source switching network may be LB={0, 1, 2, 3, . . . , 17, 18, 19}. The first source switching network circuit repeatedly inserts one element of LB={0, 1, 2, 3, . . . , 17, 18, 19} into multiple first data frames of the first service data stream in sequence. When the first-level switching device is outputting: the first data frame with LB={0, 5, 10, 15} inserted into the load balancing domain is output from IO_0 of the first switching device. The first data frame with LB={1, 6, 11, 16} inserted into the load balancing domain is output from IO_1 of the first switching device. The first data frame with LB={2, 7, 12, 17} inserted into the load balancing domain is output from IO_2 of the first switching device. The first data frame with LB={3, 8, 13, 18} inserted into the load balancing domain is output from IO_3 of the first switching device. The first data frame with LB={4, 9, 14, 19} inserted into the load balancing domain is output from IO_4 of the first switching device. When output from the second-level switching device: LB={0,5,10,15} packets are inserted into the load balancing domain respectively and output from IO_0. The first data frame with LB={1, 6, 11, 16} inserted into the load balancing domain is output from IO_1 of the first switching device. The first data frame with LB={2, 7, 12, 17} inserted into the load balancing domain is output from IO_2 of the first switching device. The first data frame with LB={3, 8, 13, 18} inserted into the load balancing domain is output from IO_3 of the first switching device. The first data frame with LB={4, 9, 14, 19} inserted into the load balancing domain is output from IO_4 of the first switching device. When the third-level switching device is outputting: the load balancing domain is respectively inserted with LB={0,4,8,12,16} The first data frame is output from IO_0. The first data frame with LB={1, 5, 9, 13, 17} is respectively inserted into the load balancing domain and output from IO_1 of the first switching device. The first data frame with LB={2, 6, 10, 14, 18} is respectively inserted into the load balancing domain and output from IO_2 of the first switching device. The first data frame with LB={3, 7, 11, 15, 19} is respectively inserted into the load balancing domain and output from IO_3 of the first switching device. Through the above method, the load balancing of the switching device is realized.

上述均衡序列的元素示例中,均是从元素0开始的顺序序列。应理解,均衡序列还可以有其它可能的组成方式。例如均衡序列中的元素个数为4时,除上述列举的均衡序列{0,1,2,3}外,均衡序列还可以是{1,2,3,4},或者也可以是{2,4,6,8}。当然还可以为其他的组成,此处不再一一列举。In the above-mentioned element examples of the equalization sequence, they are all sequential sequences starting fromelement 0. It should be understood that the equalization sequence may also have other possible composition modes. For example, when the number of elements in the equalization sequence is 4, in addition to the equalization sequence {0,1,2,3} listed above, the equalization sequence can also be {1,2,3,4}, or it can also be {2 ,4,6,8}. Of course, other compositions may also be used, which will not be listed one by one here.

为了实现业务的无损交换,在数据帧汇聚到目的源交换网接口电路后,需要进行保序恢复处理。也即,在多个第一数据帧汇聚到第一目的源交换网接口电路后,第一目的源交换网接口电路需要进行保序恢复处理。例如,业务的保序功能需要在上行FIC和下行FIC分别实现。如图12所示,上行FIC在TS_SN实现,下行FIC实现排序重组。In order to realize the lossless switching of services, after the data frame is converged to the interface circuit of the destination source switching network, it is necessary to perform sequence-preserving recovery processing. That is, after a plurality of first data frames are aggregated to the first destination source switching network interface circuit, the first destination source switching network interface circuit needs to perform sequence-preserving recovery processing. For example, the order-preserving function of services needs to be implemented separately in the upstream FIC and the downstream FIC. As shown in Figure 12, the upstream FIC is implemented in the TS_SN, and the downstream FIC is implemented in order and reorganization.

在一种可选的实施方式中,在第一源交换网接口电路根据均衡序列向第一交换设备发送多个第一数据帧之前,第一源交换网接口电路按设定顺序在多个第一数据帧的每一个第一数据帧对应的第一域中下插时间戳或者序列号。示例性地,设定顺序可以为递增顺序,或其他顺序,本申请对此不作限定。其中,序列号可以为递增的序列号。当下插时间戳时,要求数据传输系统中的所有源交换网接口电路和目的交换网接口电路的时钟同步。In an optional implementation manner, before the first source switching network interface circuit sends a plurality of first data frames to the first switching device according to the equalization sequence, the first source switching network interface circuit executes multiple first data frames according to a set sequence. A timestamp or a sequence number is inserted into the first field corresponding to each first data frame of a data frame. Exemplarily, the setting order may be an increasing order, or other order, which is not limited in this application. The serial number may be an incremental serial number. When the time stamp is inserted, the clocks of all the source switched network interface circuits and the destination switched network interface circuits in the data transmission system are required to be synchronized.

进一步地,第一目的交换网接口电路将多个第一数据帧进行排序,具体可以为:第一目的交换网接口电路根据每个第一数据帧对应的第一域中的时间戳或者序列号对多个第一数据帧进行排序(例如递增排序)。这样即可以完成业务的保序恢复。Further, the first destination switching network interface circuit sorts the multiple first data frames, which may specifically be: the first destination switching network interface circuit sorts the first data frames according to the timestamp or the serial number in the first field corresponding to each first data frame. Sort the plurality of first data frames (eg, ascending sort). In this way, the order-preserving recovery of the business can be completed.

示例性地,当数据帧中的第一域下插时间戳时,当第一目的交换网接口电路接收到来自多个业务的数据帧时,第一目的交换网接口电路不区分业务,做全局的统一时间戳排序。将所有业务的数据帧按照时间先后顺序排序,完成业务的保序恢复。Exemplarily, when a time stamp is inserted into the first field in the data frame, when the first destination switching network interface circuit receives data frames from multiple services, the first destination switching network interface circuit does not distinguish between services and does a global Uniform timestamp ordering of . The data frames of all services are sorted in chronological order to complete the sequence-preserving recovery of services.

采用本申请实施例提供的数据传输系统,采用通用的交换设备就可以实现业务数据的均衡分发,可以避免数据传输系统对专用芯片的依赖,数据传输比较灵活,可以实现各个厂家的互换,应用广泛。By adopting the data transmission system provided by the embodiment of the present application, the balanced distribution of service data can be realized by using a general switching device, the dependence of the data transmission system on the dedicated chip can be avoided, the data transmission is relatively flexible, and the exchange of various manufacturers can be realized, and the application widely.

基于上述实施例,本申请实施例还提供了一种数据传输方法。如图13所示,该方法的具体流程可以包括:Based on the foregoing embodiments, the embodiments of the present application further provide a data transmission method. As shown in Figure 13, the specific flow of the method may include:

步骤1301:第一源交换网接口电路将第一业务数据流映射到多个第一数据帧。多个第一数据帧的每一个第一数据帧的目的地址字段包括负载均衡域。负载均衡域用于实现第一交换设备的负载均衡。Step 1301: The first source switching network interface circuit maps the first service data stream to a plurality of first data frames. The destination address field of each of the plurality of first data frames includes a load balance field. The load balancing domain is used to implement load balancing of the first switching device.

具体地,第一源交换网接口电路如何将第一业务数据流映射到多个第一数据帧的实现过程可以参见上述数据传输系统中涉及的相关描述,此处不再重复赘述。Specifically, for an implementation process of how the first source switching network interface circuit maps the first service data stream to multiple first data frames, reference may be made to the relevant descriptions involved in the above data transmission system, which will not be repeated here.

步骤1302:第一源交换网接口电路根据均衡序列向第一交换设备发送多个第一数据帧。其中,多个第一数据帧的每一个第一数据帧对应的负载均衡域被下插了均衡序列中的一个元素。均衡序列中的元素个数与第一连接通道数相关。第一连接通道数为第一交换设备第一目的交换网接口电路之间的连接通道数。Step 1302: The first source switching network interface circuit sends a plurality of first data frames to the first switching device according to the equalization sequence. Wherein, the load balancing field corresponding to each of the plurality of first data frames is down-inserted with an element in the balancing sequence. The number of elements in the equalization sequence is related to the number of first connection channels. The number of the first connection channels is the number of connection channels between the interface circuits of the first destination switching network of the first switching device.

在一种可选的实施方式中,当第一交换设备为单级交换设备时,均衡序列中的元素个数与第一连接通道数相关,具体可以为:均衡序列中的元素个数与第一连接通道数相等。在另一种可选的实施方式中,当第一交换设备为N级交换设备时,第一连接通道数为第一交换设备与第一目的交换网接口电路之间的连接通道数,具体可以为:第一连接通道数为第一交换设备中第N级交换设备与第一目的交换网接口电路之间的连接通道数。均衡序列中的元素个数与第一连接通道数相关,具体可以为:均衡序列中的元素个数等于第一值,第一值为N级交换设备中每两级交换设备之间的连接通道数与第一连接通道数的公倍数。其中,N为大于或者等于2的整数。可选地,公倍数可以为最小公倍数。In an optional implementation manner, when the first switching device is a single-stage switching device, the number of elements in the equalization sequence is related to the number of the first connection channels, which may be specifically: the number of elements in the equalization sequence is related to the number of elements in the equalization sequence. The number of connected channels is equal. In another optional implementation manner, when the first switching device is an N-level switching device, the number of the first connection channels is the number of connection channels between the first switching device and the interface circuit of the first destination switching network, which may be specifically where: the number of the first connection channels is the number of connection channels between the Nth-level switching device in the first switching device and the interface circuit of the first destination switching network. The number of elements in the equalization sequence is related to the number of first connection channels, and may specifically be: the number of elements in the equalization sequence is equal to the first value, and the first value is the connection channel between each two-level switching device in the N-level switching device The common multiple of the number and the number of the first connection channel. Wherein, N is an integer greater than or equal to 2. Optionally, the common multiple may be the least common multiple.

具体地,多个第一数据帧的每一个第一数据帧被下插均衡序列中的一个元素的具体介绍可以参见上述传输系统的介绍中涉及的相关描述,此处不再重复赘述。Specifically, for a specific introduction of an element in the down-insertion equalization sequence of each of the plurality of first data frames, reference may be made to the relevant descriptions involved in the above-mentioned introduction of the transmission system, which will not be repeated here.

步骤1303:第一交换设备将多个第一数据帧发送给第一目的交换网接口电路。Step 1303: The first switching device sends a plurality of first data frames to the first destination switching network interface circuit.

具体地,第一交换设备将多个第一数据帧发送给第一目的交换网接口电路的实现过程,可以参见上述数据传输系统的介绍中的相关描述和示例,此处不再重复赘述。Specifically, for the implementation process of the first switching device sending multiple first data frames to the interface circuit of the first destination switching network, reference may be made to the relevant descriptions and examples in the above data transmission system introduction, which will not be repeated here.

步骤1304:第一目的交换网接口电路将多个第一数据帧进行排序,并对排序后的多个第一数据帧进行解封装,得到第一业务数据流。Step 1304: The first destination switching network interface circuit sorts the multiple first data frames, and decapsulates the sorted multiple first data frames to obtain the first service data stream.

示例性地,多个第一数据帧的每一个第一数据帧的源地址字段包括第一域,第一域用于指示多个第一数据帧的每一个第一数据帧的排序。第一源交换网接口电路在根据均衡序列向第一交换设备发送多个第一数据帧之前,按设定顺序(例如递增顺序等)在多个第一数据帧的每一个第一数据帧对应的第一域中下插时间戳或者序列号。进而,第一目的交换网接口电路将多个第一数据帧进行排序,具体可以为:第一目的交换网接口电路根据多个第一数据帧的每一个第一数据帧对应的第一域中的时间戳或者序列号对多个第一数据帧进行排序(例如递增排序)。具体地,上述过程可以参见上述数据传输系统的介绍中涉及的相关描述,此处不再重复赘述。Exemplarily, the source address field of each of the plurality of first data frames includes a first field, and the first field is used to indicate the ordering of each of the plurality of first data frames. Before sending the plurality of first data frames to the first switching device according to the equalization sequence, the first source switching network interface circuit corresponds to each first data frame of the plurality of first data frames in a set order (for example, an increasing order, etc.). The timestamp or sequence number is inserted into the first field of the . Further, the first destination switching network interface circuit sorts the plurality of first data frames, specifically: the first destination switching network interface circuit sorts the first data frames according to the first field corresponding to each first data frame of the plurality of first data frames. The timestamps or sequence numbers of the multiple first data frames are sorted (eg, ascending sorting). Specifically, for the foregoing process, reference may be made to the relevant descriptions involved in the introduction of the foregoing data transmission system, which will not be repeated here.

采用本申请实施例提供的数据传输方法,可以灵活传输数据,并且在数据传输时,不依赖专用设备就可以实现数据均衡分发。By using the data transmission method provided by the embodiments of the present application, data can be flexibly transmitted, and during data transmission, balanced distribution of data can be achieved without relying on special equipment.

基于以上实施例,本申请实施例还提供了一种数据传输装置。如图14所示,数据传输装置1400包括收发单元1401和处理单元1402。其中,收发单元1401用于数据传输装置1400接收数据和/或发送数据,处理单元1402用于对数据传输装置1400执行的操作进行控制管理。处理单元1402还可以控制收发单元1401执行的数据接收/或发送步骤。Based on the above embodiments, the embodiments of the present application further provide a data transmission apparatus. As shown in FIG. 14 , thedata transmission apparatus 1400 includes atransceiver unit 1401 and aprocessing unit 1402 . Thetransceiver unit 1401 is used for thedata transmission apparatus 1400 to receive data and/or send data, and theprocessing unit 1402 is used to control and manage the operations performed by thedata transmission apparatus 1400 . Theprocessing unit 1402 may also control the data receiving/or transmitting steps performed by thetransceiving unit 1401 .

示例性地,该数据传输装置1400具体是上述实施例中的源交换网接口电路,或者源交换网接口电路中的处理器、芯片、者芯片系统或一个功能模块等。Exemplarily, thedata transmission apparatus 1400 is specifically the source switching network interface circuit in the above-mentioned embodiment, or a processor, chip, or chip system or a functional module in the source switching network interface circuit.

例如,当该数据传输装置用于实现上述图13的实施例中第一源交换网接口电路的功能时,处理单元1402用于执行上述步骤1301。收发单元1401用于执行上述步骤1302。重复之处,此处不再重复赘述。For example, when the data transmission apparatus is used to implement the function of the first source switching network interface circuit in the embodiment of FIG. 13 , theprocessing unit 1402 is used to execute the above step 1301 . Thetransceiver unit 1401 is configured to perform the above step 1302 . The repetition will not be repeated here.

需要说明的是,本申请实施例中对单元的划分是示意性的,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式。在本申请的实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。It should be noted that the division of units in the embodiments of the present application is illustrative, and is only a logical function division, and other division methods may be used in actual implementation. Each functional unit in the embodiments of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.

所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(read-only memory,ROM)、随机存取存储器(random access memory,RAM)、磁碟或者光盘等各种可以存储程序代码的介质。The integrated unit, if implemented in the form of a software functional unit and sold or used as an independent product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the present application can be embodied in the form of software products in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, and the computer software products are stored in a storage medium , including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, removable hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

基于以上实施例,本申请实施例还提供了另一种数据传输装置。如图15所示,数据传输装置1500包括通信接口1501和处理器1502。可选地,所述数据传输装置1500中还包括存储器1503。所述存储器1503可以设置于所述数据传输装置1500内部,或设置于所述数据传输装置1500外部。所述处理器1502控制所述通信接口1501接收和发送数据等。Based on the above embodiments, the embodiments of the present application further provide another data transmission apparatus. As shown in FIG. 15 , thedata transmission apparatus 1500 includes acommunication interface 1501 and aprocessor 1502 . Optionally, thedata transmission apparatus 1500 further includes amemory 1503 . Thememory 1503 may be disposed inside thedata transmission device 1500 or outside thedata transmission device 1500 . Theprocessor 1502 controls thecommunication interface 1501 to receive and transmit data and the like.

具体地,处理器1502可以是中央处理器(central processing unit,CPU)、网络处理器(network processor,NP)或者CPU和NP的组合。处理器1502还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(application-specific integrated circuit,ASIC),可编程逻辑器件(programmable logic device,PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(complex programmable logic device,CPLD)、现场可编程逻辑门阵列(field-programmable gate array,FPGA)、通用阵列逻辑(generic array logic,GAL)或其任意组合。Specifically, theprocessor 1502 may be a central processing unit (CPU), a network processor (NP), or a combination of CPU and NP. Theprocessor 1502 may further include hardware chips. The above-mentioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof.

其中,所述通信接口1501、所述处理器1502和所述存储器1503之间相互连接。可选地,所述通信接口1501、所述处理器1502和所述存储器1503可以通过总线1504相互连接。所述总线1504可以是外设部件互连标准(Peripheral Component Interconnect,PCI)总线或扩展工业标准结构(Extended Industry Standard Architecture,EISA)总线等。所述总线可以分为地址总线、数据总线、控制总线等。为便于表示,图15中仅用一条粗线表示,但并不表示仅有一根总线或一种类型的总线。Wherein, thecommunication interface 1501, theprocessor 1502 and thememory 1503 are connected to each other. Optionally, thecommunication interface 1501 , theprocessor 1502 and thememory 1503 may be connected to each other through abus 1504 . Thebus 1504 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus or the like. The bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, only one thick line is shown in FIG. 15, but it does not mean that there is only one bus or one type of bus.

在一种可选的实施方式中,存储器1503用于存放程序等。具体地,程序可以包括程序代码,该程序代码包括计算机操作指令。存储器1503可能包括RAM,也可能还包括非易失性存储器(non-volatile memory),例如一个或多个磁盘存储器。所述处理器1502执行所述存储器1503所存放的应用程序,实现上述功能,从而实现数据传输装置1500的功能。In an optional implementation manner, thememory 1503 is used to store programs and the like. Specifically, the program may include program code, the program code including computer operation instructions. Thememory 1503 may include RAM, and may also include non-volatile memory, such as one or more disk memories. Theprocessor 1502 executes the application program stored in thememory 1503 to realize the above-mentioned functions, thereby realizing the functions of thedata transmission apparatus 1500 .

示例性地,该数据传输装置1500具体可以是上述实施例中的源交换网接口电路。例如,当该数据传输装置用于实现上述图13的实施例中第一源交换网接口电路的功能时,通信接口1501可以实现图13所示的实施例中的由第一源交换网接口电路执行的收发操作。处理器1502可以实现图13所示的实施例中由第一源交换网接口电路执行的除收发操作以外的其他操作。相关具体描述可参见图13所示的实施例中的相关描述,此处不再详细介绍。Exemplarily, thedata transmission apparatus 1500 may specifically be the source switching network interface circuit in the foregoing embodiment. For example, when the data transmission apparatus is used to implement the function of the first source switching network interface circuit in the embodiment shown in FIG. 13 , thecommunication interface 1501 can implement the first source switching network interface circuit in the embodiment shown in FIG. 13 . The send and receive operations performed. Theprocessor 1502 may implement other operations other than the transceiving operation performed by the first source switching network interface circuit in the embodiment shown in FIG. 13 . For related specific descriptions, reference may be made to the related descriptions in the embodiment shown in FIG. 13 , which will not be described in detail here.

基于以上实施例,本申请实施例提供了一种数据传输系统。该数据传输系统包括上述实施例涉及的至少一个源交换网接口电路(例如第一源交换网接口电路)、至少一个交换设备(例如第一交换设备)和多个目的交换网接口电路(例如第一目的交换网接口电路)等。Based on the above embodiments, the embodiments of the present application provide a data transmission system. The data transmission system includes at least one source switching network interface circuit (eg, a first source switching network interface circuit), at least one switching device (eg, a first switching device), and a plurality of destination switching network interface circuits (eg, a first switching network interface circuit) involved in the above embodiments. A destination switching network interface circuit) and so on.

本申请实施例还提供一种计算机可读存储介质。所述计算机可读存储介质用于存储计算机程序,该计算机程序被计算机执行时,所述计算机可以实现上述方法实施例提供的数据传输方法。Embodiments of the present application further provide a computer-readable storage medium. The computer-readable storage medium is used to store a computer program, and when the computer program is executed by a computer, the computer can implement the data transmission method provided by the above method embodiments.

本申请实施例还提供一种计算机程序产品。所述计算机程序产品用于存储计算机程序,该计算机程序被计算机执行时,所述计算机可以实现上述方法实施例提供的数据传输方法。The embodiments of the present application also provide a computer program product. The computer program product is used to store a computer program, and when the computer program is executed by a computer, the computer can implement the data transmission method provided by the above method embodiments.

本申请实施例还提供一种芯片,包括处理器和通信接口,通信接口用于接收和/或发送数据;所述处理器用于使得所述芯片实现上述方法实施例提供的数据传输方法。Embodiments of the present application further provide a chip, including a processor and a communication interface, where the communication interface is used to receive and/or send data; the processor is used to enable the chip to implement the data transmission method provided by the above method embodiments.

本领域内的技术人员应明白,本申请的实施例可提供为方法、系统、或计算机程序产品。因此,本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。As will be appreciated by those skilled in the art, the embodiments of the present application may be provided as a method, a system, or a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

本申请是参照根据本申请的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the present application. It will be understood that each process and/or block in the flowchart illustrations and/or block diagrams, and combinations of processes and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.

这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions The apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in the flow or blocks of the flowcharts and/or the block or blocks of the block diagrams.

显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的范围。这样,倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims (20)

1. A data transmission system, comprising: at least one source switched network interface circuit, at least one switching device, and a plurality of destination switched network interface circuits, wherein:
the first source switching network interface circuit maps the first service data flow to a plurality of first data frames, and the destination address field of each first data frame of the plurality of first data frames comprises a load balancing domain which is used for realizing the load balancing of the first switching equipment;
the first source switching network interface circuit sends the plurality of first data frames to the first switching device according to a balancing sequence, wherein a load balancing domain corresponding to each first data frame of the plurality of first data frames is down-inserted with one element in the balancing sequence, the number of elements in the balancing sequence is related to the number of first connection channels, and the number of first connection channels is the number of connection channels between the first switching device and a first destination switching network interface circuit;
the first switching device sends the plurality of first data frames to the first destination switching network interface circuit;
the first destination switching network interface circuit sequences the plurality of first data frames, and decapsulates the sequenced plurality of first data frames to obtain the first service data stream;
the first source switching network interface circuit is any one of the at least one source switching network interface circuit, the first switching device is one or more of the at least one switching device, and the first destination switching network interface circuit is any one of the plurality of destination switching network interface circuits.
2. The system of claim 1 wherein when said first switching device is a single stage switching device, the number of elements in said equalization sequence being related to the number of said first connection paths comprises:
the number of elements in the equalization sequence is equal to the number of first connection channels.
3. The system as claimed in claim 1, wherein when the first switch device is an N-stage switch device, the first connection channel number is a connection channel number between the first switch device and the first destination switch network interface circuit, and includes:
the first number of the connection channels is the number of the connection channels between the nth stage switching device in the first switching device and the first destination switching network interface circuit;
the number of elements in the equalization sequence is related to the number of the first connection channels, and the method comprises the following steps:
the number of elements in the equalization sequence is equal to a first value, and the first value is a common multiple of the number of connection channels between each two stages of switching equipment in the N stages of switching equipment and the number of the first connection channels;
wherein N is an integer greater than or equal to 2.
4. The system of claim 3, wherein the common multiple is a least common multiple.
5. The system according to any of claims 1-4, wherein the dropped element of the load balancing field corresponding to each of the plurality of first data frames is associated with a receive port of the first destination switch network interface circuit.
6. The system of any one of claims 1-5, wherein the load balancing field corresponding to each of the plurality of first data frames is down-inserted by one element of the balancing sequence, comprising:
the H first data frames in each first data frame in the first P groups of first data frames are respectively and sequentially inserted into the elements in the equalization sequence;
q first data frames in the P +1 th group of first data frames are respectively and sequentially inserted with the first Q elements in the equalization sequence;
wherein H is equal to the number of elements in the equalized sequence, P is an integer quotient of T divided by H, Q is a remainder of T divided by H, and T is the number of the first data frames;
h is an integer greater than or equal to 1, P is an integer greater than or equal to 1, Q is a positive integer, and Q is less than H.
7. The system of any one of claims 1-6, wherein the source address field of each of the plurality of first data frames includes a first field to indicate an ordering of each of the plurality of first data frames;
before the first source-switched network interface circuit transmits the first plurality of data frames to the first switching device according to an equalization sequence, the method further comprises:
the first source switching network interface circuit interpolates a time stamp or a sequence number in a first domain corresponding to each of the plurality of first data frames according to a set sequence.
8. The system of claim 7, wherein the first destination switch network interface circuit to order the first plurality of data frames comprises:
and the first destination switching network interface circuit sequences the first data frames according to the time stamps or the sequence numbers in the first domain corresponding to each first data frame of the first data frames.
9. The system of any of claims 1-8, wherein at least one of the switching devices is a local area network switch (LSW) switch chip.
10. A method of data transmission, comprising:
mapping a first service data stream to a plurality of first data frames, wherein a destination address field of each first data frame of the plurality of first data frames comprises a load balancing domain, and the load balancing domain is used for realizing load balancing of first switching equipment;
and sending the plurality of first data frames to the first switching device according to the balancing sequence, wherein one element in the balancing sequence is inserted into a load balancing domain corresponding to each of the plurality of first data frames, the number of elements in the balancing sequence is related to the number of first connection channels, and the number of first connection channels is the number of connection channels between the first switching device and a first destination switching network interface circuit.
11. The method of claim 10 wherein when the first switching device is a single stage switching device, the number of elements in the equalization sequence is related to the number of first connection channels, comprising:
the number of elements in the equalization sequence is equal to the number of the first connection channels.
12. The method as claimed in claim 10, wherein when the first switch device is an N-stage switch device, the first number of connection channels is a number of connection channels between the first switch device and the first destination switch network interface circuit, and includes:
the first number of the connection channels is the number of the connection channels between the nth stage switching device in the first switching device and the first destination switching network interface circuit;
the number of elements in the equalization sequence is related to the number of the first connection channels, and the method comprises the following steps:
the number of elements in the equalization sequence is equal to a first value, and the first value is a common multiple of the number of connection channels between each two stages of switching equipment in the N stages of switching equipment and the number of first connection channels;
wherein N is an integer greater than or equal to 2.
13. The method of claim 12, wherein the common multiple is a least common multiple.
14. The method of any of claims 10-13, wherein the dropped element of the load balancing field corresponding to each of the plurality of first data frames is associated with a receive port of the first destination switch network interface circuit.
15. The method of any one of claims 10-14, wherein the load balancing field corresponding to each of the plurality of first data frames is down-inserted by one element of the balancing sequence, comprising:
h first data frames in each first data frame in the first P groups of first data frames are respectively and sequentially inserted into elements in the equalization sequence;
q first data frames in the P +1 th group of first data frames are respectively and sequentially inserted with the first Q elements in the equalization sequence;
wherein H is equal to the number of elements in the equalized sequence, P is an integer quotient of T divided by H, Q is a remainder of T divided by H, and T is the number of the first data frames;
h is an integer greater than or equal to 1, P is an integer greater than or equal to 1, Q is a positive integer, and Q is less than H.
16. The method of any one of claims 10-15, wherein the source address field of each of the plurality of first data frames includes a first field for indicating an ordering of each of the plurality of first data frames;
prior to transmitting the plurality of first data frames to the first switching device in accordance with the equalization sequence, the method further comprises:
and interpolating time stamps or sequence numbers in a first domain corresponding to each first data frame of the plurality of first data frames according to a set sequence.
17. A data transfer device comprising a memory, a processor, and a communication interface, wherein:
the memory is to store computer instructions;
the communication interface is used for receiving and sending data;
the processor is coupled to the memory for invoking computer instructions in the memory to cause the data transmission apparatus to perform the method of any of claims 10-16.
18. A data transmission device comprising a processor and a communication interface, wherein:
the communication interface is used for receiving and sending data;
the processor is configured to cause the data transmission apparatus to perform the method according to any one of claims 10 to 16.
19. A computer-readable storage medium having stored thereon computer-executable instructions for causing a computer to perform the method of any one of claims 10-16 when invoked by the computer.
20. A computer program product comprising instructions for causing a computer to perform the method of any one of claims 10 to 16 when the computer program product is run on the computer.
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