Disclosure of Invention
In order to solve the problems, the invention provides a pixel circuit based on a double-gate transistor, which can realize synchronous operation of liquid crystal pixels on the premise that the prior liquid crystal pixels input image display contents through the cooperation of a grid electrode and a source electrode, thereby effectively improving color confusion and picture tearing phenomena caused by time delay from a first row to a last row; in addition, the electronic components are fewer, and the effect of saving circuit area and improving the aperture opening ratio is achieved.
Another object of the present invention is to provide a driving method of a pixel circuit based on a double gate transistor.
The technical scheme adopted by the invention is as follows:
A pixel circuit based on a double-gate transistor comprises a liquid crystal pixel capacitor Cls, a transistor T1 and a double-gate transistor T2, wherein one end of the liquid crystal pixel capacitor Cls is connected with a reference voltage of a liquid crystal screen, the other end of the liquid crystal pixel capacitor Cls is connected with a drain electrode of the double-gate transistor T2, a source electrode of the double-gate transistor T2 is coupled to a first synchronization signal Vst1, one grid electrode of the double-gate transistor T2 is connected to a second synchronization signal Vst2, and the other grid electrode is coupled with the transistor T1.
Preferably, the transistor T1 is a double gate transistor.
Preferably, when the transistor T1 is a double gate transistor, both gates of the transistor T1 are connected to Vscan.
Preferably, when the transistor T1 is a double gate transistor, one gate of the transistor T1 is connected to Vscan and the other gate is connected to the first synchronization signal Vst1.
Preferably, when the transistor T1 is a double gate transistor, one gate of the transistor T1 is connected to Vscan and the other gate is connected to the other gate of the double gate transistor T2.
Preferably, when the transistor T1 is a double gate transistor, one gate of the transistor T1 is connected to Vscan and the other gate is connected to one of the gates of the double gate transistor T2.
Preferably, when the transistor T1 is a double gate transistor, one gate of the transistor T1 is connected to Vscan and the other gate is connected to the liquid crystal pixel capacitor Cls.
Preferably, each pixel is at least connected with a global common electrode line for controlling all pixels, and the layout mode of the global common electrode line is as follows: arranged in a lateral gate direction, arranged in a longitudinal source direction, or arranged crosswise.
Preferably, the global common electrode line of the pixel circuit, and two adjacent rows or two adjacent columns can share one electrode line with the same property, so as to reduce the occupation of the opening area.
The driving method of the pixel circuit based on the double-gate transistor is implemented by applying the pixel circuit based on the double-gate transistor according to the following steps:
S1, charging link: charging the liquid crystal pixel capacitor Cls by a high level, and presetting the liquid crystal pixel capacitor Cls to the high level;
s2, second-order programming link: the liquid crystal pixel capacitor Cls discharges to the working voltage required by the liquid crystal pixel to display the image;
S3, a first-order programming link: at the operating voltage of S2, the charge supplied from the external control unit is received and stored through the transistor T1 for display of the next frame image.
Preferably, the working voltage required for discharging the liquid crystal pixel capacitor Cls to the liquid crystal pixel in S2 to display an image is specifically:
The double gate transistor T2 is turned on by the cooperation of the first synchronization signal Vst1 and the second synchronization signal Vst2, and the liquid crystal pixel capacitor Cls is discharged.
Preferably, when the liquid crystal pixel capacitor Cls is discharged, the discharging time depends on the time when the high and low levels of the first and second synchronization signals Vst1 and Vst2 are matched.
Preferably, the discharging capability of the double gate transistor T2 when the liquid crystal pixel capacitor Cls is discharged depends on the electric charge stored in S3.
Preferably, after the second-order programming step of S2, the backlight is turned on and the first-order programming is started synchronously.
Preferably, after the second-order programming step of S2, the backlight is turned on, and the first-order programming is performed after buffering, where the time when the first-order programming starts is correspondingly delayed, but may not extend to the second-order programming step of the next frame.
Preferably, in the charging step of S1, all the liquid crystal pixels constituting the liquid crystal panel are preset to the high level simultaneously at one time by the high level.
Preferably, in the second-order programming step of S2, the second-order programming of all pixels that make up the liquid crystal display is completed simultaneously and once.
Preferably, the method further comprises: and the backlight source of the liquid crystal screen is sequentially turned on and off, and the first-order programming process is sequentially carried out in the first-order programming stage, so that pipelined driving logic is formed.
Preferably, when the first synchronization signal Vst1 and the second synchronization signal Vst2 are square waves, the range of the operating voltage Vpx is 0+.vpx+.vh, where VH is a voltage at which the liquid crystal pixel capacitance is preset to the highest level.
Preferably, when the first synchronization signal Vst1 and the second synchronization signal Vst2 are ramp waves, the dual gate transistor maintains the high level state of the liquid crystal pixel capacitor for a certain time and then turns on, so as to discharge the liquid crystal pixel capacitor to the zero level.
Preferably, when the operating voltage is at a high level, the time for which the high level is maintained depends on the charge in S3 and the parameters of the ramp wave.
Compared with the prior art, when the liquid crystal display device is used, the liquid crystal pixel capacitor Cls is charged through the high level, and the liquid crystal pixel is preset to the high level state; programming the charge to realize discharging so that the charge reaches the working voltage required by the liquid crystal pixel to display images; finally, while maintaining the working voltage of the liquid crystal pixel, simultaneously receiving and storing the charge transmitted by an external control unit through a transistor T1 for displaying the next frame of image;
By first presetting the liquid crystal pixel cell to a high level and then discharging to a level required for displaying an image, the speed is faster than charging from a low level to a high level; secondly, each frame of picture is preset to a high level, so that the afterimage phenomenon of the liquid crystal capacitor under a specific picture is eliminated; meanwhile, when the current image is displayed, the electric quantity required by the display of the next frame of image is programmed and charged, because the programming and charging at this time are required to be sequentially charged one by one, the time is long, the requirements on the driving capability of an external grid driver and a source driver are greatly reduced by adopting the mode of simultaneously carrying out the display of the current image and the advance storage of the electric quantity data of the next frame of image, the time for displaying backlight illumination of the image is also greatly prolonged, the time from the first row to the last row of the liquid crystal display is effectively improved, the brightness caused by the illumination time of a compressed backlight source is not enough, or the phenomenon of color confusion and image tearing can be caused by prolonging the backlight source time in a continuous traditional scanning mode;
More important is: the invention can realize the functions by only two transistors and one capacitor, has controllable volume, controllable process and controllable cost, and has high aperture ratio and light transmittance due to small volume, thereby having good application value.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In the description of the present invention, it should be clearly understood that terms such as "vertical", "horizontal", "longitudinal", "front", "rear", "left", "right", "upper", "lower", "horizontal", and the like indicate an orientation or a positional relationship based on that shown in the drawings, and are merely for convenience of describing the present invention, and do not mean that the apparatus or element referred to must have a specific orientation or position, and thus should not be construed as limiting the present invention.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In the description of the present invention, it should also be noted that, in the text, the bottom gate and the top gate are opposite, and the source and the drain are opposite; those skilled in the art can make adjustments according to conventional means;
In the description of the invention, the electrodes corresponding to the global voltage are named differently under different driving methods and calculating methods according to different circuits in order to take care of habits of people in the field;
In the description of the invention, LTPS technology and expression habit are adopted, but the method in the invention is also applicable to liquid crystal screens produced by adopting the technical technology of IGZO, a-Si, OTFT and other different liquid crystal screens;
the invention aims to solve the problem of the field sequential color realization method, and can be applied to the traditional liquid crystal screen with normally-bright backlight;
The field sequential display names used in the present invention are also called a sequential method, a color sequential method, or the like in different cases.
Example 1
The embodiment 1 of the invention provides a pixel circuit based on a double-gate transistor, as shown in fig. 1, which comprises a liquid crystal pixel capacitor Cls, a transistor T1 and a double-gate transistor T2, wherein one end of the liquid crystal pixel capacitor Cls is connected with a reference voltage of a liquid crystal screen, the other end of the liquid crystal pixel capacitor Cls is connected with a drain electrode of the double-gate transistor T2, a source electrode of the double-gate transistor T2 is coupled to a first synchronization signal Vst1, one gate electrode of the double-gate transistor T2 is connected to a second synchronization signal Vst2, and the other gate electrode is coupled with the transistor T1; the grid electrode of the transistor T1 is connected with a grid electrode driver of the liquid crystal screen, and the source electrode of the transistor T1 is connected with a source electrode driver of the liquid crystal screen;
Thus, with the above-described structure, the liquid crystal pixel capacitor Cls is charged at a high level to preset the liquid crystal pixel to a high level state; then the double-gate transistor T2 is conducted to program the charges, so that the charges are discharged and reach the working voltage required by the liquid crystal pixel to display images; finally, while maintaining the charge voltage of the liquid crystal pixel, the charge transmitted by an external control unit is received and stored through a transistor T1 for displaying the next frame of image; the method effectively improves the phenomena of color confusion and picture tearing caused by overlong non-self-frame brightness because the brightness caused by the fact that the illumination time of a compressed backlight source is insufficient or the backlight source is opened when the liquid crystal pixels are not charged to the self-frame data in the traditional grid scanning driving mode of the liquid crystal display; more important is: the embodiment can realize the functions by only two transistors (the transistor T1 and the double-gate transistor T2) and one capacitor (the liquid crystal pixel capacitor Cls), has controllable volume, controllable process and controllable cost, and has high aperture ratio and light transmittance due to small volume, long backlight illumination time and good application value.
In a specific embodiment:
The transistor T1 is a double gate transistor.
In order to have a better opening effect, when the transistor T1 is a double-gate transistor, the transistor T1 is connected in the following five ways:
First, when the transistor T1 is a double gate transistor, both gates of the transistor T1 are connected to Vscan, as shown in fig. 2 a;
Second, when the transistor T1 is a double-gate transistor, one gate of the transistor T1 is connected to Vscan and the other gate is connected to the first synchronization signal Vst1, as shown in fig. 2 b;
third, when the transistor T1 is a double-gate transistor, one gate of the transistor T1 is connected to Vscan, and the other gate is connected to the other gate of the double-gate transistor T2, as shown in fig. 2 c;
Fourth, when the transistor T1 is a double-gate transistor, one gate of the transistor T1 is connected to Vscan, and the other gate is connected to one of the gates of the double-gate transistor T2, as shown in fig. 2 d;
fifth, when the transistor T1 is a double-gate transistor, one gate of the transistor T1 is connected to Vscan, and the other gate is connected to the liquid crystal pixel capacitor Cls, as shown in fig. 2 e;
The third mode is preferable among the five modes, and the mode has the effect of enhancing feedback, and specifically comprises the following steps:
When the Vdata signal with higher voltage needs to be transmitted, the auxiliary gate potential is also a high level voltage, which reduces the Vth value of the transistor T1 and increases the programming speed;
When the Vdata signal with lower potential is transmitted, the auxiliary gate potential is low-level voltage, so that the Vth value of the transistor T1 is higher, and the voltage of the gate node of the double-gate transistor T2 which is programmed is better kept;
wherein Vscan is a gate driving voltage generated by the external gate driver, vdata is a source driving voltage generated by the external source driver, and Vth is a threshold voltage of the transistor T1.
In particular embodiments:
the pixel circuit further comprises at least two global common electrode lines for controlling all pixels, wherein the layout mode of the global common electrode lines is as follows: arranged in a lateral gate direction, arranged in a longitudinal source direction, or arranged crosswise;
When the pixel circuit is used for arranging the global common electrode lines, the global common electrode lines between two adjacent rows or columns of liquid crystal pixels can be shared, so that the arrangement of one line can be reduced, and the aperture ratio of a liquid crystal screen can be increased;
Specifically, when the number of the global common electrode lines is two, the two global common electrode lines are Vst1 and Vst2, and thus, two adjacent rows of scanning lines or two adjacent columns of data lines can share the line, so that occupation of space can be reduced, and the aperture ratio can be improved.
In the specific circuit design and the design process of the liquid crystal pixel, in order to reduce space occupation, reduce resistance-capacitance load of the whole circuit design and improve transmission capacity, logic of two adjacent rows of common electrode wires is adopted;
Therefore, each liquid crystal pixel applying the circuit is connected with a plurality of common global electrode wires, the electrode wires are arranged in parallel or in a cross manner in the liquid crystal screen according to rows or columns, and the adjacent upper and lower rows or left and right columns of liquid crystal pixels can share the same common electrode wire, so that one common electrode wire can be saved according to every two rows or every two columns, a group of electrode wires can be reduced, the area occupied by wiring can be reduced, and the aperture ratio of the liquid crystal screen can be increased.
More specifically, the cross-sectional view of the structure of the double-gate transistor T2 is shown in fig. 3a, wherein Glass is a liquid crystal screen Glass substrate layer; s is the source of the transistor; d is the drain of the transistor; TG is top gate, transistor top gate signal line; SHIELDING METAL as a protective layer, defined as a bottom gate; LTPS is then representative of the semiconductor layer under LTPS process;
The LTPS active layer is controlled by a bottom gate insulating layer to form a first gate control, i.e., a bottom gate control. And because the LTPS active layer is protected by the SiOx dielectric layer on the back, a top gate control structure can be designed, and a second gate control structure, namely a top gate control structure, is formed by the LTPS active layer. When the top gate voltage is different, a dual threshold voltage mode can be formed, and a liquid crystal LCD display pixel circuit under the two-stage programming charging logic can be formed.
More specifically, a schematic symbol diagram of the double-gate transistor T2 is shown in fig. 3b, where S is the transistor source; d is the drain of the transistor; TG and SHIELDING METAL represent two gates, respectively;
More specifically, the transfer characteristic diagram of the double gate transistor T2 is shown in fig. 3c, where IDS is the current between the source and the drain, and VTG-VS is the voltage between the source and the gate.
The beneficial effects of this embodiment are as follows:
firstly, all liquid crystal pixels of a liquid crystal screen can synchronously perform normal display;
Secondly, through the design of the double-gate transistor, the internal design of the liquid crystal pixel is obviously changed, the opaque area occupied by the capacitor is saved, the aperture ratio is improved, and the brightness is improved;
In addition, in the embodiment, the data used for display is programmed by matching the gate circuit and the source circuit in the normal display stage, so that the driving mode of the liquid crystal screen gate scanning can be adopted in the traditional mode, and the time from the first row to the last row of scanning driving mode is longer, so that the requirement on driving capability is lower;
In addition, by setting a black field with a certain time in each frame of picture and alternating the light field lighted by the backlight, the smear phenomenon is improved, and the picture quality is improved;
Through specific buffer design logic, for liquid crystal screens with different manufacturing processes, due to different TFT processes and different leakage current capacities, the buffer design logic well reduces the conditions of excessive capacitor voltage drop, inaccurate partial programming data and inaccurate display caused by the leakage current;
in addition, the embodiment can realize the functions by only two transistors and one capacitor, has controllable volume, controllable process and controllable cost, and has high aperture opening ratio and light transmittance due to small volume and good application value.
Example 2
Embodiment 2 of the present invention provides a driving method of a pixel circuit based on a double-gate transistor, which is applied to the pixel circuit based on a double-gate transistor described in embodiment 1, as shown in fig. 4, and specifically implemented according to the following steps:
s1, presetting a charging link: charging the liquid crystal pixel capacitor Cls by a high level, and presetting the liquid crystal pixel capacitor Cls to the high level; the method comprises the following steps:
Inputting high level through a global common electrode line to synchronously preset all liquid crystal pixel capacitors Cls forming a liquid crystal screen to a high level state at one time;
s2, second-order programming link: the liquid crystal pixel capacitor Cls discharges to the working voltage required by the liquid crystal pixel to display the image; the method comprises the following steps:
the double-gate transistor T2 is conducted through the cooperation of the first synchronous signal Vst1 and the second synchronous signal Vst2, and the liquid crystal pixel capacitor Cls is discharged;
It should be noted that: because the first synchronous signal and the second synchronous signal are global voltages shared by the whole liquid crystal screen, the second-order programming links of all pixels forming the liquid crystal screen are synchronously completed at one time;
S3, a first-order programming link: receiving and storing charges transmitted from an external control unit through a transistor T1 under the working voltage of the S2 for displaying the next frame of image; the method comprises the following steps:
The whole liquid crystal screen sequentially carries out charging operation from the first row to the last row, a grid driver GATE DRIVER and a source driver of the liquid crystal screen are mutually matched, and each liquid crystal pixel is subjected to first-order programming charging from the first row to the last row;
the charging data is related to the displayed image and is controlled by a source driver.
The liquid crystal pixels are sequentially turned on one by one, and are controlled by a gate driver GATE DRIVER.
More specifically:
In the step S2, when the liquid crystal pixel capacitor Cls is discharged, the discharging time is determined by the time of the high-low level dislocation of the first synchronization signal Vst1 and the second synchronization signal Vst 2;
The first synchronization signal Vst1 goes high and lasts for a first time, the second synchronization signal Vst2 goes high and lasts for a second time, and the second time is longer than the first time, then discharge is started at the moment, and the discharge time is the time difference between the second time and the first time.
When the liquid crystal pixel capacitor Cls is discharged, the discharging capability depends on the electric charge stored in S3, namely: the more the amount of charge coupled to the gate of transistor T2, the stronger the discharge capability, the lower the voltage to which the liquid crystal pixel capacitance Cls is pulled down; on the contrary, the voltage on the liquid crystal pixel capacitor Cls is higher, and the discharging capability is the conducting capability of the double-gate transistor, which is determined by the working characteristics in the double-threshold voltage mode.
The second-order programming link in the S2 has two forms, namely digital programming and analog programming of voltage bootstrap type;
In the analog programming method, when the first synchronization signal Vst1 and the second synchronization signal Vst2 are square waves, the range of the operating voltage Vpx is 0Vpx VH, where VH is the voltage when the liquid crystal pixel capacitance is preset to the highest level.
In the digital programming method, when the first synchronization signal Vst1 and the second synchronization signal Vst2 are ramp waves, the operating voltage is high, but the time for maintaining the high level is determined by the programming parameters, which depend on the charge in S3 and the parameters of the ramp waves.
More specifically:
in the first-order programming step of S3, the entire liquid crystal screen is sequentially charged from the first row to the last row, and the gate driver GATE DRIVER and the source driver of the liquid crystal screen are mutually matched, so that each liquid crystal pixel is subjected to first-order programming charging from the first row to the last row; the charging data is related to the displayed image and is controlled by a source driver.
The method further comprises the steps of: and the backlight source of the liquid crystal screen is sequentially turned on and off, and the first-order programming process is sequentially carried out in the first-order programming stage, so that pipelined driving sequential logic is formed.
In the two programming links of this embodiment, the following specific examples are used to illustrate the operation sequence of the voltage bootstrap digital programming, as shown in fig. 5 a:
In fig. 5a, P1 pre-charge is a preset charging step S1, in which the first synchronization signal Vst1 and the second synchronization signal Vst2 are both high-level voltages, the threshold voltage of the double-gate transistor T2 is reduced after modulation, and the threshold voltage is reduced, and the threshold voltage enters the on-state region, so that all pixels are synchronously set to high level, which is prepared for the subsequent pulse width modulation process;
The P2 program is the first-order programming step S31 of S3 in fig. 4, in which the programming signal Vdata is input to the gate node of the double-gate transistor T2 through the transistor T1. For the pixel circuits of different rows and the same column, for example, the corresponding pixel circuits of the same column on the two rows controlled by Vscan [1] and Vscan [2], the gates of the double-gate transistors are programmed to Vd1 and Vd2 voltages in sequence, and have different charge levels;
P3 display is the second-order programming step of S2 in fig. 4, in which when the second synchronization signal Vst2 is ramped up, the charge on the liquid crystal pixel capacitor ccs is completely released, i.e., vpx is reduced to 0, when the value of the ramp up reaches the pre-programmed signal Vdata.
The specific calculation method is as follows:
the threshold voltage vth=vth 0+k1×vdata+k2×vramp of the double gate transistor T2;
Wherein Vth0 is an initial threshold voltage of the double-gate transistor T2, vdata is a source data voltage of the first-order programming, vramp is a voltage of the ramp signal line, that is, vst2, k1 and k2 are coefficients;
Preferably, k1= -1, k2= -1;
If vramp=β×t, vth=vth 0-Vdata- β×t; i.e. the Vth value of the double gate transistor T2 is in dynamic variation.
For a transistor, when its Vgs > Vth, the on discharge condition is satisfied;
namely: vdata > Vth0-Vdata- β t;
namely, the conversion is obtained: t= (Vth 0-2 x vdata)/β;
for better illustration, examples are as follows:
Vth 0=1v, vdata= -2V, β=1v/ms, and t=5ms corresponds to, in a specific display, when the backlight is turned on, the liquid crystal pixel is in a high-level full-on state, and when the duration t=5ms, the display time can be 5ms.
If Vdata = -3V, the corresponding display time becomes 7ms.
In short, different data are programmed on the first-order programming data Vdata through the first-order programming stage, so that different high-level opening time can be obtained, and a digital programming result is realized.
Where Vgs is the voltage value between the source and drain of the transistor.
The first order programming data for each pixel remains on the main gate until the next first order programming begins.
In the digital programming method, the first-order programming phase and the light field phase are not overlapped, so that the whole light field time is relatively short.
As shown in fig. 5a, the duration of the operating voltage Vpx1 is different from the duration of Vpx2 due to the different data inputs of the two pixels Vdata [1] and Vdata [2 ].
The timing diagram of the simulated programming method is shown in FIG. 5 b:
Fig. 5b is a schematic diagram of an analog-driven pixel circuit and an operation timing diagram, wherein a red R sub-frame is followed by a green G sub-frame as an example, and the first-order programming and the second-order programming of the green G sub-frame, and the light field L phase and the black field K phase are illustrated.
When the red R sub-frame is displayed, on one hand, the normal display of the red R sub-frame is performed, and on the other hand, the first-order programming of the green G sub-frame is synchronously developed; it should be noted that, although the data signal of the G sub-frame has entered the top gate, i.e. the main gate, of the double gate transistor T2 through the transistor T1, the double gate transistor T2 is still in the higher threshold voltage Vth state due to the low voltage of the bottom gate, i.e. the auxiliary gate Vst2, of the double gate transistor T2, so that the first-order programming of the green G sub-frame does not affect the normal display of the red R sub-frame, and the liquid crystal pixel capacitor Cls of the pixel circuit maintains the voltage required for the display of the red R sub-frame.
As shown in fig. 5b, the black field K frame includes two preset charging links S1 and second order programming links S2 of fig. 4, that is, two phases P1 and P2 in fig. 5 b; in the P1, i.e., the preset charging pre-charge stage, first, the second synchronization signal Vst2, i.e., vctrl in the present figure, becomes high level, and the first synchronization signal Vst1, i.e., vst in the present figure, also becomes high level, so that the operating voltage Vpx of the liquid crystal pixel capacitor Cls becomes high level VH in synchronization;
Then, P2, namely a second-order programming 2nd program stage is entered, the top gate and the bottom gate of the double-gate transistor T2, namely Vst and Vctrl connected with the main gate and the auxiliary gate are changed, so that the double-gate transistor T2 is in a lower threshold voltage Vth working state, namely a conducting state begins to discharge, and the discharge amount of the liquid crystal pixel capacitor Cls depends on the charge input to the main gate of the double-gate transistor T2 through Vdata in the previous sub-frame by first-order programming; when Vdata is transferred to the main grid electrode of the double-grid transistor T2, the higher the voltage is, the more the input charges are, the stronger the conduction capacity is, and the stronger the discharge capacity is; the operating voltage Vpx of the liquid crystal pixel capacitor can be discharged and pulled down to a lower voltage; otherwise, the working voltage Vpx is discharged to a higher voltage; the top gate and the bottom gate of the double-gate transistor T2, that is, the Vst and Vctrl connected to the main gate and the auxiliary gate, are changed, and the duration of each other determines the duration of the second-order programming in the P2 stage, and also affects the working voltage Vpx of the liquid crystal pixel capacitor; the duration is long, the discharge time is long, and the working voltage Vpx is pulled down to a lower voltage level; otherwise, the voltage level is relatively high;
Finally, enter the light field L frame, namely P3 stage, namely S3 link described in FIG. 4, different backlight colors represent different colors of the light field Lframe; in the P3 phase, i.e., the light-emitting display state in which the backlight is turned on, the threshold voltage Vth of the double-gate transistor T2 becomes high and is turned off because Vctrl is already at a low level, so that the voltage Vpx of the liquid crystal pixel capacitor Cls maintains the operating voltage after the second-order programming is completed.
In the above process, the working principle and the calculation method are as follows:
Wherein, Δt is the discharge time, i.e. the duration of the second-order programming of P2, VH is the preset voltage when the liquid crystal pixel is preset to a high level, tf is the discharge characteristic time of the liquid crystal pixel capacitor Cls, depending on the characteristics of the liquid crystal pixel itself; clc is a capacitance value of the liquid crystal pixel capacitance Cls;
Tf＝CLC*Req
Wherein Req is the equivalent impedance of the drive transistor;
In the above formula, L, W are the channel length and the channel width of the double-gate transistor T2, μ is the electron mobility, CI is the capacitance of the gate dielectric layer of the TFT unit area, vt is the threshold voltage Vth of the TFT, and Vdata is the data voltage value input through the SOURCE DRIVER in the first-order programming stage.
Combining the above, the complete expression for Vpx is:
In this way, for each liquid crystal pixel capacitor, according to the data of the image, that is, representing different liquid crystal pixel working voltages Vpx, the voltages are constant for the same liquid crystal screen, and for the same image data, the voltages can be obtained by table lookup or other calculation; the time of the second-order programming P2 can be defined according to the actual situation, and once the working mode is determined for the whole liquid crystal screen and all pixels, Δt is the discharge time, i.e. the duration of the second-order programming P2 is also a constant; therefore, the first-order programming data Vdata required to be input in the first-order programming stage can be calculated in the above mode, so that image display is realized, and a simulation programming result is realized.
Wherein,
The first order programming data for each pixel remains on the main gate until the next first order programming begins.
After the second-order programming phase P2, a P3 phase, i.e., a light field L field, in this example, a green field G Frame, is entered, the backlight is turned on, and after the P31 buffer phase, a first-order programming P32 phase is performed, as shown in fig. 4, in the S31 link and the S32 link.
As shown, due to the different data inputs of the two pixels Vdata [1] and Vdata [2], different Vpx [1] and Vpx [2] are generated. .
The beneficial effects of this embodiment are as follows:
(1) In the conventional pixel circuit design mode and the actual mode of backlight factory brightness, the liquid crystal pixel capacitor programming is sequentially carried out, the data programming is completed from the first row to the last row, and the required normal time is long, so that the content displayed in the first row is asynchronous with the content displayed in the last row; especially in the high resolution liquid crystal display environment, the asynchronous situation is more serious;
When the field sequential method is adopted to display, when the RGB light source is matched to realize color display, and when the programming method is adopted to display images, the last row of programming is required to be completed to start the backlight source for displaying, so that the time for actual display is extruded to be extremely small, and the brightness is extremely low. To increase the brightness, on the one hand, the backlight brightness is increased, so that the backlight requirements become abnormally high, and the service life of the display light source is easy to cause; on the other hand, the programming time of the liquid crystal pixel capacitor is shortened, so that the data driving capability of the display is required to be high, and programming of all data is required to be completed as soon as possible, so that the cost of the driving chip and the driving capability are required to be high, and the cost is also high.
In this embodiment, the data programming and the light emission are in parallel pipeline operation, for example, in the link of displaying the red R sub-frame, the data programming operation required by the next sub-frame G is performed synchronously. Therefore, the effective display time is not occupied by the data writing action, so that the effective time is remarkably increased, the field sequence display time is improved, and the driving capability requirement on a programming device is reduced;
Of course, the technical scheme provided by the embodiment not only can be used for a liquid crystal screen for displaying by adopting a field sequential method, but also can be used for a traditional liquid crystal screen, namely a common liquid crystal screen in the background technology.
(2) The embodiment can realize the functions by only two transistors and one capacitor, has controllable volume, controllable process and controllable cost, and has high aperture opening ratio and light transmittance due to small volume, thereby having good application value.
The present invention is not limited to the above-mentioned embodiments, and any changes or substitutions that can be easily understood by those skilled in the art within the technical scope of the present invention are intended to be included in the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.