SPICE circuit netlist generation method for assisting in circuit parameter optimizationTechnical Field
The invention relates to the technical field of analog circuits, in particular to a SPICE circuit netlist generation method for assisting in circuit parameter optimization.
Background
In the design of an analog circuit, the gate length L, the gate width W, the resistance R of a resistor and the capacitance C of a capacitor of each CMOS transistor in the circuit to be optimized are critical to the influence on the circuit performance, and a reasonable and effective structure is designed, and meanwhile, the circuit parameters in the circuit are required to be excellent or the most excellent to show the superiority of the circuit performance, so that in the design of an integrated circuit, the parameter values are required to be continuously simulated, adjusted and improved through circuit simulation, and the design of the analog circuit parameters is still a time-consuming and laborious task. It is therefore desirable to speed up the automated design of analog integrated circuits by accomplishing an automatic optimization of circuit parameters. An important step in order to accomplish the automatic optimization of the parameters of the integrated circuit is how to automate the simulation.
However, most of mainstream EDAs in the field of integrated circuit design, such as Cadence, are graphical interfaces, so that engineers use the interface conveniently, and automation of parameter optimization is limited, if parameter optimization needs to be completed in the graphical interfaces, image matching and script various preconditions are needed, parameter adjustment is difficult to be automated, multithreading simultaneous optimization cannot be achieved, SPICE adopts a mode of compiling a circuit netlist to simulate, but most of conventional SPICE simulation software is convenient for engineers to use the interface, and is difficult to use on an automatically generated circuit netlist.
Disclosure of Invention
(One) solving the technical problems
Aiming at the defects of the prior art, the invention provides a SPICE circuit netlist generation method for auxiliary circuit parameter optimization, and the advantages of accelerating the design flow and more rapid and stable algorithm flow are achieved by the method for auxiliary circuit parameter optimization and improving the parameter optimization efficiency, so as to solve the problems of low parameter optimization efficiency, slow design flow and unstable algorithm flow.
(II) technical scheme
In order to achieve the advantages of improving the parameter optimization efficiency, accelerating the design flow, and enabling the algorithm flow to be quicker and stable, the invention provides the following technical scheme:
A SPICE circuit netlist generation method for auxiliary circuit parameter optimization comprises the following steps:
s1, setting a circuit structure and various parameters
The simulation process is configured in a group by setting the option statement of SPICE, the feasibility of the circuit is checked only before parameter optimization, the circuit structure is not checked in the parameter optimization process, the simulation graphic file is not generated, the simulation time is reduced to the maximum extent, the waveform file is generated and displayed after the optimization is completed, the user can configure the device library according to the self requirement under the condition of adhering to the set rule, or the device library used by the user is selected, and the names of key devices in the device library can be automatically read through the device library, wherein the device comprises but not limited to MOS (metal oxide semiconductor) tubes, triodes and diodes, and the topological relation of the circuit devices is set.
S2, setting circuit simulation and performance indexes
Setting a circuit integral simulation mode, a circuit performance index calculation mode and a circuit performance index reading mode, and selecting one or more performance indexes as optimization targets, wherein the method comprises the following specific steps of firstly setting a simulation mode and a simulation node on which the performance indexes depend, wherein the simulation mode comprises the following two modes: the direct current simulation and the alternating current simulation, and then the calculation formulas of the performance indexes are set, and the calculation formulas of the common performance indexes stored in the database can be directly called.
S3, reading performance indexes
And S2, repeating until all the performance indexes are set, and finally checking whether the simulation is correct.
S4, performing simulation
After setting all information, the simulation stage is carried out, firstly, a SPICE circuit netlist is generated according to corresponding parameters, the SPICE circuit netlist is written into a sp format file required by SPICE simulation, secondly, SPICE simulation software is called by a subprocess, the compatible SPICE simulation software comprises HSPICE, NGSPICE, finally, the subprocess is waited to complete the simulation, and a simulation result of an optimization target obtained by the simulation is read in a simulation result file in a regular expression mode.
S5, inputting circuit parameters and performance indexes into an optimizer
Setting parameter relation and parameter range of the device to be optimized, initializing circuit parameters to be optimized according to the parameter range, wherein selectable circuit parameters comprise a grid length L, a grid width W of a CMOS tube, a resistance value R of a resistor and a capacitance C of a capacitor, the parameter relation is a linear relation, a simulation process of a group of parameters is completed, the circuit parameters and performance indexes are transmitted to an optimizer, and the selectable optimizers comprise, but are not limited to, a genetic algorithm optimizer, a differential evolution optimizer and a reinforcement learning optimizer.
S6, modifying circuit parameters
The optimizer corrects the circuit parameters according to the simulation result, the corrected circuit parameters are input into the system again, and the steps S3-S5 are repeated until the performance index to be optimized meets the design requirement, and the optimal circuit parameter combination is obtained.
Preferably, the topological relation in the step S1 comprises the following setting modes of directly setting the connection relation between elements in a circuit and the elements, reading the existing SPICE circuit netlist and extracting the circuit netlist, and converting other forms of circuit codes into codes in a system.
Preferably, the device information in the step S1 includes the first letter of the name of the device, the number of nodes, the type of the device, and the type of the parameter.
Preferably, the names of the nodes in the step S1 may be letters, numbers, and combinations thereof, and the node names are unique, wherein there must be a node named "0", which is representative.
Preferably, the optimization type in the step S1 may be classified into a fixed parameter device whose parameters are unchanged during the optimization process and a device to be optimized whose parameters are optimized during the optimization process, and parameters of the fixed parameter device are set.
Preferably, in the step S2, a static operating point of the circuit for performing transient simulation is additionally set, and the reinforcement learning optimizer in the step S5 may obtain a better optimization effect by using information of the static operating point.
Preferably, the optimizer in step S5 refers to a structure that can adjust the input according to the output of the system to obtain a set of optimal outputs of the system.
Preferably, the multithreading operation is introduced in the process of steps S3-S6, and each thread generates and optimizes the circuit netlist with the same structure but different parameters, so that the speed of the whole flow can be increased.
Preferably, in the step S1, a topology relationship of circuit components is set, and the specific steps are as follows:
s11, setting information about current devices and device types, S12, setting nodes connected with the current devices, S13, setting the optimized types of the current devices, S14, completing the setting of the current devices, putting the current devices into a completed device library, repeating the processes S11-S13 until the setting of all devices is completed, and S15, checking the integrity and feasibility of a topological structure.
Preferably, in the step S2, the common performance indexes include a target that the performance indexes are finally set by noise, linearity, gain, input impedance, output impedance, power consumption, voltage power supply, output amplitude and response speed, and a target that the performance indexes occupy in all indexes are set by being greater than a certain number, smaller than a certain number, as large as possible and as small as possible.
(III) beneficial effects
Compared with the prior art, the SPICE circuit netlist generation method for auxiliary circuit parameter optimization has the following beneficial effects:
1. According to the SPICE circuit netlist generation method for auxiliary circuit parameter optimization, after the structure of a circuit is determined, a reasonable SPICE simulation flow can be constructed through the method, and then a circuit simulation model is optimized through various optimizers to find an optimal circuit parameter combination.
2. Compared with the existing thought, the SPICE circuit netlist generation method for auxiliary circuit parameter optimization can greatly improve the efficiency in the field of parameter optimization by simulating the automation of integrated circuit parameter optimization and accelerate the design flow of the integrated circuit. The standardized automation of SPICE circuit netlist generation enables the parameter optimization process to be compatible with an automatic optimization algorithm, and the algorithm flow can be more rapid and stable.
Drawings
FIG. 1 is a flow chart of a method of generating an embodiment of the present invention;
FIG. 2 is a schematic flow chart of the generating method after multithreading optimization according to the embodiment of the invention;
FIG. 3 is a schematic diagram of an exemplary optimizer of a method of generating an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-3, the SPICE circuit netlist generating method for auxiliary circuit parameter optimization provided by the embodiment of the invention includes the following steps:
s1, setting a circuit structure and various parameters
By setting the option statement of SPICE to carry out a group of configuration on the simulation process, by default, a group of option statement is used, so that the feasibility of the circuit can be checked only before parameter optimization, the circuit structure is not checked in the parameter optimization process, a simulation graph file is not generated, the simulation time is reduced to the maximum, and a waveform file is generated and displayed after the optimization is completed. Under the rule of adherence to the setting, the user can configure by himself, set up the component library, can choose the component library that the user uses, can read the name of the key component among them automatically through the component library, including but not limited to several kinds of devices, namely MOS tube, triode, diode, set up the topological relation of the circuit component, the system includes several kinds of setting up the component in the circuit and its connection relation directly, read the existing SPICE circuit netlist and extract the circuit netlist therein, change other forms of circuit codes into the codes in the system.
S11, setting information related to the current device and the type of the device, wherein the information comprises the initial letters of the names of the devices, the number of nodes, the type of the devices and the types of parameters;
S12, setting nodes connected with the current device connection, wherein the names of the nodes can be letters, numbers and combinations thereof, the node names are unique, and a node with the name of 0 is necessarily present and represents the place;
s13, setting the optimization type of the current device, wherein the optimization type can be divided into a fixed parameter device with unchanged parameters in the optimization process and a device to be optimized with optimized parameters in the optimization process, and setting the parameters of the fixed parameter device;
s14, completing the setting of the current device, putting the current device into a completed device library, and repeating the S11-S13 process until the setting of all devices is completed;
S15, checking the integrity and feasibility of the topological structure.
S2, setting circuit simulation and performance finger
Setting a simulation mode of the whole circuit, namely a calculation mode and a performance index reading mode of the performance index of the circuit, and selecting one or more performance indexes as optimization targets, wherein the specific steps are S21, setting a simulation mode and a simulation node on which the performance index depends, and the simulation mode comprises direct current simulation and alternating current simulation. S22, setting a calculation formula of a performance index, wherein the calculation formula of a common performance index stored in a database can be directly called, and the common performance index comprises noise, linearity, gain, input impedance, output impedance, power consumption, voltage power supply, output amplitude and response speed 3, and the target for setting the performance index comprises more than a certain number, less than a certain number, as large as possible and as small as possible. And setting the weight of the performance index in all indexes.
S3, reading performance indexes
And S2, repeating until all the performance indexes are set, and finally checking whether the simulation is correct.
S4, performing simulation
After setting all information, the simulation stage is carried out, firstly, a SPICE circuit netlist is generated according to corresponding parameters, the SPICE circuit netlist is written into a sp format file required by SPICE simulation, secondly, SPICE simulation software is called by a subprocess, the compatible SPICE simulation software comprises HSPICE, NGSPICE, finally, the subprocess is waited to complete the simulation, and a simulation result of an optimization target obtained by the simulation is read in a simulation result file in a regular expression mode.
S5, inputting circuit parameters and performance indexes into an optimizer
Setting a parameter relation and a parameter range of a device to be optimized, and initializing circuit parameters to be optimized according to the parameter range. The selectable circuit parameters comprise a grid length L, a grid width W of a CMOS tube, a resistance value R of a resistor and a capacitance C of a capacitor, wherein the parameter relation is a linear relation, a simulation process of a group of parameters is completed, the circuit parameters and performance indexes are transmitted to an optimizer, and the selectable optimizer comprises, but is not limited to, a genetic algorithm optimizer, a differential evolution optimizer and a reinforcement learning optimizer, wherein the optimizer refers to a structure capable of adjusting input according to output of a system to obtain a group of optimal output of the system.
S6, modifying circuit parameters
The optimizer corrects the circuit parameters according to the simulation result, the corrected circuit parameters are input into the system again, and the steps S3-S5 are repeated until the performance index to be optimized meets the design requirement, and the optimal circuit parameter combination is obtained.
Because the slowest step is the step of circuit simulation in the whole simulation flow, multithreading operation can be introduced in the process of executing S3-S6, each thread respectively generates and optimizes a circuit netlist with the same structure and different parameters, the speed of the whole flow can be increased, the static working point for carrying out transient simulation is additionally arranged in S2, and the reinforcement learning optimizer in S5 can obtain better optimization effect by utilizing the information of the static working point
The circuit netlist of SPICE is a standard form of general analog circuit and transistor level circuit description, the SPICE circuit netlist contains various information of circuit structure, parameters of circuit elements and circuit simulation mode, after a standard SPICE simulation flow of a circuit structure is built, we change the circuit parameters of gate length L, gate width W, resistance value R of resistor, capacitance C of capacitor and the like of each CMOS tube in the circuit to be optimized and generate a corresponding circuit netlist, then the simulation is completed to obtain the performance index of the circuit, the method for generating the circuit netlist can be compatible with various circuit optimization algorithms, after the structure of the circuit is determined, a reasonable SPICE simulation flow can be built by the method, then the circuit simulation model is optimized by various optimizers, and the optimal circuit parameter combination is found. Compared with the prior art, the automation of the parameter optimization of the analog integrated circuit can greatly improve the efficiency in the field of parameter optimization and accelerate the design flow of the analog integrated circuit. The standardized automation of SPICE circuit netlist generation enables the parameter optimization process to be compatible with an automatic optimization algorithm, and the algorithm flow can be more rapid and stable.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.