Disclosure of Invention
Based on this, the present invention aims to provide an ultra-wideband filter based on IPD technology, which has ultra-wideband characteristics and effectively reduces insertion loss.
The invention is realized by the following technical scheme:
an ultra-wideband band-pass filter based on IPD technology comprises a grounding metal layer, a substrate, a device layer, seven lumped inductances, seven lumped capacitances and two feed ports; the bottom of the substrate is connected with the grounding metal layer, the device layer is arranged at the top of the substrate, seven lumped inductances and seven lumped capacitances are respectively arranged on the device layer, two feed ports are respectively arranged on two sides of the substrate, two sides of the substrate and connected with the substrate, six grounding holes penetrating through the substrate are arranged on the device layer, a first feed port is interconnected with the grounding metal layer through a first grounding hole and a second grounding hole, and a second feed port is interconnected with the grounding metal layer through a third grounding hole and a fourth grounding hole;
The first end of the first lumped capacitor is connected with the first feed port, and the second end of the first lumped capacitor is connected with the first end of the first lumped inductor; the second end of the first lumped inductor is connected with the first end of the second lumped inductor, and the second end of the second lumped inductor is connected with the first end of the second lumped capacitor; the second end of the second lumped capacitor is connected with the first end of the fourth lumped capacitor through the fifth grounding hole and the grounding metal layer respectively, the second end of the fourth lumped capacitor is connected with the first end of the fourth lumped inductor, the second end of the fourth lumped inductor is connected with the first end of the seventh lumped inductor, the second end of the seventh lumped inductor is connected with the first end of the seventh lumped capacitor, and the second end of the seventh lumped capacitor is connected with the second feed port;
The second end of the first lumped inductor is also connected with the first end of a fifth lumped capacitor, the second end of the fifth lumped capacitor is connected with the first end of a fifth lumped inductor, and the second end of the fifth lumped inductor is connected with the second end of a fourth lumped inductor;
The second end of the first lumped inductor is also connected with the first end of a third lumped inductor, the second end of the third lumped inductor is connected with the first end of a third lumped capacitor, the second end of the third lumped capacitor is respectively connected with the first end of a sixth lumped capacitor through a fifth grounding hole and is connected with the grounding metal layer, the second end of the sixth lumped capacitor is connected with the first end of the sixth lumped inductor, and the second end of the sixth lumped inductor is connected with the second end of the fourth lumped inductor.
Compared with the prior art, the invention designs the band-pass filter in the form of lumped parameter elements, not only has ultra-wideband characteristics and high selectivity, but also has good out-of-band rejection; the ultra-wideband band-pass filter has the advantages of being relatively high in low-frequency band application scene, simple in structure and easy to realize, and provides possibility for miniaturization and high-performance design of the ultra-wideband band-pass filter.
Further, the first lumped capacitor, the second lumped capacitor, the third lumped capacitor, the fourth lumped capacitor, the fifth lumped capacitor, the sixth lumped capacitor and the seventh lumped capacitor are all MIM capacitor structures, and the MIM capacitor structures include an upper electrode, a dielectric material and a lower electrode which are stacked in sequence from bottom to top compared with the substrate.
Further, the device layer comprises a first metal layer, a dielectric layer and a second metal layer which are sequentially stacked from bottom to top relative to the substrate; the lower electrode of each lumped capacitor is located on the first metal layer, the dielectric material of each lumped capacitor is located on the dielectric layer, and the upper electrode of each lumped capacitor is located on the second metal layer.
Further, the first lumped inductor, the second lumped inductor, the third lumped inductor, the fourth lumped inductor, the sixth lumped inductor and the seventh lumped inductor are located in the first metal layer, and the fifth lumped inductor is located in the second metal layer; and the device layer is provided with an interconnection hole, and the second end of the fifth lumped inductor is connected with the second end of the fourth lumped inductor through the interconnection hole.
Further, an upper electrode of the first lumped capacitor is connected with the first feed port, and a lower electrode of the first lumped capacitor is connected with a first end of the first lumped inductor; the lower electrode of the second lumped capacitor is connected with the second end of the second lumped inductor, and the upper electrode of the second lumped capacitor is connected with the grounding metal layer through the first grounding hole; the lower electrode of the third lumped capacitor is connected with the second end of the third lumped inductor, and the upper electrode of the third lumped capacitor is connected with the grounding metal layer through the second grounding hole; the upper electrode of the fourth lumped capacitor is connected with the grounding metal layer through the second grounding hole, and the lower electrode of the fourth lumped capacitor is connected with the first end of the fourth lumped inductor; the lower electrode of the fifth lumped capacitor is connected with the second end of the first lumped inductor, and the upper electrode of the fifth lumped capacitor is connected with the first end of the fifth lumped inductor; the lower electrode of the sixth lumped capacitor is connected with the second end of the sixth lumped inductor, and the upper electrode of the sixth lumped capacitor is connected with the grounding metal layer through the second grounding hole; and the lower electrode of the seventh lumped capacitor is connected with the second end of the seventh lumped inductor, and the upper electrode of the seventh lumped capacitor is connected with the second feed port.
Further, an isolation region is respectively arranged between the grounding metal of the grounding metal layer and the first power supply port and between the grounding metal of the grounding metal layer and the second power supply port, and neither the first power supply port nor the second power supply port is connected with the grounding metal. By arranging the isolation region to isolate the signal end from the grounding end, the risk of short circuit is reduced, and the reliability of the device is improved.
Further, the substrate is made of glass, and the dielectric constant of the glass is 5.5; the ultra-low dielectric loss can improve the quality factor of the lumped inductance, further reduce the insertion loss, and the technique for processing the through holes on the glass substrate is simple, such as laser processing, photosensitive glass and the like, thereby reducing the complexity of the process.
Further, the ultra-wideband band-pass filter has a size (0.023 λc×0.015λc×0.127)mm3,λc =1.14 GHz, which is a center frequency wavelength.
Further, each lumped inductor is any one of a planar spiral inductor structure, a circular spiral inductor structure, a square spiral inductor structure, or an octagonal spiral inductor structure.
Further, the first power supply port, the second power supply port and the grounding metal layer are all connected with the substrate through a bonding structure, and the bonding structure is a TiW/Ni/Au/AuSn composite metal film from near to far from the substrate. The TiW (titanium tungsten alloy) layer is used as an adhesion layer, plays a role in improving the adhesion of a metal film, and further can improve the reliability of the device; the Ni layer is used as a solder mask layer, so that the solder can be effectively prevented from diffusing to the dielectric substrate, and the risk of performance degradation is greatly reduced; the Au layer is used as a seed layer of the electroplating tin alloy; the AuSn (gold tin alloy) layer is used as a solder layer, is suitable for a surface mounting process, and can greatly improve the packaging efficiency.
For a better understanding and implementation, the present invention is described in detail below with reference to the drawings.
Drawings
FIG. 1 is an equivalent circuit diagram of an ultra wideband band pass filter based on IPD technology of the present invention;
FIG. 2 is a schematic diagram of a three-dimensional structure of an ultra-wideband band-pass filter based on the IPD technology of the present invention;
FIG. 3 is a top view of an ultra wideband band pass filter based on IPD technology of the present invention;
FIG. 4 is a cross-sectional view of an ultra-wideband band-pass filter based on IPD technology of the present invention;
FIG. 5 is a bottom view of an ultra wideband band pass filter based on IPD technology of the present invention;
FIG. 6 is a graph of S-parameter simulation results of an ultra wideband band-pass filter based on the IPD technique of the present invention;
FIG. 7 is a schematic diagram of a metal composite film in a laminated structure of an ultra-wideband band-pass filter based on IPD technology;
Reference numerals: 1-ground metal layer, 2-substrate, 3-device layer, 30-first metal layer, 32-dielectric layer, 34-second metal layer, 41-first feed port, 42-second feed port, 5-ground hole, 51-first ground hole, 52-second ground hole, 53-third ground hole, 54-fourth ground hole, 55-fifth ground hole, 56-sixth ground hole, 57-interconnect hole, 6-bonding structure, 60-TiW layer, 62-Ni layer, 64-Au layer, 66-AuSn layer, 7-isolation region, L1-first lumped inductance, L2-second lumped inductance, L3-third lumped inductance, L4-fourth lumped capacitance, L5-fifth lumped inductance, L6-sixth lumped inductance, L7-seventh lumped inductance, C1-first lumped structure, C2-second lumped capacitance, C3-third lumped capacitance, C4-fourth lumped capacitance, C5-fifth lumped capacitance, C6-fourth lumped capacitance, C7-fourth lumped capacitance.
Detailed Description
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. In the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.
Applicant follows the design criteria for the ultra wideband band pass filter listed below:
center frequency: 1.14GHz;
Insertion loss: < 1.5dB;
0.5dB passband: 0.613-1.608 GHz;
Out-of-band suppression: more than 35 dB@DC-500 MHz and 2 GHz-4 GHz;
Standing wave ratio: less than 1.5@0.613-1.608 GHz;
Size: (0.023 lambdac 0.015 lambdac 0.127) mm3, lambdac is the central frequency wavelength, which meets the miniaturization design requirement;
An elliptic function frequency response model is adopted to design a theoretical equivalent circuit diagram of the ultra-wideband band-pass filter of the invention shown in figure 1. Wherein, the theoretical value of the first lumped inductor L1 is 5.259nH, the theoretical value of the second lumped inductor L2 is 4.571nH, the theoretical value of the third lumped inductor L3 is 18.980nH, the theoretical value of the fourth lumped inductor L4 is 1.400nH, the theoretical value of the fifth lumped inductor L5 is 11.960nH, the theoretical value of the sixth lumped inductor L6 is 10.100nH, and the theoretical value of the seventh lumped inductor L7 is 6.999nH; the theoretical value of the first lumped capacitor C1 is 4.816pF, the theoretical value of the second lumped capacitor C2 is 1.334pF, the theoretical value of the third lumped capacitor C3 is 5.541pF, the theoretical value of the fourth lumped capacitor C4 is 2.509pF, the theoretical value of the fifth lumped capacitor C5 is 2.117pF, the theoretical value of the sixth lumped capacitor C6 is 18.100pF, and the theoretical value of the seventh lumped capacitor C7 is 3.619pF.
Based on the theoretical value, the applicant provides an ultra-wideband band-pass filter. Referring to fig. 2 to 4, fig. 2 to 4 are a schematic three-dimensional structure diagram, a top view and a cross-sectional view of an ultra wideband band-pass filter based on IPD technology according to the present invention, respectively. As can be seen from the figure, the ultra-wideband band-pass filter based on IPD technology of the present invention comprises:
The device comprises a grounding metal layer 1, a substrate 2, a device layer 3, seven lumped inductances, seven lumped capacitances and two feed ports. The bottom of the substrate 2 is connected to the grounded metal layer 1, and the device layer 3 is disposed on top of the substrate 2, wherein the device layer 3 includes a first metal layer 30, a dielectric layer, and a second metal layer. The seven lumped capacitors are all MIM capacitor structures, and each MIM capacitor structure comprises a lower electrode, a dielectric material and an upper electrode which are sequentially stacked from bottom to top.
First, glass is selected as a substrate flat plate, and a first metal layer 30 is grown on a substrate 2. Then, the first lumped inductor L1, the second lumped inductor L2, the third lumped inductor L3, the fourth lumped inductor L4, the sixth lumped inductor L6 and the seventh lumped inductor L7, and the lower electrode of the first lumped capacitor C1, the lower electrode of the second lumped capacitor C2, the lower electrode of the third lumped capacitor C3, the lower electrode of the fourth lumped capacitor C4, the lower electrode of the fifth lumped capacitor C5, the lower electrode of the sixth lumped capacitor C6 and the lower electrode of the seventh lumped capacitor C7, that is, the first lumped inductor L1, the second lumped inductor L2, the third lumped inductor L3, the fourth lumped inductor L4, the sixth lumped inductor L6 and the seventh lumped inductor L7, and the lower electrode of the first lumped capacitor C1, the lower electrode of the second lumped capacitor C2, the lower electrode of the third lumped capacitor C3, the lower electrode of the fourth lumped capacitor C4, the lower electrode of the fifth lumped capacitor C5, the lower electrode of the sixth lumped capacitor C6 and the lower electrode of the seventh lumped capacitor C7 are all located in the first metal layer 30.
Then, a dielectric layer 32 is grown on the first metal layer 30, where the dielectric layer 32 forms a dielectric material of the first lumped capacitor C1, a dielectric material of the second lumped capacitor C2, a dielectric material of the third lumped capacitor C3, a dielectric material of the fourth lumped capacitor C4, a dielectric material of the fifth lumped capacitor C5, a lower dielectric material of the sixth lumped capacitor C6, and a dielectric material of the seventh lumped capacitor C7.
Finally, a second metal layer 34 is grown on the dielectric layer 32, and then a fifth lumped inductor L5 is fabricated by photolithography and etching processes, and an upper electrode of the first lumped capacitor C1, an upper electrode of the second lumped capacitor C2, an upper electrode of the third lumped capacitor C3, an upper electrode of the fourth lumped capacitor C4, an upper electrode of the fifth lumped capacitor C5, an upper electrode of the sixth lumped capacitor C6, and an upper electrode of the seventh lumped capacitor C7, that is, the fifth lumped inductor L5, and an upper electrode of the first lumped capacitor C1, an upper electrode of the second lumped capacitor C2, an upper electrode of the third lumped capacitor C3, an upper electrode of the fourth lumped capacitor C4, an upper electrode of the fifth lumped capacitor C5, an upper electrode of the sixth lumped capacitor C6, and an upper electrode of the seventh lumped capacitor C7 are all located on the second metal layer 34.
Specifically, the first feeding ports 41 and 42 are respectively located on both sides of the substrate 2 and connected to the substrate 2, and six ground holes 5 penetrating the substrate 2 and an interconnection hole 57 are provided on the device layer 3. Wherein the first feeding port 41 and the second feeding port 42 are in an open semi-cylindrical shape, the longitudinal axes of the first feeding port 41 and the second feeding port 42 are perpendicular to the substrate 2, and the openings of the first feeding port 41 and the second feeding port 42 face to the outer side; the first power supply port 41 is interconnected with the ground metal layer 1 through a first ground hole 51 and a second ground hole 52, and the second power supply port 42 is interconnected with the ground metal layer 1 through a third ground hole 53 and a fourth ground hole 54.
The upper electrode of the first lumped capacitor is connected with the first feed port 41, and the lower electrode of the first lumped capacitor is connected with the first end of the first lumped inductor L1; the second end of the first lumped inductor L1 is connected with the first end of the second lumped inductor L2, and the second end of the second lumped inductor L2 is connected with the lower electrode of the second lumped capacitor C2; the upper electrode of the second lumped capacitor C2 and the upper electrode of the fourth lumped capacitor C4 are respectively connected with the grounding metal layer 1 through a fifth grounding hole 55; the lower electrode of the fourth lumped capacitor C4 is connected to the first end of the seventh lumped inductor L7, the second end of the seventh lumped inductor L7 is connected to the lower electrode of the seventh lumped capacitor C7, and the second end of the seventh lumped capacitor C7 is connected to the second feeding port 42.
The second end of the first lumped inductor L1 is also connected with the lower electrode of a fifth lumped capacitor C5, and the upper electrode of the fifth lumped capacitor C5 is connected with the first end of the fifth lumped inductor L5; the second terminal of the fifth lumped inductance L5 is interconnected with the second terminal of the fourth lumped inductance C4 through an interconnection aperture 57.
The second end of the first lumped inductor L1 is also connected with the first end of a third lumped inductor L3, and the second end of the third lumped inductor L3 is connected with the lower electrode of a third lumped capacitor C3; the upper electrode of the third lumped capacitor C3 and the upper electrode of the sixth lumped capacitor C6 are respectively interconnected with the ground metal layer 1 through the sixth ground hole 56; the lower electrode of the sixth lumped capacitor C6 is connected to the first end of the sixth lumped inductor L6, and the second end of the sixth lumped inductor L6 is connected to the second end of the fourth lumped inductor L4.
It should be noted that, all lumped inductors adopt planar spiral inductor structures, circular spiral inductor structures, square spiral inductor structures or octagonal spiral inductor structures, and in this embodiment, all lumped inductors adopt planar spiral inductor structures.
In addition, the theoretical value of the inductance can be adjusted by adjusting the number of turns of the coil, the line width of the wires and the gap between the wires, and in this embodiment, the parameters of each lumped inductance are as shown in the following table 1:
TABLE 1
| Lumped inductor | Long (mm) | Wide (mm) | Wiring line width (um) | Wire pitch (um) | Turns of coil |
| L1 | 0.49 | 0.4 | 15 | 15 | 3 |
| L2 | 0.4 | 0.4 | 15 | 15 | 3 |
| L3 | 0.57 | 0.57 | 15 | 15 | 8 |
| L4 | 0.22 | 0.22 | 15 | 15 | 3 |
| L5 | 0.6 | 0.6 | 15 | 15 | 4 |
| L6 | 0.54 | 0.54 | 15 | 15 | 4 |
| L7 | 0.54 | 0.54 | 15 | 15 | 3 |
The capacitance can be adjusted by adjusting the areas of the upper electrode plate and the lower electrode plate, so that the theoretical value of the capacitance can be adjusted. In this embodiment, the parameters of each lumped capacitor are shown in table 2 below:
TABLE 2
In the above-mentioned embodiments, any one of metals such as gold, titanium, or tungsten may be used for the first metal layer 30 and the second metal layer 34, and in this embodiment, gold is used as the material of the first metal layer 30 and the second metal layer 34. The six grounding holes 5 and the interconnection holes 60 are solid metal holes, and any metal selected from gold, titanium, tungsten, etc. may be used, and in this embodiment, gold is used as the material of the six grounding holes 5 and the interconnection holes 60. The dielectric layer 32 may be made of zirconia or hafnium oxide, and in this embodiment zirconia is used as the material of the dielectric layer 32.
Further, referring to fig. 5, fig. 5 is a bottom view of the ultra wideband band pass filter based on the IPD technology according to the present invention. As can be seen from fig. 5, an isolation region 7 is disposed between the grounding metal of the grounding metal layer 1 and the first and second feeding ports 41 and 42, and neither the first feeding port 41 nor the second feeding port 42 is connected with the grounding metal, and by disposing the isolation region 7 between the grounding metal of the grounding metal layer 1 and the first and second feeding ports 41 and 42, the signal and grounding ends can be isolated, the risk of short circuit is reduced, and the reliability of the device is improved. Preferably, the two isolation areas 7 are in a semicircular shape which takes the longitudinal axis of the first feed port 41 and the longitudinal axis of the second feed port 42 as the center, so that the isolation effect is more uniform.
Referring to fig. 6, fig. 6 is a graph of S-parameter simulation results of the ultra wideband band-pass filter based on the IPD technology according to the present invention. The center frequency of the ultra-wideband band-pass filter based on the IPD technology is 1.14GHz; the 0.5dB passband frequency range is 0.613-1.608 GHz, with a relative operating bandwidth of about 90%; insertion loss is less than 1.5dB; the passband standing wave ratio is less than 1.5; the out-of-band rejection is greater than 35dB in DC-500 MH and greater than 35dB in 2-4 GHz, so that the method has the advantages of high selectivity and wide stop band, and meets the design performance requirements.
As an optimization of the above technical solution, the first power supply port 41, the second power supply port 42 and the grounding metal layer 1 are all connected with the substrate 2 through the attaching structure 6. Referring to fig. 7, fig. 7 shows that the bonding structure is a TiW/Ni/Au/AuSn composite metal film layer structure sequentially from the near to the far from the substrate, wherein a TiW (titanium tungsten alloy) layer is used as an adhesion layer to improve the adhesion of the metal film, thereby improving the reliability of the device; the Ni layer is used as a solder mask layer, so that the solder can be effectively prevented from diffusing to the dielectric substrate, and the risk of performance degradation is greatly reduced; the Au layer is used as a seed layer of the electroplating tin alloy; the AuSn (gold tin alloy) layer is used as a solder layer, is suitable for a surface mounting process, and can greatly improve the packaging efficiency.
Compared with the prior art, the invention adopts the elliptic function frequency response model to design the band-pass filter in the form of lumped parameter elements, thereby not only having ultra-wideband characteristics, but also having good out-of-band rejection; the method has the advantages of being relatively high in low-frequency application scenes, simple in structure and easy to realize; by combining with the IPD processing technology, the miniaturization of the device can be realized, the reliability of the product is high, the consistency is good, and the device is suitable for mass production. In addition, the feed port of the ultra-wideband band-pass filter, the attaching structure adopted by the grounding metal layer and the gold-tin solder preforming technology are suitable for surface mounting technology, and the packaging efficiency can be greatly improved.
The foregoing detailed description of the invention has been presented only for a few of its embodiments, and is thus not to be taken as limiting the scope of the invention. It should be noted that modifications and improvements can be made by those skilled in the art without departing from the spirit of the invention, and the invention is intended to encompass such modifications and improvements.