CN114551432A - Resistor structure and manufacturing method thereof - Google Patents

Abstract

Translated fromChinese

本发明提供了一种电阻器结构及其制造方法，应用于半导体技术领域。本发明提供了一种电阻器结构的制造方法，通过在利用现有技术形成MIM电容器结构的过程中，利用该MIM电容器结构的金属上极板的部分区域作为薄膜电阻器件使用，以替代传统工艺形成的多晶硅电阻。由于在本发明提供的电阻器结构的制造方法中，其是利用MIM电容器结构的金属上极板其温度系数低的特性，从而形成一种温度系数低、电阻精度高的薄膜电阻，进而实现解决多晶硅电阻由于温度系数太大，无法配置高精度电阻的缺点，并在利用已有资源的基础上，节约了形成电阻器件的制造成本。

The invention provides a resistor structure and a manufacturing method thereof, which are applied in the field of semiconductor technology. The present invention provides a method for manufacturing a resistor structure. In the process of forming an MIM capacitor structure by using the prior art, a part of the upper metal plate of the MIM capacitor structure is used as a thin film resistor device to replace the traditional process. formed polysilicon resistors. Because in the manufacturing method of the resistor structure provided by the present invention, the metal upper plate of the MIM capacitor structure has the characteristics of low temperature coefficient, so as to form a thin film resistor with low temperature coefficient and high resistance accuracy, and then realize the solution to the problem. The polysilicon resistor has the disadvantage of being unable to configure a high-precision resistor due to its too large temperature coefficient, and on the basis of utilizing the existing resources, the manufacturing cost of forming the resistor device is saved.

Description

Translated fromChinese

电阻器结构及其制造方法Resistor structure and method of making the same

技术领域technical field

本发明涉及半导体技术领域，特别涉及一种电阻器结构及其制造方法。The present invention relates to the technical field of semiconductors, and in particular, to a resistor structure and a manufacturing method thereof.

背景技术Background technique

在制造例如集成电路的半导体产品，通常需要在半导体产品中的某一部件或某些部件设置电阻器件。目前，常用的电阻器件为多晶硅电阻Poly电阻。具体的，现有的多晶硅电阻的形成方法是利用掺杂的多晶硅膜层可以改变多晶硅电阻值的特性，将掺杂后的多晶硅作为电阻器件。In the manufacture of semiconductor products such as integrated circuits, it is often necessary to provide resistive devices in one or some parts of the semiconductor product. At present, the commonly used resistance devices are polysilicon resistors Poly resistors. Specifically, the existing method for forming a polysilicon resistor is that the doped polysilicon film layer can be used to change the characteristics of the resistance value of the polysilicon, and the doped polysilicon is used as a resistance device.

然而，由于掺杂的多晶硅电阻其内部的载流子受到温度的变化时，会出现对多晶硅阻值的影响，降低了多晶硅电阻的精度，从而无法配备给高精度和温漂小的产品使用。并且，如果电阻器件是半导体产品中不可缺少的部件，则每个半导体产品必须根据其自身的特性自定制工艺而为该半导体产品提供特定的电阻器件，这将造成电阻器件制造成本高、不利于产品商业化以及无法收益用户的问题。However, when the carrier inside the doped polysilicon resistor is subjected to temperature changes, it will affect the resistance value of the polysilicon, which reduces the accuracy of the polysilicon resistor, so it cannot be used for products with high precision and small temperature drift. Moreover, if the resistive device is an indispensable part in the semiconductor product, each semiconductor product must provide a specific resistive device for the semiconductor product according to its own characteristics, which will cause high manufacturing cost of the resistive device, which is unfavorable. Product commercialization and the problem of not being able to benefit users.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于提供一种电阻器结构及其制造方法，以提出一种新型的利用现有的MIM电容器件形成电阻器件结构的制造方法，以解决现有现有技术中的多晶硅电阻存在温度系数大，进而造成的电阻器件精度低的问题。The purpose of the present invention is to provide a resistor structure and a manufacturing method thereof, so as to propose a novel manufacturing method for forming a resistor device structure by using an existing MIM capacitor device, so as to solve the problem of the existing temperature of polysilicon resistors in the prior art. The coefficient is large, which in turn causes the problem of low precision of the resistance device.

第一方面，为解决上述技术问题，本发明提供一种电阻器结构的制造方法，包括：In the first aspect, in order to solve the above technical problems, the present invention provides a method for manufacturing a resistor structure, including:

提供一表面形成有第一金属层的半导体衬底。A semiconductor substrate with a first metal layer formed on the surface is provided.

依次形成第一介电层和第二金属层于所述第一金属层的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构的同时形成MIM电容器，所述MIM电容器自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。A first dielectric layer and a second metal layer are sequentially formed on the surface of the first metal layer to form a MIM capacitor while forming a resistor structure with a portion of the second metal layer that serves as the upper plate of the MIM capacitor , the MIM capacitor includes, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer, which acts as a lower plate, from top to bottom.

进一步的，形成所述第二金属层的步骤，可以包括：Further, the step of forming the second metal layer may include:

在所述第一介电层的表面上沉积第二金属层。A second metal layer is deposited on the surface of the first dielectric layer.

利用MIM电容器的上极板光罩，对沉积在所述第一介电层表面上的所述第二金属层进行光刻和刻蚀工艺，其中，所述MIM电容器的上极板光罩中定义有用于形成所述电阻器结构的图案和用于形成所述MIM电容器上极板的图案。The second metal layer deposited on the surface of the first dielectric layer is subjected to photolithography and etching processes by using the upper plate mask of the MIM capacitor, wherein the upper plate mask of the MIM capacitor is A pattern for forming the resistor structure and a pattern for forming the upper plate of the MIM capacitor are defined.

进一步的，所述MIM电容器的上极板光罩上定义的用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列且不相接。Further, the pattern for forming the resistor structure defined on the upper plate photomask of the MIM capacitor is laterally arranged and not in contact with the pattern for forming the upper plate of the MIM capacitor.

进一步的，所述第二金属层的材料可以包括氮化钛。Further, the material of the second metal layer may include titanium nitride.

进一步的，在形成所述电阻器结构和所述MIM电容器之后，所述方法还可以包括：Further, after forming the resistor structure and the MIM capacitor, the method may further include:

在所述第二金属层的表面上形成第二介电层，并通过光刻和刻蚀工艺在所述第二介电层中形成用于电性连接所述电阻器结构的第一通孔和用于电性连接所述MIM电容器的第二通孔。A second dielectric layer is formed on the surface of the second metal layer, and first through holes for electrically connecting the resistor structures are formed in the second dielectric layer through photolithography and etching processes and a second through hole for electrically connecting the MIM capacitor.

在所述第一通孔和所述第二通孔中填充导电材料。A conductive material is filled in the first through hole and the second through hole.

在所述第二介电层的表面上形成与填充有导电材料后的所述第一通孔和所述第二通孔电性连接的第三金属层。A third metal layer electrically connected to the first through hole and the second through hole filled with conductive material is formed on the surface of the second dielectric layer.

第二方面，基于如上所述的电阻器结构的制造方法，所述电阻器结构可以采用如上所述的电阻器结构的制造方法制备而成。In the second aspect, based on the above-mentioned method for manufacturing a resistor structure, the resistor structure can be prepared by using the above-mentioned method for manufacturing a resistor structure.

第三方面，基于如上所述的电阻器结构的制造方法，本发明还提供了一种MIM电容器的制造方法，可以包括：In a third aspect, based on the method for manufacturing a resistor structure as described above, the present invention also provides a method for manufacturing an MIM capacitor, which may include:

提供一表面形成有第一金属层的半导体衬底。A semiconductor substrate with a first metal layer formed on the surface is provided.

依次形成第一介电层和第二金属层于所述第一金属层的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构的同时形成MIM电容器，所述MIM电容器自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。A first dielectric layer and a second metal layer are sequentially formed on the surface of the first metal layer to form a MIM capacitor while forming a resistor structure with a portion of the second metal layer that serves as the upper plate of the MIM capacitor , the MIM capacitor includes, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer, which acts as a lower plate, from top to bottom.

进一步的，所述第二金属层的材料包括氮化钛。Further, the material of the second metal layer includes titanium nitride.

进一步的，形成所述第二金属层的步骤，可以包括：Further, the step of forming the second metal layer may include:

在所述第一介电层的表面上沉积第二金属层。A second metal layer is deposited on the surface of the first dielectric layer.

利用MIM电容器的上极板光罩，对沉积在所述第一介电层表面上的所述第二金属层进行光刻和刻蚀工艺，其中，所述MIM电容器的上极板光罩中定义有用于形成所述电阻器结构的图案和用于形成所述MIM电容器上极板的图案。The second metal layer deposited on the surface of the first dielectric layer is subjected to photolithography and etching processes by using the upper plate mask of the MIM capacitor, wherein the upper plate mask of the MIM capacitor is A pattern for forming the resistor structure and a pattern for forming the upper plate of the MIM capacitor are defined.

进一步的，所述MIM电容器的上极板光罩上定义的用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列且不相接。Further, the pattern for forming the resistor structure defined on the upper plate photomask of the MIM capacitor is laterally arranged and not in contact with the pattern for forming the upper plate of the MIM capacitor.

第四方面，基于如上所述的MIM电容器的制造方法，本发明还提供了一种MIM电容器，可以包括：In a fourth aspect, based on the above-mentioned manufacturing method of the MIM capacitor, the present invention also provides a MIM capacitor, which may include:

半导体衬底。semiconductor substrate.

第一金属层，位于所述半导体衬底的表面上，并作为所述MIM电容器的下极板。The first metal layer is located on the surface of the semiconductor substrate and serves as the lower plate of the MIM capacitor.

第一介电层，位于所述第一金属层的表面上，并作为所述MIM电容器的介质层。The first dielectric layer is located on the surface of the first metal layer and serves as the dielectric layer of the MIM capacitor.

第二金属层，位于所述第一介电层的表面上，其中，部分所述第二金属层作为所述MIM电容器的上极板，而剩余部分所述第二金属层作为所述MIM电容器中包含的电阻器结构。A second metal layer on the surface of the first dielectric layer, wherein a part of the second metal layer serves as the upper plate of the MIM capacitor, and the remaining part of the second metal layer serves as the MIM capacitor Resistor structure included in .

与现有技术相比，本发明技术方案至少具有如下有益效果之一：Compared with the prior art, the technical solution of the present invention has at least one of the following beneficial effects:

本发明提供了一种电阻器结构的制造方法，通过在利用现有技术形成MIM电容器结构的过程中，利用该MIM电容器结构的金属上极板的部分区域作为薄膜电阻器件使用，以替代传统工艺形成的多晶硅电阻。由于在本发明提供的电阻器结构的制造方法中，其是利用MIM电容器结构的金属上极板其温度系数低的特性，从而形成一种温度系数低、电阻精度高的薄膜电阻，进而实现解决多晶硅电阻由于温度系数太大，无法配置高精度电阻的缺点，并在利用已有资源的基础上，节约了形成电阻器件的制造成本。The present invention provides a method for manufacturing a resistor structure. In the process of forming a MIM capacitor structure by using the prior art, a part of the upper metal plate of the MIM capacitor structure is used as a thin film resistance device to replace the traditional process. formed polysilicon resistors. Because in the manufacturing method of the resistor structure provided by the present invention, the metal upper plate of the MIM capacitor structure has the characteristics of low temperature coefficient, so as to form a thin film resistor with low temperature coefficient and high resistance accuracy, and then realize the solution to the problem. The polysilicon resistor has the disadvantage of being unable to configure a high-precision resistor due to its too large temperature coefficient, and on the basis of utilizing the existing resources, the manufacturing cost of forming the resistor device is saved.

进一步的，由于本发明提供的电阻器结构的制造方法是在形成MIM电容器结构工艺平台基础上同时形成电阻器结构，因此，本发明还提供了一种利用MIM电容器结构的一层光罩，便可以实现形成MIM电容器结构和电阻器件的双重功能的目的，从而可以既有效的降低半导体器件的生产成本，又可以满足高精度电阻器件开发的需求。Further, since the manufacturing method of the resistor structure provided by the present invention is to simultaneously form the resistor structure on the basis of the process platform for forming the MIM capacitor structure, the present invention also provides a one-layer photomask using the MIM capacitor structure, which is convenient to use. The purpose of forming the dual function of the MIM capacitor structure and the resistance device can be achieved, so that the production cost of the semiconductor device can be effectively reduced, and the demand for the development of the high-precision resistance device can be met.

附图说明Description of drawings

图1为本发明一实施例中提供的电阻器结构的制造方法的流程示意图。FIG. 1 is a schematic flowchart of a method for manufacturing a resistor structure provided in an embodiment of the present invention.

图2为本发明一实施例中提供的电阻器结构的结构示意图。FIG. 2 is a schematic structural diagram of a resistor structure provided in an embodiment of the present invention.

其中，附图标记如下：Among them, the reference numerals are as follows:

100-半导体衬底； 110-第一金属层；100-semiconductor substrate; 110-first metal layer;

120-第一介电层； 130-第二金属层；120-first dielectric layer; 130-second metal layer;

140-第二介电层； 150-第三金属层；140-second dielectric layer; 150-third metal layer;

C-MIM电容器结构； R-电阻器结构；C-MIM capacitor structure; R-resistor structure;

101-第一通孔； 102-第二通孔。101 - the first through hole; 102 - the second through hole.

具体实施方式Detailed ways

承如背景技术所述，在制造例如集成电路的半导体产品，通常需要在半导体产品中的某一部件或某些部件设置电阻器件。目前，常用的电阻器件为多晶硅电阻Poly电阻。具体的，现有的多晶硅电阻的形成方法是利用掺杂的多晶硅膜层可以改变多晶硅电阻值的特性，将掺杂后的多晶硅作为电阻器件。As described in the background art, in the manufacture of semiconductor products such as integrated circuits, it is usually necessary to provide resistance devices in a certain part or some parts of the semiconductor products. At present, the commonly used resistance devices are polysilicon resistors Poly resistors. Specifically, the existing method for forming a polysilicon resistor is that the doped polysilicon film layer can be used to change the characteristics of the resistance value of the polysilicon, and the doped polysilicon is used as a resistance device.

然而，由于掺杂的多晶硅电阻其内部的载流子受到温度的变化时，会出现对多晶硅阻值的影响，降低了多晶硅电阻的精度，从而无法配备给高精度和温漂小的产品使用。并且，如果电阻器件是半导体产品中不可缺少的部件，则每个半导体产品必须根据其自身的特性自定制工艺而为该半导体产品提供特定的电阻器件，这将造成电阻器件制造成本高、不利于产品商业化以及无法收益用户的问题。However, when the carrier inside the doped polysilicon resistor is subjected to temperature changes, it will affect the resistance value of the polysilicon, which reduces the accuracy of the polysilicon resistor, so it cannot be used for products with high precision and small temperature drift. Moreover, if the resistive device is an indispensable part in the semiconductor product, each semiconductor product must provide a specific resistive device for the semiconductor product according to its own characteristics, which will cause high manufacturing cost of the resistive device, which is unfavorable. Product commercialization and the problem of not being able to benefit users.

为此，本发明提供了一种电阻器结构及其制造方法，以提出一种新型的利用现有的MIM电容器件形成电阻器件结构的制造方法，以解决现有现有技术中的多晶硅电阻存在温度系数大，进而造成的电阻器件精度低的问题。To this end, the present invention provides a resistor structure and a manufacturing method thereof, in order to propose a novel manufacturing method for forming a resistor device structure by using an existing MIM capacitor device, so as to solve the problem of polysilicon resistance in the prior art. The temperature coefficient is large, which in turn causes the problem of low precision of the resistance device.

以下结合附图和具体实施例对本发明提出的电阻器结构及其制造方法作进一步详细说明。根据下面说明，本发明的优点和特征将更清楚。需说明的是，附图均采用非常简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。在下面的描述中阐述了很多具体细节以便于充分理解本发明，但是本发明还可以采用其它不同于在此描述的其它方式来实施，因此本发明不受下面公开的具体实施例的限制。The resistor structure and its manufacturing method proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that, the accompanying drawings are all in a very simplified form and in inaccurate scales, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the present invention. Numerous specific details are set forth in the following description to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways than those described herein, and thus the present invention is not limited by the specific embodiments disclosed below.

如本申请和权利要求书中所示，除非上下文明确提示例外情形，“一”、“一个”、“一种”和/或“该”等词并非特指单数，也可包括复数。一般说来，术语“包括”与“包含”仅提示包括已明确标识的步骤和元素，而这些步骤和元素不构成一个排它性的罗列，方法或者设备也可能包含其他的步骤或元素。 在详述本发明实施例时，为便于说明，表示器件结构的剖面图会不依一般比例作 局部放大，而且所述示意图只是示例，其在此不应限制本发明保护的范围。此外，在实际制作中应包含长度、宽度及深度的三维空间尺寸。As shown in this application and in the claims, unless the context clearly dictates otherwise, the words "a", "an", "an" and/or "the" are not intended to be specific in the singular and may include the plural. Generally speaking, the terms "comprising" and "comprising" only imply that the clearly identified steps and elements are included, and these steps and elements do not constitute an exclusive list, and the method or apparatus may also include other steps or elements. When describing the embodiments of the present invention in detail, for the convenience of description, the sectional views showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, the three-dimensional spatial dimensions of length, width and depth should be included in the actual production.

下面首先对本发明提出的一种电阻器结构的制造方法进行介绍。具体可以参考图1，并结合图2，其中，图1为本发明一实施例中提供的电阻器结构的制造方法的流程示意图；图2为本发明一实施例中提供的最终形成的电阻器结构的结构示意图。具体的，如图1所示，所述电阻器结构的制造方法可以包括如下步骤：The following first introduces a method for manufacturing a resistor structure proposed by the present invention. For details, please refer to FIG. 1 in conjunction with FIG. 2 , wherein FIG. 1 is a schematic flowchart of a method for manufacturing a resistor structure provided in an embodiment of the present invention; FIG. 2 is a finally formed resistor provided in an embodiment of the present invention. Schematic diagram of the structure. Specifically, as shown in FIG. 1 , the manufacturing method of the resistor structure may include the following steps:

步骤S100，提供一表面形成有第一金属层110的半导体衬底100。Step S100, providing asemiconductor substrate 100 with afirst metal layer 110 formed on a surface thereof.

在本实施例中，所述半导体衬底100是用于为后续工艺生成电阻器结构以及MIM电容器结构提供操作的平台。其中，所述半导体衬底100可以是本领域公知的任意合适的底材，例如可以是以下所提到的材料中的至少一种：硅(Si)、锗(Ge)、锗硅(SiGe)、碳硅(SiC)、碳锗硅(SiGeC)、砷化铟(InAs)、砷化镓(GaAs)、磷化铟(InP)或者其它III/V化合物半导体，还包括这些半导体构成的多层结构等，或者为绝缘体上硅(SOI)、绝缘体上层叠硅(SSOI)、绝缘体上层叠锗化硅(S-SiGeOI)、绝缘体上锗化硅(SiGeOI)以及绝缘体上锗(GeOI)，或者还可以为双面抛光硅片(Double Side Polished Wafers，DSP)，也可为氧化铝等的陶瓷基底、石英或玻璃基底等。示例性的，在本发明实施例中，所述半导体衬底100是硅衬底。优选的，在本发明实施例中，所述第一金属层110和所述第三金属层150的材料可以为铝，而所述第二金属层130的材料优选为氮化钛。In this embodiment, thesemiconductor substrate 100 is a platform for providing operations for generating resistor structures and MIM capacitor structures for subsequent processes. Thesemiconductor substrate 100 may be any suitable substrate known in the art, for example, may be at least one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe) , silicon carbon (SiC), silicon germanium carbon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP), or other III/V compound semiconductors, including multilayers of these semiconductors structure, etc., or silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), or also It can be a double-side polished silicon wafer (DSP), a ceramic substrate such as alumina, a quartz or glass substrate, and the like. Exemplarily, in the embodiment of the present invention, thesemiconductor substrate 100 is a silicon substrate. Preferably, in the embodiment of the present invention, the material of thefirst metal layer 110 and thethird metal layer 150 may be aluminum, and the material of thesecond metal layer 130 is preferably titanium nitride.

步骤S200，依次形成第一介电层120和第二金属层130于所述第一金属层110的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构R的同时形成MIM电容器C，所述MIM电容器C自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。Step S200, sequentially forming a firstdielectric layer 120 and asecond metal layer 130 on the surface of thefirst metal layer 110 to form a resistor using a portion of the second metal layer serving as the upper plate of the MIM capacitor Structure R while forming a MIM capacitor C comprising, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer serving as a lower plate .

在本实施例中，由于在本发明实施例中，其是在基于现有技术形成MIM电容器结构的过程中，利用MIM电容器结构的金属上极板其温度系数低的特性，从而可以形成一种温度系数低、电阻精度高的薄膜电阻，因此其形成电阻器结构的过程就是形成MIM电容器的过程，即，在上述步骤S100形成所述第一金属层110之后，需要先在其表面上形成作为MIM电容器的电介质的第一介电层120，之后再形成作为MIM电容器结构的上极板的第二金属层130。然而，由于所述形成的作为MIM电容器结构的上极板的第二金属层130同时还要作为电阻器结构，而该第二金属层130则是利用MIM电容器结构的一层光罩形成的，具体的，在本发明提供了一种具体形成第二金属层130的方式，可以包括如下步骤：In this embodiment, in the process of forming the MIM capacitor structure based on the prior art, the characteristics of the low temperature coefficient of the metal upper plate of the MIM capacitor structure are used in the embodiment of the present invention, so that a kind of MIM capacitor structure can be formed. A thin film resistor with low temperature coefficient and high resistance accuracy, the process of forming the resistor structure is the process of forming the MIM capacitor, that is, after thefirst metal layer 110 is formed in the above step S100, it needs to be formed on the surface of thefirst metal layer 110. Thefirst dielectric layer 120, which is the dielectric of the MIM capacitor, is then formed with thesecond metal layer 130, which is the upper plate of the MIM capacitor structure. However, since thesecond metal layer 130 formed as the upper plate of the MIM capacitor structure also serves as a resistor structure, and thesecond metal layer 130 is formed by using a layer of mask of the MIM capacitor structure, Specifically, the present invention provides a specific method for forming thesecond metal layer 130, which may include the following steps:

首先，在所述第一介电层的表面上沉积第二金属层。First, a second metal layer is deposited on the surface of the first dielectric layer.

其次，利用MIM电容器的上极板光罩，对沉积在所述第一介电层表面上的所述第二金属层进行光刻和刻蚀工艺，其中，所述MIM电容器的上极板光罩中定义有用于形成所述电阻器结构的图案和用于形成所述MIM电容器上极板的图案。Secondly, using the upper plate mask of the MIM capacitor, the second metal layer deposited on the surface of the first dielectric layer is subjected to photolithography and etching processes, wherein the upper plate of the MIM capacitor is light A pattern for forming the resistor structure and a pattern for forming the upper plate of the MIM capacitor are defined in the cap.

作为一种示例，所述MIM电容器的上极板光罩上定义的用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列且不相接。As an example, the pattern for forming the resistor structure defined on the upper plate photomask of the MIM capacitor is laterally arranged and not in contact with the pattern for forming the upper plate of the MIM capacitor.

作为另一种示例，所述MIM电容器的上极板光罩上定义的用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列相接。优选的，在本发明的实施例中，所述光罩优先选择第一种示例的方式，因此，附图2中也示例性的展示了用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列且不相接的MIM电容器的上极板光罩形成的第二金属层130的结构示意图。As another example, the pattern for forming the resistor structure defined on the upper plate photomask of the MIM capacitor is laterally aligned with the pattern for forming the upper plate of the MIM capacitor. Preferably, in the embodiment of the present invention, the photomask is preferably selected in the first example mode. Therefore, FIG. 2 also exemplarily shows the pattern for forming the resistor structure and the use of the A schematic diagram of the structure of thesecond metal layer 130 formed on the top plate mask of the MIM capacitors that are arranged laterally and not in contact with the pattern forming the top plate of the MIM capacitor.

进一步的，继续参考图2所，在形成所述电阻器结构R和所述MIM电容器C之后，本发明提供的电阻器结构的制造方法方法还可以包括如下步骤：Further, with continued reference to FIG. 2 , after the resistor structure R and the MIM capacitor C are formed, the method for manufacturing the resistor structure provided by the present invention may further include the following steps:

首先，在所述第二金属层130的表面上形成第二介电层140，并通过光刻和刻蚀工艺在所述第二介电层140中形成用于电性连接所述电阻器结构R的第一通孔101和用于电性连接所述MIM电容器C的第二通孔102。First, asecond dielectric layer 140 is formed on the surface of thesecond metal layer 130, and a resistor structure for electrically connecting the resistor structure is formed in thesecond dielectric layer 140 through photolithography and etching processes The first throughhole 101 of R and the second throughhole 102 for electrically connecting the MIM capacitor C.

其次，在所述第一通孔101和所述第二通孔102中填充导电材料。Next, the first throughholes 101 and the second throughholes 102 are filled with conductive material.

之后，在所述第二介电层140的表面上形成与填充有导电材料后的所述第一通孔101和所述第二通孔102电性连接的第三金属层150。After that, athird metal layer 150 electrically connected to the first throughhole 101 and the second throughhole 102 filled with the conductive material is formed on the surface of thesecond dielectric layer 140 .

在本实施例中，所述第三金属层150是作为电极焊盘，以通过所述填充有导电材料后的所述第一通孔101和所述第二通孔102分别将所述电阻器结构R和电容器结构C电性连接，以用于与外部电路进行连接。In this embodiment, thethird metal layer 150 is used as an electrode pad, so that the resistor is respectively connected to the resistor through the first throughhole 101 and the second throughhole 102 filled with the conductive material. The structure R and the capacitor structure C are electrically connected for connection with external circuits.

此外，在基于与所述电阻器结构的制造方法相同的发明构思，本发明还提供了一种电阻器结构，其具体采用如上所述的电阻器结构的制造方法制备而成，具体制造方法请参考图1所述的制造方法的过程，在此不再做累述。In addition, based on the same inventive concept as the manufacturing method of the resistor structure, the present invention also provides a resistor structure, which is specifically prepared by the above-mentioned manufacturing method of the resistor structure. For the specific manufacturing method, please refer to The process of the manufacturing method described with reference to FIG. 1 will not be repeated here.

同理，在基于与所述电阻器结构的制造方法相同的发明构思，本发明还提供了一种MIM电容器的制造方法，具体可以包括步骤：Similarly, based on the same inventive concept as the manufacturing method of the resistor structure, the present invention also provides a manufacturing method of an MIM capacitor, which may specifically include the steps:

提供一表面形成有第一金属层的半导体衬底。A semiconductor substrate with a first metal layer formed on the surface is provided.

依次形成第一介电层和第二金属层于所述第一金属层的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构的同时形成MIM电容器，所述MIM电容器自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。A first dielectric layer and a second metal layer are sequentially formed on the surface of the first metal layer to form a MIM capacitor while forming a resistor structure with a portion of the second metal layer that serves as the upper plate of the MIM capacitor , the MIM capacitor includes, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer, which acts as a lower plate, from top to bottom.

其中，所述第二金属层的材料包括氮化钛。Wherein, the material of the second metal layer includes titanium nitride.

进一步的，在所述MIM电容器结构的形成过程中形成所述第二金属层的步骤，可以包括如下步骤：Further, the step of forming the second metal layer during the formation of the MIM capacitor structure may include the following steps:

首先，在所述第一介电层的表面上沉积第二金属层。First, a second metal layer is deposited on the surface of the first dielectric layer.

其次，利用MIM电容器的上极板光罩，对沉积在所述第一介电层表面上的所述第二金属层进行光刻和刻蚀工艺，其中，所述MIM电容器的上极板光罩中定义有用于形成所述电阻器结构的图案和用于形成所述MIM电容器上极板的图案。Secondly, using the upper plate mask of the MIM capacitor, the second metal layer deposited on the surface of the first dielectric layer is subjected to photolithography and etching processes, wherein the upper plate of the MIM capacitor is light A pattern for forming the resistor structure and a pattern for forming the upper plate of the MIM capacitor are defined in the cap.

其中，所述MIM电容器的上极板光罩上定义的用于形成所述电阻器结构的图案与所述用于形成所述MIM电容器上极板的图案横向排列且不相接。Wherein, the pattern for forming the resistor structure defined on the upper plate mask of the MIM capacitor and the pattern for forming the upper plate of the MIM capacitor are laterally arranged and not in contact with each other.

此外，基于相同的发明构思，本发明还提供了一种MIM电容器，其具体可以包括：In addition, based on the same inventive concept, the present invention also provides a MIM capacitor, which may specifically include:

半导体衬底。semiconductor substrate.

第一金属层，位于所述半导体衬底的表面上，并作为所述MIM电容器的下极板。The first metal layer is located on the surface of the semiconductor substrate and serves as the lower plate of the MIM capacitor.

第一介电层，位于所述第一金属层的表面上，并作为所述MIM电容器的介质层。The first dielectric layer is located on the surface of the first metal layer and serves as the dielectric layer of the MIM capacitor.

第二金属层，位于所述第一介电层的表面上，其中，部分所述第二金属层作为所述MIM电容器的上极板，而剩余部分所述第二金属层作为所述MIM电容器中包含的电阻器结构。A second metal layer on the surface of the first dielectric layer, wherein a part of the second metal layer serves as the upper plate of the MIM capacitor, and the remaining part of the second metal layer serves as the MIM capacitor Resistor structure included in .

综上所述，本发明提供了一种电阻器结构的制造方法，通过在利用现有技术形成MIM电容器结构的过程中，利用该MIM电容器结构的金属上极板的部分区域作为薄膜电阻器件使用，以替代传统工艺形成的多晶硅电阻。由于在本发明提供的电阻器结构的制造方法中，其是利用MIM电容器结构的金属上极板其温度系数低的特性，从而形成一种温度系数低、电阻精度高的薄膜电阻，进而实现解决多晶硅电阻由于温度系数太大，无法配置高精度电阻的缺点，并在利用已有资源的基础上，节约了形成电阻器件的制造成本。In summary, the present invention provides a method for manufacturing a resistor structure, by using a part of the upper metal plate of the MIM capacitor structure as a thin film resistor device in the process of forming the MIM capacitor structure using the prior art , to replace polysilicon resistors formed by traditional processes. Because in the manufacturing method of the resistor structure provided by the present invention, the metal upper plate of the MIM capacitor structure has the characteristics of low temperature coefficient, so as to form a thin film resistor with low temperature coefficient and high resistance accuracy, and then realize the solution to the problem. The polysilicon resistor has the disadvantage of being unable to configure a high-precision resistor due to its too large temperature coefficient, and on the basis of utilizing the existing resources, the manufacturing cost of forming the resistor device is saved.

进一步的，由于本发明提供的电阻器结构的制造方法是在形成MIM电容器结构工艺平台基础上同时形成电阻器结构，因此，本发明还提供了一种利用MIM电容器结构的一层光罩，便可以实现形成MIM电容器结构和电阻器件的双重功能的目的，从而可以既有效的降低半导体器件的生产成本，又可以满足高精度电阻器件开发的需求。Further, since the manufacturing method of the resistor structure provided by the present invention is to simultaneously form the resistor structure on the basis of the process platform for forming the MIM capacitor structure, the present invention also provides a one-layer photomask using the MIM capacitor structure, which is convenient to use. The purpose of forming the dual function of the MIM capacitor structure and the resistance device can be achieved, so that the production cost of the semiconductor device can be effectively reduced, and the demand for the development of the high-precision resistance device can be met.

此外，本发明实施例还提供了一种电子设备，包括处理器、通信接口、存储器和通信总线，其中，处理器，通信接口，存储器通过通信总线完成相互间的通信，In addition, an embodiment of the present invention also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus,

存储器，用于存放计算机程序。Memory for storing computer programs.

处理器，用于执行存储器上所存放的程序时，实现本发明实施例提供的一种电阻器结构的制备方法或MIM电容器的制造方法，具体的，所述电阻器结构的制备方法可以包括：The processor is configured to implement a method for preparing a resistor structure or a method for manufacturing an MIM capacitor provided by an embodiment of the present invention when executing the program stored in the memory. Specifically, the method for preparing the resistor structure may include:

提供一表面形成有第一金属层的半导体衬底。A semiconductor substrate with a first metal layer formed on the surface is provided.

依次形成第一介电层和第二金属层于所述第一金属层的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构的同时形成MIM电容器，所述MIM电容器自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。A first dielectric layer and a second metal layer are sequentially formed on the surface of the first metal layer to form a MIM capacitor while forming a resistor structure with a portion of the second metal layer that serves as the upper plate of the MIM capacitor , the MIM capacitor includes, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer, which acts as a lower plate, from top to bottom.

而所述MIM电容器的制造方法可以包括：And the manufacturing method of the MIM capacitor may include:

提供一表面形成有第一金属层的半导体衬底。A semiconductor substrate with a first metal layer formed on the surface is provided.

依次形成第一介电层和第二金属层于所述第一金属层的表面上，以在利用充当MIM电容器的上极板的部分所述第二金属层形成电阻器结构的同时形成MIM电容器，所述MIM电容器自上而下包括充当上极板的剩余部分所述第二金属层、第一介电层和充当下极板的所述第一金属层。A first dielectric layer and a second metal layer are sequentially formed on the surface of the first metal layer to form a MIM capacitor while forming a resistor structure with a portion of the second metal layer that serves as the upper plate of the MIM capacitor , the MIM capacitor includes, from top to bottom, the remainder of the second metal layer, a first dielectric layer, and the first metal layer, which acts as a lower plate, from top to bottom.

关于该方法各个步骤的具体实现以及相关解释内容可以参见上述图1、图2所示的方法实施例，在此不做赘述。For the specific implementation of each step of the method and related explanation contents, reference may be made to the method embodiments shown in FIG. 1 and FIG. 2 above, which will not be repeated here.

另外，处理器执行存储器上所存放的程序而实现的一种电阻器结构的制备方法的其他实现方式，与前述方法实施例部分所提及的实现方式相同，这里也不再赘述。In addition, other implementation manners of a method for fabricating a resistor structure implemented by the processor executing the program stored in the memory are the same as the implementation manners mentioned in the foregoing method embodiment section, and will not be repeated here.

上述电子设备提到的通信总线可以是外设部件互连标准（Peripheral ComponentInterconnect，PCI）总线或扩展工业标准结构（Extended Industry StandardArchitecture，EISA）总线等。该通信总线可以分为地址总线、数据总线、控制总线等。为便于表示，图中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。The communication bus mentioned in the above electronic device may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an Extended Industry Standard Architecture (Extended Industry Standard Architecture, EISA) bus or the like. The communication bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of presentation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

通信接口用于上述电子设备与其他设备之间的通信。The communication interface is used for communication between the above electronic device and other devices.

存储器可以包括随机存取存储器（Random Access Memory，RAM），也可以包括非易失性存储器（Non-Volatile Memory，NVM），例如至少一个磁盘存储器。可选的，存储器303还可以是至少一个位于远离前述处理器的存储装置。The memory may include random access memory (Random Access Memory, RAM), and may also include non-volatile memory (Non-Volatile Memory, NVM), such as at least one disk storage. Optionally, the memory 303 may also be at least one storage device located away from the aforementioned processor.

上述的处理器可以是通用处理器，包括中央处理器（Central Processing Unit，CPU）、网络处理器（Network Processor，NP）等；还可以是数字信号处理器（Digital SignalProcessing，DSP）、专用集成电路（Application Specific Integrated Circuit，ASIC）、现场可编程门阵列（Field-Programmable Gate Array，FPGA）或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。The above-mentioned processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; may also be a digital signal processor (Digital Signal Processing, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

在本发明提供的又一实施例中，还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当其在计算机上运行时，使得计算机执行上述实施例中任一所述的电阻器结构的制备方法。In yet another embodiment provided by the present invention, a computer-readable storage medium is also provided, where instructions are stored in the computer-readable storage medium, when the computer-readable storage medium is run on a computer, the computer is made to execute any one of the above-mentioned embodiments. The method for preparing the resistor structure.

在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线（例如同轴电缆、光纤、数字用户线（DSL））或无线（例如红外、无线、微波等）方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质（例如固态硬盘Solid State Disk (SSD)）等。In the above-mentioned embodiments, it may be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented in software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer may be a general purpose computer, special purpose computer, computer network, or other programmable device. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be downloaded from a website site, computer, server, or data center Transmission to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (eg, infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that includes an integration of one or more available media. The usable media may be magnetic media (eg, floppy disks, hard disks, magnetic tapes), optical media (eg, DVD), or semiconductor media (eg, Solid State Disk (SSD)), among others.

需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

本说明书中的各个实施例均采用相关的方式描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。尤其，对于装置、电子设备以及计算机可读存储介质实施例而言，由于其基本相似于方法实施例，所以描述的比较简单，相关之处参见方法实施例的部分说明即可。Each embodiment in this specification is described in a related manner, and the same and similar parts between the various embodiments may be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the apparatus, electronic device, and computer-readable storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for related parts.

以上所述仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。凡在本发明的精神和原则之内所作的任何修改、等同替换、改进等，均包含在本发明的保护范围内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims (11)

1. A method of manufacturing a resistor structure, comprising:

providing a semiconductor substrate with a first metal layer formed on the surface;

sequentially forming a first dielectric layer and a second metal layer on a surface of the first metal layer to form a MIM capacitor while forming a resistor structure using a portion of the second metal layer serving as an upper plate of the MIM capacitor, the MIM capacitor including, from top to bottom, a remaining portion of the second metal layer serving as an upper plate, a first dielectric layer, and the first metal layer serving as a lower plate.

2. The method of manufacturing a resistor structure according to claim 1, wherein the step of forming the second metal layer comprises:

depositing a second metal layer on a surface of the first dielectric layer;

and carrying out photoetching and etching processes on the second metal layer deposited on the surface of the first dielectric layer by utilizing an upper plate photomask of the MIM capacitor, wherein the upper plate photomask of the MIM capacitor is defined with a pattern for forming the resistor structure and a pattern for forming an upper plate of the MIM capacitor.

3. The method of claim 2, wherein the pattern defined on the MIM capacitor top plate mask used to form the resistor structure is laterally aligned and non-contiguous with the pattern used to form the MIM capacitor top plate.

4. The method of manufacturing a resistor structure according to claim 1, wherein the material of the second metal layer comprises titanium nitride.

5. The method of manufacturing a resistor structure of claim 1, wherein after forming the resistor structure and the MIM capacitor, the method further comprises:

forming a second dielectric layer on the surface of the second metal layer, and forming a first through hole for electrically connecting the resistor structure and a second through hole for electrically connecting the MIM capacitor in the second dielectric layer through photoetching and etching processes;

filling a conductive material in the first through hole and the second through hole;

and forming a third metal layer on the surface of the second dielectric layer, wherein the third metal layer is electrically connected with the first through hole and the second through hole which are filled with the conductive material.

6. A resistor structure, characterized in that the resistor structure is prepared by the method for manufacturing a resistor structure according to any one of claims 1 to 5.

7. A method of fabricating a MIM capacitor, comprising:

providing a semiconductor substrate with a first metal layer formed on the surface;

sequentially forming a first dielectric layer and a second metal layer on a surface of the first metal layer to form a MIM capacitor while forming a resistor structure using a portion of the second metal layer serving as an upper plate of the MIM capacitor, the MIM capacitor including, from top to bottom, a remaining portion of the second metal layer serving as an upper plate, a first dielectric layer, and the first metal layer serving as a lower plate.

8. The method of fabricating the MIM capacitor according to claim 7 wherein the material of the second metal layer comprises titanium nitride.

9. The method of fabricating the MIM capacitor according to claim 7 wherein the step of forming the second metal layer comprises:

depositing a second metal layer on a surface of the first dielectric layer;

and carrying out photoetching and etching processes on the second metal layer deposited on the surface of the first dielectric layer by utilizing an upper plate photomask of the MIM capacitor, wherein the upper plate photomask of the MIM capacitor is defined with a pattern for forming the resistor structure and a pattern for forming an upper plate of the MIM capacitor.

10. The method of claim 9, wherein the pattern defined on the MIM capacitor top plate mask used to form the resistor structure is laterally aligned and non-contiguous with the pattern used to form the MIM capacitor top plate.

11. A MIM capacitor manufactured according to the method of manufacturing a MIM capacitor according to one of claims 7 to 10, comprising:

a semiconductor substrate;

the first metal layer is positioned on the surface of the semiconductor substrate and is used as a lower polar plate of the MIM capacitor;

the first dielectric layer is positioned on the surface of the first metal layer and is used as a dielectric layer of the MIM capacitor;

a second metal layer on a surface of the first dielectric layer, wherein a portion of the second metal layer serves as an upper plate of the MIM capacitor and a remaining portion of the second metal layer serves as a resistor structure included in the MIM capacitor.

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