Disclosure of Invention
The invention mainly aims to provide a Micro-LED Micro display chip and a manufacturing method thereof, which are used for overcoming the defects in the prior art and being beneficial to further expanding the product application of the Micro-LED in the Micro display field.
In order to achieve the purpose of the invention, the technical scheme adopted by the invention comprises the following steps:
The embodiment of the invention provides a Micro-LED Micro display chip, which comprises:
a substrate including a driving circuit and a plurality of contacts electrically connected to the driving circuit;
The LED semiconductor layer is arranged on the substrate and comprises a first doping type semiconductor layer, an active layer and a second doping type semiconductor layer which are sequentially stacked on the substrate, the LED semiconductor layer is divided into a plurality of LED units which are arranged in an array, each contact drives one LED unit, the adjacent LED units can be independently driven, and
The bonding layer is arranged between the substrate and the LED semiconductor layer, the bonding layer is electrically connected with the first doped semiconductor layer, the bonding layer further comprises a plurality of bonding metal pads, etching grooves for electrically isolating the bonding metal pads from the bonding layer are arranged between the bonding metal pads, each bonding metal pad at least corresponds to one contact and is electrically connected with the contact, and the second doped semiconductor layer corresponding to each LED unit is electrically connected with the contact through the bonding metal pad.
In a specific embodiment, the bonding metal pad is disposed in a front projection area of the contact on the substrate, and it is understood that the bonding metal pad may mask part or all of the contact.
In one embodiment, the Micro-LED Micro display chip further comprises:
A passivation layer disposed on the second doped semiconductor layer, the passivation layer having a first opening exposing the second doped semiconductor layer corresponding to each LED unit, a second opening exposing the bond metal pad and filling the etched trench, and
The electrode layer is arranged on the passivation layer and covers the first opening and the second opening, and is electrically connected with the second doping type semiconductor layer from the first opening and electrically connected with the bond metal pad from the second opening.
In a specific embodiment, the LED units have a step structure, two adjacent LED units are electrically isolated through the step structure, the adjacent LED units can be driven independently, the passivation layer also covers the side wall of the step structure, and the area of the LED semiconductor layer corresponding to the contact is further provided with an etching hole exposing the bonding metal pad.
In an embodiment, the step structure is formed on the second doped semiconductor layer, and the height of the step structure is not less than the thickness of the second doped semiconductor layer but less than the thickness of the LED semiconductor layer, and the step structure at least electrically isolates the second doped semiconductor layers of adjacent LED units.
In a specific embodiment, a step structure of each LED unit is formed on the second doped semiconductor layer, and the height of the step structure is equal to the thickness of the LED semiconductor layer, and the step structure also electrically isolates the active layer of the adjacent LED unit from the first doped semiconductor layer.
In a specific embodiment, an isolation material layer is disposed between two adjacent LED units, and the two adjacent LED units are electrically isolated by the isolation material layer, so that the adjacent LED units can be driven independently, wherein the isolation material layer has a through hole exposing the bonding metal pad, the passivation layer also covers the side wall of the through hole, and the bonding metal pad is correspondingly disposed at the bottom of the through hole.
In an embodiment, the second doped semiconductor layer is formed with the isolation material layer, and the thickness of the isolation material layer is not smaller than that of the second doped semiconductor layer, and the isolation material layer at least electrically isolates the second doped semiconductor layers of the adjacent LED units.
In an embodiment, the material of the isolation material layer includes an ion implantation material, and the ion implantation material includes any one or a combination of more than two of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.
In one embodiment, the first doping type semiconductor layer of the plurality of LED units is a common first doping type semiconductor layer.
In one embodiment, the first doped semiconductor layer is a P-type semiconductor layer, and the second doped semiconductor layer is an N-type semiconductor layer.
In an embodiment, a bonding layer is further disposed between the substrate and the first doped semiconductor layer, and the bonding metal pad is electrically isolated from the bonding layer through the passivation layer.
The embodiment of the invention provides a manufacturing method of a Micro-LED Micro display chip, which comprises the following steps:
Providing a second substrate, forming an LED semiconductor layer on the second substrate, wherein the LED semiconductor layer comprises a second doping type semiconductor layer, an active layer and a first doping type semiconductor layer which are sequentially laminated on the second substrate,
Providing a first substrate, wherein the first substrate comprises a driving circuit and a plurality of contacts electrically connected with the driving circuit;
forming a bonding layer on the first doping type semiconductor layer and/or the first substrate, bonding the first doping type semiconductor layer with the first substrate, and removing the second substrate to expose the second doping type semiconductor layer;
And etching to remove the bonding layer positioned in a plurality of selected areas, thereby forming a plurality of etching grooves on the bonding layer, forming a bonding metal pad which is electrically isolated from the rest part and is covered with a contact and electrically connected with the contact by the part surrounded by the etching grooves, wherein each LED unit is also electrically connected with a contact by the bonding metal pad.
In one embodiment, the manufacturing method specifically includes:
And forming a plurality of step structures on the LED semiconductor layer, separating the LED semiconductor layer by the step structures to form a plurality of LED units arranged in an array mode, and forming etching holes exposing the bonding metal pads in the areas corresponding to the contacts.
In one embodiment, the manufacturing method specifically includes:
Etching to remove the second doping type semiconductor layers in the selected areas so as to form a plurality of step structures, wherein the height of the step structures is not smaller than the thickness of the second doping type semiconductor layers and smaller than the thickness of the LED semiconductor layers, and the step structures isolate at least the second doping type semiconductor layers of adjacent LED units from each other.
In one embodiment, the manufacturing method specifically includes:
Etching to remove the second doped semiconductor layer, the active layer and the first doped semiconductor layer in a plurality of selected areas, wherein the selected areas are areas corresponding to the contacts, so as to form a plurality of step structures, the height of each step structure is equal to the thickness of the LED semiconductor layer, and the step structures isolate at least the second doped semiconductor layer, the active layer and the first doped semiconductor layer of the adjacent LED units from each other.
In one embodiment, the manufacturing method specifically includes:
etching to remove a portion of the bonding layer in a region corresponding to the etched hole, thereby forming the etched trench and a bonding metal pad, the etched trench being located between the bonding metal pad and the bonding layer and electrically isolating the bonding metal pad from the bonding layer, and
A passivation layer is formed on the second doped semiconductor layer and covers the step structure and the bonding metal pad and fills the etched trench.
In one embodiment, the manufacturing method specifically includes:
Forming multiple isolation material layers in multiple selected regions of the second doped semiconductor layer by ion implantation, controlling implantation depth of ion implantation material to make thickness of the isolation material layer not smaller than that of the second doped semiconductor layer, separating the LED semiconductor layers by the isolation material layers to form multiple LED units arranged in array,
And forming a through hole exposing the bonding layer in the region of the isolation material layer corresponding to the contact, and then forming the bonding metal pad at the bottom of the through hole.
In one embodiment, the manufacturing method specifically includes:
Etching to remove a portion of the bonding layer in a region corresponding to the via, thereby forming the etched trench and a bond metal pad, the etched trench being located between the bond metal pad and the bonding layer and electrically isolating the bond metal pad from the bonding layer;
a passivation layer is formed on the second doped semiconductor layer and covers the via and bond metal pad and fills the etched trench.
In one embodiment, the manufacturing method specifically includes:
forming a first opening on the passivation layer to expose a portion of the second doped semiconductor layer, forming a second opening on the passivation layer to expose the bond metal pad;
and forming an electrode layer on the passivation layer, and enabling the electrode layer to be electrically connected with the second doped semiconductor layer from the first opening and electrically connected with the bond metal pad from the second opening.
Compared with the prior art, the invention has at least the following advantages:
1) According to the Micro-LED Micro display chip provided by the embodiment of the invention, the bonding layer above the contact is reserved, the height difference between the electrode layer and the second doped semiconductor layer and the contact is smaller, the electrode layer can better electrically connect the second doped semiconductor layer and the contact, and the electrode layer is not easy to break;
2) According to the manufacturing method of the Micro-LED Micro display chip, provided by the embodiment of the invention, the depth of the etched opening is shallower, the process of exposing and opening the passivation layer is easier to control, the flatness of the electrode layer formed subsequently is better, and the fluctuation of the electrode layer at the corresponding contact is smaller.
Detailed Description
In view of the shortcomings in the prior art, the inventor of the present invention has long studied and practiced in a large number of ways to propose the technical scheme of the present invention. The technical scheme, the implementation process, the principle and the like are further explained as follows.
The invention aims to break the technical bottleneck of batch transfer of Micro-LED chips, does not adopt a batch transfer mode, and provides a novel Micro-LED Micro display chip and a manufacturing method thereof.
The term "layer" as used in embodiments of the present invention refers to a portion of material that includes regions having a certain thickness. The layers may extend over the entire underlying or overlying structure, or may have a degree less than the extent of the underlying or overlying structure. Furthermore, the layer may be a region of homogeneous or heterogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, the layer may be located between the top and bottom surfaces of the continuous structure or between any pair of horizontal planes therebetween. The layers may extend horizontally, vertically and/or along a tapered surface. The second substrate may be a layer, may include one or more layers therein, and/or may have one or more layers thereon, and/or thereon. One layer may comprise multiple layers. For example, the semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.
The term "second substrate" as used in embodiments of the present invention refers to a material to which a subsequent material layer is added, the second substrate itself may be patterned, and a material added to the top of the second substrate may be patterned or may remain unpatterned. Further, the second substrate may include a variety of semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc., alternatively, the second substrate may be made of a non-conductive material such as glass, plastic, or sapphire wafer. The first substrate has a semiconductor device or circuit formed therein, and the driving circuit or semiconductor device may be formed by processing according to specific requirements, and is not particularly limited herein.
Example 1
Fig. 1a, 1B show top views of an illustrative one of the Micro-LED Micro-display chips according to some of the embodiments of the invention, fig. 2a shows a cross-sectional view of an illustrative one of the Micro-LED Micro-display chips along line A-A in fig. 1a, and fig. 2B shows a cross-sectional view of an illustrative one of the Micro-LED Micro-display chips along line B-B in fig. 1 a.
Referring to fig. 1a and 2a, a Micro-LED Micro-display chip is obtained by a monolithically integrated/wafer level manufacturing process and dicing, the Micro-LED Micro-display chip includes a first substrate 110 and an LED semiconductor layer formed on the first substrate 110, the first substrate 110 includes a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit, the LED semiconductor layer is fixedly bonded on the first substrate 110 through a bonding layer 160, and the LED semiconductor layer is divided into a plurality of LED units 100 arranged in an array, each contact 111 drives one LED unit 100, and adjacent LED units 100 can be independently driven.
In this embodiment, the bonding layer 160 includes a plurality of bonding metal pads 161, where the bonding metal pads 161 and the bonding layer 160 (the bonding layer here is actually the main body of the bonding layer) have etching trenches (162 in fig. 3 f) between them to electrically isolate them, each bonding metal pad 161 corresponds to at least one contact 111 and completely covers the contact 111, and each bonding metal pad 161 is further electrically connected to a contact 11 corresponding thereto, and each second doped semiconductor layer corresponding to the LED unit 100 is electrically connected to the contact 111 through the bonding metal pad 161.
In this embodiment, the LED units 100 further have a step structure 151, the step structure 151 electrically isolates two adjacent LED units 100 so that each LED unit 100 can be driven independently, and the bottom of the step structure 151 has an etched hole exposing the bonding metal pad 161 in a region corresponding to the contact 111, and each LED unit 100 is electrically connected to a contact 111 through the electrode layer 180 and the bonding metal pad 161.
Taking one LED unit 100 as an example, the LED semiconductor layers include a first doped semiconductor layer 130, an active layer 140, and a second doped semiconductor layer 150 sequentially stacked on the first substrate 110, wherein the first doped semiconductor layer 130 is fixedly bonded to the first substrate 110 via a bonding layer 160.
In this embodiment, the first substrate 110 may be made of a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc., and of course, the first substrate 110 may also be made of a non-conductive material such as glass, plastic or sapphire wafer. In this embodiment, the first substrate 110 may be a CMOS back plate or a TFT glass substrate, etc., and the driving circuit is used to provide an electrical signal to the LED unit 100 to control brightness.
In this embodiment, the driving circuit may include an active matrix driving circuit in which each individual LED unit 100 corresponds to an independent driver, and in this embodiment, the driving circuit may include a passive matrix driving circuit in which a plurality of LED units 100 are distributed in an array and connected to data lines and scan lines driven by the driving circuit.
In this embodiment, the bonding layer 160 and the bonding metal pad 161 may be integrally formed, and a plurality of etching trenches are disposed on the bonding layer 160, and a portion of the bonding layer 160 surrounded by one etching trench forms the bonding metal pad 161 electrically isolated from the rest.
In this embodiment, the thickness of the bonding layer 160 is about 1 μm equivalent to the thickness of the second doped semiconductor layer 150, and if the bonding layer 160 in the area corresponding to the contact 111 is removed and the contact 111 is exposed, and then the electrode layer 180 is used to connect the second doped semiconductor layer 150 and the contact 111, the height difference between the connection area of the second doped semiconductor layer 150 and the electrode layer 180 and the contact 111 is equivalent to the total thickness of the LED semiconductor layer and the bonding layer 160, so that the electrode layer 180 extends longer in the thickness direction of the LED unit 100, and further the electrode layer 180 is more prone to break, while a part of the bonding layer corresponding to the contact 111 remains and forms the bonding metal pad 161 electrically connected to the contact 111, so that the height difference between the electrode layer 180 and the second doped semiconductor layer 150 and the contact 111 is smaller, and the structural stability of the electrode layer 180 is improved.
In this embodiment, the bonding layer 160 may be an adhesive material layer formed on the first substrate 110 to bond the first substrate 110 and the LED semiconductor layer, and in this embodiment, the bonding layer 160 and the bonding metal pad 161 are made of the same material, and may be a conductive material such as a metal or a metal alloy, for example, the bonding layer 160 may be Au, sn, in, cu or Ti, and is not limited thereto.
It is understood that the description of the material of the bonding layer 160 is merely exemplary and not limiting, and that one skilled in the art may make variations as desired, all of which are within the scope of the application.
In this embodiment, the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 are sequentially stacked on the bonding layer 160, the bonding layer 160 is disposed on the first substrate 110, and the LED semiconductor layer is electrically connected to the contact 111 on the first substrate 110 through the electrode layer 180 and the bonding metal pad 161.
In the present embodiment, the active layer 140 is disposed between the first and second doped semiconductor layers 130 and 150 and provides light, the active layer 140 is a layer that recombines holes and electrons provided from the first and second doped semiconductor layers 130 and 150, respectively, and outputs light of a specific wavelength, and the active layer 140 may have a single quantum well structure or a Multiple Quantum Well (MQW) structure and well layers and barrier layers are alternately stacked.
In this embodiment, the step structure 151 is formed on the second doped semiconductor layer 150, the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 and less than or equal to the thickness of the LED semiconductor layer, and the step structure 151 at least isolates the second doped semiconductor layers 150 of adjacent LED units from each other, i.e., a portion of the step structure 151 penetrates through and isolates the second doped semiconductor layer 150 along the thickness direction.
In this embodiment, the first doped semiconductor layer 130 and the second doped semiconductor layer 150 may be one or more layers of a II-VI material (such as ZnSe or ZnO) or a III-V nitride material (such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and its alloys).
In this embodiment, the first doped semiconductor layer 130 may be a P-type semiconductor layer that extends across a plurality of LED units 100 and forms a common anode of the LED units 100, and in this embodiment, the first doped semiconductor layer 130 that extends across the LED units (i.e., a portion between two LED units) may be relatively thin, and the thickness of the first doped semiconductor layer 130 is 0.05 μm to 1 μm, preferably 0.05 μm to 0.7 μm, and particularly preferably 0.05 μm to 0.5 μm.
In this embodiment, the first doped semiconductor layer 130 may be P-type GaN, in this embodiment, the first doped semiconductor layer 130 may be formed by doping GaN with magnesium (Mg), in other embodiments, the first doped semiconductor layer 130 may be P-type InGaN or P-type AlInGaP, etc.
In this embodiment, each of the LED units 100 has an anode and a cathode connected to a driving circuit, for example, the driving circuit is formed in the first substrate 110 (the driving circuit is not explicitly shown in the drawing), for example, each of the LED units 100 has an anode connected to a constant voltage source and has a cathode connected to a source/drain of the driving circuit, in other words, a plurality of LED units 100 may have a common anode formed of the first doping type semiconductor layer 130 by forming a continuous first doping type semiconductor layer 130 across the respective LED units 100.
In this embodiment, the second doped semiconductor layer 150 may be an N-type semiconductor layer and forms a cathode of the LED unit 100.
In this embodiment, the second doped semiconductor layer 150 may be N-type GaN, N-type InGaN, N-type AlInGaP, or the like.
In this embodiment, the second doped semiconductor layers 150 of different LED units 100 are electrically isolated, so that each LED unit 100 may have a cathode of a different voltage level than the other LED units, as a result of the disclosed embodiment, a plurality of individually operable LED units 100 are formed, with the first doped semiconductor layers 130 extending horizontally across adjacent LED units, and with the second doped semiconductor layers 150 electrically isolated between adjacent LED units.
In this embodiment, the active layer (i.e., MQW layer) 140 is an active region of the LED semiconductor layer, and in this embodiment, the thickness of the LED semiconductor layers (the first doped semiconductor layer 130, the active layer 140, and the second doped semiconductor layer 150) is 0.4 μm to 4 μm, preferably 0.5 μm to 3 μm.
Note that, the first doped semiconductor layer 130 may be an N-type semiconductor layer, and correspondingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer.
In this embodiment, a step structure 151 is formed on the second doped semiconductor layer 150, that is, a portion of the step structure penetrates through and isolates the second doped semiconductor layer 150 in the thickness direction, and a step surface of the step structure serves as a light emitting region of the LED semiconductor layer.
In this embodiment, an etching hole is further formed at the bottom of the step structure, the bonding metal pad 161 on the first substrate 110 is exposed from the etching hole, and the bonding metal pad 161 is electrically isolated from the bonding layer 160 by the etching trench 162, and it can be understood that the orthographic projection area of the bonding metal pad 161 and the contact 111 on the first substrate 110 is located in the orthographic projection area of the etching hole on the first substrate 110.
In this embodiment, a passivation layer 170 is formed on at least the second doping type semiconductor layer 150 and a portion of the exposed first doping type semiconductor layer 130, active layer 140, and bonding layer 160, and the passivation layer 170 may be used to protect and isolate the LED unit 100.
In this embodiment, the passivation layer 170 is disposed on the second doped semiconductor layer 150, and the passivation layer 170 also covers the sidewalls of the step structure, the etched holes, and the surfaces of the etched trenches.
In this embodiment, the passivation layer 170 may be SiO2、Al2O3, siN or other suitable material, in this embodiment, the passivation layer 170 may also be polyimide, SU-8 photoresist or other photo-patternable polymer, the electrode layer 180 is formed on a portion of the passivation layer 170, and the passivation layer 170 is provided with a first opening 171 and a second opening 172, the first opening 171 exposes the second doped semiconductor layer 150, the second opening 172 exposes the bonding metal pad 161, the electrode layer 180 is electrically connected to the second doped semiconductor layer 150 through the first opening 171 on the passivation layer 170, and is electrically connected to the bonding metal pad 161 through the second opening 172 on the passivation layer 170.
In this embodiment, the first opening 171 is disposed in the central area of each LED unit 100 as much as possible, and the shape of the first opening 171 may be circular or square, or the like, however, the first opening 171 may be other regular or irregular patterns.
In this embodiment, the material of the electrode layer 180 may be a transparent conductive material, for example, the material of the electrode layer 180 includes a conductive metal oxide such as Indium Tin Oxide (ITO) or zinc oxide (ZnO), or the material of the electrode layer 180 may be a conductive metal material such as Cr, ti, pt, au, al, cu, ge or Ni.
In this embodiment, the first substrate 110 has a driving circuit formed therein for driving the LED unit 100, the contact 111 is electrically connected to the second doping type semiconductor layer 150 through the bonding metal pad 161 and the electrode layer 180, and it is understood that the electrical connection of the second doping type semiconductor layer 150 and the contact 111 of the driving circuit is completed by the electrode layer 180 and the bonding metal pad 161.
In this embodiment, as described above, the second doped semiconductor layer 150 forms the cathode of each LED unit 100, and thus the contact 111 provides the driving voltage to the cathode of each LED unit 100 from the driving circuit to the second doped semiconductor layer 150 through the electrode layer 180.
Figures 3 a-3 h show cross-sectional views of an illustrative Micro-LED Micro-display chip during a manufacturing process, according to some embodiments of the invention.
Referring to fig. 3a to 3h, a method for manufacturing a Micro-LED Micro-display chip according to an embodiment of the present invention may include the following steps:
1) Referring to fig. 3a, a second doped semiconductor layer 150, an active layer 140, and a first doped semiconductor layer 130 are sequentially formed on a second substrate 120, wherein the second doped semiconductor layer 150, the active layer 140, and the first doped semiconductor layer 130 form an LED semiconductor layer;
The second substrate 120 is made of a base material suitable for forming an LED semiconductor layer, for example, the material of the second substrate 120 may be a non-conductive material such as glass, plastic or sapphire wafer, but not limited thereto, the first substrate 110 may be made of a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, or the like, of course, the first substrate 110 may also be made of a non-conductive material such as glass, plastic or sapphire wafer, in this embodiment, the first substrate 110 may be a CMOS back plate or TFT glass substrate, etc., and the driving circuit is used to provide an electrical signal to the LED units 100 to control brightness, in this embodiment, the driving circuit may include an active matrix driving circuit, in which each individual LED unit 100 corresponds to an independent driver, and in this embodiment, the driving circuit may include a passive matrix driving circuit, in which a plurality of LED units 100 are distributed in an array and connected to data lines and scan lines driven by the driving circuit;
In some embodiments, the second doped semiconductor layer 150, the active layer 140, the first doped semiconductor layer 130 may be formed using a Chemical Vapor Deposition (CVD), a Physical Vapor Deposition (PVD), an Atomic Layer Deposition (ALD), a Plasma Enhanced CVD (PECVD), a Plasma Enhanced ALD (PEALD), or the like process; in this embodiment, the first doped semiconductor layer 130 and the second doped semiconductor layer 150 may be made of a II-VI material (such as ZnSe or ZnO) or a III-V nitride material (such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and its alloy), the first doped semiconductor layer 130 may be a P-type semiconductor layer as an anode, in this embodiment, the thickness of the first doped semiconductor layer 130 is 0.05 μm to 1 μm, preferably 0.05 μm to 0.7 μm, and particularly preferably 0.05 μm to 0.5 μm, in this embodiment, the first doped semiconductor layer 130 may be formed by doping magnesium (Mg) in GaN, in other embodiments, the first doped semiconductor layer 130 may also be a P-type InGaN, a P-type AlInGaP, etc., in this embodiment, the second doped semiconductor layer 150 may be an N-type semiconductor layer, and the second doped semiconductor layer 150 as a cathode of each LED unit 100, in this embodiment, the second doped semiconductor layer may be an N-type InGaN-type semiconductor layer 140, an N-type InGaN-type semiconductor layer in this embodiment, an InGaN-type semiconductor layer 140, etc., in this embodiment, an InGaN-type semiconductor layer of an LED unit may be formed, the thickness of the MQW layer 140 and the second doped semiconductor layer 150) is 0.4 μm-4 μm, preferably 0.5 μm-3 μm, of course, the first doped semiconductor layer 130 may be an N-type semiconductor layer, and accordingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer;
2) Referring to fig. 3b and 3c, a bonding layer 160 is formed on the first doped semiconductor layer 130 and/or the first substrate 110, and the first substrate 110 is bonded to the first doped semiconductor layer 130 through the bonding layer 160, wherein the bonding layer 160 may be a conductive adhesive material layer formed on the first substrate 110 to bond the first substrate 110 and the LED unit 100, and in this embodiment, the bonding layer 160 may be made of a conductive material, such as a metal or a metal alloy, for example, au, sn, in, cu or Ti, etc., it should be understood that the description of the bonding layer 160 may be made by way of example only, and not by way of limitation, and all such modifications may be changed as required by those skilled in the art within the scope of the present application;
3) Referring to fig. 3d, the second substrate 120 is removed, and the second substrate 120 may be removed by direct lift-off or other methods known to those skilled in the art, or of course, a thinning operation may be performed on the second doped semiconductor layer 150 after the second substrate 120 is removed to remove a portion of the second doped semiconductor layer 150;
4) Referring to fig. 3e, the second doped semiconductor layer 150 located in the predetermined area may be removed by etching, so as to form a step structure 151, where the step structure 151 separates the second doped semiconductor layer 150 to form a plurality of LED mesas, each LED mesa corresponds to an LED unit, and the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 but less than or equal to the thickness of the LED semiconductor layer, and the step structure 151 isolates at least the second doped semiconductor layers 150 of adjacent LED units from each other, where the step surface of the step structure 151 serves as a light emitting area of the LED semiconductor layer;
It is understood that the step structure 151 penetrates the second doping type semiconductor layer 150 in the thickness direction to thereby isolate the second doping type semiconductor layer 150, or that a portion of the step structure 151 penetrates the second doping type semiconductor layer 150 and the active layer 140 in the thickness direction, or that a portion of the step structure 151 penetrates the second doping type semiconductor layer 150, the active layer 140, and the first doping type semiconductor layer 130 in the thickness direction.
In this embodiment, the thickness of the LED semiconductor layers including the first doped semiconductor layer 130, the active layer 140, and the second doped semiconductor layer 150 may be between about 0.3 μm and about 5 μm, in some other embodiments, the thickness of the LED semiconductor layers including the first doped semiconductor layer 130, the active layer 140, and the second doped semiconductor layer 150 may be between about 0.4 μm and about 4 μm, and in some alternative embodiments, the thickness of the LED semiconductor layers including the first doped semiconductor layer 130, the active layer 140, and the second doped semiconductor layer 150 may be between about 0.5 μm and about 3 μm;
5) Referring to fig. 3f, etching or the like is used to remove the bonding layer 160 in a selected area, so as to form a plurality of etching trenches 162 on the bonding layer 160, wherein a portion of the bonding layer 160 surrounded by the etching trenches 162 forms a bonding metal pad 161 electrically isolated from the rest, and the bonding metal pad 161 covers a contact 111 and is electrically connected to the contact 111;
6) Referring to fig. 3g and 3h, a passivation layer 170 is formed on the surface of the formed device epitaxial structure unit, and a first opening 171 and a second opening 172 are formed on the passivation layer 170 in a processing manner so that a portion of the second doped semiconductor layer 150 is exposed from the first opening 171 and a portion of the bonding metal pad 161 is exposed from the second opening 172;
In the embodiment, the passivation layer is only required to be etched and perforated to expose the light emitting surface of the LED and the bonding metal pad, and compared with the prior art of etching the passivation layer and exposing the contact by the bonding layer, the depth of the etched and perforated passivation layer and the exposure depth are lower, so that the process of perforating the passivation layer is easier to control;
In this embodiment, the passivation layer 170 may be SiO2、Al2O3, siN or other suitable material, and the passivation layer 170 may further include polyimide, SU-8 photoresist or other photo-patternable polymer;
7) Referring to fig. 3i, a transparent electrode layer 180 is formed on the passivation layer 170, and the transparent electrode layer 180 is electrically connected to the second doped semiconductor layer 150, the bonding metal pad 161 and the contact 111 from the first opening 171 and the second opening 172, respectively, and the driving circuit on the first substrate 110 can control the voltage and current of the second doped semiconductor layer 150 through the transparent electrode layer 180;
In this embodiment, the electrode layer 180 is formed on a portion of the passivation layer 170, and in this embodiment, the electrode layer 180 may be made of conductive material such as Indium Tin Oxide (ITO), cr, ti, pt, au, al, cu, ge or Ni.
The Micro-LED Micro display chip provided by the embodiment of the invention has the advantages that the depth of the etched opening is shallower, the exposure depth is lower, the process of opening the passivation layer is easier to control, the flatness of the electrode layer formed subsequently is better, and the fluctuation of the electrode layer at the corresponding contact is smaller.
Example 2
Fig. 2c shows a cross-sectional view of an exemplary Micro-LED Micro display chip according to an embodiment of the present invention, which includes a first substrate 110 and LED semiconductor layers formed on the first substrate 110, the first substrate 110 including a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit, the LED semiconductor layers being fixedly coupled to the first substrate 110 by a bonding layer 160, and the LED semiconductor layers being divided into a plurality of LED units 100 arranged in an array, each of the contacts 111 driving one of the LED units 100, and adjacent LED units 100 being capable of being independently driven.
In this embodiment, the bonding layer 160 includes a plurality of bonding metal pads 161, where the bonding metal pads 161 and the bonding layer 160 (the bonding layer here is actually the main body of the bonding layer) have etching trenches (162 in fig. 3 f) between them to electrically isolate them, each bonding metal pad 161 corresponds to at least one contact 111 and completely covers the contact 111, and each bonding metal pad 161 is further electrically connected to a contact 11 corresponding thereto, and each second doped semiconductor layer corresponding to the LED unit 100 is electrically connected to the contact 111 through the bonding metal pad 161.
In this embodiment, an isolation material layer 190 is disposed between two adjacent LED units 100, the two adjacent LED units 100 are electrically isolated by the isolation material layer 190, so that each LED unit 100 can be driven independently, the isolation material layer 191 has a through hole 191 exposing the bonding metal pad 161, and the LED unit 100 is electrically connected to the bonding metal pad 161 and the contact 111 on the first substrate 110 by the electrode layer 180.
Taking one LED unit 100 as an example, the LED semiconductor layers include a first doping type semiconductor layer 130, an active layer 140, and a second doping type semiconductor layer 150 sequentially stacked on the first substrate 110.
In this embodiment, a passivation layer 170 is formed on the second doped semiconductor layer 150 and a portion of the exposed first doped semiconductor layer 130, the active layer 140, and the isolation material layer 190, the passivation layer 170 may be used to protect and isolate the LED unit 100, a second opening 172 is formed on the passivation layer 170 corresponding to a region of the via hole exposing the contact 111, a first opening 171 is formed on a region of the passivation layer 170 corresponding to the second doped semiconductor layer 150, the electrode layer 180 is formed on a portion of the passivation layer 170, and the electrode layer 180 is electrically connected to the second doped semiconductor layer 150 through the first opening 171 and the via hole on the passivation layer 170, and is electrically connected to the bond metal pad 161 and the contact 111 through the second opening 172 on the passivation layer 170.
In this embodiment, the first opening 171 is preferably disposed in the central area of each LED unit 100, and the shape of the first opening 171 may be circular or square, or the like, however, the first opening 171 may be in other regular or irregular patterns.
In this embodiment, the isolation material layer 190 is disposed at least in the second doped semiconductor layer 150, and the thickness of the isolation material layer 190 is not smaller than the thickness of the second doped semiconductor layer 150, and the isolation material layer 190 at least electrically isolates the second doped semiconductor layers 150 of the adjacent LED units 100.
In this embodiment, the isolation material layer 190 may be formed in the second doping type semiconductor layer 150 to a depth insufficient to penetrate the active layer 140, the first doping type semiconductor layer 130 and the bonding layer 160 included in each LED unit may extend horizontally to adjacent LED units, or the isolation material layer 190 may be continuously formed in the second doping type semiconductor layer 150, the active layer 140, the first doping type semiconductor layer 130.
In this embodiment, the isolation material layer 190 has an electrically insulating physical property, and the material of the isolation material layer 190 includes an ion implantation material, and the ion implantation material includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.
The materials and structures of the first doped semiconductor layer 130, the active layer 140, the second doped semiconductor layer 150, the bonding layer 160, the passivation layer 170, and the electrode layer 180 in this embodiment may be substantially the same as those in embodiment 1, and thus, the description thereof will not be repeated.
Fig. 4 a-4 d show cross-sectional views of an illustrative Micro-LED Micro display chip during a fabrication process according to some embodiments of the present invention, it being noted that fig. 4 a-4 d only show the fabrication process after transferring the LED semiconductor layers comprising the first doped semiconductor layer 130, the active layer 140, the second doped semiconductor layer 150 from the second substrate 120 onto the first substrate 110.
Referring to fig. 4a to fig. 4d, the manufacturing process of the Micro-LED Micro-display chip provided in the embodiment of the present invention is substantially the same as that of embodiment 1, so that the embodiment only describes the differences from embodiment 1, and the rest of the same or similar process steps and the limitation of the materials and structures of each epitaxial structure layer are omitted herein, and the manufacturing method may include the following steps:
4) Referring to fig. 4a, an isolation material layer 190 is formed in the second doped semiconductor layer 150 by ion implantation, wherein the thickness of the isolation material layer 190 is not less than the thickness of the second doped semiconductor layer 150, and as a result of ion implantation, the second doped semiconductor layer 150 is separated into a plurality of LED mesas by the isolation material layer 190, each LED mesa corresponding to an LED unit.
In the present embodiment, the isolation material layer 190 may be formed by implanting any one ion or a combination of two or more ions in H, he, N, O, F, mg, si, ar in the second doping type semiconductor layer 150, and in the present embodiment, the isolation material layer 190 has an electrically insulating physical property, and by implanting ions in a designated region of the second doping type semiconductor layer 150, the material of the second doping type semiconductor layer 150 in the designated region may be converted into the isolation material layer 190.
In this embodiment, the isolation material layer 190 may be formed with an ion implantation power of between about 10keV and about 300keV, in some embodiments the isolation material layer 190 may be formed with an ion implantation power of between about 15keV and about 250keV, in some embodiments the isolation material layer 190 may be formed with an ion implantation power of between about 20keV and about 200 keV.
In this embodiment, the depth of the ion implantation may be controlled such that the formed isolation material layer 190 penetrates the second doping type semiconductor layer 150 in the thickness direction, and of course, the formed isolation material layer 190 may also penetrate the second doping type semiconductor layer 150 and the active layer 140 in the thickness direction, and of course, the formed isolation material layer 190 may also penetrate the second doping type semiconductor layer 150, the active layer 140, and the first doping type semiconductor layer 150 in the thickness direction, it being understood that the location, shape, and depth of the isolation material layer 190 shown in fig. 4a are merely illustrative and not limiting, and a person skilled in the art may vary according to the specific embodiment, all of which are within the scope of the present invention.
5) Referring to fig. 4b, a via hole 191 exposing the bonding layer 160 is formed in a region of the isolation material layer 191 corresponding to the contact 111 by etching, the via hole 191 continuously penetrates through the isolation material layer 191, the active layer 140 and the first doped semiconductor layer 130 in the thickness direction, and then the bonding layer 160 located in a selected region of the via hole 191 is removed by etching, so as to form a plurality of etching trenches 162 on the bonding layer 160, a bonding metal pad 161 electrically isolated from the rest is formed in a portion of the bonding layer 160 surrounded by the etching trenches 162, and the bonding metal pad 161 covers a contact 111 and is electrically connected to the contact 111;
6) Referring to fig. 4c and 4d, a passivation layer 170 is formed on the surface of the formed device epitaxial structure unit, and a first opening 171 and a second opening 172 are formed on the passivation layer 170 in a processing manner so that a portion of the second doped semiconductor layer 150 is exposed from the first opening 171, and the bonding metal pad 161 is exposed from the second opening 172;
7) Referring to fig. 4e, a transparent electrode layer 180 is formed on the passivation layer 170, and the transparent electrode layer 180 is electrically connected to the second doped semiconductor layer 150, the bonding metal pad 161 and the contact 111 from the first opening 171 and the second opening 172, respectively.
According to the Micro-LED Micro display chip provided by the embodiment of the invention, the bonding layer above the contact is reserved instead of etching the bonding layer above the contact to expose the contact, the height difference between the second doped semiconductor layer and the contact of the electrode layer is smaller, the electrode layer can better electrically connect the second doped semiconductor layer and the contact, the electrode layer is not easy to break, and the electrode layer has better flatness, connectivity and coverage. In addition, when the passivation layer is etched, the depth of the etched opening is shallower, and the process of exposing and opening the passivation layer is easier to control.
It should be understood that the above embodiments are merely for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and implement the same according to the present invention without limiting the scope of the present invention. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.