CN114450809A - Color photoelectric solid-state device - Google Patents

Abstract

Structures and methods for fabricating color optoelectronic solid state array devices are disclosed. In one embodiment, different color devices are combined to form a color optoelectronic solid state array. The micro device array includes a stack of layers, a monolithic device, and a backplane. Furthermore, a reflector, an image source, a light sensor, and a dichroic mirror have been integrated.

Description

Translated fromChinese

彩色光电固态装置Color photoelectric solid-state device

技术领域technical field

本公开涉及光电固态阵列装置，且更特定来说，涉及使用不同微型装置形成微型装置的彩色阵列。The present disclosure relates to optoelectronic solid state array devices, and more particularly, to the use of different microdevices to form color arrays of microdevices.

发明内容SUMMARY OF THE INVENTION

本发明涉及一种具有微型装置的微型装置阵列，其包括：半导体的堆叠层，其接合到背板；所述背板中的垫，其界定子像素，其中多个子像素用于像素阵列中的像素；及所述堆叠层，其接合到所述背板中界定子像素的所述垫。The present invention relates to an array of micro-devices with micro-devices comprising: a stacked layer of semiconductors bonded to a backplane; pads in the backplane that define sub-pixels, wherein a plurality of sub-pixels are used for a pixel; and the stacked layer bonded to the pads in the backplane that define subpixels.

在所述实施例的扩展中，本发明进一步涉及微型装置阵列，其中其为多于一个微型装置阵列的部分。此外，所述微型装置阵列包括第二堆叠层，所述第二堆叠层接合到第一堆叠层的顶部上的背板，其中所述背板中的垫界定子像素。In an extension of the described embodiments, the invention further relates to an array of microdevices, wherein it is part of more than one array of microdevices. Furthermore, the array of microdevices includes a second stack layer bonded to a backplane on top of the first stack layer, wherein the pads in the backplane define subpixels.

在进一步扩展中，第三堆叠层经接合到所述第二堆叠层的顶部上的背板，其中所述背板中的垫界定子像素。In a further extension, a third stack layer is bonded to a backplate on top of the second stack layer, wherein the pads in the backplate define subpixels.

在另一实施例中，本发明公开一种用于在彩色微型装置阵列中调制电阻的方法，所述方法包括：具有每像素多于一个类型的微型装置；在两个相邻像素之间共享至少一个类型的微型装置；及调制所述微型装置的接触层的电阻以产生像素化。In another embodiment, the present invention discloses a method for modulating resistance in a color microdevice array, the method comprising: having more than one type of microdevice per pixel; sharing between two adjacent pixels at least one type of microdevice; and modulating the resistance of a contact layer of the microdevice to produce pixelation.

在另一实施例中，本发明公开一种用于制造彩色微型装置阵列的方法，所述方法包括：在背板的顶部上堆叠单片装置的多于一个层；通过第一垫将第一单片装置接合到所述背板；在所述第一单片装置中形成开口；在所述第一单片装置的所述开口中形成第二垫；及通过所述第二垫将第二单片装置接合到所述背板。In another embodiment, the present invention discloses a method for fabricating an array of colored microdevices, the method comprising: stacking more than one layer of a monolithic device on top of a backplane; A monolithic device is joined to the backplane; an opening is formed in the first monolithic device; a second pad is formed in the opening of the first monolithic device; and a second pad is formed by the second pad A monolithic device is bonded to the backplane.

在另一实施例中，本发明公开用于在彩色微型装置阵列中组合光色彩的方法，所述方法包括：使用线性色彩组合器组合来自不同图像源的光色彩；具有在线性色彩组合器的一个侧上的所述图像源；使用反射器重新引导通过不同图像源产生的光；具有用于图像源的前板以产生或捕获每像素的光；具有用于控制或捕获每像素的所述前板的输出的背板；及将所述图像源耦合到所述线性色彩组合器的少于两个表面。In another embodiment, the present invention discloses a method for combining light colors in an array of color microdevices, the method comprising: combining light colors from different image sources using a linear color combiner; the image source on one side; use a reflector to redirect light generated by different image sources; have a front plate for the image source to generate or capture light per pixel; have the image source for control or capture per pixel a backplane for the output of the frontplane; and less than two surfaces coupling the image source to the linear color combiner.

附图说明Description of drawings

在阅读以下详细描述及参考图式后，本公开的上述及其它优点将变得显而易见。The above and other advantages of the present disclosure will become apparent upon reading the following detailed description and referenced drawings.

图1展示红色微型LED较大的像素结构。Figure 1 shows the larger pixel structure of a red micro LED.

图2展示具有一个共享单片微型装置的像素结构。Figure 2 shows a pixel structure with one shared monolithic microdevice.

图3展示具有多于一个共享单片微型装置的像素结构。3 shows a pixel structure with more than one shared monolithic microdevice.

图4展示用以形成彩色阵列的不同微型装置阵列的堆叠结构。Figure 4 shows a stack structure of different arrays of microdevices used to form a color array.

图5展示使用二向色棱镜以形成彩色显示器的现有方法。Figure 5 shows a prior art method of using dichroic prisms to form a color display.

图6展示使用串行二向色光学件以形成彩色阵列的实施例。6 shows an embodiment using serial dichroic optics to form a color array.

图7展示在串行二向色光学件中使用的个别阵列的俯视图。7 shows a top view of individual arrays used in serial dichroic optics.

图8展示使用不同类型的相同微型装置以形成更好性能彩色阵列的结构。Figure 8 shows a structure using different types of the same microdevice to form a better performing color array.

图9A展示形成为连续像素化的微型装置(阵列)中的一者。FIG. 9A shows one of the microdevices (arrays) formed as successively pixelated.

图9B展示接合到垫的微型装置。Figure 9B shows a microdevice bonded to a pad.

图10A展示形成为连续像素化的微型装置(阵列)中的一者，其具有第二堆叠层上的光学通孔及具有微型装置的凸块。FIG. 10A shows one of the microdevices (arrays) formed as successive pixelation with optical vias on the second stacked layer and bumps with the microdevices.

图10B展示接合到所述背板的图10A中的微型装置。Figure 10B shows the microdevice of Figure 10A bonded to the backplane.

图11A展示具有微型装置阵列的半导体的三个堆叠层。Figure 11A shows three stacked layers of a semiconductor with an array of microdevices.

图11B展示与具有光学通孔的顶层接合在一起的两个堆叠层。Figure 1 IB shows two stacked layers bonded together with a top layer with optical vias.

图11C展示与具有光学通孔的顶层接合在一起的三个堆叠层。Figure 11C shows three stacked layers bonded together with a top layer with optical vias.

虽然本公开易具有各种修改及替代形式，但是特定实施例或实施方案已通过实例在图式中展示，且将在本文中详细描述。然而，应了解，本公开并不希望限于所公开的特定形式。而是，本公开将覆盖落在如由所附权利要求书所界定的本发明的精神及范围内的所有修改例、等效例及替代例。While the present disclosure is susceptible to various modifications and alternative forms, particular embodiments or implementations have been shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the present disclosure is not intended to be limited to the particular forms disclosed. Rather, this disclosure is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

具体实施方式Detailed ways

在本描述中，术语“装置”及“微型装置”是可互换地使用。然而，所属领域的技术人员清楚，此处描述的实施例与装置尺寸无关。In this description, the terms "device" and "microdevice" are used interchangeably. However, as is clear to those skilled in the art, the embodiments described herein are independent of device size.

本公开涉及微型装置阵列，其中所述微型装置阵列可用可靠方法接合到背板。微型装置经制造于微型装置衬底上方。微型装置衬底可包括微型发光二极管(LED)、无机LED、有机LED、传感器、固态装置、集成电路、微电子机械系统(MEMS)及/或其它电子组件。衬底可为装置层的同质衬底，或装置层或固态装置被转移到的接收器衬底。虽然微型LED及显示器可能已被用来解释发明，但相同技术可用于其它应用。The present disclosure relates to arrays of microdevices, wherein the arrays of microdevices can be bonded to a backplane in a reliable manner. Microdevices are fabricated over a microdevice substrate. Microdevice substrates may include microlight emitting diodes (LEDs), inorganic LEDs, organic LEDs, sensors, solid state devices, integrated circuits, microelectromechanical systems (MEMS), and/or other electronic components. The substrate may be a homogenous substrate for the device layer, or a receiver substrate to which the device layer or solid state device is transferred. While micro LEDs and displays may have been used to explain the invention, the same technology can be used for other applications.

背板(或系统)衬底可为任何衬底，且可为刚性或柔性的。背板衬底可由玻璃、硅、塑胶，或任何其它常用材料制成。背板衬底还可具有主动电子组件，例如但不限于晶体管、电阻器、电容器或在系统衬底中常用的任何其它电子组件。在一些情况下，系统衬底可为具有电信号行及列的衬底。背板衬底可为具有电路的背板以导出微型装置。The backplane (or system) substrate can be any substrate and can be rigid or flexible. The backplane substrate can be made of glass, silicon, plastic, or any other commonly used material. The backplane substrate may also have active electronic components such as, but not limited to, transistors, resistors, capacitors, or any other electronic components commonly used in system substrates. In some cases, the system substrate may be a substrate with rows and columns of electrical signals. The backplane substrate may be a backplane with circuitry to derive microdevices.

在大多数微型装置结构中，具有较高波长相关联的装置具有较低性能。在图1中展示的一个实施例中，使用像素结构100，其中与较大波长相关联的微型装置102比其它微型装置104及106更大。In most microdevice configurations, devices with higher wavelengths are associated with lower performance. In one embodiment shown in FIG. 1 , apixel structure 100 is used in which themicrodevice 102 associated with the larger wavelength is larger than theother microdevices 104 and 106 .

在如图2中展示的另一像素结构200-1及200-2中，与其它装置204-1、204-2、206-1及206-2相比，对尺寸减小更敏感的装置202在两个相邻像素之间共享。为产生进一步像素化，装置202经修改以具有个别装置效应202-1及202-2。在一种情况下，通过针对每一子装置202-1及202-2使用两个独立触点来完成修改。此外，我们可修改用于子装置的两个触点之间的经掺杂层的电阻。在倒装芯片结构的情况下，一个共同触点可用于单片装置中的子装置。In another pixel structure 200-1 and 200-2 as shown in FIG. 2, thedevice 202 is more sensitive to size reduction compared to the other devices 204-1, 204-2, 206-1 and 206-2 Shared between two adjacent pixels. To produce further pixelation,device 202 is modified to have individual device effects 202-1 and 202-2. In one case, the modification is accomplished by using two separate contacts for each sub-device 202-1 and 202-2. Furthermore, we can modify the resistance of the doped layer between the two contacts for the sub-device. In the case of flip-chip structures, one common contact can be used for sub-devices in a monolithic device.

如图3中所展示，在通过300-1、300-2、300-3及300-4界定的另一像素结构中，改变像素定向使得相同类型的装置在相同位置中。因此，通过302-1、302-2、304-1、304-2及306-1界定的单片装置可用于相邻像素中的相同装置。为产生进一步像素化，装置302-1、302-2、304-1、304-2、306-1经修改以具有个别装置效应302-1-1到302-1-4、302-2-1到302-2-4、304-1-1到304-1-4、304-2-1到304-2-4、306-1-1到306-1-4。在一种情况下，通过针对每一子装置302-1-1到302-1-4、302-2-1到302-2-4、304-1-1到304-1-4、304-2-1到304-2-4、306-1-1到306-1-4使用两个独立触点来完成修改。此外，我们可修改子装置302-1-1到302-1-4、302-2-1到302-2-4、304-1-1到304-1-4、304-2-1到304-2-4、306-1-1到306-1-4的两个触点之间的经掺杂层的电阻。为减少像素定向变化的效应，可在每一像素的顶部上开发光/彩色漫射器结构。此结构可为透镜或图案化透明层。As shown in FIG. 3, in another pixel structure defined by 300-1, 300-2, 300-3, and 300-4, the pixel orientation is changed so that devices of the same type are in the same location. Thus, a monolithic device defined by 302-1, 302-2, 304-1, 304-2, and 306-1 can be used for the same device in adjacent pixels. To produce further pixelation, devices 302-1, 302-2, 304-1, 304-2, 306-1 are modified to have individual device effects 302-1-1 to 302-1-4, 302-2-1 to 302-2-4, 304-1-1 to 304-1-4, 304-2-1 to 304-2-4, 306-1-1 to 306-1-4. In one case, by for each sub-device 302-1-1 to 302-1-4, 302-2-1 to 302-2-4, 304-1-1 to 304-1-4, 304- 2-1 to 304-2-4, 306-1-1 to 306-1-4 use two independent contacts to complete the modification. In addition, we can modify sub-devices 302-1-1 to 302-1-4, 302-2-1 to 302-2-4, 304-1-1 to 304-1-4, 304-2-1 to 304 - Resistance of the doped layer between the two contacts of 2-4, 306-1-1 to 306-1-4. To reduce the effect of pixel orientation changes, a light/color diffuser structure can be developed on top of each pixel. This structure can be a lens or a patterned transparent layer.

在另一种方法中，单片装置用于多于一个像素，且为实现彩色，不同装置彼此上下堆叠。In another approach, a monolithic device is used for more than one pixel, and different devices are stacked on top of each other to achieve color.

此处，通过调制接触层电阻而使单片装置转变为不同像素化。此外，与用于每一装置的背板上的垫相比，接触层电阻的调制可产生较高分辨率子装置阵列。此实现将装置连接到背板所需的较低对准精度。将第一单片装置(阵列)402转移到衬底(背板或临时或另一单片装置(阵列))。第一单片装置402具有连接垫402-2R，连接垫402-2R将接合到背板上的相应垫。随后，与用于另一装置(阵列)的垫相关联的区域402-4G及402-4B在所述经转移单片装置402(阵列)中敞开。开口402-4G及402-4B经钝化及填充以形成用于下一装置404(阵列)的垫。在敞开之前或之后，或在填充开口的同时，共同电极可被沉积用于第一经转移单片装置。随后，第二装置404(阵列)经转移(或接合)到所述第一经转移单片装置(阵列)402。第二单片装置404还具有用于第三装置的连接垫404-2G及开口404-4B(如果需要)。Here, the monolithic device is converted to different pixelation by modulating the contact layer resistance. Furthermore, modulation of the contact layer resistance can result in a higher resolution array of sub-devices compared to the pads on the backplane for each device. This achieves the lower alignment accuracy required to connect the device to the backplane. The first monolithic device (array) 402 is transferred to a substrate (backplane or temporary or another monolithic device (array)). The firstmonolithic device 402 has connection pads 402-2R that will be bonded to corresponding pads on the backplane. Subsequently, regions 402-4G and 402-4B associated with pads for another device (array) are opened in the transferred monolithic device 402 (array). Openings 402-4G and 402-4B are passivated and filled to form pads for the next device 404 (array). Before or after opening, or while filling the opening, a common electrode can be deposited for the first transferred monolithic device. Subsequently, the second device 404 (array) is transferred (or bonded) to the first transferred monolithic device (array) 402 . The secondmonolithic device 404 also has connection pads 404-2G and openings 404-4B (if needed) for the third device.

第二装置可为单片装置或模拟装置。如果第二装置404是单片的，那么还可存在于与第一单片装置402的有源区域相关联的第二装置上的开口404-8R。The second device may be a monolithic device or an analog device. If thesecond device 404 is monolithic, openings 404 - 8R may also be present on the second device associated with the active area of the firstmonolithic device 402 .

开口404-4B经钝化及填充以形成用于下一装置406(阵列)的垫。在敞开之前或之后，或在填充开口的同时，共同电极可被沉积用于第一经转移单片装置。随后，第三装置406(阵列)经转移(或接合)到第二经转移单片装置(阵列)404。第三装置406还具有连接垫406-2B。Openings 404-4B are passivated and filled to form pads for the next device 406 (array). Before or after opening, or while filling the opening, a common electrode can be deposited for the first transferred monolithic device. Subsequently, the third device 406 (array) is transferred (or bonded) to the second transferred monolithic device (array) 404 . Thethird device 406 also has connection pads 406-2B.

第三装置可为单片装置或模拟装置。如果第三装置406是单片的，那么还可存在于与第一装置402及第二装置404的有源区域相关联的第三装置406上的开口406-8R及406-8G。The third device may be a monolithic device or an analog device. If thethird device 406 is monolithic, openings 406 - 8R and 406 - 8G may also be present on thethird device 406 associated with the active regions of thefirst device 402 and thesecond device 404 .

图5展示制造彩色装置的另一种方法。此处，使用二向色棱镜500以组合来自三个单色装置502、504、506的光。单色装置可具有用于形成光的前板502-L、504-L及506-L及用于控制每像素的光输出的背板502-B、504-B及506-G。此外，机械结构502M、504M及506M用于封装、热管理或电连接。此方法的挑战是其非常庞大且不太适合可穿戴电子装置(例如增强现实装置)。其它挑战是装置需要非常精确地对准，此对高像素密度装置来说是困难的。Figure 5 shows another method of fabricating a color device. Here, a dichroic prism 500 is used to combine the light from the threemonochromatic devices 502, 504, 506. Monochromatic devices may have front plates 502-L, 504-L and 506-L for forming light and back plates 502-B, 504-B and 506-G for controlling light output per pixel. Additionally, mechanical structures 502M, 504M and 506M are used for packaging, thermal management or electrical connections. The challenge with this approach is that it is very bulky and not well suited for wearable electronic devices such as augmented reality devices. Another challenge is that the devices need to be aligned very precisely, which is difficult for high pixel density devices.

图6介绍新实施例，其中使用线性色彩组合器600来组合来自不同源602、604及606的色彩。此处，源(图像阵列)是在光组合器的一个侧上。使用反射器600-2将通过光源中的任一者产生的光重新引导到同一方向。反射器还允许来自先前源的图像通过。此处，图像源可为不同类型的发光装置(例如微型LED及/或OLED)。单个背板612可用于驱动与每一图像源相关联的前板。在此类情况下，驱动及接口可共享。在其它情况下，不同背板可用于至少两个不同前板。此处，前板与背板的组合可固定于机械结构上。此处，对准来自图像源在背板(或机械结构)上的位置精度。因此，可在无大量耗用的情况下实现高对准精度。此外，组合结构在所有三个维度上均非常紧凑。此处，还可在后表面600-8上设置另一图像源。在一种情况下，此处的图像源可为图像传感器，所述图像传感器捕获从另一侧600-10通过的光。此传感器可用于追踪功能性、成像等。其它图像源中的一者可是为此图像传感器形成光。两个侧600-8及600-10可为物理结构或仅仅虚拟表面。6 introduces a new embodiment in which alinear color combiner 600 is used to combine colors fromdifferent sources 602, 604, and 606. Here, the source (image array) is on one side of the light combiner. The light produced by either of the light sources is redirected to the same direction using the reflector 600-2. The reflector also allows images from previous sources to pass through. Here, the image sources may be different types of light-emitting devices (eg, micro-LEDs and/or OLEDs). Asingle backplane 612 may be used to drive the frontplane associated with each image source. In such cases, drivers and interfaces can be shared. In other cases, different backplanes may be used for at least two different frontplanes. Here, the combination of the front plate and the back plate can be fixed on the mechanical structure. Here, the alignment comes from the accuracy of the position of the image source on the backplane (or mechanical structure). Therefore, high alignment accuracy can be achieved without significant consumption. Furthermore, the combined structure is very compact in all three dimensions. Here, another image source may also be provided on the rear surface 600-8. In one case, the image source here may be an image sensor that captures light passing from the other side 600-10. This sensor can be used for tracking functionality, imaging, and more. One of the other image sources may form light for this image sensor. The two sides 600-8 and 600-10 may be physical structures or just virtual surfaces.

在一种情况下，反射器600-2、600-4及600-6可为二向色镜(或棱镜)。此处，镜反射低于截止波长的光，且通过在带宽内的光。如果图像源是传感器或显示器，那么布置可不同。以下是用于显示器应用，但是可使用相同原理来开发传感器的设置。以下设置是用于3个光源，但是类似布置可用于更多图像源。假设是通过图像源602产生的波长在W2L与W2H(W2L<W2H)之间，其中W2L及W2H界定镜的通过带宽，通过图像源604产生的波长在W4L与W4H之间(W4L<W4H)，且通过图像源606产生的波长在W6L与W6H之间(W4L<W4H)。镜600-2截止波长大于W2H(我们可使用小于W2H以从图像源截去一些不需要的波长)。镜600-4截止波长在W2L与W4H之间(W4H<W2L)(我们可使用小于W4H以从图像源截去一些不需要的波长)。镜600-6截止波长在W4L与W6H之间(W6H<W4L)(我们可使用小于W4H以从图像源截去一些不需要的波长)。此处，镜600-2反射通过光源602产生的光的部分。镜600-4反射通过光源604产生的光的部分，且通过来自镜600-2的光的部分。镜600-6反射通过光源606产生的光的部分，且通过来自镜600-4的光的部分。如果来自源的光具有波长重叠，那么可基于色点或功耗或其它参数的优化来完成截止波长的选择。In one case, the reflectors 600-2, 600-4, and 600-6 may be dichroic mirrors (or prisms). Here, the mirror reflects light below the cutoff wavelength and passes light within the bandwidth. The arrangement may be different if the image source is a sensor or display. The following is for a display application, but the same principles can be used to develop a sensor setup. The following setup is for 3 light sources, but a similar arrangement can be used for more image sources. Assuming that the wavelengths generated byimage source 602 are between W2L and W2H (W2L<W2H), where W2L and W2H define the pass bandwidth of the mirror, and the wavelengths generated byimage source 604 are between W4L and W4H (W4L<W4H), And the wavelength generated by theimage source 606 is between W6L and W6H (W4L<W4H). The mirror 600-2 cutoff wavelength is greater than W2H (we can use less than W2H to cut off some unwanted wavelengths from the image source). The mirror 600-4 cutoff wavelength is between W2L and W4H (W4H<W2L) (we can use less than W4H to cut off some unwanted wavelengths from the image source). The mirror 600-6 cutoff wavelength is between W4L and W6H (W6H < W4L) (we can use less than W4H to cut off some unwanted wavelengths from the image source). Here, the mirror 600-2 reflects part of the light generated by thelight source 602. Mirror 600-4 reflects the portion of the light generated bylight source 604 and passes the portion of the light from mirror 600-2. Mirror 600-6 reflects the portion of the light generated bylight source 606 and passes the portion of the light from mirror 600-4. If the light from the source has wavelength overlap, the selection of the cutoff wavelength can be done based on optimization of the color point or power consumption or other parameters.

反射器可由具有不同光学性质的不同光学层制成，或可由光栅结构制成。The reflectors can be made of different optical layers with different optical properties, or can be made of grating structures.

图7展示示范性图像源402、404、406布置的俯视图。前板定位于背板412上。机械结构可用于将结构固持于适当位置中且提供到背板的连接。机械结构可为最终应用的部分(例如增强现实耳机)。7 shows a top view of anexemplary image source 402, 404, 406 arrangement. The front plate is positioned on theback plate 412 . A mechanical structure can be used to hold the structure in place and provide a connection to the backplane. The mechanical structure may be part of the end application (eg augmented reality headset).

此实施例的一个独特优点是其允许数个图像源的集成，且不限于两个或三个。因此，可集成不同图像源以提供更好功率效率、更用户友好的性能及不同功能。在一种情况下，两种类型的图像源可用于以下图像源中的至少一者：一者具有非常高的色彩纯度，且另一者具有更好的功率或用户友好性能。举例来说，在蓝色的情况下，高强度的纯蓝光会对用户的眼睛造成伤害。因此，可使用两个图像源，一者具有纯蓝色406-1，且另一者具有较浅蓝色406-2。对于需要蓝光的大多数情况，使用浅蓝色图像源406-2。仅当需要纯蓝色时，我们可激活纯蓝色图像源406-1。大体上，浅蓝色具有较高功率效率，此又可提供较低功耗。相同情况还可用于其它图像源。A unique advantage of this embodiment is that it allows the integration of several image sources, not limited to two or three. Therefore, different image sources can be integrated to provide better power efficiency, more user-friendly performance, and different functionality. In one case, two types of image sources can be used for at least one of the following image sources: one with very high color purity and the other with better power or user-friendliness performance. For example, in the case of blue, high-intensity pure blue light can cause damage to the user's eyes. Thus, two image sources can be used, one with a solid blue 406-1 and the other with a lighter blue 406-2. For most situations where blue light is required, a light blue image source 406-2 is used. We can activate pure blue image source 406-1 only when pure blue is required. In general, light blue has higher power efficiency, which in turn provides lower power consumption. The same can be used for other image sources.

在另一实施例中，相同或不同图像源可分别结合小于一个像素偏移使用。因此，当两者同时使用时，其可提供高得多的分辨率图像。In another embodiment, the same or different image sources may each be used with less than one pixel offset. Therefore, when both are used together, it can provide a much higher resolution image.

在图9A及9B中演示的另一实施例中，微型装置(阵列)916中的一者形成为连续像素化，其中电流被限制于半导体910的堆叠层的小区域的至少一个区域中以产生隔离微型装置效应(可存在此电流限制结构的阵列来形成微型装置阵列)。在一个实例中，这些堆叠层可为红色外延发光层。堆叠层910经接合到背板900，其中背板中的垫界定子像素。此处，可存在对堆叠层910执行以进一步隔离子像素(阵列)916的后处理。背板900可具有针对像素阵列中的每一像素的多个子像素。可存在针对每一子像素的垫，且电流限制结构(阵列)经接合到背板子像素中的相关联垫。可存在与背板中的垫相关联的多于一个电流限制结构。后处理可包含电流限制、蚀刻堆叠层910中的顶层中的一或多者。在一种情况下，在接合到背板之前，堆叠层可具有通孔912及914。通孔可至少部分填充有导电层，所述导电层用电介质与通孔的壁分离。连接可将来自背板的垫耦合到堆叠层的顶部。在另一种情况下，在堆叠层910经接合到背板中之后，电通孔912及914在堆叠层910中形成。此过程使开口能够与背板中的其它子像素中的垫适当对准。通孔912及914的侧壁可经钝化，且垫902及垫904形成于通孔912及914内部或通孔912及914的壁上。微型装置920及930经接合到垫。可存在针对每一微型装置的多于一个垫或多于两个通孔。导电层可经沉积于微型装置920及930或堆叠层910的顶部上。In another embodiment illustrated in Figures 9A and 9B, one of the microdevices (array) 916 is formed as a continuous pixelation, wherein current is confined in at least one of the small areas of the stacked layers ofsemiconductor 910 to produce Isolation of microdevice effects (there may be an array of such current confinement structures to form an array of microdevices). In one example, these stacked layers may be red epitaxial light emitting layers.Stacked layer 910 is bonded tobackplane 900, where the pads in the backplane define subpixels. Here, there may be post-processing performed on thestacked layers 910 to further isolate the sub-pixels (arrays) 916 .Backplane 900 may have multiple sub-pixels for each pixel in the pixel array. There may be a pad for each subpixel, and the current confinement structure (array) is bonded to the associated pad in the backplane subpixel. There may be more than one current limiting structure associated with the pads in the backplane. Post-processing may include one or more of current confinement, etching the top layer instack 910 . In one case, the stacked layers may havevias 912 and 914 prior to bonding to the backplane. The via may be at least partially filled with a conductive layer separated from the walls of the via with a dielectric. Connections can couple pads from the backplane to the top of the stack. In another case,electrical vias 912 and 914 are formed in thestack layer 910 after thestack layer 910 is bonded into the backplane. This process enables proper alignment of the openings with pads in other subpixels in the backplane. The sidewalls of thevias 912 and 914 may be passivated, and thepads 902 and 904 are formed inside thevias 912 and 914 or on the walls of thevias 912 and 914 .Microdevices 920 and 930 are bonded to the pads. There may be more than one pad or more than two vias for each microdevice. Conductive layers may be deposited on top ofmicrodevices 920 and 930 orstack layer 910 .

在图10A及10B中演示的另一实施例中，微型装置(阵列)1016中的一者形成为连续像素化，其中电流被限制于半导体1010的堆叠层的至少一个区域中以产生隔离微型装置效应(可存在此电流限制结构的阵列来形成微型装置阵列)。在一个实例中，这些堆叠层可为红色外延发光层。堆叠层1010经接合到背板1000，其中背板中的垫界定子像素。此处，可存在对堆叠层1010执行以进一步隔离子像素(阵列)1016的后处理。背板1000可具有针对像素阵列中的每一像素的多个子像素。可存在针对每一子像素的垫1006，且电流限制结构(阵列)经接合到背板子像素中的相关联垫。可存在与背板中的垫1006相关联的多于一个电流限制结构。后处理可包含电流限制、蚀刻堆叠层1010中的顶层中的一或多者。In another embodiment demonstrated in Figures 10A and 10B, one of the microdevices (array) 1016 is formed as a continuous pixelation, wherein current is confined in at least one region of the stacked layers ofsemiconductor 1010 to produce isolated microdevices effect (an array of such current confinement structures may exist to form an array of microdevices). In one example, these stacked layers may be red epitaxial light emitting layers.Stacked layer 1010 is bonded tobackplane 1000, where the pads in the backplane define subpixels. Here, there may be post-processing performed on thestacked layers 1010 to further isolate the sub-pixels (arrays) 1016 . Thebackplane 1000 may have multiple sub-pixels for each pixel in the pixel array. There may be apad 1006 for each subpixel, and the current confinement structure (array) is bonded to the associated pad in the backplane subpixel. There may be more than one current limiting structure associated with thepads 1006 in the backplane. Post-processing may include one or more of current confinement, etching the top layer instack 1010 .

在一种情况下，在接合到背板之前，堆叠层可具有通孔1012及1014。通孔允许来自放置于背板上的微型装置的光通过堆叠层1010(或信号到达背板上的微型装置)。在另一种情况下，在堆叠层1010经接合到背板中之后，光学通孔1012及1014在堆叠层1010中形成。此过程使开口能够与背板中的其它子像素中的微型装置1020及1030适当对准。通孔1012及1014的侧壁可经钝化，且在壁上形成反射层。在堆叠层1010的接合之前，微型装置1020及1030经接合到背板。可存在针对每一微型装置的多于一个垫或多于两个通孔。导电层可沉积于微型装置1020及1030或堆叠层1010的顶部上。In one case, the stacked layers may havevias 1012 and 1014 prior to bonding to the backplane. Vias allow light from microdevices placed on the backplane to pass through the stack 1010 (or signals to the microdevices on the backplane). In another case,optical vias 1012 and 1014 are formed in thestack 1010 after thestack 1010 is bonded into the backplane. This process enables proper alignment of the openings with themicrodevices 1020 and 1030 in other subpixels in the backplane. The sidewalls of thevias 1012 and 1014 may be passivated and a reflective layer formed on the walls.Microdevices 1020 and 1030 are bonded to the backplane prior to bonding ofstack layer 1010 . There may be more than one pad or more than two vias for each microdevice. Conductive layers may be deposited on top ofmicrodevices 1020 and 1030 orstack layer 1010 .

凸块1006还可包含类似于1020或1030的微型装置。此处，可形成微型装置以将背板耦合到在装置的顶部上形成的垫。在另一种情况下，测试经接合到背板的微型装置1020及1030的阵列。在分配微型装置以形成凸块1006之前，识别缺陷类型，且为凸块分配的组将包含一些缺陷微型装置。Bumps 1006 may also include miniature devices similar to 1020 or 1030 . Here, microdevices can be formed to couple the backplane to pads formed on top of the device. In another case, an array ofmicrodevices 1020 and 1030 bonded to the backplane is tested. Before assigning the microdevices to formbumps 1006, the defect type is identified, and the group assigned to the bumps will contain some defective microdevices.

在另一种情况下，使用例如沉积的其它方法在背板上的经接合微型装置上形成具有电流限制的堆叠层。此处，平坦化层可用于平坦化具有微型装置的背板的表面，且在平坦化层上形成堆叠层。In another case, stack layers with current confinement are formed on the bonded microdevices on the backplane using other methods such as deposition. Here, the planarization layer may be used to planarize the surface of the backplane with the micro-devices, and a stacked layer is formed on the planarization layer.

在图11A、11B及11C中演示的另一实施例中，多于一个微型装置(阵列)1106、1122及1134形成为连续像素化，其中电流被限制于半导体1110、1120及1130的堆叠层的至少一个区域中，以产生隔离微型装置效应(可存在此电流限制结构的阵列来形成微型装置阵列)。在一个实例中，这些堆叠层可为红色、绿色或蓝色外延发光层。堆叠层1110经接合到背板1100，其中背板中的垫界定子像素。此处，可存在对堆叠层1110执行以进一步隔离子像素(阵列)1116的后处理。背板1100可具有针对像素阵列中的每一像素的多个子像素。可存在针对每一子像素的垫，且电流限制结构(阵列)1106经接合到背板子像素中的相关联垫。可存在与背板中的每一相关联垫相关联的多于一个电流限制结构。后处理可包含电流限制、蚀刻堆叠层1110中的顶层中的一或多者。在一种情况下，在接合到背板之前，堆叠层可具有电通孔1112及1114。通孔将相关联垫1102及1104耦合到堆叠层1110(或信号到达背板上的微型装置)。在另一种情况下，在堆叠层1110接合到背板中之后，电通孔1112及1114在堆叠层1110中形成。此过程使开口能够与背板中的其它子像素中的堆叠层1120及1130中的微型装置适当对准。通孔1112及1114的侧壁可经钝化，且可在壁上形成导电层。In another embodiment illustrated in Figures 11A, 11B and 11C, more than one microdevice (array) 1106, 1122 and 1134 is formed as a continuous pixelation in which current is confined to the stacked layers ofsemiconductors 1110, 1120 and 1130 In at least one area, the effect of isolating microdevices is created (an array of such current confinement structures may be present to form an array of microdevices). In one example, these stacked layers may be red, green, or blue epitaxial light-emitting layers. Thestacked layers 1110 are bonded to thebackplane 1100, where the pads in the backplane define subpixels. Here, there may be post-processing performed on thestacked layers 1110 to further isolate the sub-pixels (arrays) 1116 . Thebackplane 1100 may have multiple sub-pixels for each pixel in the pixel array. There may be a pad for each subpixel, and a current confinement structure (array) 1106 is bonded to the associated pad in the backplane subpixel. There may be more than one current limiting structure associated with each associated pad in the backplane. Post-processing may include one or more of current confinement, etching the top layer instack 1110 . In one case, the stacked layers may haveelectrical vias 1112 and 1114 prior to bonding to the backplane. The vias couple the associatedpads 1102 and 1104 to the stack layer 1110 (or signal to microdevices on the backplane). In another case,electrical vias 1112 and 1114 are formed in thestack layer 1110 after thestack layer 1110 is bonded into the backplane. This process enables proper alignment of the openings with the microdevices in thestacked layers 1120 and 1130 in other subpixels in the backplane. The sidewalls ofvias 1112 and 1114 can be passivated, and a conductive layer can be formed on the walls.

堆叠层1120经接合到堆叠层1110的顶部上的背板1100，其中背板中的垫界定子像素。此处，可存在对堆叠层1120执行以进一步隔离子像素(阵列)1122的后处理。背板1100可具有针对像素阵列中的每一像素的多个子像素。可存在针对每一子像素的垫，且电流限制结构(阵列)1122经接合到背板子像素中的相关联垫。可存在与背板中的每一相关联垫相关联的多于一个电流限制结构。后处理可包含电流限制、蚀刻堆叠层1120中的顶层中的一或多者。在一种情况下，在接合到背板之前，堆叠层1120可具有电通孔1124及光学通孔1126。电通孔将相关联垫1104耦合到堆叠层1130。光学通孔允许来自堆叠层1110中的微型装置的光通过堆叠层1120(或信号到达层1110上的微型装置)。在另一种情况下，在堆叠层1120经接合到背板中之后，电通孔1124及光学通孔1126在堆叠层1120中形成。此过程使开口能够与背板中的其它子像素中的堆叠层1110及1130中的微型装置适当对准。通孔1124的侧壁可经钝化，且在壁上形成导电层或从通孔1124内部形成垫。通孔1126的侧壁可经涂布有钝化层及反射层。Stacked layer 1120 is bonded tobackplate 1100 on top of stackedlayer 1110, with pads in the backplate defining subpixels. Here, there may be post-processing performed on thestacked layers 1120 to further isolate the sub-pixels (arrays) 1122 . Thebackplane 1100 may have multiple sub-pixels for each pixel in the pixel array. There may be a pad for each subpixel, and a current confinement structure (array) 1122 is bonded to the associated pad in the backplane subpixel. There may be more than one current limiting structure associated with each associated pad in the backplane. Post-processing may include one or more of current confinement, etching the top layer instack 1120 . In one case, thestack layer 1120 may haveelectrical vias 1124 andoptical vias 1126 prior to bonding to the backplane. Electrical vias couple the associatedpads 1104 to the stacked layers 1130 . Optical vias allow light from microdevices instack 1110 to pass through stack 1120 (or signals to the microdevices on layer 1110). In another case,electrical vias 1124 andoptical vias 1126 are formed in thestack 1120 after thestack 1120 is bonded into the backplane. This process enables the openings to be properly aligned with the microdevices in thestacked layers 1110 and 1130 in other subpixels in the backplane. The sidewalls of thevias 1124 may be passivated and a conductive layer formed on the walls or pads formed from inside thevias 1124 . The sidewalls of thevias 1126 may be coated with a passivation layer and a reflective layer.

堆叠层1130经接合到堆叠层1120的顶部上的背板1100，其中背板中的垫界定子像素。此处，可存在对堆叠层1130执行以进一步隔离子像素(阵列)1134的后处理。背板1100可具有针对像素阵列中的每一像素的多个子像素。可存在针对每一子像素的垫，且电流限制结构(阵列)1134经接合到背板子像素中的相关联垫。可存在与背板中的每一相关联垫相关联的多于一个电流限制结构。后处理可包含电流限制、蚀刻堆叠层1130中的顶层中的一或多者。在一种情况下，在接合到背板之前，堆叠层1130可具有光学通孔1132及1136。光学通孔允许来自堆叠层1110及1120中的微型装置的光通过堆叠层1130(或信号到达层1110及1120上的微型装置)。在另一种情况下，在堆叠层1130经接合到背板1100中之后，光学通孔1136及1132在堆叠层1130中形成。此过程使开口能够与背板中的其它子像素中的堆叠层1110及1120的微型装置适当对准。1132及1136的侧壁可涂布有钝化层及反射层。Stacked layer 1130 is bonded tobackplate 1100 on top of stackedlayer 1120, with pads in the backplate defining sub-pixels. Here, there may be post-processing performed on thestacked layers 1130 to further isolate the sub-pixels (arrays) 1134 . Thebackplane 1100 may have multiple sub-pixels for each pixel in the pixel array. There may be a pad for each subpixel, and a current confinement structure (array) 1134 is bonded to the associated pad in the backplane subpixel. There may be more than one current limiting structure associated with each associated pad in the backplane. Post-processing may include one or more of current confinement, etching the top layer instack 1130 . In one case, thestack layer 1130 may haveoptical vias 1132 and 1136 prior to bonding to the backplane. Optical vias allow light from the micro-devices instacked layers 1110 and 1120 to pass through stacked layer 1130 (or signals to the micro-devices onlayers 1110 and 1120). In another case,optical vias 1136 and 1132 are formed in thestack layer 1130 after thestack layer 1130 is bonded into thebackplane 1100 . This process enables proper alignment of the openings with the microdevices ofstacked layers 1110 and 1120 in other subpixels in the backplane. Sidewalls of 1132 and 1136 may be coated with passivation layers and reflective layers.

在堆叠层1010的接合之前，微型装置1020及1030经接合到背板。可存在针对每一微型装置的多于一个垫或多于两个通孔。导电层可经沉积于微型装置1020及1030或堆叠层1010的顶部上。Microdevices 1020 and 1030 are bonded to the backplane prior to bonding ofstack layer 1010 . There may be more than one pad or more than two vias for each microdevice. Conductive layers may be deposited on top ofmicrodevices 1020 and 1030 orstack layer 1010 .

虽然已说明及描述本发明的特定实施例及应用，但应了解，本发明不限于本文中所公开的精确构造及组合物，且各种修改、改变及变化可从前述描述显而易见，而不脱离如在所附权利要求书中所界定的本发明的精神及范围。While particular embodiments and applications of the invention have been illustrated and described, it is to be understood that the invention is not limited to the precise constructions and compositions disclosed herein and that various modifications, changes and variations may be apparent from the foregoing description without departing from the The spirit and scope of the present invention is as defined in the appended claims.

Claims (56)

Translated fromChinese

1.一种具有微型装置的微型装置阵列，其包括：1. A microdevice array with microdevices comprising:半导体的堆叠层，其接合到背板；Stacked layers of semiconductors, which are bonded to the backplane;所述背板中的垫，其界定子像素，其中多个子像素用于像素阵列中的像素；及a pad in the backplane that defines sub-pixels, wherein a plurality of sub-pixels are used for pixels in a pixel array; and所述堆叠层接合到所述背板中界定子像素的所述垫。The stacked layers are bonded to the pads in the backplane that define subpixels.2.根据权利要求1所述的微型装置阵列，其中存在与所述背板中界定子像素的所述垫相关联的多于一个堆叠层组。2. The microdevice array of claim 1, wherein there is more than one stacked layer set associated with the pads in the backplane that define subpixels.3.根据权利要求1所述的微型装置阵列，其中蚀刻所述堆叠层中的顶层中的一或多者。3. The microdevice array of claim 1, wherein one or more of the top layers of the stacked layers are etched.4.根据权利要求1所述的微型装置阵列，其中在接合到所述背板之前，所述堆叠层具有通孔。4. The microdevice array of claim 1, wherein the stacked layers have vias prior to bonding to the backplane.5.根据权利要求4所述的微型装置阵列，其中所述通孔至少部分填充有导电层，所述导电层用电介质与所述通孔的壁分离。5. The microdevice array of claim 4, wherein the vias are at least partially filled with a conductive layer separated from walls of the vias with a dielectric.6.根据权利要求4所述的微型装置阵列，其中所述通孔将来自所述背板的垫耦合到所述堆叠层的顶部。6. The microdevice array of claim 4, wherein the vias couple pads from the backplane to the tops of the stacked layers.7.根据权利要求1所述的微型装置阵列，其中在所述堆叠层经接合到所述背板中之后，在所述堆叠层中形成电通孔。7. The microdevice array of claim 1, wherein electrical vias are formed in the stacked layers after the stacked layers are bonded into the backplane.8.根据权利要求7所述的微型装置阵列，其中所述通孔与所述背板中的其它子像素中的垫对准。8. The microdevice array of claim 7, wherein the vias are aligned with pads in other subpixels in the backplane.9.根据权利要求8所述的微型装置阵列，其中通孔具有钝化侧壁，且所述垫在所述通孔内或所述通孔的所述壁上。9. The array of microdevices of claim 8, wherein vias have passivated sidewalls and the pads are within or on the walls of the vias.10.根据权利要求9所述的微型装置阵列，其中额外微型装置经接合到所述垫。10. The microdevice array of claim 9, wherein additional microdevices are bonded to the pad.11.根据权利要求10所述的微型装置阵列，其中存在针对每一微型装置的多于一个垫或多于两个通孔。11. The microdevice array of claim 10, wherein there are more than one pad or more than two vias for each microdevice.12.根据权利要求10所述的微型装置阵列，其中所述微型装置或堆叠层在顶部上具有导电层。12. The microdevice array of claim 10, wherein the microdevices or stacked layers have a conductive layer on top.13.根据权利要求1所述的微型装置阵列，其中所述堆叠层是红色外延发光层。13. The microdevice array of claim 1, wherein the stacked layer is a red epitaxial light emitting layer.14.根据权利要求4所述的微型装置阵列，其中所述通孔是光学的。14. The microdevice array of claim 4, wherein the vias are optical.15.根据权利要求7所述的微型装置阵列，其中所述电通孔是光学的。15. The microdevice array of claim 7, wherein the electrical vias are optical.16.根据权利要求15所述的微型装置阵列，其中所述通孔与所述背板中的所述其它子像素中的所述垫对准。16. The microdevice array of claim 15, wherein the vias are aligned with the pads in the other subpixels in the backplane.17.根据权利要求16所述的微型装置阵列，其中通孔具有钝化侧壁，在所述侧壁上具有反射层。17. The microdevice array of claim 16, wherein the via has passivated sidewalls with a reflective layer on the sidewalls.18.根据权利要求17所述的微型装置阵列，其中额外微型装置经接合到所述垫。18. The microdevice array of claim 17, wherein additional microdevices are bonded to the pad.19.根据权利要求18所述的微型装置阵列，其中存在针对每一微型装置的多于一个垫或多于两个通孔。19. The array of microdevices of claim 18, wherein there are more than one pad or more than two vias for each microdevice.20.根据权利要求18所述的微型装置阵列，其中所述微型装置或堆叠层在顶部上具有导电层。20. The microdevice array of claim 18, wherein the microdevices or stacked layers have a conductive layer on top.21.根据权利要求19所述的微型装置阵列，其中包括微型装置的凸块将所述背板耦合到形成于所述微型装置的顶部上的垫。21. The microdevice array of claim 19, wherein bumps comprising microdevices couple the backplane to pads formed on top of the microdevices.22.根据权利要求1所述的微型装置阵列，其中所述微型装置阵列是多于一个微型装置阵列的部分。22. The microdevice array of claim 1, wherein the microdevice array is part of more than one microdevice array.23.根据权利要求22所述的微型装置阵列，其中所述堆叠层是红色、绿色或蓝色外延发光层。23. The microdevice array of claim 22, wherein the stacked layers are red, green, or blue epitaxial light-emitting layers.24.根据权利要求7所述的微型装置阵列，其中所述通孔与额外堆叠层中的所述额外微型装置及所述背板中的所述其它子像素中的所述垫对准。24. The microdevice array of claim 7, wherein the vias are aligned with the pads in the additional microdevices in additional stacked layers and the other subpixels in the backplane.25.根据权利要求22所述的微型装置阵列，其中第二堆叠层经接合到第一堆叠层的顶部上的所述背板，其中所述背板中的所述垫界定所述子像素。25. The microdevice array of claim 22, wherein a second stack layer is bonded to the backplate on top of a first stack layer, wherein the pads in the backplate define the subpixels.26.根据权利要求25所述的微型装置阵列，其中蚀刻所述第二堆叠层中的顶层中的一或多者。26. The array of microdevices of claim 25, wherein one or more of the top layers of the second stacked layers are etched.27.根据权利要求25所述的微型装置阵列，其中在接合到所述背板之前，所述第二堆叠层具有电通孔及光学通孔。27. The microdevice array of claim 25, wherein the second stack layer has electrical and optical vias prior to bonding to the backplane.28.根据权利要求27所述的微型装置，其中所述电通孔将相关联垫耦合到第三堆叠层。28. The microdevice of claim 27, wherein the electrical vias couple the associated pads to a third stack layer.29.根据权利要求25所述的微型装置阵列，其中在将所述第二堆叠层接合到所述背板之后，所述第二堆叠层具有电通孔及光学通孔。29. The microdevice array of claim 25, wherein after bonding the second stack layer to the backplane, the second stack layer has electrical and optical vias.30.根据权利要求29所述的微型装置阵列，其中所述通孔与所述第一堆叠层及所述第三堆叠层中的所述额外微型装置及所述背板中的所述其它子像素中的所述垫对准。30. The array of microdevices of claim 29, wherein the vias and the additional microdevices in the first stack layer and the third stack layer and the other sub-devices in the backplane The pads in the pixels are aligned.31.根据权利要求27所述的微型装置阵列，其中电通孔具有钝化侧壁及形成于所述壁上的导电层或来自所述电通孔内部的垫。31. The microdevice array of claim 27, wherein electrical vias have passivated sidewalls and a conductive layer formed on the walls or pads from inside the electrical vias.32.根据权利要求27所述的微型装置阵列，其中光学通孔具有钝化侧壁，在所述侧壁上具有反射层。32. The microdevice array of claim 27, wherein the optical via has passivated sidewalls with a reflective layer on the sidewalls.33.根据权利要求22所述的微型装置阵列，其中所述第三堆叠层经接合到所述第二堆叠层的顶部上的所述背板，其中所述背板中的所述垫界定所述子像素。33. The microdevice array of claim 22, wherein the third stacked layer is bonded to the backplane on top of the second stacked layer, wherein the pads in the backplane define a defined described sub-pixels.34.根据权利要求33所述的微型装置阵列，其中在接合到所述背板之前，所述第三堆叠层具有光学通孔。34. The microdevice array of claim 33, wherein the third stack layer has optical vias prior to bonding to the backplane.35.根据权利要求33所述的微型装置阵列，其中在接合到所述背板之后，所述第三堆叠层具有光学通孔。35. The microdevice array of claim 33, wherein the third stack layer has optical vias after bonding to the backplane.36.根据权利要求35所述的微型装置阵列，其中所述通孔与第一堆叠层及第二堆叠层中的微型装置及所述背板中的所述其它子像素中的所述垫对准。36. The array of microdevices of claim 35, wherein the vias are paired with the pads in the microdevices in the first and second stacked layers and the other subpixels in the backplane allow.37.根据权利要求36所述的微型装置阵列，其中通孔具有钝化侧壁，在所述侧壁上具有反射层。37. The microdevice array of claim 36, wherein the via has passivated sidewalls with a reflective layer on the sidewalls.38.根据权利要求33所述的微型装置阵列，其中在所述第一堆叠层的所述接合之前，所述第二堆叠层及所述第三堆叠层中的所述微型装置经接合到所述背板。38. The microdevice array of claim 33, wherein the microdevices in the second stack layer and the third stack layer are bonded to the first stack layer prior to the bonding of the first stack layer the back panel.39.根据权利要求33所述的微型装置阵列，其中存在于所述第二堆叠层及所述第三堆叠层或所述第一堆叠层的所述微型装置的顶部上的导电层。39. The microdevice array of claim 33, wherein a conductive layer is present on top of the microdevices of the second stack layer and the third stack layer or the first stack layer.40.根据权利要求33所述的微型装置阵列，其中存在针对每一微型装置的多于一个垫或多于两个通孔。40. The array of microdevices of claim 33, wherein there are more than one pad or more than two vias for each microdevice.41.一种在彩色微型装置阵列中调制电阻的方法，所述方法包括：41. A method of modulating resistance in an array of colored microdevices, the method comprising:具有每像素多于一个类型的微型装置；have more than one type of microdevice per pixel;在两个相邻像素之间共享至少一个类型的微型装置；及sharing at least one type of microdevice between two adjacent pixels; and调制所述微型装置的接触层的电阻以产生像素化。The resistance of the contact layer of the microdevice is modulated to produce pixelation.42.根据权利要求41所述的方法，其中像素定向对于所述相邻像素不同，从而使得能够在至少两个相邻像素之间共享至少一个微型装置。42. The method of claim 41, wherein pixel orientation is different for the adjacent pixels, thereby enabling at least one microdevice to be shared between at least two adjacent pixels.43.根据权利要求42所述的方法，其中每像素使用彩色漫射器以减少像素定向变化的效应。43. The method of claim 42, wherein a color diffuser is used per pixel to reduce the effects of pixel orientation changes.44.一种制造彩色微型装置阵列的方法，所述方法包括：44. A method of fabricating an array of colored microdevices, the method comprising:在背板的顶部上堆叠单片装置的多于一个层；stacking more than one layer of a monolithic device on top of a backplane;通过第一垫将第一单片装置接合到所述背板；bonding a first monolithic device to the backplane through a first pad;在所述第一单片装置中形成开口；forming an opening in the first monolithic device;在所述第一单片装置中的所述开口中形成第二垫；及forming a second pad in the opening in the first monolithic device; and通过所述第二垫将第二单片装置接合到所述背板。A second monolithic device is bonded to the backplane through the second pad.45.根据权利要求44所述的方法，其中所述层中的至少一者中的像素化通过调制所述垫之间的接触层的电阻而形成。45. The method of claim 44, wherein pixelation in at least one of the layers is formed by modulating the resistance of a contact layer between the pads.46.一种在彩色微型装置阵列中组合光色彩的方法，所述方法包括：46. A method of combining light colors in an array of colored microdevices, the method comprising:使用线性色彩组合器组合来自不同图像源的光色彩；Combine light colors from different image sources using a linear color combiner;具有在线性色彩组合器的一侧上的所述图像源；having said image source on one side of a linear color combiner;使用反射器重新引导通过不同图像源产生的光；Use reflectors to redirect light generated by different image sources;具有用于图像源的前板以产生或捕获每像素的光；Have a front plate for the image source to generate or capture light per pixel;具有用于控制或捕获每像素的所述前板的输出的背板；及having a backplane for controlling or capturing the output of the frontplane per pixel; and将所述图像源耦合到所述线性色彩组合器的少于两个表面。The image source is coupled to less than two surfaces of the linear color combiner.47.根据权利要求46所述的方法，其中所述图像源耦合到所述线性色彩组合器的一个表面。47. The method of claim 46, wherein the image source is coupled to a surface of the linear color combiner.48.根据权利要求47所述的方法，其中所述图像源的所述前板经形成/接合到一个背板。48. The method of claim 47, wherein the front plate of the image source is formed/bonded to a back plate.49.根据权利要求46所述的方法，其中所述背板经接合到机械结构。49. The method of claim 46, wherein the backplate is bonded to a mechanical structure.50.根据权利要求26所述的方法，其中所述反射器是由具有不同光学性质的不同光学层制成或由光栅结构制成。50. The method of claim 26, wherein the reflector is made from different optical layers with different optical properties or from a grating structure.51.根据权利要求46所述的方法，其中额外图像源经设置于后表面上，且充当图像传感器以捕获通过另一侧的光。51. The method of claim 46, wherein an additional image source is disposed on the rear surface and acts as an image sensor to capture light passing through the other side.52.根据权利要求51所述的方法，其中非传感器的额外图像源充当用于所述图像传感器的光产生器。52. The method of claim 51, wherein an additional image source other than a sensor acts as a light generator for the image sensor.53.根据权利要求46所述的方法，其中所述反射器是二向色镜。53. The method of claim 46, wherein the reflector is a dichroic mirror.54.根据权利要求53所述的方法，其中所述二向色镜反射低于截止波长的所述光，且通过在带宽内的所述光。54. The method of claim 53, wherein the dichroic mirror reflects the light below a cutoff wavelength and passes the light within a bandwidth.55.根据权利要求54所述的方法，其中所述图像源是显示器。55. The method of claim 54, wherein the image source is a display.56.根据权利要求54所述的方法，其中多于一个光源用于多于一个反射器的图像源，使得第一反射器反射通过第一光源产生的光的部分，且第二反射器反射通过第二光源产生的光的部分，且通过来自所述第一反射器的所述光的部分。56. The method of claim 54, wherein more than one light source is used for the image source of more than one reflector, such that the first reflector reflects a portion of the light generated by the first light source and the second reflector reflects through The second light source produces the portion of light and passes the portion of the light from the first reflector.

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